Você está na página 1de 3

Jawaharlal Nehru Technological University, the First Technological University of India, was established on 2nd October 1972 in Andhra

Pradesh with head quarters located in a historical city Hyderabad. The University is one of the premier Universities in India accredited by NAAC with A Grade. After successful and proven levels of appreciated existence and stature spanning over 36 years, JNTU has been divided into four different universities by Govt. of Andhra Pradesh, through Act No.30, Dt. 24th September, 2008. One of the constituent colleges of the University JNTUH College of Engineering, Hyderabad is regarded as a pioneer in shaping the excellence of some of the leading organizations of the industry, by churning out the finest professionals with a resolve to scale greater heights in the technological scenario, every year. Other constituent college of JNTUH is located at Jagityal and 11 other academic units at Hyderabad campus. The Department of Electronics and Communication Engineering established in 1973, is instrumental in molding the careers of students and helping them to become world-class professionals. Besides highly qualified and experienced staff and well-equipped laboratories, the Department has been awarded 8.1 points out of 10 by the State Board of Technical Education. CVED Center for VLSI & Embedded Systems Design is initiated by Dr. D. N. Reddy, Honble Vice Chancellor of JNTUH University and is aimed at

creating the necessary infrastructure facilities for carrying out the studies and investigations in identified R&D areas, related to VLSI Design and Embedded Systems Design, Development and Testing. The vision of CVED is to promote Research and Developmental Activities in application specific areas related to VLSI Design, Embedded System Design, Signal Processing and Wireless Communications, with identified knowledge base in terms of faculty, scholars and infrastructure, capable of developing low cost and innovative indigenous technologies. Mentor Graphics: Mentor Graphics provides software and hardware design solutions that enable companies to develop better electronic products faster and more costeffectively. We offer innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. Trident Techlabs: Trident Techlabs is an ISO 9001 2000 Company having its presence in Seven Major Cities across India. Techlabs is well respected in different segments of Industries and Academic Institutions for NI, EDA, Power and Automation. We are authorized partners with Mentor Graphics Corporation, USA in India for the promotion of its solutions to various segments of the Industry and Universities.

own but because their specialty to develop better electronic products, faster and more costeffective powerful tools and methodologies to address the challenges for next-generation designs. This workshop is a gesture of such an attempt to provide a chance to the interested, inquisitive and talented generation in the Universities to educate, inspire them to pursue their ambitions and make a great impression on the countrys future. Topics to be covered: Digital Logic Using HDLs Logic Synthesis Design For Test (DFT) CMOS logic gates Schematic & layout Analog & Mixed Signal simulations Open Standards Verification Methodologies Parasitic Extraction &Physical Verification DRC / LVS, Rule Sets Using Modelsim, Questasim, Precision Synthesis, IC Station, Eldo, Calibre ,HDL Designer (Mentor Graphics tools). Resource Persons: Resource persons are drawn from: M/s Mentor Graphics, Bangalore, Trident Techlabs Private Ltd, Bangalore / Hyderabad, JNTUH Eligibility: Faculty of Educational Institutions/ Research Scholars/ Persons working in R& D Organization, with a minimum qualification of Bachelors degree in Electronics &

About the Workshop:


Educators at the Worlds most prestigious engineering colleges and universities adopt Mentor Graphics Tools not only because they easy to learn and affordable to

Communication/ Electrical/ Computer Science and allied branches of Engineering, are eligible to apply. Important Date: Last date for registration: 6st August, 2010 How to Apply: Interested persons may apply in the prescribed format along with the Registration fee. Payments should be made through a Demand Draft drawn in favor of The Principal, CVED payable at JNTUH, Hyderabad or by cash at the time of registration and the application be sent to on or before 6th August 2010. As an alternative, the form can be submitted online to cved.jntuh@gmail.com. The online submission will require as an attachment of softcopy of registration form, the scanned version of the Demand Draft being sent. The DD must also be mailed separately at the same time. The participants are advised to register well in advance of the scheduled dates. Registration Fee: Research / P.G. Students/ Academic Staff: Rs. 1,500/Accommodation: Limited accommodation is available for the participants in the Guest House on first come first serve basis on payment basis for an amount of Rs.300/-(Towards boarding & Lodging Charges) per day. However working lunch and snacks will be provided for all the participants. Address for Correspondence
Dr. M. Madhavi Latha Professor & Coordinator CVED Department of ECE, JNTUH CEH Cell: 9848506611 E-mail: cved.jntuh@gmail.com Dr. M. Asha Rani Professor & Coordinator CVED Department of ECE, JNTUH CEH Cell: 9848564860

Mr. Sham Kumar / Mr. B. Srinivas Trident Techlabs Pvt Ltd, Hyderabad Email : s.kumar@tridenttechlabs.com b.srinivas@tridenttechlabs.com Cell: +91 9985020430, +91 9908966658 Office: 040- 27632958, 40078229

A Five day Workshop on

Registration Form
Name of the Applicant:. (Block Letters) .. Designation: Gender: (M/F): .. Educational Qualifications: Address for Correspondence :( Including E-mail, Fax, Cell / Landline) Name of the Sponsoring Institute/Organization: Is Accommodation required ? Demand Draft Amount: Rs: Demand Draft No:. Bank: Dated:... Yes / No

VLSI Design Methodology Using Mentor Graphics Tools


9th 13th August 2010 Organized by

Department of Electronics & Communication Engineering

Center for VLSI & Embedded Systems Design (CVED)


In Collaboration with

Mentor Graphics, Bangalore and

Trident Techlabs
Coordinators

Dr. L. Pratap Reddy Dr. M. Madhavi Latha Dr. M. Asha Rani

JNTUH COLLEGE OF ENGINEERING Hyderabad-500 085, Andhra Pradesh

Você também pode gostar