LG Kf300 SVC Eng 0422

Service Manual
Service Manual KF300
Model : KF300
Date: February, 2008 / Issue 1.0
Table Of Contents
1. INTRODUCTION ........................... 5
1.1 Purpose .................................................. 5 1.2 Regulatory Information............................ 5 1.3 Abbreviations .......................................... 7 4.14 KEY backlight Trouble .........................97 4.15 RTC Trouble ........................................99 4.16 Folder on/off Trouble..........................101 4.17 Micro SD Trouble ...............................103 4.18 Bluetooth Trouble...............................105 4.19 FM Radio Trouble ..............................107
2. SYSTEM SPECIFICATION............... 9
2.1 H/W Features.......................................... 9 2.2 Technical Specification ......................... 10
5. DOWNLOAD.....................................109
5.1 Download .............................................109
3. TECHNICAL BRIEF ....................... 15

3.1 Digital Main Processor(AD6900, U101). 15 3.2 Analog Main Processor(AD6855, U100) 18 3.3 Power Amplifier Module(SKY77318, U601) .............................................................. 25 3.4 FEM (DGM1110M014, FL601) ............. 26 3.5 RTC(FC-135, X100).............................. 27 3.6 Crystal(26 MHz, X601).......................... 28 3.7 RF Tranceiver(AD6548, U602) ..............30 3.8 MEMORY(PF38F5060M0Y0BE, U202)..36 3.9 BT Module with integrated FM tuner (EWFMLBAXX, U201) ...........................39 3.10 SIM Card Interface...............................41 3.11 Micro-SD Card Interface ......................42 3.12 LCD Interface.......................................43 3.13 Battery Charger Interface.....................46 3.14 Keypad Interface..................................47 3.15 Audio Interface.....................................49 3.16 Camera Interface (2M Fixed Focus Camera) ...................56 3.17 KEY BACLKLIGHT LED Interface .......59 3.18 Vibrator Interface .................................60
6. BLOCK DIAGRAM ........................116 7. CIRCUIT DIAGRAM ......................117 8. BGA IC Pin Check ........................127 9. PCB LAYOUT ................................133 10. ENGINEERING MODE ................139
10.1 BB Test [MENU 1]..............................140 10.2 RF Test [MENU 2]..............................142 10.3 MF mode [MENU 3] ...........................142 10.4 Trace option [MENU 4] ......................143 10.5 Call timer [MENU 5] ...........................143 10.6 Fact. Reset [MENU 6] ........................143 10.7 S/W version........................................143
11. STAND ALONE TEST .................144

11.1 Introduction ........................................144 11.2 Setting Method...................................144 11.3 Means of Test ....................................145
4. TROUBLE SHOOTING ...................61

4.1 RF Component.......................................61 4.2 RX Trouble.............................................62 4.3 TX Trouble .............................................67 4.4 Power On Trouble..................................73 4.5 Charging Trouble ...................................75 4.6 Vibrator Trouble .....................................77 4.7 LCD Trouble...........................................79 4.8 Camera Trouble .....................................83 4.9 Speaker Trouble ....................................87 4.10 Earphone Trouble ................................89 4.11 Receiver Trouble..................................91 4.12 Microphone Trouble .............................93 4.13 SIM Card Interface Trouble..................95
12. AUTO CALIBRATION .................147

12.1 Overview ............................................147 12.2 Equipment List ...................................147 12.3 Test Jig Operation..............................148 12.4 Procedure ..........................................149 12.5 AGC ...................................................151 12.6 APC....................................................151 12.7 ADC ...................................................151
13. EXPLODED VIEW & REPLACEMENT PART LIST ..... 153

13.1 Exploded View .................................. 153 13.2 Replacement Parts ............................155 13.3 Accessory ......................................... 168
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
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LGE Internal Use Only
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1. INTRODUCTION
1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the features of this model.
1.2 Regulatory Information

A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example, persons other than your companys employees, agents, subcontractors, or person working on your companys behalf) can result in substantial additional charges for your telecommunications services. System users are responsible for the security of own system. There are may be risks of toll fraud associated with your telecommunications system. System users are responsible for programming and configuring the equipment to prevent unauthorized use. The manufacturer does not warrant that this product is immune from the above case but will prevent unauthorized use of common-carrier telecommunication service of facilities accessed through or connected to it. The manufacturer will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly causing harm or interruption in service to the telephone network, it should disconnect telephone service until repair can be done. A telephone company may temporarily disconnect service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these changes could reasonably be expected to affect the use of the this phone or compatibility with the network, the telephone company is required to give advanced written notice to the user, allowing the user to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its authorized agent. The user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore, note that unauthorized alternations or repair may affect the regulatory status of the system and may void any remaining warranty.
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1. INTRODUCTION
E. Notice of Radiated Emissions

This model complies with rules regarding radiation and radio frequency emission as defined by local regulatory agencies. In accordance with these agencies, you may be required to provide information such as the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.
G. Interference and Attenuation

Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign. Following information is ESD handling: Service personnel should ground themselves by using a wrist strap when exchange system boards. When repairs are made to a system board, they should spread the floor with anti-static matb which is also grounded. Use a suitable, grounded soldering iron. Keep sensitive parts in these protective packages until these are used. When returning system boards or parts like EEPROM to the factory, use the protective package as described.
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1. INTRODUCTION
1.3 Abbreviations
For the purposes of this manual, following abbreviations apply:
APC BB BER CC-CV DAC DCS dBm DSP EEPROM ESD FPCB GMSK GPIB GSM IPUI IF LCD LDO LED OPLL
Automatic Power Control Baseband Bit Error Ratio Constant Current - Constant Voltage Digital to Analog Converter Digital Communication System dB relative to 1 milli watt Digital Signal Processing Electrical Erasable Programmable Read-Only Memory Electrostatic Discharge Flexible Printed Circuit Board Gaussian Minimum Shift Keying General Purpose Interface Bus Global System for Mobile Communications International Portable User Identity Intermediate Frequency Liquid Crystal Display Low Drop Output Light Emitting Diode Offset Phase Locked Loop
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1. INTRODUCTION
PAM PCB PGA PLL PSTN RF RLR RMS RTC SAW SIM SLR SRAM PSRAM STMR TA TDD TDMA UART VCO VCTCXO WAP
Power Amplifier Module Printed Circuit Board Programmable Gain Amplifier Phase Locked Loop Public Switched Telephone Network Radio Frequency Receiving Loudness Rating Root Mean Square Real Time Clock Surface Acoustic Wave Subscriber Identity Module Sending Loudness Rating Static Random Access Memory Pseudo SRAM Side Tone Masking Rating Travel Adapter Time Division Duplex Time Division Multiple Access Universal Asynchronous Receiver/Transmitter Voltage Controlled Oscillator Voltage Control Temperature Compensated Crystal Oscillator Wireless Application Protocol
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2. SYSTEM SPECIFICATION
2.1 H/W Features
Item Standard Battery Stand by TIME Talk time Stand by time Charging time RX Sensitivity TX output power GPRS compatibility SIM card type Display Feature Li-ion Polymer, 3.7V 800mAh Up to 200 hrs : Paging Period 5, RSSI 85dBm Up to 200min : GSM Tx Level 7 Up to 200 hours (Paging Period: 5, RSSI: -85 dBm) Approx. 3 hours GSM850/EGSM: -109dBm, DCS/PCS: -109dBm GSM850, EGSM: 32.4dBm(Level 5), DCS , PCS: 29.5dBm(Level 0) Class 10 3V Small MAIN : TFT 240 320 pixel 262K Color SUB : TFT 128 160 pixel 262K Color Hard icons. Key Pad 0 ~ 9, #, *, Up/Down/Left/Right/Ok Navigation Key Menu Key, Clear Key, Back Key, Confirm Key Send Key, Volume Key, PWR Key, Camera Key, Hot Key Internal Yes Yes EFR/FR/HR Yes Yes Yes Yes Yes 16 Speaker / 11x07 Receiver Yes SW MIDI (Mono SPK) 2M Bluetooth version 2.0 / 76~108MHz supported Comment
Status Indicator
ANT EAR Phone Jack PC Synchronization Speech coding Data and Fax Vibrator Loud Speaker Voice Recoding Microphone Speaker/Receiver Travel Adapter MIDI Camera Bluetooth / FM Radio
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2.2 Technical Specification

Item Description Specification GSM850 TX: 824 ~ 849MHz RX: 869 ~ 894MHz EGSM TX: 880 ~ 915MHz RX: 925 ~ 960MHz 1 Frequency Band DCS1800 TX: 1710 ~ 1785MHz RX: 1805 ~ 1880MHz PCS1900 TX: 1850 ~ 1910MHz RX: 1930 ~ 1990MHz RMS < 5 degrees Peak < 20 degrees < 0.1 ppm GSM850/EGSM Level 5 6 7 8 9 10 11 4 Power Level 12 Power 33 dBm 31 dBm 29 dBm 27 dBm 25 dBm 23 dBm 21 dBm 19 dBm Toler. 2dB 3dB 3dB 3dB 3dB 3dB 3dB 3dB Level 13 14 15 16 17 18 19 Power 17 dBm 15 dBm 13 dBm 11 dBm 9 dBm 7 dBm 5 dBm Toler. 3dB 3dB 3dB 5dB 5dB 5dB 5dB
2 3
Phase Error Frequency Error
DCS/PCS Level 0 1 2 3 4 5 6 7 Power 30 dBm 28 dBm 26 dBm 24 dBm 22 dBm 20 dBm 18 dBm 16 dBm Toler. 2dB 3dB 3dB 3dB 3dB 3dB 3dB 3dB Level 8 9 10 11 12 13 14 15 Power 14 dBm 12 dBm 10 dBm 8 dBm 6 dBm 4 dBm 2 dBm 0 dBm Toler. 3dB 4dB 4dB 4dB 4dB 4dB 5dB 5dB
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Item
Description GSM850/EGSM
Specification
Offset from Carrier (kHz). 100 200 250 400 600 ~ 1,200 1,200 ~ 1,800 1,800 ~ 3,000 3,000 ~ 6,000 5 Output RF Spectrum (due to modulation) DCS/PCS Offset from Carrier (kHz). 100 200 250 400 600 ~ 1,200 1,200 ~ 1,800 1,800 ~ 3,000 3,000 ~ 6,000 6,000 GSM850/EGSM Offset from Carrier (kHz) 6 Output RF Spectrum (due to switching transient) 400 600 1,200 1,800 6,000
Max. [dBc] 0.5 -30 -33 -60 -60 -60 -63 -65 -71
Max. [dBc] 0.5 -30 -33 -60 -60 -60 -65 -65 -73
Max. [dBm] -19 -21 -21 -24
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Item
Description DCS/PCS
Specification
Offset from Carrier (kHz) 6 Output RF Spectrum (due to switching transient) 400 600 1,200 1,800 7 Spurious Emissions Conduction, Emission Status GSM850/EGSM BER (Class II) < 2.439% @-102 dBm DCS/PCS BER (Class II) < 2.439% @-100 dBm 9 10 RX Level Report Accuracy SLR 8 3 dB Frequency (Hz) 100 200 300 11 Sending Response 1,000 2,000 3,000 3,400 4,000 12 RLR 2 3 dB Frequency (Hz) 100 200 300 13 Receiving Response 1,000 3,000 3,400 4,000 Max.(dB) -12 0 0 0 4 4 4 Max.(dB) -12 0 0 0 4 4 4 0
Max. [dBm] -22 -24 -24 -27
Bit Error Ratio
Min.(dB) -12 -6 -6 -6 -9 -
Min.(dB) -12 -6 -6 -6 -9
*Mean that Adopt a straight line in between 300 Hz and 1,000 Hz to be Max. level in the range.
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Item 14 15 STMR
Description 13 5 dB > 6 dB
Specification
Stability Margin
dB to ARL (dB) -35 -30 16 Distortion -20 -10 0 7 10 17 18 19 20 Side Tone Distortion System frequency (13 MHz) tolerance 32.768KHz tolerance Ringer Volume 30 ppm Three stage distortion < 10% 2.5 ppm
Level Ratio (dB) 17.5 22.5 30.7 33.3 33.7 31.7 25.5
At least 65 dBspl under below conditions: 1. Ringer set as ringer. 2. Test distance set as 50 cm Fast Charge : Typ. 430 mA Slow Charge : Typ. 80mA Total Charging Time : < 3 hours Bar Number 7 75 54 42 21 10 0 OFF Battery Bar Number 3 32 21 10 Power -93~ -93 -98 -101 -104 -106 ~-106 Voltage 3.75 3.75 3.64 3.54 0.05 V 0.05 V 0.05 V 0.05 V 2 2 2 2 2
21
Charge Current
22
Antenna Display
23
Battery Indicator
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Item 24
Description Low Voltage Warning (Blinking Bar) 3.54 3.4 3.33
Specification 0.05V (Call) 0.05V (Standby) 0.05V
25 26
Forced shut down Voltage Sustain RTCwithout battery
Over 50 hours Li-Ion Battery Standard Voltage = 3.7 V Battery full charge voltage = 4.2 V Capacity: 800mAh Switching-mode charger Input: 100 ~ 350V, 50/60 Hz Output: 5.1 V, 700 mA
27
Battery Type
28
Travel Charger
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.1 Digital Main Processor(AD6900, U101)
Figure. 3-1 AD6900 FUNCTIONAL BLOCK DIAGRAM
The AD6900 is an advanced, low-power baseband processing solution from Analog Devices, and is part of the AD20msp500 SoftFone chipset family. The AD6900 is intended for use in a wide variety of feature-rich phones with GSM/GPRS/EGPRS based system connectivity requirements. It is designed to interface easily to an application/OS processor, or to stand alone as a fully integrated and easy-touse solution for mobile handset and wireless modem applications.
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3. TECHNICAL BRIEF
3.1.1 Features of AD6900

Complete Single-Chip Programmable Digital Baseband Processor with four main subsystems
MCU Control Processor Subsystem:

32-bit ARM926EJ-S MCU Control Processor 260 MHz operation at 1.5V dedicated caches, 16K bytes each, for instructions and data 4kB Instruction Tightly Coupled Memory (TCM) 2-Mbit On-chip System SRAM Ciphering coprocessor for GPRS supporting GEA1 and GEA2 encryption algorithms Kasumi cipher coprocessor for GEA3 encryption Dedicated multichannel DMA controller
DSP Subsystem:
Blackfin 16-bit fixed-point DSP Processor 260 MHz operation at 1.5V Memory: L1 program space: 64 kB SRAM and 16 kB configurable as instruction cache or SRAM L1 data space: Two banks of 16K bytes, each with 8K bytes of dedicated SRAM and an additional 8K bytes that can be configured as either cache or SRAM L2 space: 64KB SRAM Ciphering coprocessor (GEA1 and GEA2) Kasumi cipher coprocessor for GEA3 encryption Dedicated multichannel DMA controller
Peripherals Subsystem:
Shared on-chip peripherals and off-chip interfaces: Support for Burst-mode, Page-mode, and NAND Flash memory Support for SRAM, SDRAM, and PSRAM (cellular RAM) Full-Speed USB 2.0 Dual-Role Interface with OTG (On-The-Go) Host Mode or traditional Peripheralonly mode
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3. TECHNICAL BRIEF
Applications Subsystem for Enhanced Multimedia:

Parallel Peripheral Interface (PPI) for 10-bit dedicated camera sensor or video input interface (including ITU-656 and ITU-601 digital video) Separate external bus interface for parallel LCD displays (or camera module inputs) - reduces noise and loading on the main EBUS interface Dedicated multi-channel DMA controller
OTHER FEATURES
Real-Time Clock (RTC) with Alarm Four General-Purpose Timers Baseband Converter Interface Compatible with Othello radio subsystem Highly configurable interrupt controller architecture Programmable bus arbitration to optimize system performance Supports 13 MHz and 26 MHz Input Clocks Programmable Power Management and Clock Management - Slow Clocking Scheme for Low Idle Mode Current - Power Down modes - Dynamic Core Voltage Scaling from 1.1 - 1.5V Independent I/O Voltage Domains On-chip support for EGPRS Data Services up to Class 10 Embedded Trace Macrocell for MCU Debug JTAG Interface for Test and In-Circuit Emulation of both the MCU and DSP Advanced features for security
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3. TECHNICAL BRIEF
3.2 Analog Main Processor(AD6855, U100)
Figure. 3-2-1 AD6855 FUNCTIONAL BLOCK DIAGRAM
The AD6855 is a complete mixed-signal baseband processor that combines all of the data converters and power supply regulators required for a GSM 900 / GSM 850 / DCS 1800 / PCS 1900 mobile on a single device, including HSCSD, GPRS and EGPRS.
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3. TECHNICAL BRIEF
3.2.1 General Description

The AD6855 baseband transmit section supports the following mobile station GMSK modulation power classes: GSM 900/850 power classes 4 and 5, DCS 1800 power classes 1 and 2, and PCS 1900 power classes 1 and 2. The AD6855 baseband transmit section supports the following mobile station 8-PSK modulation power classes: GSM 900/850 power classes E2 and E3, DCS 1800 power classes E2 and E3, and PCS 1900 power classes E2 and E3. The AD6855 baseband receive section supports GMSK and 8-PSK applications. The AD6855 auxiliary section provides a voltage reference, an automatic frequency control DAC, an auxiliary ADC, and light controllers. The auxiliary ADC provides two channels for measuring temperature using discrete external devices placed in critical locations. The AD6855 audio section provides 8 kHz and 16 kHz sampling rates for voiceband data input and output and provides nine standard sample rates ranging from 8kHz to 48 kHz for personal audio output on two PCM Audio serial ports. The two Audio serial ports allow support for concurrency. The AD6855 power management section provides voltage regulators for digital and analog components, a battery charger, battery protection circuitry, and power supply activation logic. The AD6855 digital processor interface provides serial ports for control data, baseband transmit and receive data, and two for audio data.
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3. TECHNICAL BRIEF
3.2.2 Power Block

CSPORT interface, power management control interface and the circuit that generates power up RESET pulses (RESET2P8 and RESET1P8) for use by the DBB chip. All regulators except the USB interface regulator are powered from the main battery. The USB regulator is powered from USB VBUS. And the user presses KEYON which puts the AD6855 power management system into ACTIVATION state (see definitions below) and signals DBB software that its time to wake up and operate using the KEYOUT signal.
Figure. 3-2-2 AD6855 POWER BLOCK DIAGRAM
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3. TECHNICAL BRIEF
Figure. 3-2-3 AD6855 KEYON/KEYOUT BLOCK DIAGRAM
Figure. 3-2-4 AD6855 RESET GENERATION BLOCK DIAGRAM
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3. TECHNICAL BRIEF
Power On Reset Generator

The power-on reset signals (RESET1P8 and RESET2P8) are asserted based on the VCORE (if VAPPCFG = 0), VMEM, VEXT, and VPLL regulators. RESET1P8 and RESET2P8 are low when reset is enabled and high when reset is disabled. When the outputs of all four regulators reach their corresponding threshold voltages, reset will be disabled after a nominal reset period of 130ms. The outputs of all four regulators must remain at or above their corresponding threshold voltages for the duration of the reset period for reset to be disabled (pulled high). The nominal 130ms reset period is restarted whenever all four regulators reach their threshold voltages. The nominal reset period of 130ms can be extended by connecting an external capacitor to CRST. This capacitor is charged using a small current when reset is enabled. Once the capacitor reaches the threshold, reset is disabled. Reset will be enabled immediately if any one of the four regulators falls below their corresponding threshold voltages. In addition, reset will be enabled if VBAT falls below VRTC. The PWREN signal is the logical AND of all the state controls that enable or disable many of the regulators on the chip. If the regulators enabled by PWREN are disabled by PMT state controls described below then PWREN must go low. When PWREN goes low reset will be immediately enabled causing RESET1P8 and RESET2P8 to be pulled low. When reset is enabled, both RESET1P8 and RESET2P8 are actively pulled low. CRST is also actively pulled low when reset is enabled.
VABB Regulator Enable/Disable Logic Operation

The VABB regulator powers many on-chip analog circuits on the ABB. The VCXOEN signal, the VABBEn bit in the LDOControl1 Bit Positions ( Addr 0x35) register, and the AFCDACMode and AFCDACOn bits in the AuxControl1 Bit Positions ( Addr 0x13) register all particpate in controlling the VABB enable/disable. When the ABB power management system transitions from Off state, DDLO state, UVLO state, or Thermal Shutdown State to Power Key Activation, Charger Activation, USB Charger Activation, or Active State VABB will be enabled. During these state transitions ABBEn = 0 and AFCDACMode = 0, VRF is enabled. Once the ABB power management system is in Power Key Activation, Charger Activation, USB Charger Activation, Active-Standby or Active State the VABB regulator enable/disable is controlled by the information written to the VABBEn and AFCDACMode register bits by system software.
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3. TECHNICAL BRIEF
Digital Baseband Core (VCORE)

The Digital Baseband Core regulator supplies the digital baseband processor (DBB) core. The voltage on VCORE is selectable using the VCOREControl register. The VCOREActive code selects the voltage on VCORE in high power mode and the VCOREStandby code selects the voltage on VCORE in low-power mode.
DBB Interface (VINT)

The DBB interface regulator supplies the DBB/ABB digital interfaces. The output voltage of the VINT regulator is nominal 1.8V.
Memory (VMEM)
The VMEM regulator supplies the external memory(s) and the interface to the external memory on the digital baseband processor. The output voltage of the Memory Interface regulator can be selected as 1.8V nominal or 2.8V nominal using the VMEMSEL terminal.
External Interface (VEXT)

The External Interface regulator supplies the Radio digital interface and the high voltage (>1.8V) interface between the digital baseband processor and various peripherals, such as the LED indicators and the LCD display.
SIM Interface (VSIM)

AD6855 is designed to support 3.0 V and 1.8 V SIMs exclusively (i.e. no 5 V SIMs). The SIM Interface regulator supplies the SIM interface circuitry on the digital processor and the SIM card. By default the SIM Interface regulator output is 2.85 V, which can be decreased to 1.8 V if a 1.8 V SIM is detected.
Real-Time Clock (VRTC)

The Real-Time Clock regulator supplies the Real-Time Clock module. The Real-Time Clock regulator is optimized for low ground current.
Baseband Analog (VABB)

The Baseband Analog regulator supplies the analog portions of the AD6855. Operation of the VABB regulator is controlled by the VABBEn bit in the LDOControl1 register. If VABBEn = 0, the VABB regultor will be disabled unless the AFCDAC is enabled or VCXOEN = 1. If VABBEn = 1 (the default state) VABB is enabled along with VCORE, VMEM, and VEXT. The Baseband Analog regulator is optimized for high ripple rejection and low noise. The output of the Baseband Analog regulator should not be used as a supply for any external components.
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3. TECHNICAL BRIEF
Microphone (VMIC)
The Microphone regulator supplies the microphone interface circuitry. The Microphone regulator is optimized for extremely high ripple rejection up to 217 Hz and low noise.
VRF (VRF)
The VCXO regulator supplies the voltage controlled crystal oscillator (VCXO). The VCXO regulator is optimized for high ripple rejection and low noise.
USB Interface (VUSB)

The VUSB regulator supplies the USB transceiver located in the DBB. Digital Baseband PLL (VPLL) The VPLL regulator supplies the phase locked loop on the digital baseband (DBB).
General Purpose Regulator (VGP)

The General Purpose regulator is intended primarily to serve as a supply rail for camera modules. Its voltage is programmable by setting VGPSel[3:0] in theLDOControl2 Register. VGP is enabled by setting the VGPEn bit in LDOControl1 to 1.
Applications Regulator (VAPP)

The VAPP regulator is an adjustable regulator that uses an off chip pass device. It has two modes of operation selected by the state of the VAPPCFG terminal. If VAPPCFG is pulled low the VAPP regulator functions as a programmable voltage applications supply. In this mode, VAPP is enabled or disabled using the VAPPEn bit of LDOControl1.
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3. TECHNICAL BRIEF
3.3 Power Amplifier Module(SKY77318, U601)

3.3.1 Internal Block Diagram
Figure. 3-3-1 SKY77318 FUNCTIONAL BLOCK DIAGRAM
3.3.2 General Description

The SKY77318 Power Amplifier Module (PAM) is designed in a low profile (1.2 mm), compact form factor for quad-band cellular handsets comprising GSM850/900, DCS1800, and PCS1900 operation. The PAM also supports Class 12 General Packet Radio Service (GPRS) multi-slot operation. The module consists of separate GSM PA and DCS1800/PCS1900 PA blocks, impedance-matching circuitry for 50 input and output impedances and a Power Amplifier Control (PAC) block with an internal current-sense resistor. The custom BiCMOS integrated circuit provides the internal PAC function and interface circuitry. Fabricated onto a single Gallium Arsenide (GaAs) die, one Hetero-junction Bipolar Transistor (HBT) PA block supports the GSM bands and the other supports the DCS1800 and PCS1900 bands. Both PA blocks share common power supply pins to distribute current.
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3. TECHNICAL BRIEF
3.4 FEM (DGM1110M014, FL601)

ANT_SW1 GSM850/900 TX DCS/PCS TX GSM850/900 RX DCS/PCS RX L H L H Figure 3-4-1 Band SW Logic Table ANT_SW2 H H L L
2V75_VCXO
20 19 18 16 11 9 R612 10 12
GND6 GND5 GND4 GND3 GND2 GND1 VDD
GSM850_900_TX GSM1800_1900_TX GSM1900_RX2 GSM1900_RX1 GSM1800_RX2 GSM1800_RX1 GSM900_RX2 GSM900_RX1 GSM850_RX2 GSM850_RX1
15 10 8 7 6 5 4 3 2 1
C632 39p
C628 0.1u
VC2 13 VC1 14 DGM1110M014 FL601
17
ANT
ANT_SW1 ANT_SW2
C643 100p
C644 100p
Figure 3-4-2 FEM CIRCUIT DIAGRAM
The FEM is integrated of quadband RX SAWs, internal diplexer and ESD protection at Ant port to 8kV acc.
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3. TECHNICAL BRIEF
3.5 RTC(FC-135, X100)
Figure. 3-5-1 32.768KHz Crystal Basic Connections
The AD6900 supports a Real Time Clock function. A total of 25pF+/-10% capacitance to graound is required (including board trace capacitance) on each OSCIN and OSCOUT. RTC functionality allows the application software to implement standard clock, calendar, or organizer functions. A 32KHz clock is required in AD6900 based systems to take advantage of power saving slow clocking mode. A combination of an oscillator circuit within the AD6900 IC and an external 32KHz crystal results in a stable 32kHz clock for use in the system. The purpose of this application note is to discuss the system issues that affect operation of the 32kHz oscillator circuit.
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3. TECHNICAL BRIEF
3.6 Crystal(26 MHz, X601)
Figure. 3-6-1 Crystal Oscillator External Connection
The AD6548 requires only an external low cost as the frequency reference. The circuitry to oscillate the crystal and tune its frequency is fully integrated. The Oscillator is a balanced implementation requiring the crystal to be connected across 2 pins. There is a programmable capacitor array included for coarse tuning of fixed offsets, and an integrated varactor for dynamic control. The oscillator is designed for use with a 26MHz crystal. The crystal is connected as shown in figure 3-3.
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3. TECHNICAL BRIEF
Dedicated control software ensures excellent frequency stability under all circumstances. The AD6548 reference oscillators provides a 26MHz 600mVpp (typical) output (REF_OP), for use as the baseband clock input.
Figure. 3-6-2 Crystal Circuit Block Diagram
The AD6548 integrates this frequency tuning range the tuning section comprises a switchable capacitor array for discrete steps and varactor for fine tuning. Contol of the tuning process is driven by software, whereby the frequency can be maintained accurately during reception gaps and initial frequency upon startup can be accurately estimated without the need for temperature sensors.
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3. TECHNICAL BRIEF
3.7 RF Tranceiver(AD6548, U602)
Figure. 3-7-1 CIRCUIT DIAGRAM of RF Tranceiver
3.7.1 GENERAL DESCRIPTION

The AD6548 provides a highly integrated direct conversion radio solution that combines, on a single chip, all radio and power management functions necessary to build the most compact GSM radio solution possible. The only external components required for a complete radio design are the Rx SAWs, PA, Switchplexer and a few passives enabling an extremely small cost effective GSM Radio solution. The AD6548 uses the industry proven direct conversion receiver architecture of the OthelloTM family. For Quad band applications the front end features four fully integrated programmable gain differential LNAs. The RF is then downconverted by quadrature mixers and then fed to the baseband programmable-gain amplifiers and active filters for channel selection. The Receiver output pins can be directly connected to the baseband analog processor. The Receive path features automatic calibration and tracking to remove DC offsets.
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3. TECHNICAL BRIEF
The transmitter features a translation-loop architecture for directly modulating baseband signals onto the integrated TX VCO. The translation-loop modulator and TX VCO are extremely low noise removing the need for external SAW filters prior to the PA. The AD6548 uses a single integrated LO VCO for both the receive and the transmit circuits. The synthesizer lock times are optimized for GPRS applications up to and including class 12.
3.7.2 FUNCTIONAL DESCRIPTION
Figure. 3-7-2 RECEIVER CHAIN BLOCK DIAGRAM
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3. TECHNICAL BRIEF
3.7.2.1 RECEIVER CHAIN

The AD6548/9 receiver section fully integrates all the RF and baseband signal processing. Each major block is described in the following sections.
Low Noise Amplifiers

The AD6548 includes four fully integrated Low Noise Amplifiers (LNAs), to support quad band applications without further external active components. The LNAs have differential inputs which minimize the effect of unwanted interferers. The inputs are easily matched to industry standard Front End Modules (FEMs) or discrete Rx SAW filters. The outputs of the LNAs are directly coupled to the down-converting mixers. The voltage gain of the LNAs are typically 24 dB. Each LNA can be switch to a low gain mode when receiving large input signals as part of the AGC system. Down-Converting Mixers Two quadrature mixers are used to mix down the signals from the LNAs, one for the high bands (1800 and 1900 MHz) and one for the low bands (850 and 900 MHz). The outputs of the mixers are connected to the baseband section through an integrated single pole filter with nominal cut-off frequency of 800kHz. This acts as a roofing filter for the largest blocking signals (i.e. those 3MHz) and prevents the baseband amplifiers from being overloaded.
Baseband Amplifiers / Low Pass Filters

The baseband amplifiers provide the majority of the analog receiver gain. The filtering is provided by an integrated 5th order Chebyshev filter giving the necessary adjacent channel and blocking filtering, it is also acting as an anti-alias filtering for Baseband ICs converters. A final low pass pole is possible Baseband Output D.C. Offset Correction In order to minimize D.C. offsets inherent in the receiver and maximize dynamic range a D.C offset correction circuit is integrated. This correction is triggered over the serial bus and then an offset tracking loop is enabled to minimize residual offsets under all conditions. The tracking loop is fully hardware integrated, requiring no software intervention.
Receiver Local Oscillator (LO) Generator

The Rx LO generator is used to avoid DC offset problems associated with LO leakage into the receiver RF path. By operating the VCO at a frequency other than the desired receive frequencies, any leakage of the VCO will fall out of band. The LO generator is used to convert the offset synthesized VCO output to the on-frequency quadrature LO required by the chipset. The LO generator is implemented as a regenerative frequency divider, performing a 2/3 multiplication of the VCO output for the high band (DCS1800/PCS1900) and a 1/3 multiplication for low band (E-GSM 900/GSM850).
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3. TECHNICAL BRIEF
3.7.2.2 Transmit Path
Figure. 3-7-3 TRANSMIT PATH BLOCK DIAGRAM
Overview
The transmit section of the AD6548/9 radio implements a translation loop modulator. This consists of a quadrature modulator, high speed phase-frequency detector (PFD) with charge pump output, loop filter, TX VCO and a feedback down converting mixer. The VCO output (divided by 2 for low band) is fed to the power amplifier with a portion internally fed back into the downconverting feedback mixer to close the feedback loop.
Quadrature Modulator
The Quadrature modulator takes the baseband I & Q signals and translates these into a GMSK signal at the Transmit Intermediate Frequency (TX IF). After bandpass filtering and limiting the TX IF signal is used as the reference input to the Phase Frequency Detector (PFD) of the transmit PLL.
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3. TECHNICAL BRIEF
Phase Frequency Detector (PFD)

The PFD ensures that the transmitted signal contains the required modulation and is accurately locked to the desired GSM channel. The downconverted feedback signal from the TX VCO and the Quadrature Modulator output are phase compared by the PFD. The PFD charge pump generates a current pulse proportional to the difference in phase which is applied to the loop filter.
Loop filter
To minimize complexity of the external PCB layout the TX loop filter is fully integrated into the IC. At power up the filter is automatically calibrated as part of the baseband filter cal, eliminating process tolerances. The calibration is fully integrated and requires no extra programming.
TX VCO
The Transmit Voltage Controlled Oscillator (TX VCO) and tank components are a fully integrated subsystem. The subsystem includes PA drivers so the outputs are used to directly drive the external PAs. The low noise oscillator design and internal filtering mean that external TX SAW filters are not required. In Low band operation the TX VCO output is divided by two and filtered. The TX VCO is automatically calibrated to ensure optimum performance over its operating frequency of 1648 to 1910 MHz.
Feedback Down-Converting Mixer

The feedback down converting mixer is used to translate the TX VCO output frequency to the TX IF. An integrated band pass filter exists between the mixer and the PFD to filter the mixers unwanted side band and higher order mixing products.
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3. TECHNICAL BRIEF
3.7.2.3 Main Frequency Synthesizer

The AD6548 has a single fast-locking fractional synthesizer used for VCO control in both receive and transmit mode. The entire system including VCO, tank, fractional N dividers, sigma delta compensation, charge pump and loop filters are fully integrated. The only external component is the frequency reference. The synthesizer is controlled via the serial interface. The VCO is fed into the respective dividers to generate the appropriate LO frequencies for the RX and TX bands.
Fractional N Dividers
The fractional N divider allows the PLL system to have a smaller step size than theb comparison frequency which is set by the external reference to 26 MHz. This feature allows all the GSM frequency band rasters to be achieved, with fast lock times and good phase noise characteristics. The divider section consists of a dual modulus 8/9 prescaler, integer M & A dividers, and fractional N system based on sigma-delta modulation to generate the required fractional divide ratio. The Denominator of the fractional divider can be set to 3 different values, (1040, 1170, 1235), depending on the mode of operation. For example a denominator of 1040 with an input fraction F maintains an average value of F/1040 allowing 25 kHz steps when operated at a reference of 26 MHz. The Overall count value is thus: 8*M + A + Fraction Where: M is 4 bits, but the MSB is set to 1. A is 3 Bits. Fraction is N/ Denominator. The Denominator is set to one of 3 values: 1040, 1170, 1235. N is a 11 bit value. Values for M, A and N are loaded from serial interface word, but the denominator is automatically set according to the mode. Refer to the Programming Procedures for more details.
Phase Frequency Detector/Charge Pump

A Phase Frequency Detector (PFD) is used for the PLL phase detector. The charge pump is designed such that good matching of up and down currents is achieved over a wide output operating range. The charge pump output is internally routed to the integrated synthesizer loop filter.
Synthesizer Loop filter

To minimize complexity of the external PCB layout the Main Synthesizer loop filter is also fully integrated into the IC. No external components or adjustments are required.
Voltage Controlled Oscillator

The integrated voltage controlled oscillator (VCO) is a complete self-calibrating subsystem. This employs a fully automated digital self-calibration function to ensure optimum phase noise performance over the entire frequency range. The VCO generates frequencies between 2520MHz and 2985MHz as required to operate in the four GSM bands for RX and TX.
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3. TECHNICAL BRIEF
3.8 MEMORY(PF38F5060M0Y0BE, U202)
Figure. 3-8-1 MEMORY BLOCK DIAGRAM The 512Mbit Ballaire Wireless Flash memory with LPSDRAM stacked device family offers multiple high-performance solutions. The Ballaire flash die is manufactured on 65 n m ETOXIX Process Technology. It delivers 108 MHz synchronous burst and pagemode read rates with supports multipartitioning with Read-While-Write (RWW) or Read-While-Erase (RWE) dual operations. The LPSDRAM is a high-performance volatile memory operating at speeds up to 133 MHz with configurable burst lengths. The Ballaire stacked device features programmable driver strength and low-power operation. This Stacked Chip Scale Package (SCSP) device is packaged in a standard Intel x16D footprint and signal ballout. This model uses 512Mbits Flash memory and 128Mbits LPSDRAM memory with stacked.
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3. TECHNICAL BRIEF
The DBB External Bus Interface provides a memory-mapped interface to external devices such as NOR Flash, NAND Flash, SRAM, SDRAM, PSRAM, and other custom devices. The External Memory Interface contains three distinct memory controllers: a NAND Flash Controller (NFC), an SDRAM Controller (SDC), and the External Bus Controller (EBC). These three controllers share the external pins. They also share an arbiter through which the DMA controllers (via DDBUS, ADBUS, and DMABUS) and the processor cores (via DSPBUS and MCUEBUS) access external devices. The following figure shows the external memory interface block diagram.
Figure. 3-8-2 DBB EBU SUBSYSTEM BLOCK DIAGRAM
The following table shows the pin list for the external memory interface which supported by Main Base Band chipset(AD6900).
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3. TECHNICAL BRIEF
Signal Name
DATA[15:0] ADDR[25:0] nWE nRD nADV nA0CS nA1CS nA2CS nA3CS nA4CS nA5CS nSDCS nNDCS nB0CS nB1CS nHWR / nUBS/ SDQM[1] / CLE nLWR / nLBS / SDQM[0] / ALE BURSTCLK nWAIT nSDRAS nSDCAS nSDWE SDA10 SDCKE SDCLKOUT nNDBUSY Data Address Write Enable Read Enable Valid Address
Function
General Purpose Chip Select General Purpose Chip Select General Purpose Chip Select General Purpose Chip Select General Purpose Chip Select General Purpose Chip Select SDRAM Chip Select NAND Flash Chip Select Auxiliary Chip Select Auxiliary Chip Select High Write / Byte Strobe / Data Mask/ Command Latch Enable Low Write / Byte Strobe / Data Mask / Address Latch Enable Burst Memory Clock External Device Wait Input SDC Row Address Strobe SDC Column Address Strobe SDC Write Enable SDC address 10 SDC Clock Enable SDC Clock Output NFC Busy Request
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3. TECHNICAL BRIEF
3.9 BT Module with integrated FM tuner (EWFMLBAXX, U201)
Figure. 3-9-1 Bluetooth Module BLOCK DIAGRAM
Figure. 3-9-2 BCM2048 POWER BLOCK DIAGRAM
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3. TECHNICAL BRIEF
3.9.1 Power Block

To reduce the external BOM, the BCM2048 features three internal voltage regulators for the Bluetooth and FM sections that eliminate the need for filtering between the digital and noise sensitive RF circuits. These regulators operate from either 2.3V to 5.5V input supplies that support direct connection to Lithium batteries, or to a 1.7V to 3.6V input supply. The pre-regulator, PRE-REG, regulates battery power supply down to a level acceptable to the internal main regulators, BT REG and FM REG. The PRE-REG and the BT REG are enabled by an external input VREG_CTL. If VREG_CTL is low, the BCM2048 is shut down. If preregulation is not required because the input power supply is in the range 1.7V to 3.6V, VDDR5V and VDDR3V should be tied together to form the input power supply. For more on supplying power to the BCM2048, refer to the reference schematic document, available from your Broadcom representative.
3.9.2 Operational Description

The BCM2048 Bluetooth radio transceiver provides enhanced radio performance to meet the most stringent industrial temperature applications and the tightest integration into mobile handsets and portable devices. It is fully compatible with all standard TCXO frequencies and provides full radio compatibility to operate simultaneously with GPS and cellular radios. It also integrates a complete FM and RDS/RBDS solution. The integrated solution saves power and board space, minimizes the BOM, and maximizes interface flexibility over a separate Bluetooth and FM solution. The FM subsystem can operate independently of Bluetooth and achieve full performance while Bluetooth is operating. It is designed to cover from 76 MHz, up to 108 MHz, bands (US, Europe, Japan) and to operate from either the Bluetooth reference clock or a 32-kHz LPO input. The FM subsystem supports a conventional I2C compatible interface and analog outputs for legacy systems, as well as digital interface options, such as I2S and PCM. The I2S and PCM interfaces supports 48-kHz operation and can be either master or slave. The analog interface consists of high-quality, line-level stereo DACs. The BCM2048 FM subsystem includes advanced RDS/RBDS capability. The BCM2048 synchronizes, demodulates, and decodes RDS/RBDS signals including CRC processing, post data filter detection, signal quality estimation, and buffering thus making it easy for an external application to read and process the RDS/RBDS data. The FM radio provides excellent reception, with 1 V for 26 dB (S+N)/N typical sensitivity and greater than 60-dB SNDR capability, allowing easier system integration and antenna design. The FM subsystem includes many sought-after features, including signal-dependant mono/stereo blend, soft mute, and signal bandwidth control. The system has digital RSSI, signal quality, and IF frequency error indicators for system monitoring. The FM subsystem contains embedded automatic search and scan features, and large RDS data buffers to simplify the interface with an external host.
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3. TECHNICAL BRIEF
3.10 SIM Card Interface

2V85_VSIM (5000-6T-1.8SL) R316 15K SIM_DATA C323 DNI 4 5 6 10 9 J300 1 C5 C1 2 C6 C2 3 C7 C3 7 GND4 GND1 8 GND3 GND2 2V85_VSIM
(GPIO_100) SIM_RST SIM_CLK C318 220n C324 22p C325 1000p
Figure 3-10. SIM CARD Interface
The Main Base Band Processor(AD6900) provides SIM Interface Module. The AD6900 checks status Periodically During established call mode whether SIM card is inserted or not, but it doesn't check during deep sleep mode. In order to communicate with SIM card, 3 signals SIM_DATA, SIM_CLK, SIM_RST. And This model supports only 3V SIM Card.
Signals SIM_RST SIM_CLK SIM_DATA
Description This signal makes SIM card to HW default status. This signal is transferred to SIM card. This signal is interface datum.
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3. TECHNICAL BRIEF
3.11 Micro-SD Card Interface

2V93_VEXT 2V93_VEXT 2V93_VEXT
R319 100K MC_D2 MC_D3 MC_CMD R325 MC_DET R328 1M 0
R323 100K 1 2 3 4 9 10 C329 2.2u J301 DAT2 DAT3 CMD VDD GND1 GND2
R320 (SCHB1A0202) 100K 8 7 6 5 11 12
R321 100K MC_D1 MC_D0 MC_CLK
DAT1 DAT0 VSS CLK GND3 GND4
Figure 3-11. Micro-SD Interface
AD6900 provides an interface for Multi-Media Cards (MMC), Secure Digital Memory Cards (SD Card), and Secure Digital Input/Output Cards (SDIO). All of these cards use similar interface protocols. The main difference between MMC and SD support is the initialization sequence. The main difference between SD card and SDIO support is the use of interrupt and read wait signals for SDIO. Features of the MMC/SD interface (MMCI) include: Support for a single MMC, SD Memory or SDIO card Support for 1-bit and 4-bit SD modes (SPI mode is not supported) A six-pin external interface with clock, command, and up to 4 data lines Card detection using one of the data pins Card interface clock generation from SYSCLK SDIO interrupt and read wait features The following table lists the six pins in the MMCI The MMCI consists of an MMC/SD controller along with a peripheral bus interface. The controller handles the multi-media and secure digital card functions. This includes clock generation, power management, command transfer, and data transfer. The bus interface contains 32bit memory mapped registers, converts 16-bit PBUS accesses to 32-bit register accesses,
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3. TECHNICAL BRIEF
3.12 LCD Interface

2V93_VEXT
(0.15mm)
CN802 G1 G2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 G3 G4 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
(0.2mm/ Shield) (0.2mm/ Shield)
VIBRATOR_P LCD_ID
(0.15mm)
RCV_N RCV_P LCD_MAIN_CS LCD_RS LCD_VSYNC LCD_DATA07 LCD_DATA06 LCD_DATA05 LCD_DATA04 LCD_DATA03 LCD_DATA02 LCD_DATA01 LCD_DATA00 MLED1 MLED2 MLED3 MLED4 MLED5
(IF_MODE = LOW : 16BIT) (SUB LCD VSYNC)
LCD_DATA15 LCD_DATA14 LCD_DATA13 LCD_DATA12 LCD_DATA11 LCD_DATA10 LCD_DATA09 LCD_DATA08 LCD_RESET LCD_WR
(LCD_RD : Internally Pulled Up)
(0.15mm) (0.15mm) (0.15mm) (0.15mm) (0.15mm)
LCD_SUB_CS MLED
(0.4mm)
Figure 3-12-1. LCD Interface
LCD Module provides 2 LCD, Primary LCD(240x320, 262K Color) and Secondary LCD(128x160, 262k Color). The controller handles the multi-media and secure digital card functions. This includes clock generation, power management, command transfer, and data transfer. The bus interface contains 32bit memory mapped registers, converts 16-bit PBUS accesses to 32-bit register accesses, Two LCD shared Data bus, RD, WR and RS but CS (chip select signal). BLU (Back Light Unit) is shared primary and secondary LCD and include 5 white LEDs. White LCD driver is AAT3169 and it is descripted at next page.
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3. TECHNICAL BRIEF
LCD BACKLIGHT
1u C517
U501 4 5 C1+ C1-
AAT3169IFO-T1 7 C2+ C2OUTCP 8 6
C518 1u MLED C519 1u D503 RSB6.8CST2R
VBAT
IN D1 D2 D3 D4 D5 D6
LCD_BACKLIGHT_CTRT R503 C520 1u 100K
3 10 15
EN_SET GND PGND
11 12 13 14 1 2
MLED1 MLED2 MLED3 MLED4 MLED5
Figure 3-12-2. AAT3169 CIRCUIT DIAGRAM
The AAT3169 is a low noise, constant frequency charge pump DC/DC converter that uses a tri-mode load switch (1X), fractional (1.5X), and doubling (2X) conversion to maximize efficiency for white LED applications. The AAT3169 is capable of driving six LEDs for a total of 180mA from a 2.7V to 5.5V input. The current sinks may be operated individually or in parallel for driving higher current LEDs. A low external parts count (two 1F flying capacitors and two small 1F capacitors at IN and OUTCP) make this part ideally suited for small, battery-powered applications. AnalogicTech's AS2Cwire (Advanced Simple Serial Control) serial digital input is used to enable, disable, and set current for each LED with a 16-level logarithmic scale plus four low-current settings down to 115A. For optimized efficiency, low-current settings require only 65A of housekeeping current. Each output of the AAT3169 is equipped with builtin protection for output short-circuit and auto-disable for load short-circuit conditions. Built-in softstart circuitry prevents excessive inrush current during start-up. A low-current shutdown feature disconnects the load from the input and reduces quiescent current to less than 1A.
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3. TECHNICAL BRIEF
The AAT3169 can setup three group as Maximum current, 15mA, 20mA and 30mA Each group has 16 steps of 2 stages as current level, so totally has 32 steps. One stage is about high current and the other stage is about low current. Refer to Detail feature below.
Figure 3-12-3 AAT3169 High Current Stage
Figure 3-12-4 AAT3169 Low Current Stage
This model uses level 5 in maximum 20mA group and level 15 in low current mode. But it dont use low current stage.
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3. TECHNICAL BRIEF
3.13 Battery Charger Interface

VBAT
From External Source (Wall Adaptor or Computer)
CHG_ABB VUSBIN U203 1 2 CRDL USB ISL6299 BAT 10
R210 10K
6 9 7 5
IMIN ICDL USBON _EN
_PPR _CHG
3 4
(GPIO_037) USB_DET (GPIO_059) CHG_EN
GND PGND
8 11
R214 100K
R216 10K
R212 100K
R213 36K (1%)
C215
1u
Figure 3-13 BATTERY CHARGER BLOCK
The ISL6299 is a fully integrated low-cost single-cell Li-ion or Li-polymer battery charger. The charger accepts two power inputs, normally one from a USB port and the Other from a desktop cradle. The ISL6299 is an ideal charger for smart handheld devices that need to communicate with a personal computer via USB. The ISL6299 features 28V and 7V maximum voltages for the cradle and the USB inputs respectively. Due to the 28V rating for the cradle input, low-cost, large output tolerance adapters can be used safely. When both inputs are powered, the cradle input is used to charge the battery.
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3. TECHNICAL BRIEF
3.14 Keypad Interface

KB400 KB401 KB402 KB403 KB404
1
KEY_COL0 KB405
F1
KB409
KB406
KB407
KB408
2
KEY_COL1
CLEAR
R402 680 (VOLUME_UP) EVLC18S02015 4 3 2 1 CN400
SIDEKEY_PAD
KB410
KB411
KB412
KB413
KB414
3
KEY_COL2 KB415
SEND
R403 680 (VOLUME_DOWN) VA403 KB417 EVLC18S02015
KB416
MENU
R405 KEY_COL3 680 VA502 EVLC18S02015 KB418
CONF
OK
KB420 KB421
KB419
UP
R614 KEY_COL4 VA503 EVLC18S02015 680
RIGHT
LEFT
DOWN
KEY_ROW0 EVLC18S02015 VBAT R404 680 VA404 KEY_ROW1 KEY_ROW2
VA402
END
R406 10K KB422
KEY_ROW3 POWERKEY
KEY_ROW4
KEY_ROW5
Figure 3-14-1 MAIN KEY STRUCTURE
KB701 Match Two Column Lines to Outer Circle of Buttons
KB702
KB703
KB704
HOT 1
KEY_COL3 KEY_COL4 KEY_ROW4 KEY_ROW5
HOT 2
HOT 3
HOT 4
Figure 3-14-2 HOT KEY STRUCTURE
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3. TECHNICAL BRIEF
The keypad interface supports a row/column decoding of a keyboard matrix of up to 8 rows and 8 columns. The interface generates an interrupt when any key is pressed, and the interrupt is routed through the system interrupt controller to the MCU. Software must scan the columns to determine which key was pressed. Debouncing must also be implemented in software. The keypad interface consists of eight tristateable KEYPADCOL outputs and eight KEYPADROW inputs. Pressing a key pulls the corresponding KEYPADROW input low. When all KEYPADCOL outputs are driven low, pulling any KEYPADROW input low generates an interrupt. In the interrupt service routine, the keypad must be scanned by setting only one column output low at a time and reading the row inputs. A zero is read anywhere a key is pressed on that column. The scan should be repeated at regular intervals until no key is being pressed. To implement debouncing, the software must require the same scan result for several scans. The keypad interrupt should not be cleared until no key has been pressed for several scans. The 8 by 8 matrix of rows and columns provides the possibility of up to 64 keys (with an additional 8 if a ghost column is used). Full flexibility in enabling and disabling individual rows and columns is provided. Any rows or columns not used should be disabled in the Keypad Control Register. The following figure shows the keypad interface and interrupt generation logic.
Figure 3-14-3 keypad interface and interrupt generation logic
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3. TECHNICAL BRIEF
3.15 Audio Interface
Figure 3-15-1 ABB Internal Audio Block Diagram
The AD6855 Audio Section supports communications and personal audio applications. The Audio Section provides an audio codec with two digital-to-analog converters and an analog-todigital converter, a microphone interface, and analog input and output channels.
Audio and Music Serial Ports

The AD6855 Audio Serial Port is described in detail in the Audio Serial Port (ASPORT) section below. AD6855 Music serial port (MSPORT) is described in detail in the Music Serial Port (MSPORT) section below.
Audio Codec
The AD6855 audio codec supports communications applications with digital sample rates of 8 kHz or 16kHz. DAC 1 is used for receiving speech. An ADC is used for sending speech. The AD6855 audio codec supports personal audio applications with digital sample rates of 8 kHz, 11.025kHz, 12 kHz, 16 kHz, 22.05 kHz, 24 kHz, 32 kHz, 44.1 kHz, or 48 kHz. DAC 1 and DAC 2 are used for monophonic audio. The channels are common in the digital section. DAC 1 and DAC 2 are used together for stereo audio, with DAC 1 decoding the left-channel digital input and DAC 2 decoding the right-channel digital input.
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3. TECHNICAL BRIEF
Audio codec operating modes can be controlled by writing 5 bit codes in the AudMode field of the AudControl1 register and in the AudMode_M field of the AudControl4 register. AudControl1 programs the sampling rate and stereo or monophonic operating mode for PCM audio samples input via the ASPORT. AudControl4 programs the sampling rate and stereo or monophonic operating mode for PCM audio samples input via the MSPORT. The AudControl1 and AudControl4 contain control bits that allow system software to turn on three audio loudness enhancement techniques meant for use when driving 8 ohm loudspeakers. These are high pass filter, dynamic range compressor, and x4 gain boost. These loudness enhancement techniques can be used with any AudMode or AudMode_M setting. And are programmed seperately and independently for the ASPORT and MSPORT PCM audio decoder data streams.
Analog Audio Output & Input Configurations

Output configurations are set by AudOS[4:0] bits in the AudControl2 register. Input configurations are set by AudIS[3:0] bits in the AudControl2 register. AudIn3LMute bit high in the AudMuteControl register (0x27). For configurations using DAC2+AIN3R, the AIN3R input may be muted by setting AudIn3RMute bit high in the AudMuteControl register. For configurations using AIN3(L), the AIN3L and AIN3R inputs may be used as a differential input or the AIN3L input may be used as a single-ended input. Single ended configuration is chosen by setting AudIn3Cfg bit high in the AudControl3 register (0x32).
Audio DACs and Analog Filters

The Audio DACs are over-sampled switched-capacitor DACs. The analog filters are switchedcapacitor filters followed by active-RC filters.
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3. TECHNICAL BRIEF
Analog Audio Output Drivers Audio Output 1

PGA gain for Audio Output 1 can be set by using bits AudOut1Gain[4:0] in the AudOut12Control (0x21 ) register. Output 1 is used for 32 interface with differential output but can be used by single ended interface. And this model only uses passive filters between output port and Receiver.
Figure 3-15-2 ABB Audio OUTPUT1
Audio Output 2
PGA gain for Audio Output 2 can be set by using bits AudOut2Gain[4:0] in the AudOut12Control (0x21) register. Output 2 is used for 8. This port supports only a differential interface. And this model only uses passive filters and Class D audio amplifier between output port and speaker. Audio amplifier Gain is set by hardware component and gain is 6 times.
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3. TECHNICAL BRIEF
Audio Output 3
PGA gain for Audio Output 3 Stereo Configuration can be set by using bits AudOutLGain[4:0] and AudOutRGain[4:0] in the AudOutLRControl (0x22) register. When Audio Output 3 configured as monophonic differential output PGA gain can be set by using bits AudOut3Gain[4:0] in the AudOut3Control register (0x23). This port is used for headset speaker in stereo. This port must use DC-coupling capacitor as output DC. It uses two 100uF capacitor each other in left and right output.
Analog Audio Input

The AD6855 provides two analog input channels, AIN1 and AIN2, that may be used for both microphone and line inputs. The AIN1 and AIN2 channels are identical. One of the two channels is typically used with microphone built into a handset. The other channel is typically used with an external microphone or external line input.
Figure 3-15-4 Audio Input Block Diagram
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3. TECHNICAL BRIEF
Analog Input AIN1, AIN2 and VMIC configurations can be chosen by setting bits AudIS[3:0] in the AudControl2 register (0x1E ). Additional gain of 9dB can be inserted into Analog Audio Input signal chain by setting AudPreampGainSel bit high in the AudControl3 register (0x32 ).
Microphone Interface
The microphone pre-amplifier and associated integrated resistors support electret microphones. An internal (Configuration 11) or external (Configuration 01 or 10) load resistor converts the current input of the microphone to a voltage signal which is amplified using a low-noise pre-amplifier. The Microphone signal path also includes an additional programmable gain of +9 dB gain directly after the pre-amplifier. Different microphones require different DC bias currents for optimum sensitivity.
Audio ADC and PGA

The Audio ADC is a high-order single-bit sigma-delta ADC that includes a switchedcapacitor PGA at the input.
Digital Filters
The AD6855 Audio Section provides two digital filters. The voiceband filter is used for applications with a 8 kHz digital sample rate. The high-quality audio filter is used for applications with higher digital sample rates.
Audio Accessory Detection

The AD6855 provides for detection of audio headset accessory insertion, extraction, and hookswitch events. The detector circuit is designed to operate with minimum power in standby mode. There are two pins dedicated to the accessory detector. AccDet is intended to interface to the external microphone and monitor its bias voltage. The ACCDET terminal is used to sense hookswitch events while a headset accessory is inserted. The JackSense terminal is interfaced to the switch pin of the Jack socket or a Jack Sense terminal on a handset system connector.
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3. TECHNICAL BRIEF
Use of the AccDet Terminal for Hookswitch Event Detection

The AccDet terminal may be connected directly to the Ain2P pin in the case of a DC coupling of the accessory microphone. If the accessory microphone is connected via a capacitor then the AccDet pin may be connected to the microphone side of the coupling capacitor. The AccDet terminal is used to detect hookswitch events. Hookswitch events cause the system to answer an incoming phone call or hang up on an active phone call. The detector circuit is in operation only if an accessory is inserted. It monitors the voltage at the AccDet terminal using a comparator as shown Figure below. Associated logic then provides the AudAccInt interrupt and updates the contents of the Detector Control register as follows on each comparator transition.
Figure 3-15-5 Audio Accessory Detection Block Diagram
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3. TECHNICAL BRIEF
Use of the JackSense Terminal for Accessory Insertion and Removal Detection
Accessory insertion and removal is detected using the JackSense terminal. The JackSense terminal is connected to a signal produced by a mechanical connection that indicates the presence or absence of the headset accessory. The insertion/removal sense circuit fed by JackSense is flexible as far as the characteristics of the mechanical connection are concerned. The mechanical connection will often times be pulled down in one state and floating in the other. In such cases a 1uA on chip current source is used to pull JsckSense to VBAT when the mechanical connection is floating. To avoid false interrupts the Accessory detect logic has a hardware polling loop which will prevent Interrupt generation from comparator transitions with a duration of no less than 10 mSec.
Figure 3-15-6 Accessory Insertion/Removal Detector Block Diagram
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3. TECHNICAL BRIEF
3.16 Camera Interface(2M Fixed Focus Camera)

3.16.1 AD6900 Camera Interface (PPI Block)
AD6900 provides a Parallel Peripheral Interface (PPI) that can connect directly to camera modules. The PPI is an input-only parallel external port that accommodates up to 10 bits of data, in a variety of RGB and YUV color formats. In addition, ITU-656 (CCIR656) and ITU-601 (CCIR601) compatible data transfers are supported. The PPI feature set includes: Eight dedicated data pins and two data pins muxed with GPIOs Parallel data transfer rates up to 32.5 MB/s Two frame syncs (horizontal and vertical), with programmable polarity A bidirectional clock pin, with programmable output clock rate up to 65 MHz Synchronization by detection of embedded preamble codes or by using frame synchronization pins ITU standard and counter controlled data transfers 8-bit data packing to reduce DMA bandwidth for image data Data re-ordering to reduce DMA bandwidth for YUV 4:2:2 data A 32 word by 16 bit input FIFO The PPI offers specific configurations to support still image and video data inputs. The PPI supports ITU-601 and ITU-656 standards. It also provides Active Video Only and Entire Field operational modes. In all modes, data packing options optimize DMA transfer bandwidth for YUV 4:2:2 and other data formats. The PPI pins are listed in the following table.
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3. TECHNICAL BRIEF
Signal Name PPI_DATA[7] PPI_DATA[6] PPI_DATA[5] PPI_DATA[4] PPI_DATA[3] PPI_DATA[2] PPI_DATA[1] PPI_DATA[0] PPI_DATA_10B_LSB[1] PPI_DATA_10B_LSB[0] PPI_HSYNC PPI_VSYNC PPI_CLK
PPI Architecture
Function Data Data Data Data Data Data Data Data Optional Data Optional Data Frame Sync Frame Sync Clock
Default
Direction Input Input Input Input Input Input Input Input Input Input Input Input
Input
Bi-Directional
A simplified PPI block diagram is shown in the following figure. The PPI contains a 32 word by 16 bit FIFO, interrupt request (IRQ) generation logic, clock dividers, and memory mapped registers(MMRs). The PPI provides a parallel interface to camera modules.
Figure 3-16-1 PPI Block Diagram
- 57 -
3. TECHNICAL BRIEF
FIFO Operation
The PPI FIFO is 32 words by 16 bits. Received data is stored in the FIFO either as 16- bit words or as 8-bit words. The data is only stored a 8-bit words when the DLEN and PACK_EN bits in the PPI Control register are cleared. The data in the FIFO may be read whenever the FIFO is not empty. The DMA controllers may burst read the FIFO data whenever at least four words are contained in the FIFO. These FIFO status conditions are reported in the PPI Status register and can be unmasked in the PPI DMA Interrupt Mask register to generate interrupts.
Interrupt Request Generation

The PPI generates interrupt requests for the DMA controllers, MCU, and DSP. An interrupt can be generated for the following conditions: Start of a frame FIFO overflow FIFO underflow Incorrect number of data words in a line or lines in a frame Preamble code error (in ITU-656 mode)
PPI Clock Frequency

The PPI transfer clock may be provided either by an external source or internally by the PPI. BCLK is the source for the PPI clock divider. The clock may be divided by 1, 2, 3, 4, 5, 6, 7,8, 16, 32 or 64 from BCLK. However, the maximum frequency supported is 32.5 MHz for packed 8-bit transfers and 16.25 MHz for 10-bit or unpacked 8-bit transfers. At higher clock frequencies, the APPDMA does not support the incoming data bandwidth. A PPI FIFO (32 words deep, 16-bits wide) is provided to compensate for arbitration latency encountered by APP DMA accessing system resources.
- 58 -
3. TECHNICAL BRIEF
3.17 KEY BACLKLIGHT LED Interface

The AD6855 Auxiliary Section provides three independent PWM light controllers. The PWM output controllers regulate the average current through active lights.
Figure 3-17 ABB Light Controller Block Diagram
The output frequencies of the LIGHTx PWM output controllers are set by the Light12Period (0x2F) and Light3Period (0x31) control registers. With fMCLK = 13 MHz, frequencies ranging from 50.781 kHz to 49.591 Hz may be specified. fLIGHT1 = ( fMCLK / 256 ) / ( Light12Period[9:0] + 1) fLIGHT2 = ( fMCLK / 256 ) / ( Light12Period[9:0] + 1) fLIGHT3 = ( fMCLK / 256 ) / ( Light3Period[9:0] + 1) he output duty cycles of the PWM output controllers are set by the LightxDutyCycle[7:0] control registers - Light1DutyCycle (0x2D), Light2DutyCycle (0x2E) and Light3DutyCycle (0x30). This model use only Light3 port and 2 high luminance white LED with light guard film.
- 59 -
3. TECHNICAL BRIEF
3.18 Vibrator Interface

Vibrator is drived by Dual BJT with bias resistor. VIBRATOR_P is connected with + terminal of vibrator and - terminal is connected with Ground. It is controlled by VIBRATOR signal of DBB with only ON/OFF function.
VBAT Q400 R408 VIBRATOR_P 2.2 VIBRATOR

3 Q2_B Q1_B 2 Q1_E 1 Q1_C 6 5 Q2_C Q2_E 4
Figure 3-18 Vibrator Driver Block Diagram
- 60 -
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
4.1 RF Component
TEST POINT
FL601
U601
U602
X601
Figure 4-1
U601 U602 (AD6548) X601 FL601
Power Amp Module (SKY77318) RF Main Chip (Transceiver) Crystal, 26MHz Clock FEM
- 61 -
4. TROUBLE SHOOTING
4.2 RX Trouble
CHECKING FLOW
START
HP8960 : Test mode 62 CH, 7 level setting (TCH) 62CH, -60dBm setting (BCCH) Spectrum analyzer setting Oscilloscope setting
(1) Check Crystal Circuit
(2) Check Mobile SW &FEM
(3) Check RX I/Q Signal
Re-download SW or Do calibration again
- 62 -
4. TROUBLE SHOOTING
(1) Checking Crystal Circuit
TEST POINT
CHECKING FLOW
Yes 26 MHzO.K?
C120(b)
No Change 601
Crystal Circuit is OK See next Page to check Mobile SW
C619(a)
Figure 4-2-1
CIRCUIT
QN 82p C617 26MHz QP 26M VLDO1
KEY_ROW4 SIM_DATA SIM_CLK C120 26M MC_CLK MC_CMD MC_D0 MC_D1 MC_D2 MC_D3
VLDO1
AA12
KEYPADROW_4
TSX-3225_26MHZ X601
2V75_VCXO
L19 SIMDATAIO K19 SIMCLK 1000p B14 F22 J19 J17 E21 F21 K17 P4 CLKIN MC_CLK MC_CMD MC_DAT_0 MC_DAT_1 MC_DAT_2 MC_DAT_3 GPIO_010
R611 AFC 10K
VCC_BBQ Q QB REF_OP REFIN REFINB VAFC_NC VCC_REF
24 23 22 21 20 19 18 17
C618 47p
C619 1u
2V93_VEXT 16 15 14 13 12 11 10 9 C622 220n
C620 0.1u VBAT
25 26 27 28 29 30 31 32 33
GND
VCC_FE I IB VCC_BBI SDATA SCLK SEN NC
RX1900B RX1900 RX1800B RX1800 RX900B RX900 RX850B RX850
FOLDER_DET
AD6548 U602
VLDO2 VLDO1 VBAT VDD VCC_TXVCO TXOP_HI TXOP_LO VLDO3
LCD_WR
C625 0.1u C629 27p C634 0.1u C630 0.1u C626 0.1u C627 0.1u
P19 EB2_NRD N17 EB2_NWE W17 EB2_NWAIT P21 P17 R19 T19 U22 R17 K21 L21 P22 N22 U19 T17 W18 EB2_ADDR_00 EB2_ADDR_01 EB2_ADDR_02 EB2_ADDR_03 EB2_ADDR_04 EB2_ADDR_05 EB2_ADDR_06 EB2_ADDR_07 EB2_ADDR_08 EB2_ADDR_09 EB2_ADDR_10 EB2_ADDR_11 EB2_ADDR_12
VLDO1
CAM_LDO_EN LCD_RS LCD_VSYNC CAM_PWDN BT_LDO_EN LOUD_SPK_EN
1 2 3 4 5 6 7 8
C636 39p C639 100p C640 100p C641 100p
S_EN S_CLK S_DATA
(GPIO_072) (GPIO_074) (GPIO_073)
LCD_RESET CAM_RESET BT_RESET CAM_I2C_DATA CAM_I2C_CLK CAM_HSYNC CAM_VSYNC CAM_PCLK
IP C642 82p IN
AB21 PPI_HSYNC AA22 PPI_VSYNC Y21 PPI_CLK L22
WAVEFORM
Graph 4-2-1(a)
Graph 4-2-1(b)
- 63 -
4. TROUBLE SHOOTING
(2) Checking Mobile SW & FEM
TEST POINT
ANT_SW1 ANT_SW2 2V75_VCXO
Figure 4-2-2
CIRCUIT
2V75_VCXO
20 19 18 16 11 9 R612 10 12
15 10 8 7 6 5 4 3 2 1
WAVEFORM
EGSM RX
C632 39p
C628 0.1u
VC2 13 VC1 14 DGM1110M014 FL601
17
ANT
ANT_SW1 Low ANT_SW2 Low

ANT_SW1 ANT_SW2
C643 100p
C644 100p
Graph 4-2-2 FEM Control Signal
- 64 -
4. TROUBLE SHOOTING
CHECKING FLOW
For these 2 test case, No Call connection is needed
Check SW601 Pin ANT,RF with RF Cable connected.
Open Yes
No
Changing SW601
Check SW601 Pin ANT,RF with No RF Cable Connected
Short Yes
No
Changing SW601
Check C643,C644,C632 Check whether Ant SW Set as RX mode Refer to Table 4.2.2 Yes Check Vctrl 1,2 & Vcxo No Changing the Board.
Check RF Level of FL601.3(for EGSM) & FL601.5&7(for DCS&PCS)

Pin 16 : ~ -62dBm Pin 14 & 12 : ~ - 63dBm
No
Changing FL601
Yes Ant SW & Mobile SW is OK See next Page to check Rx I/Q Signal
For this RF Level test case, RX Stand alone Mode is needed refer to chapter 10
Switch Mode GSM850/900 Tx GSM1800/1900 Tx GSM850/900 Rx GSM1800/1900 Rx
Vc1 0 1 0 1
Vc2 1 1 0 0
Table 4.2.1
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4. TROUBLE SHOOTING
(3) Checking RX I/Q
TEST POINT
QN 82p C617 QP
CIRCUIT
TSX-3225_26MHZ X601
2V75_VCXO
SW601
26M
VLDO1
26MHz
R611 AFC 10K
24 23 22 21 20 19 18 17
C618 47p
C619 1u
C620 0.1u
2V93_VEXT 16 15 14 13 12 11 10 9 C622 220n
VBAT
VLDO1
33
GND
C642 U602 U617
25 26 27 28 29 30 31 32
AD6548 U602
C625 0.1u C629 27p C634 0.1u C630 0.1u C626 0.1u C627 0.1u
VLDO1
1 2 3 4 5 6 7 8
C636 39p C639 100p C640 100p C641 100p
S_EN S_CLK S_DATA
(GPIO_072) (GPIO_074) (GPIO_073)
IP C642 82p
Figure 4-2-3
IN
WAVEFORM
Graph 4-2-3
CHECKING FLOW
Check C617, C642. Check if there is any Major difference Refer to graph 4.2.3 Yes Similar? No Replace U602
Redownload software and calibration again
- 66 -
4. TROUBLE SHOOTING
4.3 TX Trouble
CHECKING FLOW
START
HP8960 : Test mode 62 CH, 7 level setting (TCH) 62CH, -60dBm setting (BCCH) Spectrum analyzer setting Oscilloscope setting
(1)Check Crystal Circuit
(2)Check Mobile SW & FEM
(3)Check PAM control signal
(4)Check TX I/Q Signal
Redownload SW or Do calibration again
- 67 -
(1) Checking Crystal Circuit
TEST POINT
CHECKING FLOW
Yes 26 MHzO.K? Crystal Circuit is OK See next Page to check Mobile SW
C120(b)
No Change 601
C619(a)
Figure 4-3-1
CIRCUIT
QN 82p C617 26MHz QP 26M VLDO1
KEY_ROW4 SIM_DATA SIM_CLK C120 26M MC_CLK MC_CMD MC_D0 MC_D1 MC_D2 MC_D3
VLDO1
AA12
KEYPADROW_4
TSX-3225_26MHZ X601
2V75_VCXO
L19 SIMDATAIO K19 SIMCLK 1000p B14 F22 J19 J17 E21 F21 K17 P4 CLKIN MC_CLK MC_CMD MC_DAT_0 MC_DAT_1 MC_DAT_2 MC_DAT_3 GPIO_010
R611 AFC 10K
24 23 22 21 20 19 18 17
C618 47p
C619 1u
2V93_VEXT 16 15 14 13 12 11 10 9 C622 220n
C620 0.1u VBAT
25 26 27 28 29 30 31 32 33
GND
FOLDER_DET
AD6548 U602
LCD_WR
C625 0.1u C629 27p C634 0.1u C630 0.1u C626 0.1u C627 0.1u
P19 EB2_NRD N17 EB2_NWE W17 EB2_NWAIT P21 P17 R19 T19 U22 R17 K21 L21 P22 N22 U19 T17 W18 EB2_ADDR_00 EB2_ADDR_01 EB2_ADDR_02 EB2_ADDR_03 EB2_ADDR_04 EB2_ADDR_05 EB2_ADDR_06 EB2_ADDR_07 EB2_ADDR_08 EB2_ADDR_09 EB2_ADDR_10 EB2_ADDR_11 EB2_ADDR_12
VLDO1
1 2 3 4 5 6 7 8
C636 39p C639 100p C640 100p C641 100p
S_EN S_CLK S_DATA
(GPIO_072) (GPIO_074) (GPIO_073)
IP C642 82p IN
AB21 PPI_HSYNC AA22 PPI_VSYNC Y21 PPI_CLK L22
WAVEFORM
Graph 4-3-1(a)
Graph 4-3-1(b)
- 68 -
(2) Checking Mobile SW & FEM
TEST POINT
ANT_SW1 ANT_SW2 2V75_VCXO
Figure 4-3-2
CIRCUIT
2V75_VCXO
20 19 18 16 11 9 R612 10 12
15 10 8 7 6 5 4 3 2 1
WAVEFORM
C632 39p
C628 0.1u
VC2 13 VC1 14 DGM1110M014 FL601
17
ANT
ANT_SW1 ANT_SW2
C643 100p
C644 100p
Graph 4-3-2 FEM Control Signal
- 69 -
4. TROUBLE SHOOTING
CHECKING FLOW
For the test, TX Stand alone Mode is needed. Refer to chapter 10 (PL=7 for EGSM, PL=2 for DCS&PCS)
Check C643,C644,C632 Check whether Ant SW Set as TX mode Refer to Graph 4.3.2 Refer to Table 4.3.2 Yes Check Vctrl 1,2 & Vcxo No Changing board
Check RF Level of FL601.15(for EGSM) & FL601.10(for DCS&PCS) Pin15 : ~29.5dBm Pin10 : ~26.5dBm Yes No Go to 4.3.4 Checking PAM control signal
Check SW601.ANT, RF with RF Cable connected.
Open Yes
No
Changing SW601
Check SW601.ANT,RF with RF Cable disconnected
Short Yes
No
Changing SW601
END
Switch Mode GSM850/900 Tx GSM1800/1900 Tx GSM850/900 Rx GSM1800/1900 Rx
Vc1 0 1 0 1
Vc2 1 1 0 0
Table 4-3-1
- 70 -
4. TROUBLE SHOOTING
(3) Checking PAM Control Signal
TEST POINT
CIRCUIT
VBAT
C601 22u
C602 33p
C603 0.01u
1K TX_RAMP
R603
C614 PA_EN C613 PA_BAND

R613 0
20
17
C604 39p
VCC1B
VCC1A
VAPC
VBATT
C605 0.01u
C606 0.01u
15 11
DCS_PCS_OUT EGSM_OUT RSVD_GND P_GND U601 SKY77318
DCS_PCS_IN EGSM_IN ENABLE BS
3 4 18 1 PA_EN
R607 51
C604 Tx_Ramp
C609 0.5p
C610 DNI
19 21
(GPIO_060) R610 82
PA_BAND (GPIO_070)
GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1
C612
4.3nH
Figure 4-3-3
C615 DNI
C616 2.7p
WAVEFORM
Graph 4-3-3
CHECKING FLOW
Similar? No
16 14 13 12 10 9 8 7 5
C613 27p
C614 27p
Check TX_RAMP and PAM_EN Check if there is Any Major Difference or not Refer to Graph 4.3.3
Re-download S/W
Yes
Go to Next Step
- 71 -
4. TROUBLE SHOOTING
(4) Checking TX I/Q
TEST POINT
QN 82p C617 QP
CIRCUIT
TSX-3225_26MHZ X601
2V75_VCXO
SW601
26M
VLDO1
26MHz
R611 AFC 10K
24 23 22 21 20 19 18 17
C618 47p
C619 1u
C620 0.1u
2V93_VEXT 16 15 14 13 12 11 10 9 C622 220n
VBAT
VLDO1
33
GND
C642 U602 U617
25 26 27 28 29 30 31 32
AD6548 U602
C625 0.1u C629 27p C634 0.1u C630 0.1u C626 0.1u C627 0.1u
VLDO1
1 2 3 4 5 6 7 8
C636 39p C639 100p C640 100p C641 100p
S_EN S_CLK S_DATA
(GPIO_072) (GPIO_074) (GPIO_073)
IP C642 82p
Figure 4-3-4
IN
WAVEFORM
Graph 4-3-4
CHECKING FLOW
Check if there is Any Major Difference Refer to Graph4.3.4
Similar? Yes
No
Replace U602
Re-download the Software And calibrate
- 72 -
4. TROUBLE SHOOTING
4.4 Power On Trouble

TEST POINT
2V5_VABB 2V5_VMIC
1V5_VPLL 2V75_VCXO
U100
2V85_VSIM
1V8_VRTC 2V93_VEXT VCORE 1V88_VMEM R101 D100 1V8_VGP 1V82_VINT
Figure 4-4
CIRCUIT
2V93_VEXT 1V88_VMEM
1 3 2
D100 PWRON
2V5_VABB
RPWRON R101
EXT_PWRON
KDR331V
VEXT1 VEXT2 VMEMOUT1 VMEMOUT2 VABB VPLL VCOREPWR2 VCOREPWR1 VCORESW1 VCORESW2 VINTOUT VINT VAPPGATE VUSB VSIM VMIC VRF VGP PA IP IN QP QN A3 B3 L4 M4 G12 F12 1V5_VPLL
100K
VBAT
VBAT
VCORE
END
R406
1V82_VINT
F2 F1 E1 E2 K1 K2 D12 C11 L100 4.7uH
10K
KB422
VUSB
POWERKEY
2V85_VSIM
2V5_VMIC
2V75_VCXO M6 J12 C12 M5 A8 A9 A10 A12 A11 C121 TX_RAMP IP IN QP QN FB100 VBAT 1u 1u 2.2u 1u 22u 22u (2012) 1u 1u 1u 1u 1u 1u C122 C132 C123 C124 C125 C126 C127 C128 C129 C130 C131 1V8_VGP
KEY_ROW4 POWERKEY
L10 KEYOUT M10 KEYON
- 73 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Check Battery Voltage > 3.35V YES
NO Charge or Change Battery
Push power-on key And check the level change into low of POWERKEY
NO
Check the contact of power key Or dome-switch
YES Check the voltage of The LDO outputs at U100 NO Replace U100
YES
VCORE=1.2V~1.5V 1V88_VMEM=1.88V 2V93_VEXT=2.93V 2V5_VMIC=2.5V
2V75_VCXO=2.75V 2V85_VSIM= 2.85V 1V5_VPLL=1.5V 2V5_VABB=2.5V
Logic level at RPWRON(DBBON) of D100 = HIGH(above 1.2V)? YES
NO Re-download software
NO Is the phone power on? Replace U100 and Re-download software
Does it work properly? YES NO The phone will Properly operating.
Replace the main board
- 74 -
4. TROUBLE SHOOTING
4.5 Charging Trouble

TEST POINT
CN300
U204 C310
R213 U203
Figure 4-5
CIRCUIT
VBAT CHG_ABB VUSBIN U203 1 2 CRDL USB ISL6299 BAT 10
CHG_ABB VCHARGE
U204 NCP348MTR2G 1 4 IN1 IN2 IN3 _FLAG GND NC1 NC2 _EN GATE_OUT GATE OUT2 OUT1 10 9 8 7 6 R217 R211 30K 2 11 12 (GPIO_013) CHG_DET
R210 10K
6 9 7 5
IMIN ICDL USBON _EN
_PPR _CHG
3 4
5 3
GND PGND
8 11
R214 100K
R216 10K
R212 100K
R213 36K (1%)
C215
30K
1u
- 75 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Change the battery
Battery is charged?
YES
Charging is properly operating
NO NO Resolder the CN300 (Pin 12,13 : VCHARGE)
Is I/O Connector(CN300) well-soldered ? YES
Check the voltage at C310 = 5.1V ? YES Is the voltage at pin6 of U204 = 5.1V?
NO
The TA is out of order Change the TA
NO
Replace the U204
YES NO Replace the U203
Is Voltage across R213 about 1.2V? YES
Battery is charged?
NO Replace the main board
YES Charging is properly operating
- 76 -
4. TROUBLE SHOOTING
4.6 Vibrator Trouble

TEST POINT
PIN 1
Q400
Vibrator PAD
Figure 4-6
CIRCUIT
VIBRATOR
Q400 R408 VIBRATOR_P 2.2 VIBRATOR
3 Q2_B Q1_B 2 Q1_E 1 Q1_C 6 5 Q2_C Q2_E 4
LCD Module
VBAT
- 77 -
4. TROUBLE SHOOTING
CHECKING FLOW
SETTING : Enter the engineering mode, and set vibrator on at vibration of BB test menu
START
Is the voltage at pin 2 of Q400 high? YES
NO
Check the soldering Q400
Is the voltage at pin 4 of Q400 high (VBAT) ?
NO
Check the soldering of Q400
YES
Check the soldering of vibrator ? YES Replace vibrator YES Vibrator Working well !
NO Resolder or Replace vibrator
- 78 -
4. TROUBLE SHOOTING
4.7 LCD Trouble

TEST POINT
FL505 CN500 FL508
FL507
FL504
R504
FL501
LCD Connector
CN802 R503 U501 CN803 C519
Figure 4-7
- 79 -
4. TROUBLE SHOOTING
CIRCUIT
FPCB CONNECTOR
RCV_N C500 DNI 2V93_VEXT RCV_P CAM_PWDN C501 39p C503 0.1u C504 56p ZD501 RSB6.8CST2R L500 18nH FL500 LCD_VSYNC CAM_VSYNC CAM_HSYNC CAM_RESET
9 8 7 6
C502 39p
2V8_IOVDD
1V8_DVDD
L501 18nH
CN500 G2 G1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 G4 G3
ICVE10184E150R500FR
INOUT_B1 INOUT_B2 INOUT_B3 INOUT_B4 G2 INOUT_A1 INOUT_A2 INOUT_A3 INOUT_A4 G1 1 2 3 4
2V8_AVDD
VA501
KEY_ROW4 KEY_ROW5
1 2 3 4
FL502 CAM_DATA7 CAM_DATA6 CAM_DATA5 CAM_DATA4

9 8 7 6
ICVE10184E150R500FR
INOUT_B1 INOUT_B2 INOUT_B3 INOUT_B4 G2 INOUT_A1 INOUT_A2 INOUT_A3 INOUT_A4 G1
CAM_DATA3 CAM_DATA2 CAM_DATA1 CAM_DATA0
4 3 2 1
INOUT_A4 INOUT_A3 INOUT_A2 INOUT_A1
INOUT_B4 INOUT_B3 INOUT_B2 INOUT_B1
6 7 8 9
FL503 2V8_IOVDD
ICVE10184E150R500FR
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
G1
10
LCD_RESET
4 3 2 1
ICVN0505X150FR
G2
100ohm R505 DNI
R504 C521 DNI
10
KEY_COL3 KEY_COL4 VIBRATOR_P MLED
6 7 8 9
LCD_DATA15 LCD_DATA14 LCD_DATA13 LCD_DATA12
FL501
ICVE10054E250R201FR
G1
10
G2
10
4 3 2 1
6 7 8 9
G1
G2
10
FL504
ICVE10054E250R201FR
G1
G2
10
4 3 2 1
6 7 8 9
FL505 R501 4.7K CAM_MCLK CAM_PCLK CAM_I2C_CLK CAM_I2C_DATA R502 4.7K

4 3 2 1 10 5
ICVE10054E250R201FR LCD_ID_L MLED2 MLED1
C508 0.1u
C509 0.1u
C510 0.1u
C522 DNI
C511 27p
G1 INOUT_A4 INOUT_A3 INOUT_A2 INOUT_A1
G2 INOUT_B4 INOUT_B3 INOUT_B2 INOUT_B1
D502
D501
8 9
FL506
ICVE10184E150R500FR
RSB6.8CST2R
RSB6.8CST2R
G1
G2
10
10
4 3 2 6 7 8 9 1
6 7 8 9
LCD_MAIN_CS LCD_SUB_CS LCD_WR LCD_RS
4 3 2 1
G1
G2
FL507 ICVE10054E250R201FR
FL508 MLED3 MLED4 MLED5
ICVE10184E150R101FR
D505 RSB6.8CST2R
D504 RSB6.8CST2R
D506 RSB6.8CST2R
LCD BACKLIGHT
1u C517
U501 4 5 C1+ C1-
VBAT
LCD_BACKLIGHT_CTRT R503 C520 1u 100K
3 10 15
EN_SET GND PGND
11 12 13 14 1 2
- 80 -
4. TROUBLE SHOOTING
Waveform
Graph 4-7-1. LCD Backlight Control Signal Waveform
Graph 4-7-2. LCD Data Waveform
- 81 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Is the connection of CN802 with LCD connector ok ?
NO
Reassemble FPCB with LCD connector
YES
Is the connection of CN803 with CN500 connector ok ?
NO
Reassemble FPCB with Main connector
YES
Check the Voltage Level of C519 is about Battery voltage ? (LCD_BACKLIGHT_CTRT signal is high Level)
NO
Resoldering or Replace U501
YES
Check the Waveform of EMI filter ?
NO
Resoldering EMI filter. (FL501,FL504,FL505,FL507,FL508)
YES
Check the Waveform of Data pins on CN802 ?
NO
Replace Main FPCB
YES Does LCD work properly ? YES LCD working well ! NO Replace LCD module
- 82 -
4. TROUBLE SHOOTING
4.8 Camera Trouble

TEST POINT
R501 R502
CN500 FL506 Camera Connector
FL503 FL502 FL500
CN701
CN702
U500 C506 C507
C523
CN801
CN803
FB500
Figure 4-8
- 83 -
4. TROUBLE SHOOTING
CIRCUIT
FPCB CONNECTOR
9 8 7 6
C502 39p
2V8_IOVDD
1V8_DVDD
L501 18nH CN500
ICVE10184E150R500FR
G2 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 G4
G1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 G3 C508 0.1u C509 0.1u C510 0.1u C522 DNI C511 27p LCD_ID_L MLED2 MLED1 KEY_COL3 KEY_COL4 VIBRATOR_P MLED 100ohm ICVN0505X150FR R505 DNI R504 C521 DNI LCD_RESET
4 3 2 1
2V8_AVDD
G1
10
VA501
KEY_ROW4 KEY_ROW5
1 2 3 4
G2
10
6 7 8 9

9 8 7 6
ICVE10184E150R500FR
FL501
ICVE10054E250R201FR
G1
10
G2
10
4 3 2 1
6 7 8 9
G1
G2
10
FL504
ICVE10054E250R201FR
4 3 2 1
6 7 8 9
G1
G2
10
FL503 2V8_IOVDD
ICVE10184E150R500FR
4 3 2 1
6 7 8 9
FL505 R501 4.7K CAM_MCLK CAM_PCLK CAM_I2C_CLK CAM_I2C_DATA R502 4.7K

4 3 2 1 10 5
ICVE10054E250R201FR
D502
D501
8 9
FL506
ICVE10184E150R500FR
RSB6.8CST2R
RSB6.8CST2R
G1
G2
10
10
4 3 2 6 7 8 9 1
6 7 8 9
4 3 2 1
G1
G2
FL507 ICVE10054E250R201FR
FL508 MLED3 MLED4 MLED5
ICVE10184E150R101FR
D505 RSB6.8CST2R
D504 RSB6.8CST2R
D506 RSB6.8CST2R
CAMERA POWER
VBAT 1V8_DVDD 2V8_IOVDD 2V8_AVDD
(EB2_ADDR_00)
R500 100K
C505 1u
C506 2.2u
FB500
PGND
CAM_LDO_EN
U500 1 VIN 2 EN1 3 EN2 4 NC1
RT9011-MGPQW 8 VOUT1 7 VOUT2 6 NC2 5 GND C507 1u
C523 2.2u
- 84 -
4. TROUBLE SHOOTING
Waveform
Graph 4-8-1 I2C Data Waveform
Graph 4-8-2 MCLK Waveform
Graph 4-8-3 CAM_VSYNC vs. CAM_HSYNC Waveform
Graph 4-8-4 CAM_HSYNC vs. CAM_PCLK Waveform
- 85 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Is the connection of CN702 with Camera connector ok ?
NO
Reassemble KEY PCB with camera connector.
YES
NO
Reassemble FPCB with KEY PCB connector
YES
NO
Reassemble FPCB with Main connector
YES
Check the each voltage Level of C506(1.8V), C507(2.8V), C523(2.8V) is right ? (CAM_LDO_EN signal is high Level)
NO
Resoldering or Replace U500
YES
Check the Waveform of I2C_CLK, I2C_DATA ?
NO
Resoldering R501, R502
YES
Check the Waveform of CAM_MCLK(13MHz) ?
NO
Replace U101 or Change the board
YES
Check the Waveform of Data pins on CN701 ?
NO
Replace Camera Module.
YES
Check the Waveform of EMI filter ?
NO
Resoldering EMI filter. (FL500,FL502,FL503,FL506)
YES
Does Camera work properly ?
NO
Replace U101 or Change the board
YES Cam era working well !
- 86 -
4. TROUBLE SHOOTING
4.9 Speaker Trouble

TEST POINT
R314 R313
U303
U100
Figure 4-9
CIRCUIT
AOUT1N AOUT1P AOUT2N_1 AOUT2N_2 AOUT2P_1 AOUT2P_2 AOUT3R AOUT3L TDO TMS TDI TCK F11 E11 L8 M8 L9 M9 G10 F10 C2 C1 B1 D1 C151 39p C152 39p C153 39p C154 39p C155 DNI C156 DNI C158 100p RCV_N RCV_P SPK_N SPK_P HP_ROUT
HP_LOUT
SPEAKER
VBAT C316 SPK_N C317 SPK_P 0.01u R315 47K 0.01u (GAIN x6) R314 47K U303 D1 INTPA2005D1ZQYR VDD1 VDD2 NC VOLOUD_SPK_EN R317 A2 A3 B3 C2 C3 D2 D3 100K A1 _SD
GND1 GND2 GND3 GND4 GND5 GND6
B4 C4 B1 FB304 A4 FB305 D4 CN302 1 2
C1
IN+
VO+
GND7
C319 10u
C320 DNI
C321 1000p
C322 VA304 1000p EVLC14S02050
VA305 EVLC14S02050
- 87 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Check the state of contact of speaker
No
Replace/Change speaker
Yes
Check the Audio signal R313,R314
No
Change the U100
Yes
Check the Power voltage U303 = VBAT And work pr perly ? o Yes Speaker Working well !!
No
Change the Speaker
- 88 -
4. TROUBLE SHOOTING
4.10 Earphone Trouble

TEST POINT
C158 C302 C303 U100 C142
R307 R309 C331
R300 R302 U304 FB300 FB301 FB302 L301
CN300
Figure 4-10
CIRCUIT
2V5_VJACK
VBAT
R300 1.5K HP_MIC_N C300 C301 39p 10u 2.2K R302 R303 C332 DNI DNI HOOK_DETECT
2V5_VJACK
U304 1 4 6 R329 100K C330 1u VDD NC CE
R1114D251D 3 VOUT GND1 GND2 2 5 C331 1u
VJACK_LDO_EN
HP_MIC_P
2V93_VEXT U301 NLAS5223BMNR2G

1 VCC 2 NO1 COM2 8 COM1 4 IN1 NC2 6 NC1 GND IN2 7 NO2 9 10
100u
C302 HP_LOUT HP_EN
2V93_VEXT VUSBIN VBAT VCHARGE CN300 R305 100K R306 100K R307 R309 4.7 4.7 FB300 FB301 FB302 1800 21 19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 20 22 EVLC14S02050 FM_ANT L300 270nH C305 10p
C303 HP_ROUT HP_EN (GPIO_009)
100u
R304 100K
C304 1u
MULTI_PORT_TX MULTI_PORT_RX JACK_DETECT EXT_PWRON EXT_PWRON DSR TX RX R310 R311 47 47 R312 VA300 VA301
M11 M12 K9 L12 L11 JACK_DETECT C142 0.1u HP_MIC_N HP_MIC_P
L301
100nH
DSR_DET (TX) (RX) USC2 USC1
EVLC5S0250
EVLC5S0250
AIN1P AIN1N JACKSENSE AIN2N AIN2P
C139
0.1u
MIC_P MIC_N
RSB6.8CST2R
ZD300
C308 1u
C309 47p
C307 10u
VA303
C310 1u
C311 47p
- 89 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Resolder CN300
Check the pin(#8) in CN300 is LOW?
NO Resolder pin8 in CN300
YES NO Is FB303(JACK DETECT) LOW? YES Resolder FB303
Set the audio part of the test equipment to PRBS or Continuous wave mode
Can you hear the sound from the earphone? YES
NO Change the earphone and try again
Can you hear the sound from the earphone?
NO
Resolder C302, C303, R307 & R309, FB301&FB302
YES Set the audio part of the test Equipment to echo mode
Can you hear your voice from the earphone?
NO
Change the earphone and try again
Can you hear your voice from the earphone?
NO
Resolder C142,FB300, R300 & R302 Or Change the U304 &U100
YES
Earphone will work properly
- 90 -
4. TROUBLE SHOOTING
4.11 Receiver Trouble

TEST POINT
L500 L501
U100
Figure 4-11
CIRCUIT
RCV_N C500 DNI RCV_P CAM_PWDN C501 39p F11 E11 L8 M8 L9 M9 G10 F10 C2 C1 B1 D1 C151 39p C152 39p C153 39p C154 39p C155 DNI C156 DNI C158 100p RCV_N RCV_P SPK_N SPK_P HP_ROUT 60 59 58 57 56 L500 18nH L501 18nH CN500 G2 G1 1 2 3 4 C502 39p
2V8_IOVDD
1V8_DVDD
AOUT2N_1 AOUT2N_2 AOUT2P_1 AOUT2P_2 AOUT3R AOUT3L TDO TMS TDI TCK
HP_LOUT
- 91 -
2V8_AVDD
AOUT1N AOUT1P
4. TROUBLE SHOOTING
CHECKING FLOW
SETTING : After initialize Agilent 8960, Test GSM850, PCS mode Set the property of audio as PRBS or continuous wave. Set the receiving volume of mobile as Max.
START
Does waveform at L500 and L501 fluctuate? YES
NO Change the U100
Is receiver connected Properly?
NO Resolder/Change the receiver
YES
Receiver will work properly.
- 92 -
4. TROUBLE SHOOTING
4.12 Microphone Trouble

TEST POINT
R317 R235 R233
C139 MIC200
Figure 4-12
CIRCUIT
MIC
2V5_VMIC
R318 R322
1K
C326 39p
C327 10u
R324 MIC_P 100ohm C328 39p R326 MIC_N EVLC14S02050 100ohm EVLC14S02050 R327 2.2K VA306 MIC300 OBG-415L42-C33LH
2.2K
VA307
- 93 -
4. TROUBLE SHOOTING
CHECKING FLOW
SETTING : After initialize Agilent 8960, Test GSM850, PCS mode
START
Check microphone sound hole
Make a phone call, then check R317 mic bias signal comes from U100?
NO
1. Check mic Bias signal line 2. Change the U100
YES
Check the signal Level at each side of MIC300. Is it a few tens mV AC?
NO Change the microphone
YES
Check the soldering of R323, R325 & C139
NO Resolder component
YES
Microphone will work properly.
- 94 -
4. TROUBLE SHOOTING
4.13 SIM Card Interface Trouble

TEST POINT
C318
PIN6
PIN4
J300
PIN3
PIN1
Figure 4-13
TEST POINT
2V85_VSIM (5000-6T-1.8SL) R316 15K SIM_DATA C323 DNI 4 5 6 10 9 J300 1 C5 C1 2 C6 C2 3 C7 C3 7 GND4 GND1 8 GND3 GND2
2V85_VSIM
- 95 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Does the SIM card support 3V or 1.8V ?
NO
Change the SIM Card. This phone supports 3V or 1.8V SIM card.
YES
Is Voltage at the pin1 of J300 2.85V or 1.8V?
NO
Voltage output of VSIM LDO Is 2.85V?
NO Change the U100
YES YES Resolder J300
Change the SIM Card And try again. Does it work Properly?
NO
Redownload SW. Does it work Properly?
NO Change the main board
YES
YES
SIM card is properly working
SIM card is properly working.
- 96 -
4. TROUBLE SHOOTING
4.14 KEY backlight Trouble

TEST POINT
TOP
LD400
LD401
BOTTOM
R401
VA401
R400
VA400
Figure 4-14
- 97 -
4. TROUBLE SHOOTING
CIRCUIT
VBAT
R400 KEY_BACKLIGHT3 LEWWS44-E LD400 47 R401 LEWWS44-E LD401 ICVN0505X150FR ICVN0505X150FR 47
VA400
CHECKING FLOW
START
VA401
Is the level Period at VA400, VA401 Low Duty(20%)?
NO Check U100
YES
Is the level Period at VA400, VA401 High Duty(80%)?
NO Check U100
YES
Are all LEDs Working? YES
NO
Check the soldering each R and LED NO
Backlight will work properly.
Replace or resolder component
- 98 -
4. TROUBLE SHOOTING
4.15 RTC Trouble

TEST POINT
X100
R103
Figure 4-15
CIRCUIT
M22 N21 M21 V22 V21 W22 W21 V19 Y22 PPI_DATA_1 PPI_DATA_2 PPI_DATA_3 PPI_DATA_4 PPI_DATA_5 PPI_DATA_6 PPI_DATA_7 PPI_DATA_8 PPI_DATA_9
C135 22p R103 2 1 10M
X100
CAM_DATA0 CAM_DATA1 CAM_DATA2 CAM_DATA3 CAM_DATA4 CAM_DATA5 CAM_DATA6 CAM_DATA7
FC-135 32.768KHz C141 22p R104 BT_UART_TX BT_UART_RX DNI BT_UART_CTS BT_UART_RTS
A17 OSCIN A16 OSCOUT L1 M4 M1 M2 N6 GPIO_000 GPIO_001 GPIO_002 GPIO_003 GPIO_004
- 99 -
4. TROUBLE SHOOTING
CHECK FLOW
START
Is frequency at R103 about 32.768KHz?
NO
Resolder the X100 or change the X100
YES
Is voltage at R103 about 400mV?
NO
Resolder the X100 or change the X100
YES
NO Is RTC properly working?
Re-download software and try again
YES
RTC will work properly
- 100 -
4. TROUBLE SHOOTING
4.16 Folder on/off Trouble

TEST POINT
U400
R407
Figure 4-16
CIRCUIT
2V93_VEXT
R407 FOLDER_DET 0 EM-0781-T5 4 1 VSS VDD VA405 ICVN0505X150FR C402 1u 2 3 NC OUT U400
- 101 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Is there the magnet in the Folder? YES
NO
Place the magnet properly.
Check the soldering of R407 YES
NO
Resolder R407
Voltage at pin 1 of U400 = 2.93V? YES
NO Voltage of VEXT at U100 = 2.93V?
NO
YES
Resolder U400
Replace U100
Open Folder. Voltage at pin 1 of U400 =2.93V
NO
Resolder U400
YES
Close folder. Voltage at pin 1 of U400 = 0V
NO
Replace U400
YES Folder on/off will work properly
- 102 -
4. TROUBLE SHOOTING
4.17 Micro SD Trouble

TEST POINT
J301
R325
Figure 4-17
C329
CIRCUIT
2V93_VEXT
2V93_VEXT
2V93_VEXT
R319 100K MC_D2 MC_D3 MC_CMD R325 MC_DET R328 1M 0
R320 (SCHB1A0202) 100K 8 7 6 5 11 12
DAT1 DAT0 VSS CLK GND3 GND4
- 103 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Micro SD Detect OK? YES
NO
Check the C329=2.93V? YES
NO
Change U100
MC_DET(R325) Is High?
NO
YES
Re-attach or Replace J301
Check out MC_CLK & Data Timing OK?
NO
Re-download SW
YES
Replace Micro SD Card
YES Micro SD Card will work properly
- 104 -
4. TROUBLE SHOOTING
4.18 Bluetooth Trouble

TEST POINT
C217 R218 U201 C212
X200
Figure 4-18
CIRCUIT
DNI C201 GND201 ANT201 R201 R202 DNI 0 FM_ANT A6 E1 B1 B2 G7 H3 C5 B7 BT_PCM_CLK BT_PCM_SYNC (EB2_ADDR_10) BT_RESET C203 1000p BT_32K FM_L FM_R
FM_L FM_R
U201 FM_ANT BT_ANT PCM_IN PCM_OUT A_GPIO4 A_GPIO5 A_GPIO6 A_GPIO7 PCM_CLK PCM_SYNC RESET SLEEP_CLK VAFL VAFR XTALN XTALP UART_RX UART_TX UART_CTS UART_RTS TM0 TM3 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7
EWFMLBAXX
R203 DNI
BT_PCM_TX BT_PCM_RX
C202
C1 C2 B4 1000p C4 I3 I4 I5 I6 G1 H1 H2 G2 G4 G3
2V93_VEXT
BT_19.2MHZ BT_UART_TX BT_UART_RX BT_UART_RTS BT_UART_CTS

BT_TX BT_RX BT_RTS BT_CTS
R206 47K
R207 47K
1V8_VGP X200 CSC3M192000EEVRS00 4 1

VDD TRI_OPEN OUT GND
(GPIO_172) BT_WAKEUP (GPIO_055) BT_INT
D_BT_IQ BT_D_IQ
BT_MAIN_CLK_EN
3 R219 2
47
BT_19.2MHZ
BT_MAIN_CLK_EN R218
19.2MHz C211 1u C216 DNI
H5 H4 G6 G5 C6 H7 B3 C7
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28
E2 E3 E4 E5 E6 E7 F1 F2 F3 F4 F5 F6 F7 D1 D2 D3 D4 D5 D6 D7 A1 H6 I7 I1 A5 A7 B5 B6
2V93_VEXT
VBAT
VIO VDDR3V VBATT REGBT VREG_CTL
I2 A2 A3 A4 C3 C218 DNI
BT_LDO_EN (EB2_ADDR_04) C210 1u C217 1u C212 1u
100K
- 105 -
4. TROUBLE SHOOTING
CHECKING FLOW
START
Check Bias Voltage 2V93_Vext at C217 Vbat at C212 YES
NO
Replace U100
BT_MAIN_CLK_EN check at R218? YES
NO
Replace U201
19.2MHz check at R 219? YES
NO
Replace X200
BT_Reset check at C203?
NO
Replace U101
YES
Bluetooth on is OK?
NO
Re-download SW and try again
YES
Bluetooth will work properly
- 106 -
4. TROUBLE SHOOTING
4.19 FM Radio Trouble

TEST POINT
C217 U201
C202 C212
Figure 4-19
CIRCUIT
DNI C201 GND201 ANT201 R201 R202 DNI 0 FM_ANT A6 E1 B1 B2 G7 H3 C5 B7 BT_PCM_CLK BT_PCM_SYNC (EB2_ADDR_10) BT_RESET C203 1000p BT_32K FM_L FM_R
FM_L FM_R
U201 FM_ANT BT_ANT PCM_IN PCM_OUT A_GPIO4 A_GPIO5 A_GPIO6 A_GPIO7 PCM_CLK PCM_SYNC RESET SLEEP_CLK VAFL VAFR XTALN XTALP UART_RX UART_TX UART_CTS UART_RTS TM0 TM3 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7
EWFMLBAXX
R203 DNI
BT_PCM_TX BT_PCM_RX
C202
2V93_VEXT
BT_19.2MHZ BT_UART_TX BT_UART_RX BT_UART_RTS BT_UART_CTS

R206 47K
R207 47K

(GPIO_172) BT_WAKEUP (GPIO_055) BT_INT
D_BT_IQ BT_D_IQ
BT_MAIN_CLK_EN
3 R219 2
47
BT_19.2MHZ
BT_MAIN_CLK_EN R218
19.2MHz C211 1u C216 DNI
H5 H4 G6 G5 C6 H7 B3 C7
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28
2V93_VEXT
VBAT
I2 A2 A3 A4 C3 C218 DNI
BT_LDO_EN (EB2_ADDR_04) C210 1u C217 1u C212 1u
100K
- 107 -
4. TROUBLE SHOOTING
CHECKING FLOW
START Check of ear_jack condition
NO A condition is good? YES Check condition of matching components (L300, C305)
Replace CN300
NO A condition is good? YES
Give the additory solder in L300, C305
Check Bias Voltage 2V93_Vext at C217 Vbat at C212 YES
NO
Replace U100
Check BT_32k?
NO
Replace U101
YES
NO FM_Radio work is good?
Replace U201
YES
FM_radio will work properly
- 108 -
5. DOWNLOAD
5. DOWNLOAD
5.1 Download
A. Download Setup
Figure 5-1 describes Download setupp
Figure 5-1 Download Setup
- 109 -
5. DOWNLOAD
B. Multi Download Procedure

1. Run GSM Multi Download program and select Setting
- 110 -
5. DOWNLOAD
2. Select Configuration from the menu and you may see this window
3. Press
key to select DLL file and press Open
OPEN Location
KF300.dll
KF300_DLL
File Name File Type
OPEN CANCLE
- 111 -
5. DOWNLOAD
4. Press
key to select the mot files
5. Select AlchemyData.mot and press open 6. Repeat step 4-5 to select CodeData.mot
Model
KF300
KF300.dll
OPEN Location
File Name File Type
OPEN CANCLE
- 112 -
5. DOWNLOAD
7. Check if the ADI option is set to Hermes 8. Press OK to end Configuration
Model Model Model
KF300 KF300 KF300
KF300.dll
KF300 KF300
Select Rate
- 113 -
5. DOWNLOAD
9. Waiting phone connecting pops up when you pushe the Start button in Multi download screen. Then you need to conncect the mobile phone with I/O Cable to get downloaded. 10. Once downloading is started, press STOP button to keep from re-downloading after downloading is completed.
- 114 -
5. DOWNLOAD
- 115 -
6. BLOCK DIAGRAM
6. BLOCK DIAGRAM
- 116 -
7. CIRCUIT DIAGRAM
3
2V93_VEXT
4
1V88_VMEM VCORE
10
11
12
OJ100
OJ101
OJ102
OJ103
1V82_VINT
2V93_VEXT
2V93_VEXT
2V85_VSIM
2V93_VEXT
C100 0.1u
C101 22p
C102 22p
C103 0.1u
C104 0.1u
C105 22p
C106 22u
1V5_VPLL
1V8_VRTC
2V93_VEXT
CHG_ABB VBAT
LCDID
C107 H14 L15 N19 K8 J8 H9 H10 R13 R12 R11 N15 M8 M15 L8 H13 H12 H11 P15 R14 R9 R10 P8 N8 K15 A15 B15 J15 C112 0.1u C113 0.1u C114 0.1u C115 0.1u C116 0.1u 22p C108 1u C109 22p C110 22p C111 1u LCD_ID (GPIO_036) B5 A5 B6 A6 B7 A7 B8 A8 B9 A9 B10 A10 B11 A11 A12 B12 D2 C2 C1 A3 B1 B4 A4 L4 L2 M6 H1 J1 H2 J2 K2 H4 D1 E1 E2 E19 C22 D21 D18 A20 B20 B22 B19 F16 A19 D17 D16 F15 B18 A18 AB11 A21 G17 AA8 P1 N2 N4 H22 J22 H21 K22 J21 D22 E22 F19 H19 H17 K1 L6 AB4 AA5 C21 W6 U8 W7 U9 W8 AB5 AA6 AB6 AA7 AB7 U10 AB8 W9 U11 L17 G22 G21 AA15 AB16 AA16 AB17 AA17 AB18 AA18 AB19 AA19 AB20 AA20 U21 T21 T22 R21 R22 AB15 U15 W16 U16 V2 G1 U13 AA11 W12 AB10 W11 AA10 U12 SD_CLK SD_CKE R1024.7K PA_EN CAM_MCLK (MUXOUT_1) ANT_SW2 ANT_SW1 ANT_SW3 VBACKUP VBAT C138 0.1u (1.8VLOGICLEVEL) VUSB nRESET ABBRESET DATA00 DATA01 DATA02 DATA03 DATA04 DATA05 DATA06 DATA07 DATA08 DATA09 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 BURSTCLK nWAIT nADV nWE DQM0 nWE DQM1 PWRON nRD EXT_PWRON R100 100K LCD_ID_L
BACK-UPBATTERY
VBACKUP
UART 3G 2.5G
GND GND RX RX TX TX VCHAR NC1 ON_SW ON_SW VBAT VBAT NC2 PWR NC3 URXD NC4 UTXD DSR RTS CTS
BAT100
ADD01 ADD02 ADD03 ADD04 ADD05 ADD06 ADD07 ADD08 ADD09 ADD10 ADD11 ADD12 ADD13 ADD14 ADD15 ADD16 ADD17 ADD18 ADD19 ADD20 ADD21 ADD22 ADD23 KEY_COL0 KEY_COL1 KEY_COL2 KEY_COL3 KEY_COL4
J6 G4 H6 F4 G6 E4 D5 F7 D6 F8 D7 F9 D8 F10 D9 F11 D10 F12 D11 F13 D12 F14 D13 D14 W15 AA14 W14 AB14 AB13 U14 AA13 AB12 W13 AA12
ADD_00 ADD_01 ADD_02 ADD_03 ADD_04 ADD_05 ADD_06 ADD_07 ADD_08 ADD_09 ADD_10 ADD_11 ADD_12 ADD_13 ADD_14 ADD_15 ADD_16 ADD_17 ADD_18 ADD_19 ADD_20 ADD_21 ADD_22 ADD_23
1V88_VMEM
1V88_VMEM
DATA_00 DATA_01 DATA_02 DATA_03 DATA_04 DATA_05 DATA_06 DATA_07 DATA_08 DATA_09 DATA_10 DATA_11 DATA_12 DATA_13 DATA_14 DATA_15
1 2 3 4 5 6 7 8 9 10 11 12
USC1 USC2 RPWRON
VMMC
VINT1 VINT2
VPLL
VMEM4 VMEM3 VMEM2 VMEM1
VCORE10 VCORE09 VCORE08 VCORE07 VCORE06 VCORE05 VCORE04 VCORE03 VCORE02 VCORE01
VEXT4 VEXT3 VEXT2 VEXT1
VVID2 VVID3
VSIM
VVID1
VRTC
DSR_DET USC5 USC4
JTAG
B
BURSTCLK NWAIT NADV NLWR_LBS NWE NHWR_UBS NRD NNDCS NNDWP NNDBUSY NSDCAS NSDCS NSDRAS NSDWE SDA10 NA3CS NA0CS NA2CS NA1CS GPIO_058 GPIO_062 GPIO_057 CSFS CSDO CSDI
2V93_VEXT
VBAT VUSBIN
D100 1V88_VMEM
1 3 2
KEYPADCOL_0 KEYPADCOL_1 KEYPADCOL_2 KEYPADCOL_3 KEYPADCOL_4 KEYPADROW_0 KEYPADROW_1 KEYPADROW_2 KEYPADROW_3 KEYPADROW_4
RPWRON R101
C118C119 22u 22p
C117 1u VCORE 2V93_VEXT 1V88_VMEM
KDR331V SD_CS SD_CAS SD_CS SD_RAS SD_WE 100K
C
KEY_ROW0 KEY_ROW1 KEY_ROW2 KEY_ROW3 KEY_ROW4 SIM_DATA SIM_CLK C120 26M MC_CLK MC_CMD MC_D0 MC_D1 MC_D2 MC_D3 FOLDER_DET 1000p
ROM_CS
F4 E12 C4 D9 D10 E10 H4 J4 K5 K6
L5 D11 D2
ROM_CS0
2V5_VABB
MPWR VAPP VBAT1 VBAT2 VBAT3 VBAT4 VBAT5 VBAT6 VBAT7 VBAT8
L19 SIMDATAIO K19 SIMCLK B14 F22 J19 J17 E21 F21 K17 P4 CLKIN MC_CLK MC_CMD MC_DAT_0 MC_DAT_1 MC_DAT_2 MC_DAT_3 GPIO_010
VMEMFB VUSBIN VCOREFB
TXON RXON
L1 TXON J2 ASM K4 RXON M1 CSFS J1 CSDI H2 CSDO M2 J3 H1 G2 H3 G1 G4 G3 L6 B2 L2 K3 F3 ABBRESET BSIFS BSDI BSOFS BSDO ASFS ASDI ASDO DBBON VCXOEN MCLK MCLKEN INT
VEXT1 VEXT2 VMEMOUT1 VMEMOUT2 VABB VPLL VCOREPWR2 VCOREPWR1 VCORESW1 VCORESW2 VINTOUT VINT VAPPGATE VUSB VSIM VMIC VRF VGP
A3 B3 L4 M4 G12 F12 F2 F1 E1 E2 K1 K2 D12 C11 L100 4.7uH
1V5_VPLL
VBAT VCORE
1V82_VINT
D
LCD_WR
P19 EB2_NRD N17 EB2_NWE W17 EB2_NWAIT P21 P17 R19 T19 U22 R17 K21 L21 P22 N22 U19 T17 W18 AB21 AA22 Y21 L22 M22 N21 M21 V22 V21 W22 W21 V19 Y22 EB2_ADDR_00 EB2_ADDR_01 EB2_ADDR_02 EB2_ADDR_03 EB2_ADDR_04 EB2_ADDR_05 EB2_ADDR_06 EB2_ADDR_07 EB2_ADDR_08 EB2_ADDR_09 EB2_ADDR_10 EB2_ADDR_11 EB2_ADDR_12 PPI_HSYNC PPI_VSYNC PPI_CLK PPI_DATA_0 PPI_DATA_1 PPI_DATA_2 PPI_DATA_3 PPI_DATA_4 PPI_DATA_5 PPI_DATA_6 PPI_DATA_7 PPI_DATA_8 PPI_DATA_9
U101 AD6900XBCZ
GPIO_076 BSOFS BSDO BSIFS BSDI ASFS ASDO ASDI PWRON CLKON CLKOUT CLKOUT_GATE GPIO_078 GPIO_008 GPIO_006 GPIO_007 UCLK WDDQ WUDQ WDDI WUDI
1V82_VINT
D
VUSB
2V85_VSIM
PWRON
VCXO_EN CLKOUT ABB_INT
RPWRON
2V5_VMIC
D5 MSFS D4 MSDI C5 MSCLK L3 RESET1P8 C3 RESET2P8 K10 J11 D3 C133 C134 1V8_VRTC 1u 1u ACCDETECT PWREN VAPPCFG
2V75_VCXO M6 J12 C12 M5 A8 A9 A10 A12 A11 J9 J10 C136 B7 C10 M11 M12 K9 L12 L11 K12 K11 F11 E11 L8 M8 L9 M9 G10 F10 C2 C1 B1 D1 C151 39p C152 39p C153 39p C154 39p C155 DNI C156 DNI C158 100p RCV_N RCV_P SPK_N SPK_P HP_ROUT FM_R FM_L JACK_DETECT C142 0.1u HP_MIC_N HP_MIC_P C143 39p C144 39p C145 39p C146 39p C137 1u 1u AFC C139 0.1u MIC_P MIC_N C121 TX_RAMP IP IN QP QN FB100 VBAT 1u 1u 2.2u 1u 22u 22u (2012) 1u 1u 1u 1u 1u 1u C122 C132 C123 C124 C125 C126 C127 C128 C129 C130 C131 1V8_VGP
2V93_VEXT
R113
(ChangetoSchemetic,Becauseof ADIApplicationNOTEGSM-0164) USB_P USB_N
C135 22p R103 2 1 10M
X100
CAM_DATA0 CAM_DATA1 CAM_DATA2 CAM_DATA3 CAM_DATA4 CAM_DATA5 CAM_DATA6 CAM_DATA7
USB_DP USB_DM USB_VBUS VUSB USB_ID SCLKOUT SCKE GPIO_060 GPIO_061 GPIO_063 GPIO_064 GPIO_065 GPIO_066 GPIO_067 GPIO_068 GPIO_069 GPIO_070 GPIO_071 GPIO_072 GPIO_073 GPIO_074 GPIO_085 GPIO_086 GPIO_087 GPIO_100 GPIO_123 GPIO_124 GPIO_141 GPIO_142 GPIO_143 GPIO_144 GPIO_145 GPIO_146 GPIO_147 GPIO_148 GPIO_149 GPIO_150 GPIO_151 GPIO_152 GPIO_153 GPIO_154 GPIO_155 GPIO_156 GPIO_172 GPIO_173 GPIO_174 GPIO_175 GPIO_177 NRESET USC_0 USC_1 USC_2 USC_3 USC_4 USC_5 USC_6 GND01 GND02 GND03 GND04 GND05 GND06 GND07 GND08 GND09 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28
U100 AD6855ABCZ
PA IP IN QP QN SPWR1 SPWR2 REFBB
B8 REFOUT B9 REF B4 BATTEMP
1V88_VMEM
C9 TEMP1 A7 TEMP2 M7 VRTC
FC-135 32.768KHz C141 22p R104 BT_UART_TX BT_UART_RX DNI BT_UART_CTS BT_UART_RTS HP_EN VJACK_LDO_EN VIBRATOR CHG_DET BT_PCM_CLK BT_PCM_RX BT_PCM_SYNC BT_PCM_TX TCK R107 TMS TDI TDO ADD25 ADD24
A17 OSCIN A16 OSCOUT L1 M4 M1 M2 N6 N1 P2 R1 P6 R4 R2 T1 R6 U1 T4 U2 V1 U4 W1 A13 D15 W2 Y2 T6 W5 AB2 AA3 F2 K6 F1 J4 G2 K4 U7 AB3 AA4 GPIO_000 GPIO_001 GPIO_002 GPIO_003 GPIO_004 GPIO_005 GPIO_009 GPIO_011 GPIO_012 GPIO_013 GPIO_014 GPIO_015 GPIO_016 GPIO_017 GPIO_018 GPIO_019 GPIO_020 GPIO_021 GPIO_022 GPIO_024 GPIO_032 GPIO_033 GPIO_034 GPIO_035 GPIO_036 GPIO_037 GPIO_038 GPIO_049 GPIO_050 GPIO_051 GPIO_052 GPIO_053 GPIO_054 GPIO_055 GPIO_056 GPIO_059
1V82_VINT
R105 CHG_ABB 10K C140 22p
C8 AUXADC1 C7 AUXADC2 M3 CRST
AFCDAC AIN1P AIN1N JACKSENSE AIN2N AIN2P AIN3R AIN3L AOUT1N AOUT1P AOUT2N_1 AOUT2N_2 AOUT2P_1 AOUT2P_2 AOUT3R AOUT3L TDO TMS TDI TCK
PA_BAND S_EN S_DATA S_CLK VBAT LCD_BACKLIGHT_CTRT SIM_RST GENIE_RX GENIE_TX LCD_DATA15 LCD_DATA14 LCD_DATA13 LCD_DATA12 LCD_DATA11 LCD_DATA10 LCD_DATA09 LCD_DATA08 LCD_DATA07 LCD_DATA06 LCD_DATA05 LCD_DATA04 LCD_DATA03 LCD_DATA02 LCD_DATA01 LCD_DATA00 BT_WAKEUP LCD_SUB_CS MC_DET LCD_MAIN_CS RTCK nRESET USC0 USC1 USC2 USC3 USC4 USC5 USC6 VUSBIN CHG_ABB
J5 VMEMSEL J6 VRTCSEL A2 CHGDET B11 TRKCHG1 B10 TRKCHG2 A5 GATEDRIVE A6 ISENSE R106 68K (1%) B12 REFCHG A1 VCHG A4 VUSBCHG B6 VBATSENSE B5 BATTYPE
BOOTCONTROL
PIN GPIO_098 GPIO_099 GPIO_113 0 1 0 1 0 1 DOWNLOADUART DOWNLOADUSB 13MHz 26MHz NORBOOT NANDBOOT
BATT_TEMP C150 0.1u KEY_BACKLIGHT3 KEY_ROW4 POWERKEY (USEGHOSTFUNC.OFROW4ONPOWER-UP) R120 120K (1%) C149 0.1u
47K
K8 CHGLIGHT H11 LIGHT1 G11 LIGHT2 H12 LIGHT3 L10 KEYOUT M10 KEYON
VGND11 VGND12 AGND2 AGND3 AGND4 AGND01 AGND02 AGND03 AGND04 AGND05 AGND06 AGND07 AGND08 AGND09 AGND010 AGND011 AGND012 AGND013 AGND014 AGND015 AGND016 AGND017 AGND018 AGND019 SGND1 SGND2 LGND DGND GND_J07 VCOREGND1 VCOREGND2
KEY_ROW5 LCD_ID USB_DET
HP_LOUT
2V93_VEXT 2V93_VEXT F_DPD (MUXOUT_2) BT_32K BT_INT DSR_DET CHG_EN
1V88_VMEM
R111
R110
DNI
10K
R109
2V93_VEXT
M17 NC1 V4 NC2 W10 GPIO_098 AB9 GPIO_099 AA9 GPIO_113 T2 JTAGEN A2 TESTMODE
H
R112 10K DNI JTAGEN (CHANGTO1KUSINGTRACE32)
C6 D6 D7 E9 G9 E5 F5 G5 D8 E6 E7 E8 F6 F7 F8 F9 G6 G7 G8 H6 H7 H8 H9 J8 K7 L7 H10 H5 J7 E3 E4 C157 0.1u
HOOK_DETECT
A1 A14 A22 AA1 AB1 AB22 B13 B16 B17 G19 K10 K11 K12 K13 L10 L11 L12 L13 M10 M11 M12 M13 M19 N10 N11 N12 N13 Y1
10
11
12
- 117 -
7. CIRCUIT DIAGRAM
10
11
12
BLUETOOTH & FM RADIO
MEMORY (INTEL, 512Mbit NOR + 128Mbit SDRAM)

U202 ADD01 ADD02 ADD03 ADD04 ADD05 ADD06 ADD07 ADD08 ADD09 ADD10 ADD11 ADD12 ADD13 ADD14 ADD15 ADD16 ADD17 ADD18 ADD19 ADD20 ADD21 ADD22 ADD23 ADD24 ADD25 D1 C1 B1 B2 A2 B3 A3 A4 G8 F8 E8 G9 F9 E9 D9 C9 B9 B4 B5 A5 F7 E7 B7 A6 A7 A8 B8 J1 C205 0.1u 2V93_VEXT VBAT A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 F_VPP PF38F5060M0Y0BE DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 _ADV F1__CE F2__CE F3__CE F4__CE_A27 F_CLK D_CLK D__CLK _OE F__RST F_WAIT _WE D__WE F__WP1 F__WP2 F_DPD N_CLE N_ALE N_RY__BY D_CKE D_BA0 D_BA1 D__RAS D__CAS D1__CS D2__CS D_DM0_S__LB D_DM1_S__UB D_UDQS D_LDQS N__RE_S__CS1 N__WE_S_CS2 M2 L1 K1 L2 M4 L3 L4 L5 M5 L6 M6 L7 L8 K9 L9 M8 D5 G3 G2 H3 E6 K5 J5 H5 H7 G7 J9 E2 H6 E1 F1 B6 E5 D8 H1 G6 G4 H4 F4 F3 F2 E3 H9 H8 M7 M3 F6 H2 SD_CKE ADD18 ADD19 SD_RAS SD_CAS SD_CS DQM0 DQM1 DATA00 DATA01 DATA02 DATA03 DATA04 DATA05 DATA06 DATA07 DATA08 DATA09 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 nADV ROM_CS0
DNI C201 GND201 ANT201 R201 R202 DNI 0 U201 A6 E1 B1 B2 G7 H3 C5 B7 BT_PCM_CLK BT_PCM_SYNC (EB2_ADDR_10) BT_RESET C203 1000p BT_32K FM_L FM_R
FM_L FM_R
EWFMLBAXX
FM_ANT
FM_ANT BT_ANT PCM_IN PCM_OUT A_GPIO4 A_GPIO5 A_GPIO6 A_GPIO7 PCM_CLK PCM_SYNC RESET SLEEP_CLK VAFL VAFR XTALN XTALP UART_RX UART_TX UART_CTS UART_RTS TM0 TM3 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28
R203 DNI
BT_PCM_TX BT_PCM_RX
C202
2V93_VEXT
BT_19.2MHZ
C
R206 47K R207 47K
BT_UART_TX BT_UART_RX BT_UART_RTS BT_UART_CTS

(GPIO_172) BT_WAKEUP BT_INT (GPIO_055)
D_BT_IQ BT_D_IQ
BT_MAIN_CLK_EN
3 R219 2
47
BT_19.2MHZ
BT_MAIN_CLK_EN R218
19.2MHz C211 1u C216 DNI
H5 H4 G6 G5 C6 H7 B3 C7
1V88_VMEM
BURSTCLK SD_CLK nRD nRESET nWAIT nWE SD_WE
1V88_VMEM
1V88_VMEM
C
R204 100K R205 100K
D4 F1_VCC1 D6 F2_VCC2 J4 F1_VCC3 J6 F2_VCC4 C5 D_VCC1 D3 D_VCC2 D7 D_VCC3
F_DPD R208 DNI
I2 A2 A3 A4 C3 C218 DNI
C207 0.1u BT_LDO_EN (EB2_ADDR_04) C210 1u C217 1u C212 1u C209 0.1u
C204 0.1u
D2
S_VCC
100K
J2 VCCQ1 J3 VCCQ2 J7 VCCQ3 J8 VCCQ4 C2 C3 C4 C6 C7 C8 K2 K3 K4 K6 K7 K8 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12
DU1 DU2 DU3 DU4 RFU
A1 A9 M1 M9 G1
Charging IC ON BOARD JTAG

F
VBAT CHG_ABB VUSBIN U203 1 2 CRDL USB ISL6299 BAT 10 U204 NCP348MTR2G 1 4 R210 10K 6 9 7 5 IMIN ICDL USBON _EN GND PGND 8 11 _PPR _CHG 3 4 5 3 2 11 12 IN1 IN2 IN3 _FLAG GND NC1 NC2 _EN GATE_OUT GATE OUT2 OUT1 10 9 8 7 6 R217 R211 30K (GPIO_013) CHG_DET JTAGEN TDI TMS TCK RTCK TDO nRESET VCHARGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 G3 G4 2V93_VEXT CHG_ABB G1 G2 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1V88_VMEM CN201
USC6 USC5 USC4 USC3 USC2 USC1 USC0
(RTS) (CTS) (TX) (RX)
G
R214 100K R216 10K R212 100K R213 36K (1%) C215
30K
1u
10
11
12
- 118 -
7. CIRCUIT DIAGRAM
10
11
12
2V5_VJACK
R300
EARJACK / I_O
HP_MIC_N C301 39p U300 STF203-22-TC USB_P
6 D+IC 5 VBUS 4 D-IC DGND 3 D+ 2 1
1.5K R303 C300 10u 2.2K R302 C332 DNI DNI HOOK_DETECT
USB_LINEP
HP_MIC_P
2V93_VEXT USB_LINEN U301 NLAS5223BMNR2G

1 VCC NO2 9 NO1 COM2 8 COM1 4 IN1 NC2 6 NC1 GND IN2 7 10
USB_N
B
C303 HP_ROUT VBAT 2V93_VEXT HP_EN (GPIO_009) 100u
100u
C302 HP_LOUT HP_EN
2V93_VEXT VUSBIN VBAT VCHARGE CN300 R305 100K R306 100K R307 R309 4.7 4.7 FB300 FB301 FB302 1800 21 19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 20 22 EVLC14S02050 FM_ANT L300 270nH C305 10p
R304 100K
C304 1u
R308
U302 SLAS4717EPMTR2G
1 VCC 2 NO1 3 COM1 4 IN1 5 NC1 GND NC2 6 IN2 7 COM2 8 NO2 9 10
100K
USB_LINEN MULTI_PORT_RX USB_DET
USB_LINEP MULTI_PORT_TX USB_DET
MULTI_PORT_TX MULTI_PORT_RX JACK_DETECT EXT_PWRON EXT_PWRON
L301
100nH
GENIE_RX DSR_DET (TX) (RX) USC2 USC1 DSR TX RX R310 R311 47 47 R312 VA300 VA301 RSB6.8CST2R 1 ZD300 VA303
GENIE_TX C306 0.1u
EVLC5S0250
EVLC5S0250
VBAT
2V5_VJACK
C308 1u
C309 47p
C307 10u
C310 1u
C311 47p VBAT CN301 3 2 1 C312 C313 47p 1u C314 3p C315 10u
USB & DEBUG

(USB & DEBUG PATH Control)
USB_DET USB & DEBUG Links to VJACK_LDO_EN L H DEBUG_TX/ RX R329 100K USB_LINEP/ N C330 1u C331 1u U304 1 4 6 VDD NC CE R1114D251D 3 VOUT GND1 GND2 2 5
BATT_TEMP
SPEAKER
VBAT C316 SPK_N C317 SPK_P 0.01u R315 47K 0.01u (GAIN x6) R314 47K U303 D1 INTPA2005D1ZQYR VDD1 VDD2 NC VOLOUD_SPK_EN R317 A2 A3 B3 C2 C3 D2 D3 A1 _SD
GND1 GND2 GND3 GND4 GND5 GND6
SIM CONNECTOR
2V85_VSIM (5000-6T-1.8SL) R316 15K SIM_DATA J300 1 4 C5 C1 2 5 C6 C2 6 3 C7 C3 10 7 GND4 GND1 9 8 GND3 GND2 2V85_VSIM
B4 C4 B1 FB304 A4 FB305 D4 CN302 1 2
C1
IN+
VO+
GND7
C319 10u
C320 DNI
C321 1000p
100K
C322 VA304 1000p EVLC14S02050
C323 VA305 EVLC14S02050 DNI
MIC
G
MICRO SD Connector
2V5_VMIC 2V93_VEXT R318 1K 2V93_VEXT 2V93_VEXT
R322
R319 C326 39p C327 10u 100K 2.2K
R320 (SCHB1A0202) 100K 8 DAT1 7 DAT0 6 VSS 5 CLK 11 GND3 12 GND4
R324 MIC_P 100ohm C328 39p R326 MIC_N EVLC14S02050 100ohm EVLC14S02050 R327 2.2K VA306 MIC300 OBG-415L42-C33LH
MC_D2 MC_D3 MC_CMD R325 MC_DET R328 1M 0
VA307
10
11
12
- 119 -
7. CIRCUIT DIAGRAM
10
11
12
KEY BACKLIGHT
VBAT
R400 KEY_BACKLIGHT3 LEWWS44-E KB400 KB401 KB402 KB403 KB404 LEWWS44-E LD401 ICVN0505X150FR ICVN0505X150FR LD400 47 R401 47
KEYPAD
KEY_COL0
F1
KB409 VA400
KB405
KB406
KB407
KB408
VA401
C 2
KEY_COL1
CLEAR
R402 680 (VOLUME_UP) EVLC18S02015 4 3 2 1 CN400
SIDEKEY_PAD
KB410
KB411
KB412
KB413
KB414
3
KEY_COL2 KB415
SEND
R403 680 (VOLUME_DOWN) VA403 KB417 EVLC18S02015
KB416
MENU
R405 KEY_COL3 680 VA502 EVLC18S02015 KB418
CONF
OK
KB420 KB421
KB419
VA402
UP
R614 KEY_COL4 680 VA503 EVLC18S02015
RIGHT
LEFT
DOWN
VIBRATOR
EVLC18S02015 R404 680 VA404 VBAT Q400 R408 VIBRATOR_P 2.2 VIBRATOR
3 Q2_B Q1_B 2 Q1_E 1 Q1_C 6 5 Q2_C Q2_E 4
KEY_ROW0
KEY_ROW1
E
KEY_ROW2 VBAT
END
R406 10K KB422
KEY_ROW3 POWERKEY
KEY_ROW4
KEY_ROW5
FLIP
2V93_VEXT
R407 FOLDER_DET 0 EM-0781-T5 4 1 VSS VDD VA405 ICVN0505X150FR C402 1u 2 OUT U400
NC
10
11
12
- 120 -
7. CIRCUIT DIAGRAM
10
11
12
FPCB CONNECTOR
CAMERA POWER
9 8 7 6
VBAT 1V8_DVDD C502 39p U500 2V8_IOVDD 1V8_DVDD 2V8_AVDD 1 VIN 2 EN1 3 EN2 4 NC1 RT9011-MGPQW 8 VOUT1 7 VOUT2 6 NC2 5 GND C506 2.2u 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 G4 G3 C508 0.1u C509 0.1u C510 0.1u C522 DNI C511 27p LCD_ID_L MLED2 MLED1 KEY_COL3 KEY_COL4 VIBRATOR_P MLED 100ohm ICVN0505X150FR R505 DNI R504 C521 DNI LCD_RESET
4 3 2 1
2V8_IOVDD
2V8_AVDD
L501 18nH
(EB2_ADDR_00)
CN500 G2 G1
R500 100K
C505 1u
FB500
PGND
CAM_LDO_EN
ICVE10184E150R500FR
C507 1u
C523 2.2u
VA501
KEY_ROW4 KEY_ROW5
1 2 3 4

9 8 7 6
ICVE10184E150R500FR
G1
10
G2
4 3 2 1
6 7 8 9
FL503 2V8_IOVDD
ICVE10184E150R500FR
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
G1
10
G2
10
6 7 8 9
FL501
ICVE10054E250R201FR
10
D
6 7 8 9
4 3 2 1
G1
G2
10
FL504
ICVE10054E250R201FR
G1
G2
10
4 3 2 1
6 7 8 9
FL505 R501 R502

10
ICVE10054E250R201FR
E
4.7K CAM_MCLK CAM_PCLK CAM_I2C_CLK CAM_I2C_DATA 4.7K
4 3 2 1
LCD BACKLIGHT
1u C517
D502
D501
8 9
FL506
ICVE10184E150R500FR
RSB6.8CST2R
RSB6.8CST2R
10
U501 4 5 C1+ C1-
G1
G2
10
4 3 2 6 7 8 9 1
6 7 8 9
4 3 2 1
VBAT
G1
G2
FL507 ICVE10054E250R201FR LCD_BACKLIGHT_CTRT R503 C520 1u 100K 3 10 15 EN_SET GND PGND
FL508
ICVE10184E150R101FR
MLED3 MLED4 MLED5
11 12 13 14 1 2
D505 RSB6.8CST2R
D504 RSB6.8CST2R
D506 RSB6.8CST2R
10
11
12
- 121 -
7. CIRCUIT DIAGRAM
10
11
12
VBAT
TP603
TP604
C601 22u
C602 33p
C603 0.01u
1K TX_RAMP
R603
20
17
C604 39p
VCC1B
R606
DNI R613 0 15 11
VCC1A
VAPC
VBATT
C605 0.01u
C606 0.01u
DCS_PCS_OUT EGSM_OUT RSVD_GND P_GND U601 SKY77318
DCS_PCS_IN EGSM_IN ENABLE BS
3 4 18 1 PA_EN
R607 51
C608
22p
R608
C609 0.5p DNI
C610 DNI
19 21
(GPIO_060) R610 82 C611 33p
GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1
R609
PA_BAND (GPIO_070)
C612
4.3nH
C615 DNI RF500

ANT
C616 2.7p
SW601
G1
RF
G2
16 14 13 12 10 9 8 7 5
C613 27p
C614 27p
QN 82p C617 QP 26M 26MHz
TSX-3225_26MHZ X601
2V75_VCXO
VLDO1
D
R611 AFC 10K
24 23 22 21 20 19 18 17
C618 47p
C619 1u
C620 0.1u
2V93_VEXT 16 15 14 13 12 11 10 9 C622 220n
VBAT
VLDO1
RX1900_N 20 19 18 16 11 9 R612 10 C632 39p C628 0.1u 12 GND6 GND5 GND4 GND3 GND2 GND1 VDD ANT GSM850_900_TX GSM1800_1900_TX GSM1900_RX2 GSM1900_RX1 GSM1800_RX2 GSM1800_RX1 GSM900_RX2 GSM900_RX1 GSM850_RX2 GSM850_RX1 15 10
C621
6p L601 4.7nH
2V75_VCXO
C623 8 7 6 5 4 3 2 1 RX1900_P RX1800_N C624
6p 4.7p L602 5.6nH
25 26 27 28 29 30 31 32 33
VC2 13 VC1 14 DGM1110M014 FL601
RX1800_P RX900_N
C631 C633
4.7p 10p
GND
AD6548 U602
C625 0.1u C629 27p C634 0.1u C630 0.1u C626 0.1u C627 0.1u
17
VLDO1 L603 18nH RX900_P RX850_N C635 C637 10p 10p L604 RX850_P C638 10p 18nH C636 39p C639 100p C640 100p C641 100p S_EN S_CLK S_DATA (GPIO_072) (GPIO_074) (GPIO_073)
ANT_SW1 ANT_SW2
IP C642 82p
C643 100p
C644 100p
1 2 3 4 5 6 7 8
IN
ANT_SW1 GSM RX EGSM RX DCS RX PCS RX L L H H L H
ANT_SW2 L L L L H H
GSM/EGSM TX DCS/PCS TX
10
11
12
- 122 -
7. CIRCUIT DIAGRAM
10
11
12
MAIN-FPCB to KEY-PCB INTERFACE CONNECTOR

ENBY0023901 (AXK7L30225G, 30pin, 0.9t, Socket)
KEY-PCB to CAMERA INTERFACE CONNECTOR

ENBY0020401 (AXK7L24227J, 24pin, 0.9t, Socket)
1V8_DVDD
2V8_IOVDD
2V8_AVDD
CN701 G1 G2 CAM_RESET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 G3 EVLC18S02015 EVLC18S02015 VA701 VA702 G4 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 CN702 G1 G2 1 2 3 4 5 6 7 8 9 10 11 12 G3 G4 24 23 22 21 20 19 18 17 16 15 14 13
2V8_IOVDD
1V8_DVDD
2V8_AVDD
CAM_PCLK CAM_DATA0 CAM_DATA1 CAM_DATA2 CAM_DATA3 CAM_DATA4 CAM_DATA5 CAM_DATA6 CAM_DATA7 R701 KEY_COL3 KEY_COL4 R702 680 680
C
CAM_I2C_CLK CAM_I2C_DATA CAM_VSYNC CAM_HSYNC MUXOUT_1
MUXOUT_1 CAM_HSYNC CAM_VSYNC CAM_I2C_DATA CAM_I2C_CLK CAM_PWDN KEY_ROW4 KEY_ROW5
CAM_DATA7 CAM_DATA6 CAM_DATA5 CAM_DATA4 CAM_DATA3 CAM_DATA2 CAM_DATA1 CAM_DATA0 CAM_PCLK CAM_RESET CAM_PWDN
KEY MATRIX (4 pi Dome)
KB701 Match Two Column Lines to Outer Circle of Buttons
KB702
KB703
KB704
HOT 1
KEY_COL3
HOT 2
HOT 3
HOT 4 F
KEY_COL4 KEY_ROW4 KEY_ROW5
10
11
12
- 123 -
7. CIRCUIT DIAGRAM
10
11
12
FPCB to KEY-PCB INTERFACE CONNECTOR

ENBY0023801 (AXK8L30125BG, 30pin, 0.9t, Header)
FPCB to LCD INTERFACE CONNECTOR

ENBY0023201 (AXK8L44125, 44pin, 0.9t, Header)
2V93_VEXT
2V8_IOVDD
1V8_DVDD
B
CN801 G2 G1 CAM_RESET CAM_PCLK CAM_DATA0 CAM_DATA1 CAM_DATA2 CAM_DATA3 CAM_DATA4 CAM_DATA5 CAM_DATA6 CAM_DATA7 KEY_COL3 KEY_COL4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 G3 G4 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
2V8_AVDD
B
CN802 G1 G2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 G3 G4 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
(0.15mm)
(0.15mm)
(0.2mm)
(0.15mm)
MUXOUT_1 CAM_HSYNC CAM_VSYNC CAM_I2C_DATA CAM_I2C_CLK CAM_PWDN KEY_ROW4 KEY_ROW5
VIBRATOR_P LCD_ID
(0.15mm)
RCV_N RCV_P LCD_MAIN_CS LCD_RS LCD_VSYNC LCD_DATA07 LCD_DATA06 LCD_DATA05 LCD_DATA04 LCD_DATA03 LCD_DATA02 LCD_DATA01 LCD_DATA00 MLED1 MLED2 MLED3 MLED4 MLED5
(IF_MODE = LOW : 16BIT) (SUB LCD VSYNC)
LCD_DATA15 LCD_DATA14 LCD_DATA13 LCD_DATA12 LCD_DATA11 LCD_DATA10 LCD_DATA09 LCD_DATA08 LCD_RESET LCD_WR
(LCD_RD : Internally Pulled Up)
(0.15mm) (0.15mm) (0.15mm) (0.15mm) (0.15mm)
LCD_SUB_CS MLED
(0.4mm)
MAIN to FPCB INTERFACE CONNECTOR

E
ENBY0020202 (AXK8L60125J, 60pin, 0.9t, Header)

2V93_VEXT 2V8_IOVDD 1V8_DVDD 2V8_AVDD
(0.15mm)
CN803 G1 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 G2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
RCV_N RCV_P CAM_PWDN KEY_ROW4 KEY_ROW5 LCD_VSYNC CAM_VSYNC CAM_HSYNC CAM_RESET CAM_DATA7 CAM_DATA6 CAM_DATA5 CAM_DATA4 CAM_DATA3 CAM_DATA2 CAM_DATA1 CAM_DATA0 MUXOUT_1 CAM_PCLK CAM_I2C_CLK CAM_I2C_DATA LCD_MAIN_CS LCD_SUB_CS LCD_WR MLED3 MLED4 MLED5
(0.2mm)
(0.15mm)
(0.15mm)
(0.15mm) (0.4mm)
KEY_COL3 KEY_COL4 VIBRATOR_P MLED
LCD_RS LCD_RESET
F
LCD_DATA15 LCD_DATA14 LCD_DATA13 LCD_DATA12 LCD_DATA11 LCD_DATA10 LCD_DATA09 LCD_DATA08 LCD_DATA07 LCD_DATA06 LCD_DATA05 LCD_DATA04 LCD_DATA03 LCD_DATA02 LCD_ID MLED2 MLED1 LCD_DATA00 LCD_DATA01
(0.15mm) (0.15mm)
(0.15mm) (0.15mm) (0.15mm)
VISION MARK
H
TP801TP802TP803TP804
10
11
12
- 124 -
7. CIRCUIT DIAGRAM
10
11
12
SUB KEY MATRIX
SIDEKEY_PAD
CN501 1 2 3 4 VOLUME_UP
VOLUME_DOWN
10
11
12
- 125 -
- 126 -
8. BGA IC Pin Check
8. BGA IC Pin Check
USE NOT IN USE
- 127 -
8. BGA IC Pin Check
AD6855 Terminal Locations (Top view)
USE NOT IN USE
- 128 -
8. BGA IC Pin Check
USE NOT IN USE
- 129 -
8. BGA IC Pin Check
USE NOT IN USE
- 130 -
8. BGA IC Pin Check
USE NOT IN USE
- 131 -
- 132 -
9. PCB LAYOUT
- 133 -
9. PCB LAYOUT
SW601 (mobile switch) - Can't make a call -Tx Low Power - Not good Rx BER - No service FL601 (RF Front End module) - Can't make a call - Tx Low Powe - Not good Rx BER - No service U602 (Transceiver) - Can't make a call - Tx Low Power - Not good Rx BER - No service U500 - The camera working bad X100 - RTC trouble
U601 (RF PAM) - Can't make a call - Tx Low Power - No service CN500 - Can't take a picture - No LCD display U303 - The speaker working bad U501 - Can't turn on the LCD Backlight
U201 - The Bluetooth working bad - The FM Radio working bad Q400 - The vibrator working bad
- 134 -
9. PCB LAYOUT
CN701 Key_PCB conn. NO Camera No Hot_Key
CN702 2M CAM conn. NO Camera
- 135 -
9. PCB LAYOUT
CN802 LCD_Conn. No Display
CN801 Key_PCB Conn. No Camera No Hot_Key
- 136 -
9. PCB LAYOUT
- 137 -
- 138 -
10. ENGINEERING MODE

A. About Engineering Mode
Engineering mode is designed to allow a service man/engineer to view and test the basic functions provided by a handset.
B. Access Codes
The key sequence for switching the engineering mode on is 2945#*#. Pressing END will switch back to non-engineering mode operation.
C. Key Operation
Use Up and Down key to select a menu and press select key to progress the test. Pressing back key will switch back to the original test menu.
D. Engineering Mode Menu Tree
Engineering Mode
BB Test
RF Test
MF Mode
Trace option
Call Timer
Fact. Reset
S/W Version
CAMERA LCD Backlight Buzzer Vibrator ADC Battery Audio DAI Bluetooth
SAR Test
All Auto Test Backlight Buzzer Vibrator LCD Key PAD MicSpkTest Camera Video Camera
UART On UART Off Bluetooth on Bluetooth off
All Calls Reset
- 139 -
10.1 BB Test [MENU 1]

10.1.1 CAMERA
This menu is to test the Camera. 1) Main LCD preview: It shows the picture on Main LCD.
10.1.2 LCD
1) COLOUR : WHITE, RED, GREEN, BLUE, BLACK 2) Contrast Value
10.1.3 Backlight
This menu is to test the LCD Backlight and Keypad EL Backlight. 1) Backlight on : LCD Backlight and Keypad EL Backlight light on at the same time. 2) Backlight off : LCD Backlight and Keypad EL Backlight light off at the same time. 3) Backlight value: This controls brightness of Backlight. When entering into the menu,the present backlight-value in the phone is displayed. Use Left/Right key to adjust the level of brightness. The value of the brightness set at last will be saved in the NVRAM.
10.1.4 Buzzer
This menu is to test the melody sound. 1) Melody on : Melody sound is played through the speaker. 2) Melody off : Melody sound is off.
10.1.5 Vibrator
This menu is to test the vibration mode. 1) Vibrator on : Vibration mode is on. 2) Vibrator off : Vibration mode is off.
- 140 -
10.1.6 ADC (Analog to Digital Converter)

This displays the value of each ADC. 1) MVBAT ADC : Main Voltage Battery ADC 2) AUX ADC : Auxiliary ADC 3) TEMPER ADC : Temperature ADC
10.1.7 BATTERY
1) Bat Cal: This displays the value of Battery Calibration. The following menus are displayed in order : BAT_LEV_4V, BAT_LEV_3_LIMIT, BAT_LEV_2_LIMIT, BAT_LEV_1_LIMIT, BAT_IDLE_LI MIT, BAT_INCALL_LIMIT, SHUT_DOWN_VOLTAGE, BAT_RECHARGE_LMT 2) TEMP Cal: This displays the value of Temperature Calibration. The following menus are displayed in order : TEMP_HIGH_LIMIT, TEMP_HIGH_RECHARGE_LMT, TEMP_LOW_RECHARGE_LMT, TEMP_LOW_LIMIT
10.1.8 Audio
This is a menu for setting the control register of Voiceband Baseband Codec chip. Although the actual value can be written over, it returns to default value after switching off and on the phone. 1) VbControl1 : VbControl1 bit Register Value Setting 2) VbControl2 : VbControl2 bit Register Value Setting 3) VbControl3 : VbControl3 bit Register Value Setting 4) VbControl4 : VbControl4 bit Register Value Setting 5) VbControl5 : VbControl5 bit Register Value Setting 6) VbControl6 : VbControl6 bit Register Value Setting
9.1.9 DAI (Digital Audio Interface)

This menu is to set the Digital Audio Interface Mode for Speech Transcoder and Acoustic testing. 1) DAI AUDIO : DAI audio mode 2) DAI UPLINK : Speech encoder test 3) DAI DOWNLINK : Speech decoder test 4) DAI OFF : DAI mode off
- 141 -
10.2 RF Test [MENU 2]

10.2.1 SAR test
This menu is to test the Specific Absorption Rate. 1) SAR test on: Phone continuously process TX only. Call-setup equipment is not required. 2) SAR test off: TX process off
10.3 MF mode [MENU 3]

This manufacturing mode is designed to do the baseband test automatically. Selecting this menu will process the test automatically, and phone displays the previous menu after completing the test.
10.3.1 All auto test

LCD, Backlight, Vibrator, Buzzer, Key Pad, Mic&Speaker,
10.3.2 Backlight
LCD Backlight is on for about 1.5 seconds at the same time, then off.
10.3.3 Buzzer
This menu is to test the volume of Melody. It rings in the following sequence. Volume 1, Volume 2, Volume 3, Volume 0 (mute), Volume 4, Volume 5.
10.3.4 Vibrator
Vibrator is on for about 1.5 seconds.
10.3.5 LCD
1)LCD Main LCD screen resolution tests horizontally and vertically one by one and fills the screen.
10.3.6 Key pad

When a pop-up message shows Press Any Key, you may press any keys including side keys, but not [Soft2 Key]. If the key is working properly, name of the key is displayed on the screen. Test will be completed in 15 seconds automatically.
- 142 -
10.3.7 MicSpk Test

The sound from MIC is recorded for about 3 seconds, then it is replayed on the speaker automatically.
10.3.8 Camera Test

This menu is to test camera(preview and capture automatically)
10.4 Trace option [MENU 4]

This is NOT a necessary menu to be used by neither engineers nor users.
10.5 Call timer [MENU 5]

This menu is to set the Digital Audio Interface Mode for Speech Transcoder and Acoustic testing. 1) All calls : This displays total conversation time. User cannot reset this value. 2) Reset settings : This resets total conversation time to this, [00:00:00].
10.6 Fact. Reset [MENU 6]

This Factory Reset menu is to format data block in the flash memory and this procedure set up the default value in data block. Attention 1 Fact. Reset (i.e.Factory Reset) should be only used during the Manufacturing process. 2 Servicemen should NOT progress this menu, otherwise some of valuable data such as Setting value, RF Calibration data, etc. cannot be restored again.
10.7 S/W version

This displays software version stored in the phone.
- 143 -
11. STAND ALONE TEST

11.1 Introduction
This manual explains how to examine the status of RX and TX of the model.
A. Tx Test
TX test - this is to see if the transmitter of the phones is activating normally.
B. Rx Test
RX test - this is to see if the receiver of the phones is activating normally.
11.2 Setting Method

A. COM port
a. Move your mouse on the Connect button, then click the right button of the mouse and select Com setting. b. In the Dialog Menu, select the values as explained below. - Port : select a correct COM port - Baud rate : 38400 - Leave the rest as default values
B. Tx
1. Selecting Channel - Select one of GSM or DCS Band and input appropriate channel. 2. Selecting APC a. Select either Power level or Scaling Factor. b. Power level - Input appropriate value GSM (between 5 ~19) or DCS (between 0 ~15) c. Scaling Factor - A Ramp Factor appears on the screen. - You may adjust the shape of the Ramp or directly input the values.
C. Rx
1. Selecting Channel - Select one of GSM or DCS Band and input appropriate channel. 2. Gain Control Index (0 ~ 26) and RSSI level - See if the value of RSSI is close to -16dBm when setting the value between 0 ~ 26 in Gain Control Index. - Normal phone should indicate the value of RSSI close to -16dBm.
- 144 -
11.3 Means of Test

a. Select a COM port b. Set the values in Tx or Rx c. Select band and channel d. After setting them all above, press connect button. e. Press the start button
Connect Button
Figure 11-1. HW test program
- 145 -
Figure 11-2. HW test setting
Figure 11-3. Ramping profile
- 146 -
12. AUTO CALIBRATION

12.1 Overview
Auto-cal (Auto Calibration) is the PC side Calibration tool that perform Tx, Rx and Battery Calibration with Agilent 8960(GSM call setting instrument) and Tektronix PS2521G(Programmable Power supply). Auto-cal generates calibration data by communicating with phone and measuring equipment then write it into calibration data block of flash memory in GSM phone.
12.2 Equipment List

Equipment for Calibration Wireless Communication Test Set RS-232 Cable and Test JIG RF Cable Power Supply GPIO interface card Calibration & Final test software Test SIM Card PC (for Software Installation) Pentium II class above 300MHz HP-66311B HP-GPIB Type / Model HP-8960 Brand Agilent LG LG Agilent Agilent LG
Table 12-2-1. Calibration Equipment List.
Figure 12-2-2. Equipment Setup
- 147 -
JTAG2
JTAG1
USB
MON
TA
MON Status ON OFF 1 2 3 4 PS VBAT POWER ON PS
12.3 Test Jig Operation

Power Source Power Supply Table 12-3-1 Jig Power Description Usually 4.2V
PHONE POWER TA
UART
ADI-REMOTE TI-REMOTE
UART Status
+
OFF
Figure 12-2-3 The top view of Test JIG
Switch Number Switch 1 Switch 2 Switch 3 Switch 4
Name ADI-REMOTE TI-REMOTE VBAT PS
Description In ON state, phone is awaked. It is used ADI chipset. In ON state, phone is awaked. It is used TI chipset. Power is provided for phone from battery Power is provided for phone from Power supply
Table 12-3-2 Jig DIP Switch
LED Number LED 1 LED 2 LED 3 LED 4
Name POWER TA UART MON
Description Power is provided for Test Jig Indicate charging state of the phone battery Indicate data transfer state through the UART port Indicate data transfer state through the MON port
Table 12-3-3 LED Description
- 148 -
1. Connect as Fig 12-2(RS232 serial cable is connected between COM port of PC and MON port of TEST JIG, in general) 2. Set the Power Supply 4.0V 3. Set the 3rd, 4th of DIP SW ON state always 4. Press the Phone power key, if the Remote ON is used, 1st ON state
12.4 Procedure
1. Copy the file to C:\Cm_Gsm_Multi 2. Copy the files of((Windows XXX)MFCD DLL, vsflex7l_ocx_regist to C:\Cm_Gsm_Multi\dll,ocx 3. Select MFCD DLL of your computer OS 4. Click on vsflex7l_ocx_regist 5. Click on Multi_HK reg 6. Connect as Fig 12-2 (RS232 serial cable is connected between COM port of PC, in general.) 7. Run HK_30exe to start calibration. 8. Click Logic Operation of SETTING menu bar
9. Set PORT (using RS232 cable) that PC can communicate with the phone 10. Select LOGIC MODE that you want Logic mode: 1-> Calibration only 2-> Auto test only 3-> Cal & Auto
- 149 -
11. Select the model name KF300d/KF300/KF300c
Model name
Start button
12. Click start button
- 150 -
12.5 AGC
This procedure is for Rx calibration. In this procedure, We can get RSSI correction value. Set band EGSM and press Start button the result window will show correction values per every power level and gain code and the same measure is performed per every frequency.
12.6 APC
This procedure is for Tx calibration. In this procedure you can get proper scale factor value and measured power level.
12.7 ADC
This procedure is for battery calibration. You can get main Battery Config Table and temperature Config Table will be reset.
- 151 -
- 152 -
13. EXPLODED VIEW & REPLACEMENT PART LIST

13.1 EXPLODED VIEW
37 36 71 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
32 28 25 24 23 21 20 72 14 18 19 22 40 29 38
11 10 9 7 4 1 2 3 8
12
13
35 34 33 31 65 27 26 63 59 60 74 64 67 68
30
6 57 16 15 5 53 52 54 17
58
70 69 66
47 44 43 42 45
48 61 62 73
55
51
50 49 46
- 153 -
ASSY EXPLODED VIEW
L H I
S R Q P O N M L K J I H G F E D C B A
- 154 -
13.2 Replacement Parts <Mechanic component>

Level 1 4 4 4 2 3 4 5 5 5 5 5 5 4 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 MCJZ00 MPCY00 MSCY00 APEY00 ACGG00 ACGH00 MCJH00 MFBB01 MMAA00 MPBJ00 MPBM00 MTAK00 ACGJ00 MCJJ00 MDAE00 MGAD00 MICC00 MPBJ00 MPBM00 MPBQ00 MPBT00 MPBU00 MPBU01 MPBU02 MPBZ00 MPFZ00 MTAA00 MTAB00 MTAD00 MTAE00 MTAZ00 Location No. Description GSM(FOLDER) COVER PALLET SLEEVE PHONE COVER ASSY,FOLDER COVER ASSY,FOLDER(LOWER) COVER,FOLDER(LOWER) FILTER,RECEIVER MAGNET,SWITCH PAD,MOTOR PAD,RECEIVER TAPE,CAMERA COVER ASSY,FOLDER(UPPER) COVER,FOLDER(UPPER) DECO,FOLDER(UPPER) GASKET,SHIELD FORM INSERT,FRONT(UPPER) PAD,MOTOR PAD,RECEIVER PAD,LCD(SUB) PAD,CAMERA PAD,CONNECTOR PAD,CONNECTOR PAD,CONNECTOR PAD PLATE TAPE,DECO TAPE,PROTECTION TAPE,WINDOW TAPE,WINDOW(SUB) TAPE Part number TGFF0099601 MCJZ0030501 MPCY0013701 MSCY0001001 APEY0494001 ACGG0086101 ACGH0051001 MCJH0041001 MFBB0024301 MMAA0000601 MPBJ0048401 MPBM0020401 MTAK0004201 ACGJ0067101 MCJJ0050201 MDAE0041401 MGAD0157901 MICC0010201 MPBJ0048301 MPBM0020301 MPBQ0033701 MPBT0049401 MPBU0013301 MPBU0013401 MPBU0013501 MPBZ0202001 MPFZ0030901 MTAA0148601 MTAB0197701 MTAD0076501 MTAE0032801 MTAZ0198001
Note: This Chapter is used for reference, Part order is ordered by SBOM standard on GCSC
Spec Black 1146*996*105_TDR_Reliance COMPLEX, (empty), , , , , Deadspace Keeping Off_TDR_RLC Without Color Without Color Without Color Black Without Color Without Color MOLD, PC LUPOY SC-1004A, , , , , COMPLEX, (empty), , , , , LG-G510,511,512 common use, DIA : 3.0mm+1.5t COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , Black Without Color Silver Without Color Without Color Without Color Without Color MOLD, PC LUPOY SC-1004A, , , , , PRESS, STS, , , , , COMPLEX, (empty), , , , , CUTTING, BeCu, , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , PRESS, STS, , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , Black Without Color Without Color Black Without Color Without Color Without Color Without Color Without Color Without Color Without Color Without Color Without Color Without Color Without Color Without Color Without Color Without Color
Remark
K 32 33 28 30 31 29 A 10 4 18
15 16 17 14 12 11 13
5 9 1 8 3 6
- 155 -
Level 5 5 4 5 5 5 5 5 5 5 5 5 5 5 4 5 5 4 5 5 4 4 4 4 4 4 4 4 4 4 4 4 4 4
Location No. MWAE00 MWAF00 ACGK00 MBJL00 MCCE00 MCJK00 MDAC01 MDAG00 MICC00 MPBH00 MSGB00 MSGC00 MTAB00 MTAB01 ADBY00 MDAF00 MTAA00 AWAB00 MTAD00
Description WINDOW,CAMERA WINDOW,LCD(SUB) COVER ASSY,FRONT BUTTON,SIDE CAP,RECEPTACLE COVER,FRONT DECO,SIDE DECO,FRONT INSERT,FRONT(UPPER) PAD,MIKE STOPPER,HINGE STOPPER,FOLDER TAPE,PROTECTION TAPE,PROTECTION DECO ASSY DECO,FOLDER(LOWER) TAPE,DECO WINDOW ASSY,LCD TAPE,WINDOW
Part number MWAE0029401 MWAF0039001 ACGK0098801 MBJL0047101 MCCE0040901 MCJK0079201 MDAC0021301 MDAG0031401 MICC0008901 MPBH0033801 MSGB0022901 MSGC0001801 MTAB0197801 MTAB0197901 ADBY0011601 MDAF0009801 MTAA0148901 AWAB0030501 MTAD0076601 MWAC0087401 GMEY0011201 MBFF0015901 MBJA0026401 MBJA0026601 MCCH0128401 MDAC0021201 MHFD0015701 MTAB0206001 MTAK0009601 MFBC0035201 MLAB0001102 MLEA0041901 MPBH0034201 MPBN0048501 COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , ,
Spec Without Color Without Color Without Color Without Color Without Color Black Without Color Without Color Silver Without Color Without Color Without Color Without Color Without Color Without Color Black Without Color Without Color Without Color Without Color Without Color Without Color Black Black Black Without Color Without Color Without Color Without Color Without Color White Black Without Color Without Color
Remark 7 2 O 48 50 44 43 49
MOLD, PC LUPOY SC-1004A, , , , , MOLD, PC LUPOY SC-1004A, , , , , MOLD, PC LUPOY SC-1004A, , , , ,
46 42 41 47 51 L 35 34 M 36 37 74 19,B 25,J 52,P 39 45 71,N 40 72 60 73 65 61 59
MOLD, Urethane Rubber S190A, , , , , MOLD, Urethane Rubber S190A, , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , LOWER PRESS, STS, , , , , COMPLEX, (empty), , , , ,
MWAC00 WINDOW,LCD GMEY00 MBFF00 MBJA00 MBJA01 MCCH01 MDAC00 MHFD00 MTAB00 MTAK00 MFBC00 MLAB00 MLEA00 MPBH00 MPBN00 SCREW MACHINE,BIND BRACKET,LCD BUTTON,DIAL BUTTON,DIAL CAP,SCREW DECO,SIDE HINGE,FOLDER TAPE,PROTECTION TAPE,CAMERA FILTER,SPEAKER LABEL,A/S LOCKER,BATTERY PAD,MIKE PAD,SPEAKER
1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK CASTING, Mg Alloy, , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , MOLD, PC LUPOY SC-1004A, , , , , CASTING, STS, , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , C2000 USASV DIA 4.0 MOLD, PC LUPOY SC-1004A, , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , ,
- 156 -
<Main component>
Level 4 5 6
Location No. SACY00 SACE00 SACD00
Description PCB ASSY,FLEXIBLE PCB ASSY,FLEXIBLE,SMT PCB ASSY,FLEXIBLE,SMT TOP CONNECTOR,BOARD TO BOARD CONNECTOR,BOARD TO BOARD CONNECTOR,BOARD TO BOARD PCB,FLEXIBLE PCB ASSY,KEYPAD PCB ASSY,KEYPAD,INSERT DOME ASSY,METAL PCB ASSY,KEYPAD,SMT PCB ASSY,KEYPAD,SMT BOTTOM CONNECTOR,BOARD TO BOARD CONNECTOR,BOARD TO BOARD RES,CHIP,MAKER RES,CHIP,MAKER VARISTOR VARISTOR PCB,KEYPAD VIBRATOR,MOTOR RECEIVER CAMERA LCD MODULE COVER ASSY,REAR CAP,MOBILE SWITCH COVER,REAR SPRING,COIL ANTENNA,GSM,FIXED
Part number SACY0065001 SACE0059301 SACD0049001 KF300_MAIN_FPCB KF300_MAIN_FPCB
Spec
Remark 22,E
CN801
ENBY0023801
30 PIN,.4 mm,ETC , ,H=0.9, Header
CN802
ENBY0023201
44 PIN,0.4 mm,ETC , ,H=0.9, Header 60 PIN,0.4 mm,STRAIGHT ,AU ,STACKING HEIGHT 0.9 / HEADDER FOR KEYPAD TO MAIN FR-4 , mm,MULTI-6 , ,; , , , , , , , , , 23,F
7 6 4 5 6 5 6
CN803 SPCY SAEY00 SAEB00 ADCA00 SAEE00 SAEC00
ENBY0020202 SPCY0129001 SAEY0060001 SAEB0022201 ADCA0072801 SAEE0027001 SAEC0025401
FOLDER
Without Color
24,G
CN701
ENBY0023901
30 PIN,0.4 mm,ETC , ,H=0.9, Socket
7 7 7 7 7 6 4 4 4 4 3 4 4 4 4
CN702 R701 R702 VA701 VA702 SPEY SJMY00 SURY00 SVCY00 SVLM00 ACGM00 MCCF00 MCJN00 MSDB00 SNGF00
ENBY0020401 ERHZ0000505 ERHZ0000505 SEVY0003801 SEVY0003801 SPEY0054801 SJMY0008405 SURY0013401 SVCY0016001 SVLM0026701 ACGM0099701 MCCF0047801 MCJN0074801 MSDB0004501 SNGF0031101
24 PIN,0.4 mm,ETC , ,H=0.9, Socket 680 ohm,1/16W ,J ,1005 ,R/TP 680 ohm,1/16W ,J ,1005 ,R/TP 18 V, ,SMD , 18 V, ,SMD , FR-4 ,0.5 mm,BUILD-UP 4 , ,; , , , , , , , , , 3 V,.08 A,10pi*2.7t ,12mm ,; ,3V , , ,12000rpm , , , ,31ohm ASSY ,107 dB,32 ohm,11*07 , ,; , , , , , ,CONNECTOR , CMOS ,MEGA ,2M FF Toshiba 1/4" Sensor MAIN ,M_240*320 S_128*160 ,41*57.5*3.3 ,262k ,TFT ,TM ,M_LGDP4531 S_LGDP4512 , Without Color COMPLEX, (empty), , , , , MOLD, PC LUPOY SC-1004A, , , , , COMPLEX, (empty), , , , , 3.0 ,-2.0 dBd,, ,internal, GSM850/1800/1900 ,; ,TRIPLE ,2.0 ,50 ,3.0 Black Black Silver 57 66 63 26,H 27,I 21,D 20,C
- 157 -
Level 4 4 3 3 3 3 3 4 5 5 5 5 5 4 5 5
Location No. SNGF01 SUSY00 GMEY00 MCCH00 MCCH01 MLAK00 SAFY00 SAFB00 ADCA00 MCBA00 MGAD00 SPKY00 SUMY00 SAFF00 MLAZ00 SAFC00
Description ANTENNA,GSM,FIXED SPEAKER SCREW MACHINE,BIND CAP,SCREW CAP,SCREW LABEL,MODEL PCB ASSY,MAIN PCB ASSY,MAIN,INSERT DOME ASSY,METAL CAN,SHIELD GASKET,SHIELD FORM PCB,SIDEKEY MICROPHONE PCB ASSY,MAIN,SMT LABEL PCB ASSY,MAIN,SMT BOTTOM BATTERY,CELL,LITHIUM CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP
Part number SNGF0031202 SUSY0025801 GMEY0011201 MCCH0115301 MCCH0115401 MLAK0010802 SAFY0245001 SAFB0080301 ADCA0073101 MCBA0024301 MGAD0158101 SPKY0056601 SUMY0010301 SAFF0162201 MLAZ0038301 SAFC0103201 PID Label 4 Array LOWER COMPLEX, (empty), , , , , COMPLEX, (empty), , , , ,
Spec 3.0 ,-2.0 dBd,, ,internal, bluetooth ,; ,SINGLE ,-2.0 ,50 ,3.0 PIN ,8 ohm,89 dB,16 mm, ,; , , , , , , ,CONTACT 1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , PRINTING, (empty), , , , , Without Color Black Black Without Color
Remark 62 58 38 68 67
54
Without Color Without Color Without Color
53 55
FR-4 , mm,DOUBLE , ,; , , , , , , , , , FPCB ,-42 dB,4*1.5T ,Standard Holder
Without Color
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
BAT100 C100 C101 C102 C103 C104 C105 C106 C107 C108 C109 C110 C111 C112 C113 C114 C115 C116 C117
SBCL0001701 ECZH0003103 ECCH0000115 ECCH0000115 ECZH0003103 ECZH0003103 ECCH0000115 ECZH0025502 ECCH0000115 ECCH0004904 ECCH0000115 ECCH0000115 ECCH0004904 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0004904
2 V,0.5 mAh,CYLINDER ,Reflow type BB, Max T 1.67, phi 4.8, Pb-Free 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22000000 pF,6.3V ,M ,X5R ,HD ,2012 ,R/TP ,; ,0.85t ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
- 158 -
Level 6 6 6 6 6 6 6
Location No. C118 C119 C120 C121 C122 C123 C124
Description CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER
Part number ECZH0025502 ECCH0000115 ECCH0000143 ECCH0004904 ECCH0004904 ECCH0004904 ECZH0025502
Spec 22000000 pF,6.3V ,M ,X5R ,HD ,2012 ,R/TP ,; ,0.85t ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] 22 pF,50V,J,NP0,TC,1005,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 22000000 pF,6.3V ,M ,X5R ,HD ,2012 ,R/TP ,; ,0.85t ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] 22000000 pF,6.3V ,M ,X5R ,HD ,2012 ,R/TP ,; ,0.85t ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP
Remark
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
C125 C126 C127 C128 C129 C130 C131 C132 C133 C134 C135 C136 C137 C138 C139 C140 C141 C142 C143 C144 C145 C146 C149 C150 C151 C152 C153 C154
CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
ECZH0025502 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0000198 ECCH0004904 ECCH0004904 ECCH0000115 ECCH0004904 ECCH0004904 ECZH0003103 ECZH0003103 ECCH0000115 ECCH0000115 ECZH0003103 ECCH0000120 ECCH0000120 ECCH0000120 ECCH0000120 ECZH0003103 ECZH0003103 ECCH0000120 ECCH0000120 ECCH0000120 ECCH0000120
- 159 -
Level 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
Location No. C157 C158 C202 C203 C204 C205 C207 C209 C210 C211 C212 C215 C217 C300 C301 C302
Description CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,TANTAL,CHIP
Part number ECZH0003103 ECZH0000813 ECCH0000143 ECCH0000143 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0005604 ECCH0000120 ECTH0005202
Spec 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 10 uF,6.3V ,M ,X5R ,TC ,1608 ,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 100 uF,4V ,M ,L_ESR ,2012 ,R/TP ,; , ,[empty] ,[empty] , ,[empty] , ,[empty] ,[empty] ,[empty] ,[empty] 100 uF,4V ,M ,L_ESR ,2012 ,R/TP ,; , ,[empty] ,[empty] , ,[empty] , ,[empty] ,[empty] ,[empty] ,[empty] 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 10 pF,50V,D,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 10 uF,6.3V ,M ,X5R ,TC ,1608 ,R/TP 1 uF,25V ,K ,X5R ,HD ,1608 ,R/TP 47 pF,50V,J,NP0,TC,1005,R/TP 1 uF,25V ,K ,X5R ,HD ,1608 ,R/TP 47 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 47 pF,50V,J,NP0,TC,1005,R/TP 3 pF,50V,C,NP0,TC,1005,R/TP 10 uF,6.3V ,M ,X5R ,TC ,1608 ,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 220 nF,10V ,K ,X5R ,TC ,1005 ,R/TP 10 uF,6.3V ,M ,X5R ,TC ,1608 ,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP
Remark
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
C303 C304 C305 C306 C307 C308 C309 C310 C311 C312 C313 C314 C315 C316 C317 C318 C319 C321 C322 C324
CAP,TANTAL,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
ECTH0005202 ECCH0004904 ECCH0000110 ECZH0003103 ECCH0005604 ECZH0003503 ECCH0000122 ECZH0003503 ECCH0000122 ECCH0004904 ECCH0000122 ECCH0000104 ECCH0005604 ECCH0000155 ECCH0000155 ECZH0001216 ECCH0005604 ECCH0000143 ECCH0000143 ECCH0000115
- 160 -
Level 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
Location No. C325 C326 C327 C328 C329 C330 C331 C501 C502 C503 C504 C505 C506 C507 C508 C509 C510 C511 C517 C518 C519 C520 C523 C601 C602 C603 C604 C605 C606 C608 C609 C611 C612 C613 C614 C616
Description CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER INDUCTOR,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
Part number ECCH0000143 ECCH0000120 ECCH0005604 ECCH0000120 ECCH0000198 ECCH0004904 ECCH0004904 ECCH0000120 ECCH0000120 ECZH0003103 ECZH0000841 ECCH0004904 ECCH0000198 ECCH0004904 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0000117 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0000198 ECZH0025502 ECZH0000830 ECCH0000155 ECCH0000120 ECCH0000155 ECCH0000155 ECCH0000115 ECZH0001002 ECZH0000830 ELCH0004733 ECCH0000117 ECCH0000117 ECCH0000175
Spec 1 nF,50V,K,X7R,HD,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 10 uF,6.3V ,M ,X5R ,TC ,1608 ,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 56 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 27 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 22000000 pF,6.3V ,M ,X5R ,HD ,2012 ,R/TP ,; ,0.85t ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 0.5 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 4.3 nH,S ,1005 ,R/TP ,Coil 27 pF,50V,J,NP0,TC,1005,R/TP 27 pF,50V,J,NP0,TC,1005,R/TP 2.7 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP
Remark
- 161 -
Level 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
Location No. C617 C618 C619 C620 C621 C622 C623 C624 C625 C626 C627 C628 C629 C630 C631 C632 C633 C634 C635 C636 C637 C638 C639 C640 C641 C642 C643 C644 CN300 CN301 CN500 D100 D501
Description CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CONNECTOR,I/O CONNECTOR,ETC CONNECTOR,BOARD TO BOARD DIODE,SWITCHING DIODE,TVS
Part number ECCH0000127 ECCH0000122 ECCH0004904 ECZH0003103 ECCH0000107 ECZH0001216 ECCH0000107 ECZH0000839 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0000117 ECZH0003103 ECZH0000839 ECCH0000120 ECCH0000110 ECZH0003103 ECCH0000110 ECCH0000120 ECCH0000110 ECCH0000110 ECZH0000813 ECZH0000813 ECZH0000813 ECCH0000127 ECZH0000813 ECZH0000813 ENRY0006801 ENZY0020401 ENBY0020402 EDSY0017301 EDTY0009401
Spec 82 pF,50V,J,NP0,TC,1005,R/TP 47 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 6 pF,50V,D,NP0,TC,1005,R/TP 220 nF,10V ,K ,X5R ,TC ,1005 ,R/TP 6 pF,50V,D,NP0,TC,1005,R/TP 4.7 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 27 pF,50V,J,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 4.7 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 10 pF,50V,D,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 10 pF,50V,D,NP0,TC,1005,R/TP 39 pF,50V,J,NP0,TC,1005,R/TP 10 pF,50V,D,NP0,TC,1005,R/TP 10 pF,50V,D,NP0,TC,1005,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 82 pF,50V,J,NP0,TC,1005,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 18 PIN,0.4 mm,ETC , , ,; ,18 ,0.40MM ,ANGLE ,RECEPTACLE ,SMD ,R/TP , 3 PIN,2.5 mm,BOTTOM , , 60 PIN,0.4 mm,STRAIGHT ,AU ,STACKING HEIGHT 0.9 / SOCKET FOR KEYPAD TO MAIN VSM ,15 V,100 mA,R/TP ,PB-FREE VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1
Remark
D502
DIODE,TVS
EDTY0009401
- 162 -
Level 6
Location No. D503
Description DIODE,TVS
Part number EDTY0009401
Spec VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 600 ohm,1005 , 1800 ohm,1005 ,Chip bead ,; ,1800ohm ,; ,[empty] ,R/TP 1800 ohm,1005 ,Chip bead ,; ,1800ohm ,; ,[empty] ,R/TP 1800 ohm,1005 ,Chip bead ,; ,1800ohm ,; ,[empty] ,R/TP 120 ohm,1005 ,Ferrite Bead 120 ohm,1005 ,Ferrite Bead 600 ohm,1005 , SMD ,SMD ,18 V,4ch. EMI_ESD Filter (50 Ohm,15pF) SMD ,SMD ,18 V,4ch. EMI_ESD Filter (200 Ohm,25pF) SMD ,SMD ,18 V,4ch. EMI_ESD Filter (50 Ohm,15pF) SMD ,SMD ,18 V,4ch. EMI_ESD Filter (50 Ohm,15pF) SMD ,SMD ,18 V,4ch. EMI_ESD Filter (200 Ohm,25pF) SMD ,SMD ,18 V,4ch. EMI_ESD Filter (200 Ohm,25pF) SMD ,SMD ,18 V,4ch. EMI_ESD Filter (50 Ohm,15pF) SMD ,SMD ,18 V,4ch. EMI_ESD Filter (200 Ohm,25pF) SMD ,SMD ,18 V,4ch. EMI_ESD Filter (100Ohm,15pF), Pb-free 850.900 ,1800.1900 ,3.8 dB,4.1 dB, dB, dB,4532 ,4.5X3.2 Size Quad Band FEM 6 PIN,ETC , ,2.54 mm,H=1.8 8 PIN,ETC , , mm,Micro-SD, Hinge type 4.7 uH,M ,2.5*2.0*1.0 ,R/TP , 270 nH,M ,1005 ,R/TP ,CHIP 100 nH,J ,1005 ,R/TP ,MLCI 18 nH,J ,1005 ,R/TP , 18 nH,J ,1005 ,R/TP , 4.7 nH,S ,1005 ,R/TP , 5.6 nH,S ,1005 ,R/TP , 18 nH,J ,1005 ,R/TP ,PBFREE 18 nH,J ,1005 ,R/TP ,PBFREE TES6 ,200 mW,R/TP ,NPN/PNP dual, Vo1=50V, Io1=100mA, Vo2=-50V,Io2=-100mA
Remark
D504
DIODE,TVS
EDTY0009401
D505
DIODE,TVS
EDTY0009401
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
D506 FB100 FB300 FB301 FB302 FB304 FB305 FB500 FL500 FL501 FL502 FL503 FL504 FL505 FL506 FL507 FL508
DIODE,TVS FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER
EDTY0009401 SFBH0008101 SFBH0008105 SFBH0008105 SFBH0008105 SFBH0007101 SFBH0007101 SFBH0008101 SFEY0011601 SFEY0012501 SFEY0011601 SFEY0011601 SFEY0012501 SFEY0012501 SFEY0011601 SFEY0012501 SFEY0010501
6 6 6 6 6 6 6 6 6 6 6 6 6
FL601 J300 J301 L100 L300 L301 L500 L501 L601 L602 L603 L604 Q400
FILTER,SEPERATOR CONN,SOCKET CONN,SOCKET INDUCTOR,SMD,POWER INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP TR,BJT,ARRAY
SFAY0011101 ENSY0018701 ENSY0017701 ELCP0008001 ELCH0010402 ELCH0003842 ELCH0004714 ELCH0004714 ELCH0005013 ELCH0005014 ELCH0001052 ELCH0001052 EQBA0004902
- 163 -
Level 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
Location No. R100 R101 R102 R103 R105 R106 R107 R109 R110 R120 R204 R205 R206 R207 R210 R211 R212 R213 R214 R216 R217 R218 R219 R300 R302 R303 R304 R305 R306 R307 R308 R309 R310 R311 R312 R314 R315
Description RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER
Part number ERHZ0000406 ERHZ0000406 ERHZ0000485 ERHY0000512 ERHZ0000405 ERHZ0000312 ERHZ0000486 ERHZ0000405 ERHZ0000405 ERHZ0000213 ERHZ0000406 ERHZ0000406 ERHZ0000486 ERHZ0000486 ERHZ0000405 ERHZ0000460 ERHZ0000406 ERHY0000140 ERHZ0000406 ERHZ0000405 ERHZ0000460 ERHZ0000406 ERHZ0000483 ERHZ0000529 ERHZ0000443 ERHZ0000407 ERHZ0000406 ERHZ0000406 ERHZ0000406 ERHZ0000488 ERHZ0000406 ERHZ0000488 ERHZ0000483 ERHZ0000483 ERHZ0000434 ERHZ0000486 ERHZ0000486
Spec 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 4700 ohm,1/16W ,J ,1005 ,R/TP 10M ohm,1/16W,J,1608,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 68 Kohm,1/16W ,F ,1005 ,R/TP 47 Kohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 120 Kohm,1/16W ,F ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 47 Kohm,1/16W ,J ,1005 ,R/TP 47 Kohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 30 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 36K ohm,1/16W,F,1005,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 30 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 47 ohm,1/16W ,J ,1005 ,R/TP 1.5 Kohm,1/16W ,J ,1005 ,R/TP 2200 ohm,1/16W ,J ,1005 ,R/TP 1000 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 4.7 ohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 4.7 ohm,1/16W ,J ,1005 ,R/TP 47 ohm,1/16W ,J ,1005 ,R/TP 47 ohm,1/16W ,J ,1005 ,R/TP 1 ohm,1/16W ,J ,1005 ,R/TP 47 Kohm,1/16W ,J ,1005 ,R/TP 47 Kohm,1/16W ,J ,1005 ,R/TP
Remark
- 164 -
Level 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
Location No. R316 R317 R318 R319 R320 R321 R322 R323 R324 R326 R327 R328 R329 R400 R401 R402 R403 R404 R405 R406 R408 R500 R501 R502 R503 R504 R603 R607 R610 R611 R612 R614 SW601 U100 U101 U201
Description RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP RES,CHIP RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER CONN,RF SWITCH IC IC MODULE,ETC
Part number ERHZ0000422 ERHZ0000406 ERHZ0000404 ERHZ0000406 ERHZ0000406 ERHZ0000406 ERHZ0000443 ERHZ0000406 ERHY0003301 ERHY0003301 ERHZ0000443 ERHZ0000407 ERHZ0000406 ERHZ0000483 ERHZ0000483 ERHZ0000505 ERHZ0000505 ERHZ0000505 ERHZ0000505 ERHZ0000405 ERHZ0003701 ERHZ0000406 ERHZ0000485 ERHZ0000485 ERHZ0000406 ERHY0003301 ERHZ0000404 ERHZ0000490 ERHZ0000512 ERHZ0000405 ERHZ0000402 ERHZ0000505 ENWY0004501 EUSY0313101 EUSY0313501 SMZY0015001
Spec 15 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 1 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 2200 ohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 ohm,1/16W ,J ,1005 ,R/TP 100 ohm,1/16W ,J ,1005 ,R/TP 2200 ohm,1/16W ,J ,1005 ,R/TP 1000 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 47 ohm,1/16W ,J ,1005 ,R/TP 47 ohm,1/16W ,J ,1005 ,R/TP 680 ohm,1/16W ,J ,1005 ,R/TP 680 ohm,1/16W ,J ,1005 ,R/TP 680 ohm,1/16W ,J ,1005 ,R/TP 680 ohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 2.2 ohm,1/16W ,J ,1608 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 4700 ohm,1/16W ,J ,1005 ,R/TP 4700 ohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 ohm,1/16W ,J ,1005 ,R/TP 1 Kohm,1/16W ,J ,1005 ,R/TP 51 ohm,1/16W ,J ,1005 ,R/TP 82 ohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 10 ohm,1/16W ,J ,1005 ,R/TP 680 ohm,1/16W ,J ,1005 ,R/TP ,SMD , dB,H=3.6, Straight type BGA ,144 PIN,R/TP ,EGPRS Quad band ABB Stratos-S BGA ,291 PIN,R/TP ,EGPRS Digital Base band, LEMANS 6.3 * 5.3 * 1.3mm , 63 PIN, Bluetooth Module(BT+FM)
Remark
- 165 -
Level 6
Location No. U202 IC
Description
Part number EUSY0286002
Spec BGA ,105 PIN,R/TP ,512M 65nm Nor+128MSDRAM, 1.8V I/O,Pb Free , ,IC,MCP DFN 3*3*0.9 ,10 PIN,R/TP ,Charger IC, I Max 1A, Wall Adaptor/USB Charger DFN ,10 PIN,R/TP ,OVP SC70-6L ,5.25 V,100 W,R/TP , WQFN ,10 PIN,R/TP ,Small package Dual SPDT analog Switch, PB-Free WQFN ,10 PIN,R/TP ,1.8*1.4*0.75 MicroStar Junior ,15 PIN,R/TP ,1.1W Class-D Mono Audio AMP SON1612-6 ,6 PIN,R/TP ,2.5V 150mA LDO Pb-Free WDFN-8L ,8 PIN,R/TP ,300mA/300mA 2.8V/1.8V Dual LDO , PIN,R/TP , ,; ,IC,Charge Pump 35.5 dBm,56 %, A, dBc, dB,6x6x1.15 ,SMD ,Tri Band LFCSP-32 ,32 PIN,R/TP ,GSM QUAD BAND TRANSCEIVER, Othello G. 5.5 V, ,SMD ,1005, 50pF 5.5 V, ,SMD ,1005, 50pF 14 V, ,SMD ,50pF, 1005 14 V, ,SMD ,50pF, 1005 14 V, ,SMD ,50pF, 1005 14 V, ,SMD ,50pF, 1005 14 V, ,SMD ,50pF, 1005 5.6 V, ,SMD ,360pF, 1005 5.6 V, ,SMD ,360pF, 1005 18 V, ,SMD , 18 V, ,SMD , 18 V, ,SMD , 5.6 V, ,SMD ,360pF, 1005 18 V, ,SMD , 18 V, ,SMD , 32.768 KHz,20 PPM,12.5 pF,70 Kohm,SMD ,3.2*1.5*0.9 , 19.2 MHz,20 PPM,15 pF,SMD ,3.2*2.5*1.0 ,1.71V ~ 1.89V, -20'C ~ +70'C ,; ,19.2MHz ,20PPM ,1.8V ,3.2 ,2.5 ,1.0 , ,SMD ,R/TP 26 MHz,10 PPM,10 pF,.5 ohm,SMD ,32*25*0.6 ,. ,. ,. ,10PPM ,10 ,. ,. ,SMD ,P/TP VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1
Remark
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
U203 U204 U300 U301 U302 U303 U304 U500 U501 U601 U602 VA300 VA301 VA303 VA304 VA305 VA306 VA307 VA400 VA401 VA402 VA403 VA404 VA501 VA502 VA503 X100
IC IC DIODE,TVS IC IC IC IC IC IC PAM IC VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR X-TAL
EUSY0254701 EUSY0319201 EDTY0006501 EUSY0300101 EUSY0317101 EUSY0160001 EUSY0299301 EUSY0319001 EUSY0336502 SMPY0014001 EUSY0280101 SEVY0005201 SEVY0005201 SEVY0001001 SEVY0001001 SEVY0001001 SEVY0001001 SEVY0001001 SEVY0004101 SEVY0004101 SEVY0003801 SEVY0003801 SEVY0003801 SEVY0004101 SEVY0003801 SEVY0003801 EXXY0018701
X200
OSCILLATOR
EXSY0022201
X601
X-TAL
EXXY0024401
ZD300
DIODE,TVS
EDTY0009401
- 166 -
Level 6 5 6 6
Location No. ZD501 SAFD00 C402 LD400
Description DIODE,TVS PCB ASSY,MAIN,SMT TOP CAP,CERAMIC,CHIP DIODE,LED,CHIP
Part number EDTY0009401 SAFD0101701 ECCH0004904 EDLH0013701
Spec VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1
Remark
1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP WHITE ,ETC ,R/TP ,SIDEVIEW ,; ,[empty] ,2.9~3.75 ,30mA , , ,120mW ,[empty] ,[empty] ,2P WHITE ,ETC ,R/TP ,SIDEVIEW ,; ,[empty] ,2.9~3.75 ,30mA , , ,120mW ,[empty] ,[empty] ,2P FR-4 ,0.8 mm,STAGGERED-8 , ,; , , , , , , , , , QFN ,4 PIN,R/TP ,1.8X1.2X0.5 size wide input voltage Hall Switch 5.6 V, ,SMD ,360pF, 1005 256MB MicroSD
6 6 6 6 3
LD401 SPFY00 U400 VA405 SMZY00
DIODE,LED,CHIP PCB,MAIN IC VARISTOR MODULE,ETC
EDLH0013701 SPFY0173101 EUSY0313401 SEVY0004101 SMZY0014202
- 167 -
13.3 Accessory
Level 3
Location No. MCJA00
Description COVER,BATTERY
Part number MCJA0051801
Spec MOLD, PC LUPOY SC-1004A, , , , , 3.7 V,800 mAh,1 CELL,PRISMATIC ,KM500 Latin America BATT, Pb-Free ,; ,3.7 ,800 ,0.2C ,PRISMATIC ,50x34x36 , ,BLACK ,Innerpack ,Latin America Label ; ,[empty] ,[empty] ,[empty] ,18 ,BLACK ,6.2mm Plug Datacable ,[empty] ,,,,,,,,,, 100-240V ,5060 Hz,5.1 V,.7 A,NOM ,AC-DC ADAPTOR ,; ,85Vac~264Vac ,5.1V +0.15V, -0.2V ,700mA ,5060 , ,WALL 2P ,I/O CONNECTOR , 100-240V ,5060 Hz,5.1 V,.7 A,NOM ,AC-DC ADAPTOR ,; ,85Vac~264Vac ,5.1V (+0.15V, -0.2V) ,700mA ,5060 , ,WALL 2P ,I/O CONNECTOR , Black
Remark 70,S
SBPL00
BATTERY PACK,LI-ION
SBPL0092901
Black
69
3 3
SGDY00 SGEY00
DATA CABLE EAR PHONE/EAR MIKE SET ADAPTOR,AC-DC
SGDY0010904 SGEY0005537
SSAD00
SSAD0024601
ADAPTOR,AC-DC
SSAD0024602
- 168 -
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LG Kf300 SVC Eng 0422

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LG Kf300 SVC Eng 0422

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Service Manual

Service Manual KF300

Date: February, 2008 / Issue 1.0

3. TECHNICAL BRIEF ....................... 15

11. STAND ALONE TEST .................144

4. TROUBLE SHOOTING ...................61

12. AUTO CALIBRATION .................147

13. EXPLODED VIEW & REPLACEMENT PART LIST ..... 153

LGE Internal Use Only

LGE Internal Use Only

1.2 Regulatory Information

LGE Internal Use Only

E. Notice of Radiated Emissions

G. Interference and Attenuation

H. Electrostatic Sensitive Devices

LGE Internal Use Only

LGE Internal Use Only

LGE Internal Use Only

LGE Internal Use Only

2.2 Technical Specification

Phase Error Frequency Error

LGE Internal Use Only

Max. [dBm] -19 -21 -21 -24

LGE Internal Use Only

Max. [dBm] -22 -24 -24 -27

Bit Error Ratio

LGE Internal Use Only

LGE Internal Use Only

Description Low Voltage Warning (Blinking Bar) 3.54 3.4 3.33

Specification 0.05V (Call) 0.05V (Standby) 0.05V

Forced shut down Voltage Sustain RTCwithout battery

LGE Internal Use Only

Figure. 3-1 AD6900 FUNCTIONAL BLOCK DIAGRAM

LGE Internal Use Only

3.1.1 Features of AD6900

MCU Control Processor Subsystem:

LGE Internal Use Only

Applications Subsystem for Enhanced Multimedia:

LGE Internal Use Only

3.2 Analog Main Processor(AD6855, U100)

Figure. 3-2-1 AD6855 FUNCTIONAL BLOCK DIAGRAM

LGE Internal Use Only

3.2.1 General Description

LGE Internal Use Only

3.2.2 Power Block

Figure. 3-2-2 AD6855 POWER BLOCK DIAGRAM

LGE Internal Use Only

Figure. 3-2-3 AD6855 KEYON/KEYOUT BLOCK DIAGRAM

Figure. 3-2-4 AD6855 RESET GENERATION BLOCK DIAGRAM

LGE Internal Use Only

Power On Reset Generator

VABB Regulator Enable/Disable Logic Operation

LGE Internal Use Only

Digital Baseband Core (VCORE)

DBB Interface (VINT)

External Interface (VEXT)

SIM Interface (VSIM)

Real-Time Clock (VRTC)

Baseband Analog (VABB)

LGE Internal Use Only

USB Interface (VUSB)

General Purpose Regulator (VGP)