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Document ID: 1MRK505183-UEN Issued: June 2010 Revision: C Product version: 1.1
Copyright
This document and parts thereof must not be reproduced or copied without written permission from ABB, and the contents thereof must not be imparted to a third party, nor used for any unauthorized purpose. The software or hardware described in this document is furnished under a license and may be used or disclosed only in accordance with the terms of such license.
Trademarks
ABB and Relion are registered trademarks of ABB Group. All other brand or product names mentioned in this document may be trademarks or registered trademarks of their respective holders.
Warranty
Please inquire about the terms of warranty from your nearest ABB representative.
ABB AB Substation Automation Products SE-721 59 Vsters Sweden Telephone: +46 (0) 21 32 50 00 Facsimile: +46 (0) 21 14 69 18 http://www.abb.com/substationautomation
Disclaimer
The data, examples and diagrams in this manual are included solely for the concept or product description and are not to be deemed as a statement of guaranteed properties. All persons responsible for applying the equipment addressed in this manual must satisfy themselves that each intended application is suitable and acceptable, including that any applicable safety or other operational requirements are complied with. In particular, any risks in applications where a system failure and/ or product failure would create a risk for harm to property or persons (including but not limited to personal injuries or death) shall be the sole responsibility of the person or entity applying the equipment, and those so responsible are hereby requested to ensure that all measures are taken to exclude or mitigate such risks. This document has been carefully checked by ABB but deviations cannot be completely ruled out. In case any errors are detected, the reader is kindly requested to notify the manufacturer. Other than under explicit contractual commitments, in no event shall ABB be responsible or liable for any loss or damage resulting from the use of this manual or the application of the equipment.
Conformity
This product complies with the directive of the Council of the European Communities on the approximation of the laws of the Member States relating to electromagnetic compatibility (EMC Directive 2004/108/EC) and concerning electrical equipment for use within specified voltage limits (Low-voltage directive 2006/95/EC). This conformity is proved by tests conducted by ABB AB in accordance with the generic standard EN 50263 for the EMC directive, and with the standards EN 60255-5 and/or EN 50178 for the low voltage directive. This product is designed and produced for industrial use.
Table of contents
Table of contents
Section 1 Introduction.....................................................................29
Introduction to the technical reference manual.................................29 About the complete set of manuals for an IED............................29 About the technical reference manual.........................................30 This manual.................................................................................31 Introduction.............................................................................31 Principle of operation..............................................................31 Input and output signals.........................................................34 Function block........................................................................34 Setting parameters.................................................................34 Technical data........................................................................35 Intended audience.......................................................................35 Related documents......................................................................35 Revision notes.............................................................................36
Section 2
Analog inputs..................................................................37
Introduction.......................................................................................37 Operation principle...........................................................................37 Function block..................................................................................38 Setting parameters...........................................................................39
Section 3
Local HMI.......................................................................45
Human machine interface ................................................................45 Small size HMI..................................................................................47 Small............................................................................................47 Design.........................................................................................47 Medium size graphic HMI.................................................................49 Medium........................................................................................49 Design.........................................................................................49 Keypad.............................................................................................51 LED...................................................................................................52 Introduction..................................................................................52 Status indication LEDs................................................................52 Indication LEDs...........................................................................52 Local HMI related functions..............................................................53 Introduction..................................................................................53 General setting parameters.........................................................54 Status indication LEDs................................................................54 Design....................................................................................54 Function block........................................................................54
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Input and output signals.........................................................54 Indication LEDs...........................................................................55 Introduction.............................................................................55 Design....................................................................................55 Function block........................................................................62 Input and output signals.........................................................62 Setting parameters.................................................................62
Section 4
Table of contents
Test mode functionality TEST..........................................................88 Introduction..................................................................................88 Principle of operation...................................................................88 Function block.............................................................................90 Input and output signals..............................................................90 Setting parameters......................................................................91 IED identifiers...................................................................................91 Introduction..................................................................................91 Setting parameters......................................................................91 Product information..........................................................................92 Introduction..................................................................................92 Setting parameters......................................................................92 Application...................................................................................92 Factory defined settings.........................................................92 Signal matrix for binary inputs SMBI................................................93 Introduction..................................................................................93 Principle of operation...................................................................93 Function block.............................................................................93 Input and output signals..............................................................94 Signal matrix for binary outputs SMBO ...........................................94 Introduction..................................................................................94 Principle of operation...................................................................95 Function block.............................................................................95 Input and output signals..............................................................95 Signal matrix for mA inputs SMMI....................................................95 Introduction..................................................................................96 Principle of operation...................................................................96 Function block.............................................................................96 Input and output signals..............................................................96 Signal matrix for analog inputs SMAI...............................................97 Introduction..................................................................................97 Principle of operation...................................................................97 Frequency values........................................................................97 Function block.............................................................................98 Input and output signals..............................................................99 Setting parameters....................................................................100 Summation block 3 phase 3PHSUM..............................................102 Introduction................................................................................102 Principle of operation.................................................................102 Function block...........................................................................103 Input and output signals............................................................103 Setting parameters....................................................................103 Authority status ATHSTAT.............................................................104
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Section 5
Differential protection...................................................107
Line differential protection..............................................................107 Introduction................................................................................107 Line differential protection, 3 or 6 CT sets L3CPDIF, L6CPDIF...............................................................................107 Line differential protection 3 or 6 CT sets, with in-zone transformers LT3CPDIF, LT6CPDIF....................................109 Analog signal transfer for line differential protection............109 Principle of operation.................................................................110 Algorithm and logic...............................................................110 Time synchronization...........................................................116 Analog signal communication for line differential protection..............................................................................118 Open CT detection feature...................................................121 Binary signal transfer............................................................122 Line differential coordination function LDLPDIF ..................123 Function block...........................................................................123 Input and output signals............................................................125 Setting parameters....................................................................131 Technical data...........................................................................141 1Ph High impedance differential protection HZPDIF .....................141 Introduction................................................................................142 Principle of operation.................................................................142 Logic diagram.......................................................................142 Function block...........................................................................143 Input and output signals............................................................143 Setting parameters....................................................................143 Technical data...........................................................................144
Section 6
Table of contents
Directional impedance element for quadrilateral characteristics......................................................................154 Simplified logic diagrams......................................................156 Function block...........................................................................159 Input and output signals............................................................160 Setting parameters....................................................................161 Technical data...........................................................................163 Distance measuring zone, quadrilateral characteristic for series compensated lines ZMCPDIS, ZMCAPDIS, ZDSRDIR.......164 Introduction................................................................................165 Principle of operation.................................................................166 Full scheme measurement...................................................166 Impedance characteristic.....................................................166 Minimum operating current...................................................170 Measuring principles............................................................170 Directionality for series compensation..................................173 Simplified logic diagrams......................................................175 Function block...........................................................................178 Input and output signals............................................................179 Setting parameters....................................................................181 Technical data...........................................................................184 Phase selection, quadrilateral characteristic with fixed angle FDPSPDIS......................................................................................184 Introduction................................................................................185 Principle of operation.................................................................185 Phase-to-earth fault..............................................................187 Phase-to-phase fault............................................................189 Three-phase faults...............................................................190 Load encroachment..............................................................191 Minimum operate currents....................................................194 Simplified logic diagrams......................................................194 Function block...........................................................................199 Input and output signals............................................................200 Setting parameters....................................................................201 Technical data...........................................................................202 Full-scheme distance measuring, Mho characteristic ZMHPDIS ......................................................................................202 Introduction................................................................................202 Principle of operation.................................................................203 Full scheme measurement...................................................203 Impedance characteristic.....................................................204 Basic operation characteristics.............................................205 Theory of operation..............................................................206 Function block...........................................................................216
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Input and output signals............................................................216 Setting parameters....................................................................217 Technical data...........................................................................218 Full-scheme distance protection, quadrilateral for earth faults ZMMPDIS, ZMMAPDIS..................................................................219 Introduction................................................................................219 Principle of operation.................................................................220 Full scheme measurement...................................................220 Impedance characteristic.....................................................221 Minimum operating current...................................................223 Measuring principles............................................................224 Directional lines....................................................................226 Simplified logic diagrams......................................................228 Function block...........................................................................231 Input and output signals............................................................231 Setting parameters....................................................................232 Technical data...........................................................................234 Directional impedance element for mho characteristic and additional distance protection directional function for earth faults ZDMRDIR, ZDARDIR...........................................................234 Introduction................................................................................235 Principle of operation.................................................................235 Directional impedance element for mho characteristic ZDMRDIR.............................................................................235 Additional distance protection directional function for earth faults ZDARDIR ..........................................................238 Function block...........................................................................240 Input and output signals............................................................240 Setting parameters....................................................................241 Mho impedance supervision logic ZSMGAPC................................242 Introduction................................................................................242 Principle of operation.................................................................243 Fault inception detection......................................................243 Function block...........................................................................244 Input and output signals............................................................244 Setting parameters....................................................................245 Faulty phase identification with load encroachment FMPSPDIS.....................................................................................245 Introduction................................................................................246 Principle of operation.................................................................246 The phase selection function................................................246 Function block...........................................................................257 Input and output signals............................................................258 Setting parameters....................................................................258
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Technical data...........................................................................259 Power swing detection ZMRPSB ...................................................259 Introduction................................................................................259 Principle of operation.................................................................260 Resistive reach in forward direction.....................................261 Resistive reach in reverse direction.....................................262 Reactive reach in forward and reverse direction..................262 Basic detection logic.............................................................263 Operating and inhibit conditions...........................................265 Function block...........................................................................266 Input and output signals............................................................266 Setting parameters....................................................................267 Technical data...........................................................................268 Power swing logic ZMRPSL ..........................................................268 Introduction................................................................................268 Principle of operation.................................................................268 Communication and tripping logic........................................268 Blocking logic.......................................................................269 Function block...........................................................................271 Input and output signals............................................................271 Setting parameters....................................................................272 Pole slip protection PSPPPAM ......................................................272 Introduction................................................................................272 Principle of operation.................................................................272 Function block...........................................................................276 Input and output signals............................................................276 Setting parameters....................................................................277 Technical data...........................................................................277 Automatic switch onto fault logic, voltage and current based ZCVPSOF ......................................................................................278 Introduction................................................................................278 Principle of operation.................................................................278 Function block...........................................................................280 Input and output signals............................................................280 Setting parameters....................................................................280 Technical data...........................................................................281 Phase preference logic PPLPHIZ...................................................281 Introduction................................................................................281 Principle of operation.................................................................281 Function block...........................................................................284 Input and output signals............................................................284 Setting parameters....................................................................285
Section 7
Technical reference manual
Current protection.........................................................287
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Instantaneous phase overcurrent protection PHPIOC ..................287 Introduction................................................................................287 Principle of operation.................................................................287 Function block...........................................................................288 Input and output signals............................................................288 Setting parameters....................................................................288 Technical data...........................................................................289 Four step phase overcurrent protection OC4PTOC ......................289 Introduction................................................................................289 Principle of operation.................................................................289 Function block...........................................................................294 Input and output signals............................................................294 Setting parameters....................................................................296 Technical data...........................................................................301 Instantaneous residual overcurrent protection EFPIOC ................301 Introduction................................................................................302 Principle of operation.................................................................302 Function block...........................................................................302 Input and output signals............................................................303 Setting parameters....................................................................303 Technical data...........................................................................303 Four step residual overcurrent protection EF4PTOC ....................304 Introduction................................................................................304 Principle of operation.................................................................305 Operating quantity within the function..................................305 Internal polarizing.................................................................306 External polarizing for earth-fault function............................308 Base quantities within the protection....................................308 Internal earth-fault protection structure................................308 Four residual overcurrent steps............................................308 Directional supervision element with integrated directional comparison function............................................310 Second harmonic blocking element.....................................312 Switch on to fault feature......................................................314 Function block...........................................................................316 Input and output signals............................................................317 Setting parameters....................................................................318 Technical data...........................................................................323 Sensitive directional residual overcurrent and power protection SDEPSDE .....................................................................................323 Introduction................................................................................324 Principle of operation.................................................................325 Function inputs.....................................................................325 Function block...........................................................................331
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Input and output signals............................................................332 Setting parameters....................................................................333 Technical data...........................................................................335 Thermal overload protection, one time constant LPTTR ...............336 Introduction................................................................................336 Principle of operation.................................................................336 Function block...........................................................................339 Input and output signals............................................................339 Setting parameters....................................................................339 Technical data...........................................................................340 Breaker failure protection CCRBRF ..............................................340 Introduction................................................................................341 Principle of operation.................................................................341 Function block...........................................................................344 Input and output signals............................................................345 Setting parameters....................................................................345 Technical data...........................................................................346 Stub protection STBPTOC ............................................................347 Introduction................................................................................347 Principle of operation.................................................................347 Function block...........................................................................348 Input and output signals............................................................348 Setting parameters....................................................................349 Technical data...........................................................................349 Pole discordance protection CCRPLD ..........................................349 Introduction................................................................................350 Principle of operation.................................................................350 Pole discordance signaling from circuit breaker...................353 Unsymmetrical current detection..........................................353 Function block...........................................................................353 Input and output signals............................................................354 Setting parameters....................................................................354 Technical data...........................................................................355 Directional underpower protection GUPPDUP...............................355 Introduction................................................................................355 Principle of operation.................................................................356 Low pass filtering..................................................................358 Calibration of analog inputs..................................................358 Function block...........................................................................359 Input and output signals............................................................360 Setting parameters....................................................................360 Technical data...........................................................................361 Directional overpower protection GOPPDOP ................................362
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Introduction................................................................................362 Principle of operation.................................................................363 Low pass filtering..................................................................365 Calibration of analog inputs..................................................365 Function block...........................................................................366 Input and output signals............................................................367 Setting parameters....................................................................367 Technical data...........................................................................369 Broken conductor check BRCPTOC .............................................369 Introduction................................................................................369 Principle of operation.................................................................369 Function block...........................................................................370 Input and output signals............................................................371 Setting parameters....................................................................371 Technical data...........................................................................371
Section 8
Voltage protection........................................................373
Two step undervoltage protection UV2PTUV ................................373 Introduction................................................................................373 Principle of operation.................................................................373 Measurement principle.........................................................374 Time delay............................................................................374 Blocking................................................................................379 Design..................................................................................380 Function block...........................................................................382 Input and output signals............................................................382 Setting parameters....................................................................383 Technical data...........................................................................385 Two step overvoltage protection OV2PTOV ..................................386 Introduction................................................................................386 Principle of operation.................................................................386 Measurement principle.........................................................387 Time delay............................................................................387 Blocking................................................................................393 Design..................................................................................393 Function block...........................................................................395 Input and output signals............................................................395 Setting parameters....................................................................396 Technical data...........................................................................398 Two step residual overvoltage protection ROV2PTOV .................398 Introduction................................................................................398 Principle of operation.................................................................399 Measurement principle.........................................................399 Time delay............................................................................399
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Blocking................................................................................404 Design..................................................................................404 Function block...........................................................................405 Input and output signals............................................................406 Setting parameters....................................................................406 Technical data...........................................................................408 Overexcitation protection OEXPVPH ............................................408 Introduction................................................................................408 Principle of operation.................................................................409 Measured voltage.................................................................411 Operate time of the overexcitation protection.......................412 Cooling.................................................................................415 Overexcitation protection function measurands...................415 Overexcitation alarm............................................................416 Logic diagram.......................................................................417 Function block...........................................................................417 Input and output signals............................................................417 Setting parameters....................................................................418 Technical data...........................................................................419 Voltage differential protection VDCPTOV ......................................419 Introduction................................................................................419 Principle of operation.................................................................420 Function block...........................................................................421 Input and output signals............................................................422 Setting parameters....................................................................422 Technical data...........................................................................423 Loss of voltage check LOVPTUV ..................................................423 Introduction................................................................................423 Principle of operation.................................................................423 Function block...........................................................................425 Input and output signals............................................................426 Setting parameters....................................................................426 Technical data...........................................................................426
Section 9
Frequency protection....................................................427
Underfrequency protection SAPTUF .............................................427 Introduction................................................................................427 Principle of operation.................................................................427 Measurement principle.........................................................428 Time delay............................................................................428 Voltage dependent time delay..............................................428 Blocking................................................................................430 Design..................................................................................430 Function block...........................................................................431
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Input and output signals............................................................431 Setting parameters....................................................................431 Technical data...........................................................................432 Overfrequency protection SAPTOF ...............................................432 Introduction................................................................................433 Principle of operation.................................................................433 Measurement principle.........................................................433 Time delay............................................................................433 Blocking................................................................................434 Design..................................................................................434 Function block...........................................................................435 Input and output signals............................................................435 Setting parameters....................................................................435 Technical data...........................................................................436 Rate-of-change frequency protection SAPFRC .............................436 Introduction................................................................................436 Principle of operation.................................................................436 Measurement principle.........................................................437 Time delay............................................................................437 Blocking................................................................................437 Design..................................................................................438 Function block...........................................................................439 Input and output signals............................................................439 Setting parameters....................................................................439 Technical data...........................................................................440
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Introduction................................................................................467 Principle of operation.................................................................467 Function block...........................................................................469 Input and output signals............................................................469 Setting parameters....................................................................470 Technical data...........................................................................470 Fuse failure supervision SDDRFUF...............................................470 Introduction................................................................................470 Principle of operation.................................................................471 Zero and negative sequence detection................................471 Delta current and delta voltage detection.............................473 Dead line detection...............................................................476 Main logic.............................................................................476 Function block...........................................................................480 Input and output signals............................................................480 Setting parameters....................................................................480 Technical data...........................................................................481
Section 12 Control..........................................................................483
Synchrocheck, energizing check, and synchronizing SESRSYN......................................................................................483 Introduction................................................................................483 Principle of operation.................................................................484 Basic functionality.................................................................484 Logic diagrams.....................................................................484 Function block...........................................................................493 Input and output signals............................................................493 Setting parameters....................................................................496 Technical data...........................................................................498 Autorecloser SMBRREC ...............................................................498 Introduction................................................................................499 Principle of operation.................................................................499 Logic Diagrams....................................................................499 Auto-reclosing operation Off and On....................................499 Auto-reclosing mode selection.............................................499 Start auto-reclosing and conditions for start of a reclosing cycle......................................................................500 Control of the auto-reclosing open time for shot 1...............501 Long trip signal.....................................................................501 Time sequence diagrams.....................................................508 Function block...........................................................................511 Input and output signals............................................................511 Setting parameters....................................................................513 Technical data...........................................................................515
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Apparatus control APC...................................................................515 Introduction................................................................................515 Principle of operation.................................................................515 Error handling............................................................................516 Bay control QCBAY...................................................................518 Introduction...........................................................................518 Principle of operation............................................................518 Function block......................................................................520 Input and output signals.......................................................520 Setting parameters...............................................................521 Local/Remote switch.................................................................521 Introduction...........................................................................521 Principle of operation............................................................521 Function block......................................................................522 Input and output signals.......................................................523 Setting parameters...............................................................524 Switch controller SCSWI...........................................................524 Introduction...........................................................................524 Principle of operation............................................................524 Function block......................................................................529 Input and output signals.......................................................529 Setting parameters...............................................................531 Circuit breaker SXCBR..............................................................531 Introduction...........................................................................531 Principle of operation............................................................531 Function block......................................................................535 Input and output signals.......................................................535 Setting parameters...............................................................536 Circuit switch SXSWI.................................................................536 Introduction...........................................................................537 Principle of operation............................................................537 Function block......................................................................541 Input and output signals.......................................................541 Setting parameters...............................................................542 Bay reserve QCRSV..................................................................542 Introduction...........................................................................542 Principle of operation............................................................542 Function block......................................................................544 Input and output signals.......................................................545 Setting parameters...............................................................546 Reservation input RESIN...........................................................546 Introduction...........................................................................546 Principle of operation............................................................546
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Function block......................................................................548 Input and output signals.......................................................549 Setting parameters...............................................................550 Interlocking ....................................................................................550 Introduction................................................................................550 Principle of operation.................................................................550 Logical node for interlocking SCILO .........................................553 Introduction...........................................................................553 Logic diagram.......................................................................553 Function block......................................................................554 Input and output signals.......................................................554 Interlocking for busbar earthing switch BB_ES .........................554 Introduction...........................................................................555 Function block......................................................................555 Logic diagram.......................................................................555 Input and output signals.......................................................555 Interlocking for bus-section breaker A1A2_BS..........................556 Introduction...........................................................................556 Function block......................................................................557 Logic diagram.......................................................................558 Input and output signals.......................................................559 Interlocking for bus-section disconnector A1A2_DC ................560 Introduction...........................................................................561 Function block......................................................................561 Logic diagram.......................................................................562 Input and output signals.......................................................562 Interlocking for bus-coupler bay ABC_BC ................................563 Introduction...........................................................................563 Function block......................................................................564 Logic diagram.......................................................................565 Input and output signals.......................................................567 Interlocking for 1 1/2 CB BH .....................................................570 Introduction...........................................................................570 Function blocks....................................................................571 Logic diagrams.....................................................................573 Input and output signals.......................................................578 Interlocking for double CB bay DB ...........................................582 Introduction...........................................................................582 Function block......................................................................583 Logic diagrams.....................................................................585 Input and output signals ......................................................588 Interlocking for line bay ABC_LINE ..........................................591 Introduction...........................................................................591
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Function block......................................................................592 Logic diagram.......................................................................593 Input and output signals.......................................................598 Interlocking for transformer bay AB_TRAFO ............................600 Introduction...........................................................................601 Function block......................................................................602 Logic diagram.......................................................................603 Input and output signals.......................................................604 Position evaluation POS_EVAL.................................................606 Introduction...........................................................................606 Logic diagram.......................................................................606 Function block......................................................................607 Input and output signals.......................................................607 Logic rotating switch for function selection and LHMI presentation SLGGIO.....................................................................607 Introduction................................................................................607 Principle of operation.................................................................607 Functionality and behaviour ................................................609 Graphical display..................................................................609 Function block...........................................................................611 Input and output signals............................................................611 Setting parameters....................................................................612 Selector mini switch VSGGIO.........................................................613 Introduction................................................................................613 Principle of operation.................................................................613 Function block...........................................................................614 Input and output signals............................................................614 Setting parameters....................................................................615 Generic double point function block DPGGIO................................615 Introduction................................................................................615 Principle of operation.................................................................615 Function block...........................................................................616 Input and output signals............................................................616 Settings......................................................................................616 Single point generic control 8 signals SPC8GGIO.........................616 Introduction................................................................................616 Principle of operation.................................................................617 Function block...........................................................................617 Input and output signals............................................................617 Setting parameters....................................................................618 AutomationBits, command function for DNP3.0 AUTOBITS..........618 Introduction................................................................................619 Principle of operation.................................................................619
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Function block...........................................................................620 Input and output signals............................................................620 Setting parameters....................................................................621 Single command, 16 signals SINGLECMD....................................635 Introduction................................................................................635 Principle of operation.................................................................635 Function block...........................................................................636 Input and output signals............................................................636 Setting parameters....................................................................637
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Weak-end infeed logic..........................................................653 Function block...........................................................................655 Input and output signals............................................................655 Setting parameters....................................................................656 Technical data...........................................................................656 Local acceleration logic ZCLCPLAL...............................................656 Introduction................................................................................657 Principle of operation.................................................................657 Zone extension.....................................................................657 Loss-of-Load acceleration....................................................658 Function block...........................................................................658 Input and output signals............................................................659 Setting parameters....................................................................659 Scheme communication logic for residual overcurrent protection ECPSCH .......................................................................660 Introduction................................................................................660 Introduction...........................................................................660 Principle of operation.................................................................660 Blocking scheme..................................................................661 Permissive under/overreaching scheme..............................662 Unblocking scheme..............................................................663 Function block...........................................................................664 Input and output signals............................................................665 Setting parameters....................................................................665 Technical data...........................................................................666 Current reversal and weak-end infeed logic for residual overcurrent protection ECRWPSCH ..............................................666 Introduction................................................................................666 Principle of operation.................................................................667 Directional comparison logic function...................................667 Fault current reversal logic...................................................667 Weak-end infeed logic..........................................................668 Function block...........................................................................669 Input and output signals............................................................669 Setting parameters....................................................................670 Technical data...........................................................................670 Current reversal and weak-end infeed logic for phase segregated communication ZC1WPSCH ......................................671 Introduction................................................................................671 Principle of operation.................................................................671 Current reversal logic ..........................................................671 Function block...........................................................................673 Input and output signals............................................................674 Setting parameters....................................................................675
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Technical data...........................................................................675
Section 14 Logic.............................................................................677
Tripping logic SMPPTRC ...............................................................677 Introduction................................................................................677 Principle of operation.................................................................677 Logic diagram.......................................................................679 Function block...........................................................................683 Input and output signals............................................................683 Setting parameters....................................................................684 Technical data...........................................................................685 Trip matrix logic TMAGGIO............................................................685 Introduction................................................................................685 Principle of operation.................................................................685 Function block...........................................................................687 Input and output signals............................................................687 Setting parameters....................................................................688 Configurable logic blocks................................................................689 Introduction................................................................................689 Inverter function block INV........................................................689 OR function block OR................................................................690 AND function block AND...........................................................691 Timer function block TIMER......................................................691 Pulse timer function block PULSETIMER..................................692 Exclusive OR function block XOR.............................................692 Loop delay function block LOOPDELAY...................................693 Set-reset with memory function block SRMEMORY.................693 Controllable gate function block GATE......................................694 Settable timer function block TIMERSET..................................695 Technical data...........................................................................696 Fixed signal function block FXDSIGN............................................696 Principle of operation.................................................................696 Function block...........................................................................697 Input and output signals............................................................697 Setting parameters....................................................................697 Boolean 16 to Integer conversion B16I..........................................697 Introduction................................................................................697 Principle of operation.................................................................698 Function block...........................................................................698 Input and output signals............................................................698 Setting parameters....................................................................699 Boolean 16 to Integer conversion with logic node representation B16IGGIO...............................................................699 Introduction................................................................................699
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Principle of operation.................................................................699 Function block...........................................................................700 Input and output signals............................................................700 Setting parameters....................................................................701 Integer to Boolean 16 conversion IB16..........................................701 Introduction................................................................................701 Principle of operation.................................................................701 Function block...........................................................................701 Input and output signals............................................................702 Setting parameters....................................................................702 Integer to Boolean 16 conversion with logic node representation IB16GGIO...............................................................702 Introduction................................................................................703 Principle of operation.................................................................703 Function block...........................................................................703 Input and output signals............................................................703 Setting parameters....................................................................704
Section 15 Monitoring.....................................................................705
Measurements................................................................................705 Introduction................................................................................706 Principle of operation.................................................................707 Measurement supervision....................................................707 Measurements CVMMXU.....................................................711 Phase current measurement CMMXU.................................716 Phase-phase and phase-neutral voltage measurements VMMXU, VNMMXU..............................................................717 Voltage and current sequence measurements VMSQI, CMSQI..................................................................................717 Function block...........................................................................717 Input and output signals............................................................719 Setting parameters....................................................................722 Technical data...........................................................................735 Event counter CNTGGIO................................................................736 Introduction................................................................................736 Principle of operation.................................................................736 Reporting..............................................................................736 Design..................................................................................737 Function block...........................................................................737 Input signals..............................................................................737 Setting parameters....................................................................738 Technical data...........................................................................738 Event function EVENT....................................................................738 Introduction................................................................................738
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Principle of operation.................................................................738 Function block...........................................................................740 Input and output signals............................................................740 Setting parameters....................................................................741 Logical signal status report BINSTATREP.....................................743 Introduction................................................................................743 Principle of operation.................................................................743 Function block...........................................................................744 Input and output signals............................................................744 Setting parameters....................................................................745 Fault locator LMBRFLO..................................................................745 Introduction................................................................................746 Principle of operation.................................................................746 Measuring Principle..............................................................747 Accurate algorithm for measurement of distance to fault.....747 The non-compensated impedance model............................751 IEC 60870-5-103..................................................................752 Function block...........................................................................752 Input and output signals............................................................752 Setting parameters....................................................................753 Technical data...........................................................................754 Measured value expander block RANGE_XP................................754 Introduction................................................................................754 Principle of operation.................................................................754 Function block...........................................................................755 Input and output signals............................................................755 Disturbance report DRPRDRE.......................................................755 Introduction................................................................................756 Principle of operation.................................................................756 Function block...........................................................................763 Input and output signals............................................................765 Setting parameters....................................................................766 Technical data...........................................................................776 Event list.........................................................................................776 Introduction................................................................................776 Principle of operation.................................................................776 Function block...........................................................................777 Input signals..............................................................................777 Technical data...........................................................................777 Indications......................................................................................777 Introduction................................................................................777 Principle of operation.................................................................778 Function block...........................................................................779
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Input signals..............................................................................779 Technical data...........................................................................779 Event recorder ...............................................................................779 Introduction................................................................................779 Principle of operation.................................................................779 Function block...........................................................................780 Input signals..............................................................................780 Technical data...........................................................................780 Trip value recorder.........................................................................780 Introduction................................................................................780 Principle of operation.................................................................781 Function block...........................................................................781 Input signals..............................................................................781 Technical data...........................................................................782 Disturbance recorder......................................................................782 Introduction................................................................................782 Principle of operation.................................................................782 Memory and storage............................................................783 IEC 60870-5-103..................................................................784 Function block...........................................................................785 Input and output signals............................................................785 Setting parameters....................................................................785 Technical data...........................................................................785
Section 16 Metering.......................................................................787
Pulse-counter logic PCGGIO..........................................................787 Introduction................................................................................787 Principle of operation.................................................................787 Function block...........................................................................789 Input and output signals............................................................790 Setting parameters....................................................................790 Technical data...........................................................................791 Function for energy calculation and demand handling ETPMMTR......................................................................................791 Introduction................................................................................791 Principle of operation.................................................................791 Function block...........................................................................792 Input and output signals............................................................792 Setting parameters....................................................................793
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IEC 61850 generic communication I/O functions SPGGIO, SP16GGIO................................................................................795 Introduction...........................................................................796 Principle of operation............................................................796 Function block......................................................................796 Input and output signals.......................................................796 Setting parameters...............................................................797 IEC 61850 generic communication I/O functions MVGGIO.......797 Principle of operation............................................................797 Function block......................................................................798 Input and output signals.......................................................798 Setting parameters...............................................................798 Setting parameters....................................................................799 Technical data...........................................................................799 IEC 61850-9-2LE communication protocol.....................................799 Introduction................................................................................799 Principle of operation.................................................................799 Function block...........................................................................801 Output signals............................................................................802 Setting parameters....................................................................802 Technical data...........................................................................803 LON communication protocol.........................................................803 Introduction................................................................................803 Principle of operation.................................................................803 Setting parameters....................................................................821 Technical data...........................................................................821 SPA communication protocol.........................................................821 Introduction................................................................................821 Principle of operation.................................................................822 Communication ports...........................................................829 Design.......................................................................................829 Setting parameters....................................................................830 Technical data...........................................................................830 IEC 60870-5-103 communication protocol.....................................830 Introduction................................................................................830 Principle of operation.................................................................830 General.................................................................................830 Communication ports...........................................................840 Function block...........................................................................840 Input and output signals............................................................843 Setting parameters....................................................................848 Technical data...........................................................................850 Horizontal communication via GOOSE for interlocking GOOSEINTLKRCV.........................................................................851
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Function block...........................................................................851 Input and output signals............................................................851 Setting parameters....................................................................853 Goose binary receive GOOSEBINRCV..........................................854 Function block...........................................................................854 Input and output signals............................................................854 Setting parameters....................................................................855 Multiple command and transmit MULTICMDRCV, MULTICMDSND.............................................................................855 Introduction................................................................................856 Principle of operation.................................................................856 Design.......................................................................................856 General.................................................................................856 Function block...........................................................................857 Input and output signals............................................................858 Setting parameters....................................................................859
Section 19 Hardware......................................................................869
Overview.........................................................................................869 Variants of case and local HMI display size..............................869 Case from the rear side.............................................................872 Hardware modules.........................................................................877 Overview....................................................................................877 Combined backplane module (CBM).........................................878 Introduction...........................................................................878 Functionality.........................................................................878 Design..................................................................................878 Universal backplane module (UBM)..........................................880 Introduction...........................................................................880 Functionality.........................................................................880 Design..................................................................................880 Numeric processing module (NUM)..........................................882 Introduction...........................................................................882
24 Technical reference manual
Table of contents
Functionality.........................................................................883 Block diagram.......................................................................884 Power supply module (PSM).....................................................884 Introduction...........................................................................884 Design..................................................................................884 Technical data......................................................................885 Local human-machine interface (Local HMI).............................885 Transformer input module (TRM)..............................................885 Introduction...........................................................................886 Design..................................................................................886 Technical data......................................................................886 Analog digital conversion module, with time synchronization (ADM) .............................................................887 Introduction...........................................................................887 Design..................................................................................887 Binary input module (BIM).........................................................889 Introduction...........................................................................889 Design..................................................................................889 Technical data......................................................................893 Binary output modules (BOM)...................................................893 Introduction...........................................................................893 Design..................................................................................893 Technical data......................................................................895 Static binary output module (SOM)...........................................896 Introduction...........................................................................896 Design..................................................................................896 Technical data......................................................................898 Binary input/output module (IOM)..............................................899 Introduction...........................................................................899 Design..................................................................................900 Technical data......................................................................902 mA input module (MIM).............................................................903 Introduction...........................................................................903 Design..................................................................................903 Technical data......................................................................904 Serial and LON communication module (SLM) ........................905 Introduction...........................................................................905 Design..................................................................................905 Technical data......................................................................906 Galvanic RS485 communication module...................................907 Introduction...........................................................................907 Design..................................................................................907 Technical data......................................................................909
25 Technical reference manual
Table of contents
Optical ethernet module (OEM).................................................909 Introduction...........................................................................909 Functionality.........................................................................909 Design..................................................................................909 Technical data......................................................................910 Line data communication module (LDCM)................................910 Introduction...........................................................................910 Design..................................................................................911 Technical data......................................................................912 Galvanic X.21 line data communication (X.21-LDCM)..............913 Introduction...........................................................................913 Design..................................................................................913 Functionality.........................................................................915 Technical data......................................................................916 GPS time synchronization module (GSM).................................916 Introduction...........................................................................916 Design..................................................................................916 Technical data......................................................................918 GPS antenna.............................................................................919 Introduction...........................................................................919 Design..................................................................................919 Technical data......................................................................920 IRIG-B time synchronization module IRIG-B.............................921 Introduction...........................................................................921 Design..................................................................................921 Technical data......................................................................922 Dimensions.....................................................................................923 Case without rear cover.............................................................923 Case with rear cover..................................................................925 Flush mounting dimensions.......................................................927 Side-by-side flush mounting dimensions...................................928 Wall mounting dimensions.........................................................929 External resistor unit for high impedance differential protection...................................................................................929 Mounting alternatives.....................................................................930 Flush mounting..........................................................................930 Overview..............................................................................930 Mounting procedure for flush mounting................................932 19 panel rack mounting............................................................933 Overview..............................................................................933 Mounting procedure for 19 panel rack mounting.................934 Wall mounting............................................................................934 Overview..............................................................................934
26 Technical reference manual
Table of contents
Mounting procedure for wall mounting.................................935 How to reach the rear side of the IED..................................936 Side-by-side 19 rack mounting.................................................936 Overview..............................................................................936 Mounting procedure for side-by-side rack mounting............937 IED in the 670 series mounted with a RHGS6 case.............937 Side-by-side flush mounting......................................................938 Overview..............................................................................938 Mounting procedure for side-by-side flush mounting...........939 Technical data................................................................................939 Enclosure...................................................................................939 Connection system....................................................................940 Influencing factors.....................................................................940 Type tests according to standard..............................................941
Section 20 Labels...........................................................................945
Different labels................................................................................945
Section 23 Glossary.......................................................................999
28
1MRK505183-UEN C
Section 1 Introduction
Section 1
Introduction
1.1
1.1.1
Commissioning
Engineering
Engineeringmanual Installation and Commissioning manual Operators manual Application manual Technical reference manual
The Application Manual (AM) contains application descriptions, setting guidelines and setting parameters sorted per function. The application manual should be used to find out when and for what purpose a typical protection function could be used. The manual should also be used when calculating settings. The Technical Reference Manual (TRM) contains application and functionality descriptions and it lists function blocks, logic diagrams, input and output signals, setting parameters and technical data sorted per function. The technical reference
29 Technical reference manual
Operation
Installing
Maintenance
Section 1 Introduction
1MRK505183-UEN C
manual should be used as a technical reference during the engineering phase, installation and commissioning phase, and during normal service. The Installation and Commissioning Manual (ICM) contains instructions on how to install and commission the protection IED. The manual can also be used as a reference during periodic testing. The manual covers procedures for mechanical and electrical installation, energizing and checking of external circuitry, setting and configuration as well as verifying settings and performing directional tests. The chapters are organized in the chronological order (indicated by chapter/section numbers) in which the protection IED should be installed and commissioned. The Operators Manual (OM) contains instructions on how to operate the protection IED during normal service once it has been commissioned. The operators manual can be used to find out how to handle disturbances or how to view calculated and measured network data in order to determine the cause of a fault. The Engineering Manual (EM) contains instructions on how to engineer the IEDs using the different tools in PCM600. The manual provides instructions on how to set up a PCM600 project and insert IEDs to the project structure. The manual also recommends a sequence for engineering of protection and control functions, LHMI functions as well as communication engineering for IEC 61850 and DNP3.
1.1.2
30
1MRK505183-UEN C
Section 1 Introduction
Logic describes trip logic and related functions. Monitoring describes measurement related functions that are used to provide data regarding relevant quantities, events and faults, for example. Metering describes pulse counter logic. Station communication describes Ethernet based communication in general, including the use of IEC 61850 and horizontal communication via GOOSE. Remote communication describes binary and analog signal transfer, and the associated hardware. Hardware describes the IED and its components. Connection diagrams provides terminal wiring diagrams and information regarding connections to and from the IED. Inverse time characteristics describes and explains inverse time delay, inverse time curves and their effects. Glossary is a list of terms, acronyms and abbreviations used in ABB technical documentation.
1.1.3
This manual
The description of each IED related function follows the same structure (where applicable). The different sections are outlined below.
1.1.3.1
Introduction
Outlines the implementation of a particular protection function.
1.1.3.2
Principle of operation
Describes how the function works, presents a general background to algorithms and measurement techniques. Logic diagrams are used to illustrate functionality.
Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered by dashed lines. Signal names Input and output logic signals consist of two groups of letters separated by two dashes. The first group consists of up to four letters and presents the abbreviated name for the corresponding function. The second group presents the functionality of the particular signal. According to this explanation, the meaning of the signal BLKTR in figure 4 is as follows: BLKTR informs the user that the signal will BLOCK the TRIP command from the under-voltage function, when its value is a logical one (1).
Input signals are always on the left hand side, and output signals on the right hand side. Settings are not displayed.
Section 1 Introduction
1MRK505183-UEN C
Input and output signals In a logic diagram, input and output signal paths are shown as a lines that touch the outer border of the diagram. Input and output signals can be configured using the ACT tool. They can be connected to the inputs and outputs of other functions and to binary inputs and outputs. Examples of input signals are BLKTR, BLOCK and VTSU. Examples output signals are TRIP, START, STL1, STL2, STL3. Setting parameters Signals in frames with a shaded area on their right hand side represent setting parameter signals. These parameters can only be set via the PST or LHMI. Their values are high (1) only when the corresponding setting parameter is set to the symbolic value specified within the frame. Example is the signal Block TUV=Yes. Their logical values correspond automatically to the selected setting value. Internal signals Internal signals are illustrated graphically and end approximately 2 mm from the frame edge. If an internal signal path cannot be drawn with a continuous line, the suffix -int is added to the signal name to indicate where the signal starts and continues, see figure 1.
BLKTR TEST TEST Block TUV=Yes BLOCK VTSU BLOCK-int. STUL1N BLOCK-int. STUL2N BLOCK-int. STUL3N & & >1 & t & TRIP START STL1 STL2 STL3 & >1
BLOCK-int.
xx04000375.vsd
IEC04000375 V1 EN
Figure 1:
32
1MRK505183-UEN C
Section 1 Introduction
External signals Signal paths that extend beyond the logic diagram and continue in another diagram have the suffix -cont., see figure 2 and figure 3.
STZMPP-cont.
>1
Figure 2:
>1 & >1 & & & 15 ms t 15 ms t 15 ms t 15 ms t STL1 STL2 STL3 START
>1 >1
BLK-cont.
xx04000377.vsd
IEC04000377 V1 EN
Figure 3:
Section 1 Introduction
1.1.3.3 Input and output signals
1MRK505183-UEN C
Input and output signals are presented in two separate tables. Each table consists of two columns. The first column contains the name of the signal and the second column contains the description of the signal.
1.1.3.4
Function block
Each function block is illustrated graphically. Input signals are always on the left hand side and output signals on the right hand side. Settings are not displayed. Special kinds of settings are sometimes available. These are supposed to be connected to constants in the configuration scheme and are therefore depicted as inputs. Such signals will be found in the signal list but described in the settings table. The ^ character in front of an input or output signal name in the function block symbol given for a function, indicates that the user can set a signal name of their own in PCM600. The * character after an input or output signal name in the function block symbol given for a function, indicates that the signal must be connected to another function block in the application configuration to achieve a valid application configuration.
IEC 61850 - 8 -1 Logical Node
Inputs
BLOCK READ_VAL BI_PULSE* RS_CNT INVALID RESTART BLOCKED NEW_VAL ^SCAL_VAL en05000511-1-en.vsd
Diagram Number
IEC05000511 V2 EN
Figure 4:
1.1.3.5
Setting parameters
These are presented in tables and include all parameters associated with the function in question.
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Section 1 Introduction
Technical data
The technical data section provides specific technical information about the function or hardware described.
1.1.3.6
1.1.4
Intended audience
General
This manual addresses system engineers, installation and commissioning personnel, who use technical data during engineering, installation and commissioning, and in normal service.
Requirements
The system engineer must have a thorough knowledge of protection systems, protection equipment, protection functions and the configured functional logics in the protective devices. The installation and commissioning personnel must have a basic knowledge in the handling electronic equipment.
1.1.5
Documents related to RED670 Operators manual
Related documents
Identity number 1MRK 505 184-UEN 1MRK 505 185-UEN 1MRK 505 183-UEN 1MRK 505 186-UEN 1MRK 505 188-BEN SA2005-001281 1MRK 002 801-BA 1MRK 002 801-CA 1MRK 002 801-DA 1MRK 002 801-EA 1MRK 004 500-82 1MRK 004 500-83 1MRK 004 500-84 1MRK 004 500-85 1MRK 505 175-WEN
Installation and commissioning manual Technical reference manual Application manual Buyers guide Sample specification Connection diagram, Single breaker arr. Three phase tripping arr. Connection diagram, Single breaker arr. Single phase tripping arr. Connection diagram, Multi breaker arr. Three phase tripping arr. Connection diagram, Multi breaker arr. Single phase tripping arr. Configuration diagram A, Single breaker with single or double busbars Configuration diagram B, Single breakers with single or double busbars Configuration diagram C, Multi breakers such as 1 1/2 or ring busbar arr. Configuration diagram D, Multi breakers such as 1 1/2 or ring busbar arr. Setting example 1, 230 kV Short cable line with 1 1/2CB arr.
Connection and Installation components Test system, COMBITEST Accessories for IED 670 Getting started guide IED 670 SPA and LON signal list for IED 670, ver. 1.1 Table continues on next page
1MRK 513 003-BEN 1MRK 512 001-BEN 1MRK 514 012-BEN 1MRK 500 080-UEN 1MRK 500 083-WEN
Section 1 Introduction
1MRK505183-UEN C
IEC 61850 Data objects list for IED 670, ver. 1.1 Generic IEC 61850 IED Connectivity package Protection and Control IED Manager PCM 600 Installation sheet Engineering guide IED 670 products
1.1.6
Revision notes
Revision C Description No functionality added. Changes made in content due to problem reports.
1MRK505183-UEN C
Section 2
Analog inputs
2.1
Introduction
Analog input channels must be configured and set properly to get correct measurement results and correct protection operations. For power measuring and all directional and differential functions the directions of the input currents must be defined properly. Measuring and protection algorithms in the IED use primary system quantities. Set values are done in primary quantities as well and it is important to set the data about the connected current and voltage transformers properly. A reference PhaseAngleRef can be defined to facilitate service values reading. This analog channels phase angle will always be fixed to zero degree and all other angle information will be shown in relation to this analog input. During testing and commissioning of the IED the reference channel can be changed to facilitate testing and service values reading. The IED has the ability to receive analog values from primary equipment, that are sampled by Merging units (MU) connected to a process bus, via the IEC 61850-9-2 LE protocol.
The availability of VT inputs depends on the ordered transformer input module (TRM) type.
2.2
Operation principle
The direction of a current to the IED depends on the connection of the CT. The main CTs are typically star connected and can be connected with the star point to the object or from the object. This information must be set to the IED. Directional conventions for current or power, for example Positive value of current or power means quantity direction into the object. Negative value of current or power means quantity direction out from the object.
1MRK505183-UEN C
Forward means direction into the object. Reverse means direction out from the object.
Definition of direction for directional functions Reverse Forward Definition of direction for directional functions Forward Reverse
Figure 5:
The correct setting of the primary CT direction CTStarPoint is set to FromObject or ToObject. Positive quantities flow towards the object. Direction is defined as Forward and looks towards the object.
The ratios of the main CTs and VTs must be known to use primary system quantities for settings and calculation in the IED, The user has to set the rated secondary and primary currents and voltages of the CTs and VTs to provide the IED with this information. The CT and VT ratio and the name on respective channel is done under Main menu/General settings/Analog module in the Parameter Settings tool.
2.3
Function block
The function blocks are not represented in the configuration tool. The signals appear only in the SMT tool when a TRM is included in the configuration with the function selector tool. In the SMT tool they can be mapped to the desired virtual input (SMAI) of the IED and used internally in the configuration.
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2.4
Setting parameters
Dependent on ordered IED type.
Table 1:
Name PhaseAngleRef
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Table 2:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2 CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6 CTStarPoint7 CTsec7 CTprim7 CTStarPoint8 CTsec8 CTprim8 CTStarPoint9 CTsec9 CTprim9 CTStarPoint10 CTsec10 CTprim10 CTStarPoint11 CTsec11
1MRK505183-UEN C
Table 3:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2 CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6 VTsec7 VTprim7 VTsec8 VTprim8 VTsec9 VTprim9 VTsec10 VTprim10 VTsec11
1MRK505183-UEN C
Table 4:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2 CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6
Table 5:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2
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Name CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6 CTStarPoint7 CTsec7 CTprim7 VTsec8 VTprim8 VTsec9 VTprim9 VTsec10 VTprim10 VTsec11 VTprim11 VTsec12 VTprim12
Table 6:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2
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ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage
1MRK505183-UEN C
Section 3
Local HMI
3.1
1MRK505183-UEN C
IEC05000055-LITEN V1 EN
Figure 6:
IEC05000056-LITEN V1 EN
Figure 7:
1MRK505183-UEN C
3.2
3.2.1
3.2.2
Design
The local HMI is identical for both the 1/2, 3/4 and 1/1 cases. The different parts of the small local HMI are shown in figure 8
1MRK505183-UEN C
8
IEC05000055-CALLOUT V1 EN
en05000055.eps
Figure 8:
1 Status indication LEDs 2 LCD 3 Indication LEDs 4 Label 5 Local/Remote LEDs 6 RJ45 port 7 Communication indication LED 8 Keypad
1MRK505183-UEN C
3.3
3.3.1
This is a fully graphical monochrome LCD which measures 120 x 90 mm. It has 28 lines with up to 40 characters per line. To display the single line diagram, this LCD is required.
3.3.2
Design
The different parts of the medium size local HMI are shown in figure 9. The local HMI exists in an IEC version and in an ANSI version. The difference is on the keypad operation buttons and the yellow LED designation.
1MRK505183-UEN C
8
IEC05000056-CALLOUT V1 EN
en05000056.eps
Figure 9:
1 Status indication LEDs 2 LCD 3 Indication LEDs 4 Label 5 Local/Remote LEDs 6 RJ45 port 7 Communication indication LED 8 Keypad
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3.4
Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look and feel in all IEDs. LCD screens and other details may differ but the way the keys function is identical.
IEC05000153 V1 EN
Figure 10:
Table 7 describes the HMI keys that are used to operate the IED.
Table 7:
Key
IEC05000101 V1 EN
Press to open two sub menus: Key operation and IED information.
IEC05000103 V1 EN
Press to open the main menu and to move to the default screen.
IEC05000105 V1 EN
Press to start the editing mode and confirm setting changes, when in editing mode.
IEC05000108 V1 EN
1MRK505183-UEN C
Press to navigate forward between screens and move right in editing mode.
IEC05000109 V1 EN
Press to navigate backwards between screens and move left in editing mode.
IEC05000110 V1 EN
Press to move up in the single line diagram and in the menu tree.
IEC05000111 V1 EN
Press to move down in the single line diagram and in the menu tree.
IEC05000112 V1 EN
3.5
3.5.1
LED
Introduction
The LED module is a unidirectional means of communicating. This means that events may occur that activate a LED in order to draw the operators attention to something that has occurred and needs some sort of action.
3.5.2
3.5.3
Indication LEDs
The LED indication module comprising 15 LEDs is standard in 670 series. Its main purpose is to present an immediate visual information for protection indications or alarm signals.
1MRK505183-UEN C
Alarm indication LEDs and hardware associated LEDs are located on the right hand side of the front panel. Alarm LEDs are located on the right of the LCD screen and show steady or flashing light. Steady light indicates normal operation. Flashing light indicates alarm.
Alarm LEDs can be configured in PCM600 and depend on the binary logic. Therefore they can not be configured on the local HMI. Typical examples of alarm LEDs Bay controller failure CB close blocked Interlocking bypassed Differential protection trip SF6 Gas refill Position error CB spring charge alarm Oil temperature alarm Thermal overload trip
The RJ45 port has a yellow LED indicating that communication has been established between the IED and a computer. The Local/Remote key on the front panel has two LEDs indicating whether local or remote control of the IED is active.
3.6
3.6.1
1MRK505183-UEN C
3.6.3
3.6.3.1
3.6.3.2
Function block
LocalHMI CLRLEDS HMI-ON RED-S YELLOW-S YELLOW-F CLRPULSE LEDSCLRD IEC05000773-2-en.vsd
IEC05000773 V2 EN
Figure 11:
3.6.3.3
1MRK505183-UEN C
Table 10:
Name HMI-ON RED-S YELLOW-S YELLOW-F CLRPULSE LEDSCLRD
3.6.4
3.6.4.1
Indication LEDs
Introduction
The function block LEDGEN controls and supplies information about the status of the indication LEDs. The input and output signals of LEDGEN are configured with PCM600. The input signal for each LED is selected individually with the Signal Matrix Tool in PCM600. LEDs (number 16) for trip indications are red. LEDs (number 715) for start indications are yellow.
Each indication LED on the local HMI can be set individually to operate in six different sequences Two sequences operate as follow type. Four sequences operate as latch type. Two of the latching sequence types are intended to be used as a protection indication system, either in collecting or restarting mode, with reset functionality. Two of the latching sequence types are intended to be used as signaling system in collecting (coll) mode with an acknowledgment functionality.
The light from the LEDs can be steady (-S) or flashing (-F). See the technical reference manual for more information.
3.6.4.2
Design
The information on the LEDs is stored at loss of the auxiliary power to the IED in some of the modes of LEDGEN. The latest LED picture appears immediately after the IED is successfully restarted.
Operating modes
Collecting mode
55 Technical reference manual
1MRK505183-UEN C
LEDs which are used in collecting mode of operation are accumulated continuously until the unit is acknowledged manually. This mode is suitable when the LEDs are used as a simplified alarm system.
Re-starting mode In the re-starting mode of operation each new start resets all previous active LEDs and activates only those which appear during one disturbance. Only LEDs defined for re-starting mode with the latched sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a new disturbance. A disturbance is defined to end a settable time after the reset of the activated input signals or when the maximum time limit has elapsed.
Acknowledgment/reset
From local HMI Active indications can be acknowledged or reset manually. Manual acknowledgment and manual reset have the same meaning and is a common signal for all the operating sequences and LEDs. The function is positive edge triggered, not level triggered. The acknowledged or reset is performed via the reset button and menus on the local HMI. See the operator's manual for more information.
From function input Active indications can also be acknowledged or reset from an input, RESET, to the function. This input can, for example, be configured to a binary input operated from an external push button. The function is positive edge triggered, not level triggered. This means that even if the button is continuously pressed, the acknowledgment or reset only affects indications active at the moment when the button is first pressed.
Automatic reset Automatic reset can only be performed for indications defined for restarting mode with the latched sequence type 6 (LatchedReset-S). When automatic reset of the LEDs has been performed, still persisting indications will be indicated with a steady light.
Operating sequences
The operating sequences can be of type Follow or Latched. For the Follow type the LED follows the input signal completely. For the Latched type each LED latches to the corresponding input signal until it is reset.
1MRK505183-UEN C
Figure 12 show the function of available sequences that are selectable for each LED separately. The acknowledgment or reset function is not applicable for sequence 1 and 2 (Follow type). Sequence 3 and 4 (Latched type with acknowledgement) are only working in collecting mode. Sequence 5 is working according to Latched type and collecting mode. Sequence 6 is working according to Latched type and re-starting mode.
The letters S and F in the sequence names have the meaning S = Steady and F = Flashing. At the activation of the input signal, the indication operates according to the selected sequence diagrams. In the sequence diagrams the LEDs have the characteristics as shown in figure 12.
= No indication = Steady light = Flash
en05000506.vsd
IEC05000506 V1 EN
Figure 12:
Sequence 1 (Follow-S) This sequence follows all the time, with a steady light, the corresponding input signals. It does not react on acknowledgment or reset. Every LED is independent of the other LEDs in its operation.
Activating signal
LED
IEC01000228_2_en.vsd
IEC01000228 V2 EN
Figure 13:
Sequence 2 (Follow-F) This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead of showing steady light. Sequence 3 (LatchedAck-F-S) This sequence has a latched function and works in collecting mode. Every LED is independent of the other LEDs in its operation. At the activation of the input signal, the indication starts flashing. After acknowledgment the indication disappears if
1MRK505183-UEN C
the signal is not present any more. If the signal is still present after acknowledgment it gets a steady light.
Activating signal
LED
Acknow.
en01000231.vsd
IEC01000231 V1 EN
Figure 14:
Sequence 4 (LatchedAck-S-F) This sequence has the same functionality as sequence 3, but steady and flashing light have been alternated. Sequence 5 (LatchedColl-S) This sequence has a latched function and works in collecting mode. At the activation of the input signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that indications that are still activated will not be affected by the reset that is, immediately after the positive edge of the reset has been executed a new reading and storing of active signals is performed. Every LED is independent of the other LEDs in its operation.
Activating signal
LED
Reset
IEC01000235_2_en.vsd
IEC01000235 V2 EN
Figure 15:
Sequence 6 (LatchedReset-S) In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are automatically reset at a new disturbance when activating any input signal for other LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still activated will not be affected by manual reset, that is, immediately after the positive edge of that the manual reset has been executed a new reading and storing
1MRK505183-UEN C
of active signals is performed. LEDs set for sequence 6 are completely independent in its operation of LEDs set for other sequences. Definition of a disturbance A disturbance is defined to last from the first LED set as LatchedReset-S is activated until a settable time, tRestart, has elapsed after that all activating signals for the LEDs set as LatchedReset-S have reset. However if all activating signals have reset and some signal again becomes active before tRestart has elapsed, the tRestart timer does not restart the timing sequence. A new disturbance start will be issued first when all signals have reset after tRestart has elapsed. A diagram of this functionality is shown in figure 16.
From disturbance length control per LED set to sequence 6
New disturbance
&
tRestart t
& 1 &
en01000237.vsd
IEC01000237 V1 EN
Figure 16:
In order not to have a lock-up of the indications in the case of a persisting signal each LED is provided with a timer, tMax, after which time the influence on the definition of a disturbance of that specific LED is inhibited. This functionality is shown i diagram in figure 17.
Activating signal To LED
AND tMax t
en05000507.vsd
IEC05000507 V1 EN
Figure 17:
Timing diagram for sequence 6 Figure 18 shows the timing diagram for two indications within one disturbance.
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Disturbance
tRestart
LED 1
IEC01000239_2-en.vsd
Figure 18:
Figure 19 shows the timing diagram for a new indication after tRestart time has elapsed.
Disturbance tRestart Activating signal 1 Activating signal 2 Disturbance tRestart
LED 1
Figure 19:
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Figure 20 shows the timing diagram when a new indication appears after the first one has reset but before tRestart has elapsed.
Disturbance tRestart Activating signal 1 Activating signal 2
LED 1
Figure 20:
Operating sequence 6 (LatchedReset-S), two indications within same disturbance but with reset of activating signal between
LED 1
Figure 21:
1MRK505183-UEN C
IEC05000508_2_en.vsd
IEC05000508 V2 EN
Figure 22:
3.6.4.4
Table 12:
Name NEWIND ACK
3.6.4.5
Table 13:
Name Operation tRestart tMax SeqTypeLED1
Setting parameters
LEDGEN Non group settings (basic)
Values (Range) Off On 0.0 - 100.0 0.0 - 100.0 Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Unit s s Step 0.1 0.1 Default Off 0.0 0.0 Follow-S Description Operation mode for the LED function Defines the disturbance length Maximum time for the definition of a disturbance Sequence type for LED 1
SeqTypeLED2
Follow-S
1MRK505183-UEN C
Name SeqTypeLED3
SeqTypeLED4
Follow-S
SeqTypeLED5
Follow-S
SeqTypeLED6
Follow-S
SeqTypeLED7
Follow-S
SeqTypeLED8
Follow-S
SeqTypeLED9
Follow-S
SeqTypeLED10
Follow-S
SeqTypeLED11
Follow-S
1MRK505183-UEN C
SeqTypeLED13
Follow-S
SeqTypeLED14
Follow-S
SeqTypeLED15
Follow-S
1MRK505183-UEN C
Section 4
4.1
Authorization
To safeguard the interests of our customers, both the IED and the tools that are accessing the IED are protected, subject of authorization handling. The concept of authorization, as it is implemented in the IED and in PCM600 is based on the following facts: There are two types of access points to the IED: local, through the local HMI remote, through the communication ports
4.1.1
Principle of operation
There are different levels (or types) of users that can access or operate different areas of the IED and tools functionality. The pre-defined user types are given in table below. Be sure that the user logged on to the IED has the access required when writing particular data to the IED from PCM600. The meaning of the legends used in the table: R= Read W= Write - = No access rights
1MRK505183-UEN C
Table 14:
Access rights
Basic setting possibilities (change setting group, control settings, limit supervision) Advanced setting possibilities (for example protection settings) Basic control possibilities (process control, no bypass) Advanced control possibilities (process control including interlock trigg) Basic command handling (for example clear LEDs, manual trigg) Advanced command handling (for example clear disturbance record) Basic configuration possibilities (I/ O-configuration in SMT) Advanced configuration possibilities (application configuration including SMT, GDE and CMT) File loading (database loading from XML-file) File dumping (database dumping to XML-file) File transfer (FTP file transfer) File transfer (limited) (FTP file transfer) File Transfer (SPA File Transfer) Database access for normal user User administration (user management FTP File Transfer) User administration (user management SPA File Transfer)
R R R
R R/W R/W
R R/W R/W
R R R
R R R R
R R R R
R/W R R R
R/W R/W R R
R R R -
R R R -
The IED users can be created, deleted and edited only with the User Management Tool (UMT) within PCM600. The user can only LogOn or LogOff on the local HMI on the IED, there are no users, groups or functions that can be defined on local HMI. Only characters A - Z, a - z and 0 - 9 should be used in user names and passwords.
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At least one user must be included in the UserAdministrator group to be able to write users, created in PCM600, to IED.
4.1.1.1
4.2
4.2.1
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Normal micro-processor watchdog function. Checking of digitized measuring signals. Other alarms, for example hardware and time synchronization.
The self-supervision function status can be monitored from the local HMI, from the Event Viewer in PCM600 or from a SMS/SCS system. Under the Diagnostics menu in the local HMI the present information from the selfsupervision function can be reviewed. The information can be found under Main menu/Diagnostics/Internal events or Main menu/Diagnostics/IED status/ General. The information from the self-supervision function is also available in the Event Viewer in PCM600. A self-supervision summary can be obtained by means of the potential free alarm contact (INTERNAL FAIL) located on the power supply module. The function of this output relay is an OR-function between the INT-FAIL signal see figure 24 and a couple of more severe faults that can occur in the IED, see figure 23
IEC04000520 V1 EN
Figure 23:
1MRK505183-UEN C
OR
OR OR OR
LON ERROR FTF fatal error Watchdog RTE fatal error RTE Appl-fail RTE OK IEC61850 not ready RTCERROR RTC OK TIMESYNCHERROR Time reset SYNCH OK Settings changed Set Reset OR Set Reset 1 second pulse Set Reset OR
Internal FAIL
TIMESYNCHERROR SETCHGD
en04000519-1.vsd
IEC04000519 V2 EN
Figure 24:
Some signals are available from the INTERRSIG function block. The signals from this function block are sent as events to the station level of the control system. The signals from the INTERRSIG function block can also be connected to binary outputs for signalization via output relays or they can be used as conditions for other functions if required/desired. Individual error signals from I/O modules can be obtained from respective module in the Signal Matrix tool. Error signals from time synchronization can be obtained from the time synchronization block TIME.
4.2.2.1
Internal signals
Self supervision provides several status signals, that tells about the condition of the IED. As they provide information about the internal status of the IED, they are also called internal signals. The internal signals can be divided into two groups. Standard signals are always presented in the IED, see table 15. Hardware dependent internal signals are collected depending on the hardware configuration, see table 16.
1MRK505183-UEN C
Table 15:
Name of signal FAIL WARNING NUMFAIL NUMWARNING RTCERROR
Table 16:
Card PSM ADOne BIM BOM IOM MIM LDCM
Table 17:
Name of signal FAIL
WARNING
NUMFAIL
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RTEERROR
IEC61850ERROR
WATCHDOG
LMDERROR APPERROR
4.2.2.2
Run-time model
The analog signals to the A/D converter is internally distributed into two different converters, one with low amplification and one with high amplification, see figure 25.
ADx Adx_Low
x1 u1 x2
Adx_High
x1 u1 x2
Adx Controller
en05000296-2-en.vsd
IEC05000296 V2 EN
Figure 25:
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The technique to split the analog input signal into two A/D converters with different amplification makes it possible to supervise the incoming signals under normal conditions where the signals from the two converters should be identical. An alarm is given if the signals are out of the boundaries. Another benefit is that it improves the dynamic performance of the A/D conversion. The self-supervision of the A/D conversion is controlled by the ADx_Controller function. One of the tasks for the controller is to perform a validation of the input signals. This is done in a validation filter which has mainly two objects: First is the validation part that checks that the A/D conversion seems to work as expected. Secondly, the filter chooses which of the two signals that shall be sent to the CPU, that is the signal that has the most suitable level, the ADx_LO or the 16 times higherADx_HI. When the signal is within measurable limits on both channels, a direct comparison of the two channels can be performed. If the validation fails, the CPU will be informed and an alarm will be given. The ADx_Controller also supervise other parts of the A/D converter.
4.2.3
Function block
IEC09000787 V1 EN
Figure 26:
4.2.4
Output signals
Table 18:
Name FAIL WARNING CPUFAIL CPUWARN
4.2.5
Setting parameters
The function does not have any parameters available in the local HMI or PCM600.
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4.2.6
4.3
4.3.1
Time synchronization
Introduction
Use the time synchronization source selector to select a common source of absolute time for the IED when it is a part of a protection system. This makes comparison of events and disturbance data between all IEDs in a station automation system possible. A common source shall be used for IED and merging unit when IEC 61850-9-2LE process bus communication is used. Micro SCADA OPC server should not be used as a time synchronization source.
4.3.2
4.3.2.1
Principle of operation
General concepts Time definitions
The error of a clock is the difference between the actual time of the clock, and the time the clock is intended to have. The rate accuracy of a clock is normally called the clock accuracy and means how much the error increases, that is how much the clock gains or loses time. A disciplined (trained) clock knows its own faults and tries to compensate for them.
The time system is based on a software clock, which can be adjusted from external time sources and a hardware clock. The protection and control modules will be timed from a hardware clock, which runs independently from the software clock. See figure 27.
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External Synchronization sources Off LON SPA Min. pulse GPS SNTP DNP IRIG-B PPS TimeRegulator (Setting, see technical reference manual)
Communication
Events
A/D converter
Diff.communication
IEC08000287 V2 EN
Figure 27:
All time tagging is performed by the software clock. When for example a status signal is changed in the protection system with the function based on free running hardware clock, the event is time tagged by the software clock when it reaches the event recorder. Thus the hardware clock can run independently. The echo mode for the differential protection is based on the hardware clock. Thus, there is no need to synchronize the hardware clock and the software clock. The synchronization of the hardware clock and the software clock is necessary only when GPS or IRIG B 00X with optical fibre, IEEE 1344 is used for differential protection. The two clock systems are synchronized by a special clock synchronization unit with two modes, fast and slow. A special feature, an automatic fast clock time regulator is used. The automatic fast mode makes the synchronization time as short as possible during start-up or at interruptions/ disturbances in the GPS timing. The setting fast or slow is also available on the local HMI. If a GPS clock is used for other 670 series IEDs than line differential RED670, the hardware and software clocks are not synchronized
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Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure. A function is synchronized from a higher level and provides synchronization to lower levels.
Function
IEC09000342-1-en.vsd
IEC09000342 V1 EN
Figure 28:
Synchronization principle
A function is said to be synchronized when it periodically receives synchronization messages from a higher level. As the level decreases, the accuracy of the synchronization decreases as well. A function can have several potential sources of synchronization, with different maximum errors, which give the function the possibility to choose the source with the best quality, and to adjust its internal clock after this source. The maximum error of a clock can be defined as:
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The maximum error of the last used synchronization message The time since the last used synchronization message The rate accuracy of the internal clock in the function.
4.3.2.2
During power off, the system time in the IED is kept by a capacitor-backed realtime clock that will provide 35 ppm accuracy for 5 days. This means that if the power is off, the time in the IED may drift with 3 seconds per day, during 5 days, and after this time the time will be lost completely.
Synchronization messages configured as coarse are only used for initial setting of the time. After this has been done, the messages are checked against the internal time and only an offset of more than 10 seconds resets the time.
Rate accuracy
In the IED, the rate accuracy at cold start is 100 ppm but if the IED is synchronized for a while, the rate accuracy is approximately 1 ppm if the surrounding temperature is constant. Normally, it takes 20 minutes to reach full accuracy.
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All synchronization interfaces has a time-out and a configured interface must receive time-messages regularly in order not to give an error signal (TSYNCERR). Normally, the time-out is set so that one message can be lost without getting a TSYNCERR, but if more than one message is lost, a TSYNCERR is given.
4.3.2.3
Synchronization alternatives
Three main alternatives of external time synchronization are available. Either the synchronization message is applied via any of the communication ports of the IED as a telegram message including date and time or as a minute pulse, connected to a binary input, or via GPS. The minute pulse is used to fine tune already existing time in the IEDs.
SNTP provides a ping-pong method of synchronization. A message is sent from an IED to an SNTP server, and the SNTP server returns the message after filling in a reception time and a transmission time. SNTP operates via the normal Ethernet network that connects IEDs together in an IEC 61850 network. For SNTP to operate properly, there must be an SNTP-server present, preferably in the same station. The SNTP synchronization provides an accuracy that gives 1 ms accuracy for binary inputs. The IED itself can be set as an SNTP-time server. SNTP server requirements The SNTP server to be used is connected to the local network, that is not more than 4-5 switches or routers away from the IED. The SNTP server is dedicated for its task, or at least equipped with a real-time operating system, that is not a PC with SNTP server software. The SNTP server should be stable, that is, either synchronized from a stable source like GPS, or local without synchronization. Using a local SNTP server without synchronization as primary or secondary server in a redundant configuration is not recommended.
On the serial buses (both LON and SPA) two types of synchronization messages are sent. Coarse message is sent every minute and comprises complete date and time, that is, year, month, day, hours, minutes, seconds and milliseconds. Fine message is sent every second and comprises only seconds and milliseconds.
IEC60870-5-103 is not used to synchronize the IED, but instead the offset between the local time in the IED and the time received from 103 is added to all times (in events and so on) sent via 103. In this way the IED acts as it is synchronized from various 103 sessions at the same time. Actually, there is a local time for each 103 session. The SLM module is located on the AD conversion Module (ADM).
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The built in GPS clock modules receives and decodes time information from the global positioning system. The modules are located on the GPS time synchronization Module (GSM).
The IED accepts minute pulses to a binary input. These minute pulses can be generated from, for example station master clock. If the station master clock is not synchronized from a world wide source, time will be a relative time valid for the substation. Both positive and negative edge on the signal can be accepted. This signal is also considered as a fine time synchronization signal. The minute pulse is connected to any channel on any Binary Input Module in the IED. The electrical characteristic is thereby the same as for any other binary input. If the objective of synchronization is to achieve a relative time within the substation and if no station master clock with minute pulse output is available, a simple minute pulse generator can be designed and used for synchronization of the IEDs. The minute pulse generator can be created using the logical elements and timers available in the IED. The definition of a minute pulse is that it occurs one minute after the last pulse. As only the flanks are detected, the flank of the minute pulse shall occur one minute after the last flank. Binary minute pulses are checked with reference to frequency. Pulse data: Period time (a) should be 60 seconds. Pulse length (b): Minimum pulse length should be >50 ms. Maximum pulse length is optional.
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a b
c
en05000251.vsd
IEC05000251 V1 EN
Figure 29:
The default time-out-time for a minute pulse is two minutes, and if no valid minute pulse is received within two minutes a SYNCERR will be given. If contact bounces occurs, only the first pulse will be detected as a minute pulse. The next minute pulse will be registered first 60 s - 50 ms after the last contact bounce. If the minute pulses are perfect, for example, it is exactly 60 seconds between the pulses, contact bounces might occur 49 ms after the actual minute pulse without effecting the system. If contact bounces occurs more than 50 ms, for example, it is less than 59950 ms between the two most adjacent positive (or negative) flanks, the minute pulse will not be accepted. Binary synchronization example An IED is configured to use only binary input, and a valid binary input is applied to a binary input card. The HMI is used to tell the IED the approximate time and the minute pulse is used to synchronize the IED thereafter. The definition of a minute pulse is that it occurs one minute after the previous minute pulse, so the first minute pulse is not used at all. The second minute pulse will probably be rejected due to the spike filter. The third pulse will give the IED a good time and will reset the time so that the fourth minute pulse will occur on a minute border. After the first three minutes, the time in the IED will be good if the coarse time is set properly via the HMI or the RTC backup still keeps the time since last up-time. If the minute pulse is removed for instance for an hour, the internal time will drift by maximum the error rate in the internal clock. If the minute pulse is returned, the first pulse automatically is rejected. The second pulse will possibly be rejected due to the spike filter. The third pulse will either synchronize the time, if the time offset is more than 100 ms, or adjust the time, if the time offset is small enough. If the time is set, the application will be brought to a safe state before the time is set. If the time is adjusted, the time will reach its destination within 1.7 minutes. Synchronization via IRIG-B The DNP3 communication can be the source for the course time synchronization, while the fine time synchronization needs a source with higher accuracy.
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IRIG-B is a protocol used only for time synchronization. A clock can provide local time of the year in this format. The B in IRIG-B states that 100 bits per second are transmitted, and the message is sent every second. After IRIG-B there numbers stating if and how the signal is modulated and the information transmitted. To receive IRIG-B there are two connectors in the IRIG-B module, one galvanic BNC connector and one optical ST connector. IRIG-B 12x messages can be supplied via the galvanic interface, and IRIG-B 00x messages can be supplied via either the galvanic interface or the optical interface, where x (in 00x or 12x) means a number in the range of 1-7. 00 means that a base band is used, and the information can be fed into the IRIGB module via the BNC contact or an optical fiber. 12 means that a 1 kHz modulation is used. In this case the information must go into the module via the BNC connector. If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains information of the year. If x is 0, 1, 2 or 3, the information contains only the time within the year, and year information has to come from PCM600 or local HMI. The IRIG-B module also takes care of IEEE1344 messages that are sent by IRIG-B clocks, as IRIG-B previously did not have any year information. IEEE1344 is compatible with IRIG-B and contains year information and information of the timezone. It is recommended to use IEEE 1344 for supplying time information to the IRIG-B module. In this case, send also the local time in the messages, as this local time plus the TZ Offset supplied in the message equals UTC at all times.
4.3.2.4
4.3.3
Function block
TIMEERR TSYNCERR RTCERR IEC05000425-2-en.vsd
IEC05000425 V2 EN
Figure 30:
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4.3.4
4.3.5
Setting parameters
Path in the local HMI is located under Main menu/Setting/Time Path in PCM600 is located under Main menu/Settings/Time/Synchronization
Table 21:
Name CoarseSyncSrc
FineSyncSource
Off
SyncMaster TimeAdjustRate
Off Slow
Table 22:
Name ModulePosition BinaryInput BinDetection
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Table 23:
Name ServerIP-Add RedServIP-Add
Table 24:
Name MonthInYear
DayInWeek
Sunday
WeekInMonth
Last
UTCTimeOfDay
3600
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Table 25:
Name MonthInYear
DayInWeek
Sunday
WeekInMonth
Last
UTCTimeOfDay
3600
Table 26:
Name NoHalfHourUTC
Table 27:
Name SynchType TimeDomain Encoding
TimeZoneAs1344
PlusTZ
1MRK505183-UEN C
4.4
4.4.1
4.4.2
Principle of operation
Parameter setting groups ActiveGroup function has six functional inputs, each corresponding to one of the setting groups stored in the IED. Activation of any of these inputs changes the active setting group. Seven functional output signals are available for configuration purposes, so that up to date information on the active setting group is always available. A setting group is selected by using the local HMI, from a front connected personal computer, remotely from the station control or station monitoring system or by activating the corresponding input to the ActiveGroup function block. Each input of the function block can be configured to connect to any of the binary inputs in the IED. To do this PCM600 must be used. The external control signals are used for activating a suitable setting group when adaptive functionality is necessary. Input signals that should activate setting groups must be either permanent or a pulse exceeding 400 ms. More than one input may be activated at the same time. In such cases the lower order setting group has priority. This means that if for example both group four and group two are set to activate, group two will be the one activated. Every time the active group is changed, the output signal SETCHGD is sending a pulse. The parameter MAXSETGR defines the maximum number of setting groups in use to switch between.
1MRK505183-UEN C
ACTIVATE GROUP 6 ACTIVATE GROUP 5 ACTIVATE GROUP 4 ACTIVATE GROUP 3 ACTIVATE GROUP 2 +RL2 ACTIVATE GROUP 1 IOx-Bly1 IOx-Bly2 IOx-Bly3 IOx-Bly4 IOx-Bly5 IOx-Bly6 ActiveGroup ACTGRP1 GRP1 ACTGRP2 ACTGRP3 ACTGRP4 ACTGRP5 ACTGRP6 GRP2 GRP3 GRP4 GRP5 GRP6 SETCHGD
en05000119.vsd
IEC05000119 V2 EN
Figure 31:
The above example also includes seven output signals, for confirmation of which group that is active. SETGRPS function block has an input where the number of setting groups used is defined. Switching can only be done within that number of groups. The number of setting groups selected to be used will be filtered so only the setting groups used will be shown on the Parameter Setting Tool.
4.4.3
Function block
ActiveGroup ACTGRP1 GRP1 ACTGRP2 GRP2 ACTGRP3 GRP3 ACTGRP4 GRP4 ACTGRP5 GRP5 ACTGRP6 GRP6 SETCHGD IEC05000433_2_en.vsd
IEC05000433 V2 EN
Figure 32:
Figure 33:
1MRK505183-UEN C
Table 30:
Name GRP1 GRP2 GRP3 GRP4 GRP5 GRP6 SETCHGD
4.4.5
Table 31:
Name t
Setting parameters
ActiveGroup Non group settings (basic)
Values (Range) 0.0 - 10.0 Unit s Step 0.1 Default 1.0 Description Pulse length of pulse when setting changed
Table 32:
Name ActiveSetGrp
MAXSETGR
No
4.5
1MRK505183-UEN C
4.5.1
4.5.2
Principle of operation
The Change lock function (CHNGLCK) is configured using ACT. The function, when activated, will still allow the following changes of the IED state that does not involve reconfiguring of the IED: Monitoring Reading events Resetting events Reading disturbance data Clear disturbances Reset LEDs Reset counters and other runtime component states Control operations Set system time Enter and exit from test mode Change of active setting group
The binary input signal LOCK controlling the function is defined in ACT or SMT:
Binary input 1 0 Function Activated Deactivated
4.5.3
Function block
CHNGLCK LOCK IEC09000946-1-en.vsd
IEC09000946 V1 EN
Figure 34:
4.5.4
1MRK505183-UEN C
Setting parameters
CHNGLCK Non group settings (basic)
Values (Range) LockHMI and Com LockHMI, EnableCom EnableHMI, LockCom Unit Step Default LockHMI and Com Description Operation mode of change lock
4.6
4.6.1
4.6.2
Principle of operation
Put the IED into test mode to test functions in the IED. Set the IED in test mode by configuration, activating the input signal of the function block TESTMODE. setting TestMode to On in the local HMI, under Main menu/TEST/IED test mode.
While the IED is in test mode, the ACTIVE output of the function block TESTMODE is activated. The other outputs of the function block TESTMODE shows the generator of the Test mode: On state input from configuration (OUTPUT output is activated) or setting from local HMI (SETTING output is activated). While the IED is in test mode, the yellow START LED will flash and all functions are blocked. Any function can be unblocked individually regarding functionality and event signalling. Most of the functions in the IED can individually be blocked by means of settings from the local HMI. To enable these blockings the IED must be set in test mode (output ACTIVE is activated), see example in figure 35. When leaving the test
88 Technical reference manual
1MRK505183-UEN C
mode, that is entering normal mode, these blockings are disabled and everything is set to normal operation. All testing will be done with actually set and configured values within the IED. No settings will be changed, thus no mistakes are possible. The blocked functions will still be blocked next time entering the test mode, if the blockings were not reset. The blocking of a function concerns all output signals from the actual function, so no outputs will be activated. When a binary input is used to set the IED in test mode and a parameter, that requires restart of the application, is changed, the IED will re-enter test mode and all functions will be blocked, also functions that were unblocked before the change. During the reentering to test mode, all functions will be temporarily unblocked for a short time, which might lead to unwanted operations. This is only valid if the IED is put in TEST mode by a binary input, not by local HMI. The TESTMODE function block might be used to automatically block functions when a test handle is inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) can supply a binary input which in turn is configured to the TESTMODE function block. Each of the protection functions includes the blocking from the TESTMODE function block. A typical example from the undervoltage function is shown in figure 35. The functions can also be blocked from sending events over IEC 61850 station bus to prevent filling station and SCADA databases with test events, for example during a maintenance test.
1MRK505183-UEN C
Disconnection
tBlkUV1 < t1,t1Min IntBlkStVal1 IntBlkStVal2 Time Block step 1 Block step 2
en05000466.vsd
IEC05000466 V1 EN
Figure 35:
4.6.3
Function block
TESTMODE INPUT ACTIVE OUTPUT SETTING NOEVENT
IEC09000219-1.vsd
IEC09000219 V1 EN
Figure 36:
4.6.4
1MRK505183-UEN C
Table 36:
Name ACTIVE OUTPUT SETTING NOEVENT
4.6.5
Table 37:
Name TestMode EventDisable CmdTestBit
Setting parameters
TESTMODE Non group settings (basic)
Values (Range) Off On Off On Off On Unit Step Default Off Off Off Description Test mode in operation (On) or not (Off) Event disable during testmode Command bit for test required or not during testmode
4.7
4.7.1
IED identifiers
Introduction
IED identifiers (TERMINALID) function allows the user to identify the individual IED in the system, not only in the substation, but in a whole region or a country. Use only characters A-Z, a-z and 0-9 in station, object and unit names.
4.7.2
Table 38:
Name StationName StationNumber ObjectName ObjectNumber UnitName UnitNumber
Setting parameters
TERMINALID Non group settings (basic)
Values (Range) 0 - 18 0 - 99999 0 - 18 0 - 99999 0 - 18 0 - 99999 Unit Step 1 1 1 1 1 1 Default Station name 0 Object name 0 Unit name 0 Description Station name Station number Object name Object number Unit name Unit number
1MRK505183-UEN C
4.8
4.8.1
Product information
Introduction
The Product identifiers function identifies the IED. The function has seven pre-set, settings that are unchangeable but nevertheless very important: IEDProdType ProductDef FirmwareVer SerialNo OrderingNo ProductionDate
The settings are visible on the local HMI , under Main menu/Diagnostics/IED status/Product identifiers They are very helpful in case of support process (such as repair or maintenance).
4.8.2
Setting parameters
The function does not have any parameters available in the local HMI or PCM600.
4.8.3
4.8.3.1
Application
Factory defined settings
The factory defined settings are very useful for identifying a specific version and very helpful in the case of maintenance, repair, interchanging IEDs between different Substation Automation Systems and upgrading. The factory made settings can not be changed by the customer. They can only be viewed. The settings are found in the local HMI under Main menu/Diagnostics/IED status/Product identifiers The following identifiers are available: IEDProdType Describes the type of the IED (like REL, REC or RET). Example: REL670 Describes the release number, from the production. Example: 1.1.r01 Describes the firmware version. Example: 1.4.51 Firmware versions numbers are running independently from the release production numbers. For every release numbers (like 1.4.51) ProductDef FirmwareVer
1MRK505183-UEN C
there can be one or more firmware versions, depending on the small issues corrected in between releases. IEDMainFunType Main function type code according to IEC 60870-5-103. Example: 128 (meaning line protection).
4.9
4.9.1
4.9.2
Principle of operation
The Signal matrix for binary inputs (SMBI) function , see figure 37, receives its inputs from the real (hardware) binary inputs via the Signal Matrix Tool (SMT), and makes them available to the rest of the configuration via its outputs, BI1 to BI10. The inputs and outputs, as well as the whole block, can be given a user defined name. These names will be represented in SMT as information which signals shall be connected between physical IO and SMBI function. The input/ output user defined name will also appear on the respective output/input signal.
4.9.3
Function block
SMBI ^VIN1 ^VIN2 ^VIN3 ^VIN4 ^VIN5 ^VIN6 ^VIN7 ^VIN8 ^VIN9 ^VIN10 ^BI1 ^BI2 ^BI3 ^BI4 ^BI5 ^BI6 ^BI7 ^BI8 ^BI9 ^BI10 IEC05000434-2-en.vsd
IEC05000434 V2 EN
Figure 37:
1MRK505183-UEN C
Table 40:
Name BI1 BI2 BI3 BI4 BI5 BI6 BI7 BI8 BI9 BI10
4.10
4.10.1
1MRK505183-UEN C
4.10.2
4.10.3
Function block
SMBO BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10 ^BO1 ^BO2 ^BO3 ^BO4 ^BO5 ^BO6 ^BO7 ^BO8 ^BO9 ^BO10 IEC05000439-2-en.vsd
IEC05000439 V2 EN
Figure 38:
4.10.4
4.11
1MRK505183-UEN C
The Signal matrix for mA inputs (SMMI) function is used within the Application Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see the application manual to get information about how milliamp (mA) inputs are brought in for one IED configuration.
4.11.2
Principle of operation
The Signal matrix for mA inputs (SMMI) function, see figure 39, receives its inputs from the real (hardware) mA inputs via the Signal Matrix Tool (SMT), and makes them available to the rest of the configuration via its analog outputs, named AI1 to AI6. The inputs, as well as the whole block, can be tag-named. These tags will be represented in SMT. The outputs on SMMI are normally connected to the IEC61850 generic communication I/O functions (MVGGIO) function for further use of the mA signals.
4.11.3
Function block
SMMI ^VIN1 ^VIN2 ^VIN3 ^VIN4 ^VIN5 ^VIN6 AI1 AI2 AI3 AI4 AI5 AI6 IEC05000440-2-en.vsd
IEC05000440 V2 EN
Figure 39:
4.11.4
1MRK505183-UEN C
Table 43:
Name AI1 AI2 AI3 AI4 AI5 AI6
4.12
4.12.1
4.12.2
Principle of operation
Every Signal matrix for analog inputs function (SMAI) can receive four analog signals (three phases and one neutral value), either voltage or current, see figure 41 and figure 42. SMAI outputs give information about every aspect of the 3ph analog signals acquired (phase angle, RMS value, frequency and frequency derivates etc. 244 values in total). The BLOCK input will reset all outputs to 0. The output signal AI1 to AI4 are direct output of the, in SMT, connected input to GRPxL1, GRPxL2, GRPxL3 and GRPxN, x=1-12. AIN is always the neutral current, calculated residual sum or the signal connected to GRPxN. Note that function block will always calculate the residual sum of current/voltage if the input is not connected in SMT. Applications with a few exceptions shall always be connected to AI3P.
4.12.3
Frequency values
The frequency functions includes a functionality based on level of positive sequence voltage, IntBlockLevel, to validate if the frequency measurement is valid or not. If positive sequence voltage is lower than IntBlockLevel the function is blocked. IntBlockLevel, is set in % of UBase/3 If SMAI setting ConnectionType is Ph-Ph at least two of the inputs GRPxL1, GRPxL2 and GRPxL3 must be connected in order to calculate positive sequence voltage. If SMAI setting ConnectionType is Ph-N, all three inputs GRPxL1,
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1MRK505183-UEN C
GRPxL2 and GRPxL3 must be connected in order to calculate positive sequence voltage. If only one phase-phase voltage is available and SMAI setting ConnectionType is Ph-Ph the user is advised to connect two (not three) of the inputs GRPxL1, GRPxL2 and GRPxL3 to the same voltage input as shown in figure 40 to make SMAI calculating a positive sequence voltage (that is input voltage/3).
IEC10000060-1-en.vsd
IEC10000060 V1 EN
Figure 40:
Connection example
The above described scenario does not work if SMAI setting ConnectionType is Ph-N. If only one phase-earth voltage is available, the same type of connection can be used but the SMAI ConnectionType setting must still be Ph-Ph and this has to be accounted for when setting IntBlockLevel. If SMAI setting ConnectionType is Ph-N and the same voltage is connected to all three SMAI inputs, the positive sequence voltage will be zero and the frequency functions will not work properly.
The outputs from the above configured SMAI block shall only be used for Overfrequency protection (SAPTOF), Underfrequency protection (SAPTUF) and Rate-of-change frequency protection (SAPFRC) due to that all other information except frequency and positive sequence voltage might be wrongly calculated.
4.12.4
Function block
SMAI1 BLOCK DFTSPFC ^GRP1L1 ^GRP1L2 ^GRP1L3 ^GRP1N TYPE SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN IEC05000705-2-en.vsd
IEC05000705 V2 EN
Figure 41:
1MRK505183-UEN C
SMAI2 BLOCK ^GRP2L1 ^GRP2L2 ^GRP2L3 ^GRP2N TYPE AI3P AI1 AI2 AI3 AI4 AIN IEC07000130-2-en.vsd
IEC07000130 V2 EN
Figure 42:
4.12.5
Table 45:
Name SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN
1MRK505183-UEN C
Table 46:
Name BLOCK GRP2L1 GRP2L2 GRP2L3 GRP2N
Table 47:
Name AI3P AI1 AI2 AI3 AI4 AIN
4.12.6
Setting parameters
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no VT inputs are available. Internal nominal frequency DFT reference is then the reference.
1MRK505183-UEN C
Table 48:
Name DFTRefExtOut
DFTReference
InternalDFTRef
DFT reference
ConnectionType TYPE
Ch
Ph-N 1
Table 49:
Name Negation
MinValFreqMeas UBase
% kV
1 0.05
10 400.00
1MRK505183-UEN C
Table 50:
Name DFTReference
ConnectionType TYPE
Ch
Ph-N 1
Table 51:
Name Negation
MinValFreqMeas UBase
% kV
1 0.05
10 400.00
4.13
4.13.1
4.13.2
Principle of operation
Summation block 3 phase 3PHSUM receives the three-phase signals from Signal matrix for analog inputs function (SMAI). In the same way, the BLOCK input will reset all the outputs of the function to 0.
1MRK505183-UEN C
4.13.3
Figure 43:
4.13.4
Table 53:
Name AI3P AI1 AI2 AI3 AI4
4.13.5
Setting parameters
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no VT inputs are available.
Table 54:
Name SummationType
DFTReference
InternalDFTRef
DFT reference
1MRK505183-UEN C
Table 55:
Name FreqMeasMinVal UBase
4.14
4.14.1
4.14.2
Principle of operation
Authority status (ATHSTAT) function informs about two events related to the IED and the user authorization: the fact that at least one user has tried to log on wrongly into the IED and it was blocked (the output USRBLKED) the fact that at least one user is logged on (the output LOGGEDON)
Whenever one of the two events occurs, the corresponding output (USRBLKED or LOGGEDON) is activated. The output can for example, be connected on Event (EVENT) function block for LON/SPA.The signals are also available on IEC 61850 station bus.
4.14.3
Function block
ATHSTAT USRBLKED LOGGEDON IEC06000503-2-en.vsd
IEC06000503 V2 EN
Figure 44:
4.14.4
Output signals
Table 56:
Name USRBLKED LOGGEDON
1MRK505183-UEN C
4.14.5
106
1MRK505183-UEN C
Section 5
Differential protection
5.1
L3CPDIF
3Id/I>
SYMBOL-HH V1 EN
87L
L6CPDIF
3Id/I>
SYMBOL-HH V1 EN
87L
Line differential protection 3 CT sets, with in-zone transformers, 2-3 line ends
LT3CPDIF
3Id/I>
SYMBOL-HH V1 EN
87LT
Line differential protection 6 CT sets, with in-zone transformers, 3-5 line ends
LT6CPDIF
3Id/I>
SYMBOL-HH V1 EN
87LT
LDLPDIF
87L
5.1.1
5.1.1.1
Introduction
Line differential protection, 3 or 6 CT sets L3CPDIF, L6CPDIF
Line differential protection applies the Kirchhoff's law and compares the currents entering and leaving the protected multi-terminal circuit, consisting of overhead
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1MRK505183-UEN C
power lines, power transformers and cables. It offers phase-segregated true current differential protection with high sensitivity and provides phase selection information for single-pole tripping. The three terminal version is used for conventional two-terminal lines with or without 1 1/2 circuit breaker arrangement in one end, as well as three terminal lines with single breaker arrangements at all terminals.
Protected zone
IED
Comm. Channel
IED
IEC05000039_2_en.vsd
IEC05000039 V2 EN
Figure 45:
The six terminal versions are used for conventional two-terminal lines with 1 1/2 circuit breaker arrangements in both ends, as well as multi terminal lines with up to five terminals.
Protected zone
IED
IED
Comm. Channel
IEC05000040_2_en.vsd
IEC05000040 V2 EN
Figure 46:
The current differential algorithm provides high sensitivity for internal faults, at the same time as it has excellent stability for external faults. Current samples from all CTs are exchanged between the IEDs in the line ends (master-master mode) or sent to one IED (master-slave mode) for evaluation. A restrained dual biased slope evaluation is made where the bias current is the highest phase current in any line end giving a secure through fault stability even with heavily saturated CTs. In addition to the restrained evaluation, an unrestrained high differential current setting can be used for fast tripping of internal faults with very high currents. A special feature with this function is that applications with small power transformers (rated current less than 50 % of the differential current setting) connected as line taps (that is, as "shunt" power transformers), without measurements of currents in the tap, can be handled. The normal load current is
108 Technical reference manual
1MRK505183-UEN C
here considered to be negligible, and special measures need only to be taken in the event of a short circuit on the LV side of the transformer. In this application, the tripping of the differential protection can be time delayed for low differential currents to achieve coordination with down stream over current IEDs. A line charging current compensation provides increased sensitivity of Line differential protection.
5.1.1.2
IED
Comm. Channel
IED
Comm. Channel
IED
Comm. Channel
IEC05000042_2_en.vsd
IEC05000042 V2 EN
Figure 47:
Example of application on a three-terminal line with a power transformer in the protection zone
5.1.1.3
1MRK505183-UEN C
Protected zone
IED
IED
Comm. Channels
IED IED IED IEC0500043_2_en.vsd
IEC05000043 V2 EN
Figure 48:
RED 670
RED 670
Comm. Channels
RED 670 RED 670 RED 670 en05000044.vsd
IEC05000044 V1 EN
Figure 49:
Current samples from IEDs located geographically apart from each other, must be time coordinated so that the current differential algorithm can be executed correctly. In IED, it is possible to make this coordination in two different ways. The echo method of time synchronizing is normally used whereas for applications where transmit and receive times can differ, the optional built in GPS receivers can be used. The communication link is continuously monitored, and an automatic switchover to a standby link is possible after a preset time.
5.1.2
5.1.2.1
Principle of operation
Algorithm and logic
In Line differential protection function, measured current values from local and remote line ends are evaluated in order to distinguish between internal or external faults, or undisturbed conditions. The local currents are fed to the IED via the Analog Input Modules and thereafter they pass the Analog to Digital Converter, as shown in figure 50.
1MRK505183-UEN C
Local end
Remote end
LDCM
A/D Converter
Current samples from local end Current samples from remote end Pre-processing Block
LDCM
Line Diffferential Function CH1IL1RE CH1IL1IM CH1IL2RE CH1IL2IM Currents from all ends as phasors CH1IL1SM CH1IL2SM CH1IL3SM CH2IL1SM Curr. samples from all ends Calculation of instantaneous differential currents (3x) [samples] Harmonic analysis ( 2nd and 5th) Calculation of fundamental frequency differential currents (3x) & bias current [magnitude] Differential and bias currents applied to operate / bias -, and unrestrained characteristics Trip by unrestrained differential protection 1 Start L1 Start L2 Start L3 St L1 low sens St L2 low sens St L3 low sens nd 2 h. block Output logic: - 2nd - 5th harmonic block harmonic block TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA TRIP
- Enhanced trip for internal faults - Decreased sensitivity for external faults Conditional trip for simultaneous external and internal faults
CH1INSRE CH1INSIM CH1INSRE CH1INSIM Neg. seq. currents from all ends as phasors Calculation of negativesequence differential current (1x)
BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 INTFAULT EXTFAULT
IEC05000294_2_en.vsd
IEC05000294 V2 EN
Figure 50:
The remote currents are received to the IED as samples via a communication link. When entering the IED, they are processed in the Line Differential Communication Module (LDCM) where they are time coordinated with the local current samples, and interpolated in order to be comparable with the local samples.
111 Technical reference manual
Information
5th h. block
Trip commands
1MRK505183-UEN C
In the Pre-Processing Block, the real and imaginary parts of the fundamental frequency phase currents and negative sequence currents are derived. Together with the current samples, they are then forwarded to the differential function block where three different analyses are carried out. The first analysis is the classical differential and bias current evaluation with the characteristic as seen in figure 51. Line differential protection is phase segregated where the differential current is the vectorial sum of all measured currents taken separately for each phase. The bias current, on the other hand, is considered as the greatest phase current in any line end and it is common for all three phases. The two slopes (SlopeSection1, SlopeSection2) and breakpoints (EndSection1, EndSection2) can be set in PCM600 or via the local HMI. Current values plotted above the characteristic formed by IdMin and the dual slope will give a start in that phase. The level IdMinHigh is a setting value that is used to temporarily decrease the sensitivity in situations when: the line is energized when a fault is classified as external when a tap transformer is switched in
There is also an unrestrained high differential current setting that can be used for fast tripping of internal faults with very high currents.
1MRK505183-UEN C
3 A 2 Section 1
Operate conditionally
IdMinHigh B
Section 2
Section 3 SlopeSection3
Restrain 4 5
en05000300.vsd
IEC05000300 V1 EN
Figure 51:
where:
1. 2. 3. 4. 5.
The second analysis is the 2nd and 5th harmonic analysis on the differential current. Occurrence of these harmonics over a level that is set separately for each one will block tripping action from the biased slope evaluation.
1MRK505183-UEN C
The third analysis is the negative sequence current analysis. Effectively this is a fault discriminator that distinguishes between internal and external faults. It works such that the phase angle of the negative sequence current from the local end is compared with the phase angle of the sum of the negative sequence currents from the remote ends. The characteristic for this fault discriminator is shown in figure 52, where the directional characteristic is defined by the two setting parameters IminNegSeq and NegSeqRoa.
90 deg 120 deg If one or the other of currents is too low, then no measurement is done, and 120 degrees is mapped Internal/external fault boundary
180 deg
0 deg
IMinNegSeq
270 deg
en05000188.vsd
IEC05000188 V1 EN
Figure 52:
Reference direction of currents is considered to be towards the line. Thus, when both currents to be compared have this direction, the phase difference between them will ideally be zero. In the opposite case, when one current is entering and the other is leaving the protected object, the phase difference will ideally be 180 degree. In case either the local or the sum of the remote negative sequence currents or both is below the set level, the fault discriminator will not make any fault classification and the value 120 degree is set. This value is then an indication that negative sequence directional comparison has not been possible to make, and it does not mean classification as external fault. When a fault is classified as internal by the negative sequence fault discriminator, a trip is issued under the condition that the dual slope restrained function has started , while a classification as external fault results in an increase of the restrained characteristic trip values IdMinHigh.
1MRK505183-UEN C
With reference to figure 50, the outputs from the three analysis blocks are fed to the output logic. Figure 53 shows a simplified block diagram of this output logic where only trip commands and no alarm signals are shown for simplicity.
Trip unrestrained L1 Trip unrestrained L2 Trip unrestrained L3 Start L1 Start L2 Start L3 AND OR AND St L1 IdMinHigh St L2 IdMinHigh St L3 IdMinHigh OR OR AND OR OR TRL3 OR AND OR OR AND TRL2 OR TRL1 OR TRIP
AND
AND tIdMinHigh t OR
AND
Diff curr L1 2nd harm Diff curr L2 2nd harm Diff curr L3 2nd harm Diff curr L1 5th harm Diff curr L2 5 harm Diff curr L3 5th harm
th
OR OR
OR
OR OR
OR
OR CrossBlockEn
AND
IEC05000295-2-en.vsd
IEC05000295 V2 EN
Figure 53:
Remembering that current values plotted above the characteristic formed by IdMin and the dual slope in figure 52 are said to give a start, the output logic can be summarized as follows: A start in one phase, gives a trip under the condition that the content of 2nd and 5th harmonic is below the set level for these harmonics. Otherwise it is blocked
115 Technical reference manual
1MRK505183-UEN C
as long as the harmonic is above the set level. However, when a line is energized the current setting value IdMinHigh is used. Effectively this means that the line A-B-C in figure 51 forms the characteristic. Current values above the unrestrained limit gives a trip irrespective of any presence of harmonics. Classification of a fault as internal by the negative sequence fault discriminator, will give a trip under the condition that a start has occurred in that phase. This means that any harmonic blocking is then overridden. However, occurrence of harmonics at the same time as the differential current is below the level IdMinHigh, will block a trip even though the fault is classified as internal. This latter condition is to prevent unwanted trips when energizing a line tap transformer. Classification of a fault as external by the negative sequence fault discriminator will cause IdMinHigh to be used as the lower limit for the restrained characteristic according to figure 51. Cross blocking will also be activated in this situation.
Compensation for charging currents can be selected active or not by setting ChargCurEnableYes or No. The compensation works such that the fundamental frequency differential current that is measured under steady state undisturbed conditions, is identified and then subtracted making the resulting differential current zero (or close to zero). This action is made separately for each phase. The magnitude of the subtracted pre-fault currents in Amperes can be read at any time as the service value ICHARGE. Values of the pre-fault differential currents are not updated under disturbance conditions. The updating process is resumed 50 ms after normal conditions have been restored. Normal conditions are only considered if there are no start signals, neither internal nor external fault is declared, the power system is symmetrical and so on. It is thus obvious that the change in charging current that the fault causes by decreasing the system voltage is not considered in the algorithm, a matter that is further discussed in the application manual. Note that all small pre-fault differential currents are subtracted, no matter what their origin. Besides the true charging currents, the following currents are eliminated: Small differential currents due to small errors (inequalities) of current transformers. Small differential currents because of off-nominal load tap changer positions when a power transformer is included in the protected zone. Load currents of tap loads included in the protected zone.
5.1.2.2
Time synchronization
In a numerical line differential protection, current samples from protections located geographically apart from each other, must be time coordinated so that the currents
1MRK505183-UEN C
from the different line ends can be compared without introducing irrelevant errors. Accuracy requirements on this time coordination are extremely high. As an example, an inaccuracy of 0.1 ms in a 50 Hz system gives a maximum amplitude error approximately around 3% whilst an inaccuracy of 1 ms gives a maximum amplitude error of approximately 31%. The corresponding figures for a 60 Hz system are 4% and 38% respectively. In Line differential protection, the time coordination is made with the so-called echo method, which can be complemented with GPS synchronization as an option. Each IED has an accurate local clock with a very small time drift. This clock makes time tagging of telegrams, and the echo method is then used to find out the time difference between the clocks in two ends of a power line. Referring to figure 54, it works such that the transmission time to send a message from station B to station A (T1 T2) and receive a message from A to B (T3 T4) is measured. The time instances T2 and T3 are taken with the local clock reference of station A, and the time instances T1 and T4 are taken with the local clock reference of station B.
A B
IEC05000293 V1 EN
T2
T3
T1
T4
en05000293.vsd
Figure 54:
Calculation of the delay time one-way Td and the time difference t between the clocks in A and B is then possible to do with equation 2 and equation 3, which are only valid under the condition that the send and receive times are equal.
Td = (T2 - T1 ) + (T4 - T3 ) 2
(Equation 2)
EQUATION1358 V1 EN
Dt =
(T1 + T4 ) - (T2 + T3 ) 2
(Equation 3)
EQUATION1359 V1 EN
t is calculated every time a telegram is received, and the time difference is then used to adjust and interpolate the current measurements from the remote end before the current differential algorithm is executed.
1MRK505183-UEN C
The echo method without GPS, can be used in telecommunications transmission networks with varying signal propagation delay as long as there is delay symmetry, that is, the send and receive delays are equal. The delay variation can depend on the signal going different routes in the network from time to other. When the delay symmetry is lost, the expression for t given above is no longer valid, and GPS synchronization of the local IED clocks must be used. Including the optional GPS, means that there will be one GPS receiver module in each IED, synchronizing its local IED clock. As GPS synchronization is very accurate, in the order of 1 s, all IEDs in the same line differential scheme will have the same clock reference. It is then possible to detect asymmetric transmission time delay and compensate for it. When the IED is equipped with GPS, this hardware is integrated in the IED. Besides the GPS receiver itself, it also consists of filters and regulators for post processing of the GPS time synch pulse, which is necessary to achieve a reliable GPS synchronization. Especially short interruptions and spurious out of synch GPS signals are handled securely in this way. When GPS synchronization is used, an interruption in the GPS signal leads to freewheeling during 8 seconds that is, during this time the synchronization benefits from the stability in the local clocks. If the interruption persists more than 8 seconds, either fall back to the echo synchronization method or blocking of Line differential protection function is made, as selected through setting parameter GPSSyncErr. For a description of the time synchronization function, refer to section "Time synchronization".
5.1.2.3
1MRK505183-UEN C
made in each IED. This means that a 64 kbit/s communication channel is needed between every IED included in the same line differential protection zone.
Protected zone
IED
IED
IED
IED
IEC05000292_2_en.vsd
IEC05000292 V2 EN
Figure 55:
In the master-slave system, current samples are sent from all slave IEDs to one master IED where the evaluation is made and trip signals are sent to the remote ends when needed. In this system, a 64 kbit/s communication channel is only needed between the master, and each one of the slave IEDs, as shown in figure 56.
Protected zone
IED
IED
Comm. Channels
IED
IED
IED
IEC05000291_2_en.vsd
IEC05000291 V2 EN
Figure 56:
The master-slave configuration is achieved by setting parameter Operation in the slaves to Off for Line differential protection function, and setting parameter ChannelMode to On for the LDCMs in the slaves.
Test mode
Line differential protection function in one IED can be set in test mode. This can block the trip outputs on that IED, and set the remote IEDs in a remote test mode, so that injected currents can be echoed back phase shifted and with a settable amplitude. The trip outputs in the remote IEDs can also be blocked automatically. For further information, refer to the installation and commissioning manual.
The currents are sampled twenty times per power system cycle in the protection terminals, but the communication exchange is made only once every 5 ms. This
119 Technical reference manual
1MRK505183-UEN C
means that at in each telegram sent, 5 consecutive current samples in a 50 Hz system and 6 consecutive current samples in a 60 Hz system (three phases each sampling instant) are included. Figure 57 shows the principle.
Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent
10
15
20
25
30
35
Time (ms)
en05000290.vsd
IEC05000290 V1 EN
Figure 57:
where: x
With redundant communication channels, as shown in figure 58, both channels are in operation continuously but with one of them favoured as a primary channel.
Telecom. Network
LD CM LD CM LD CM LD CM
Telecom. Network
IEC05000289 V1 EN
en05000289.vsd
Figure 58:
Direct fibre optical connection between two IEDs with LDOM over longer distances.
If communication is lost on the primary channel, switchover to the secondary channel is made after a settable time delay RedChSwTime. Return of the primary channel will cause a switchback after another settable time delay RedChRturnTime. For a three-, four- or five-terminals line in a master-master configuration, a loss of one communication channel will not cause the line differential protection to be
120 Technical reference manual
1MRK505183-UEN C
unserviceable. Instead it will automatically revert to a partial master-slave mode with the two IEDs that have an unserviceable communication link between them, will serve as slaves. For more details about the remote communication see section "Remote communication" and the application manual.
5.1.2.4
1MRK505183-UEN C
alarm signal is also produced after a settable delay (tOCTAlarmDelay) to report to operational personal for quick remedy actions once the open CT is detected. When the open CT condition is removed (that is, the previously open CT reconnected), the functions remain blocked for a specified interval of time, which is also a setting (tOCTResetDelay). The task of this measure is to prevent an eventual maloperation after the reconnection of the previously open CT secondary circuit. The open CT feature works only during normal loading condition. Thus, the open CT feature must be automatically disabled for all external faults, big overloads and inrush conditions. The open CT algorithm provides detailed information about the location of the defective CT secondary circuit. The algorithm clearly indicates IED side, CT input and phase in which open CT condition has been detected. These indications are provided via the following outputs from Line differential protection function: 1. 2. 3. 4. Output OPENCT provides instant information to indicate that open CT circuit has been detected Output OPENCTAL provides time delayed alarm that the open CT circuit has been detected. Time delay is defined by setting parameter tOCTAlarmDelay. Integer output OPENCTIN provides information on the local HMI regarding which open CT circuit has been detected (1=CT input No 1; 2=CT input No 2) Integer output OPENCTPH provides information on the local HMI regarding in which phase open CT circuit has been detected (1=Phase L1; 2= Phase L2; 3= Phase L3)
Once the open CT condition is declared, the algorithm stops to search for further open CT circuits. It waits until the first open CT circuit has been corrected. Note that once the open CT condition has been detected, it can be automatically reset within the differential function. It is not possible to externally reset open CT condition. To reset the open CT circuit alarm automatically, the following conditions must be fulfilled: Bias current is for at least one minute smaller than 110% Open CT condition in defective CT circuit has been rectified (for example, current asymmetry disappears) Above two conditions are fulfilled for longer time than defined by the setting parameter tOCTResetDelay
After the reset, the open CT detection algorithm starts again to search for any other open CT circuit within the protected zone.
5.1.2.5
1MRK505183-UEN C
5.1.2.6
5.1.3
Function block
L3CPDIF I3P1* I3P2* I3P3* TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 ALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG IEC06000252-2-en.vsd
IEC06000252 V2 EN
Figure 59:
1MRK505183-UEN C
L6CPDIF I3P1* I3P2* I3P3* I3P4* I3P5* I3P6* TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 ALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG IEC06000253-2-en.vsd
IEC06000253 V2 EN
Figure 60:
LT3CPDIF I3P1* I3P2* I3P3* TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 ALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG IEC06000254_2_en.vsd
IEC06000254 V2 EN
Figure 61:
1MRK505183-UEN C
LT6CPDIF I3P1* I3P2* I3P3* I3P4* I3P5* I3P6* TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 ALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG IEC06000255_2_en.vsd
IEC06000255 V2 EN
Figure 62:
TRIP TRL1 TRL2 TRL3 TRLOCAL TRLOCL1 TRLOCL2 TRLOCL3 TRREMOTE DIFLBLKD IEC05000394-2-en.vsd
IEC05000394 V3 EN
Figure 63:
5.1.4
1MRK505183-UEN C
Table 58:
Name TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 OPENCT ALARM OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG
1MRK505183-UEN C
Table 59:
Name I3P1 I3P2 I3P3 I3P4 I3P5 I3P6
Table 60:
Name TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 OPENCT ALARM OPENCTAL IDL1 IDL2
1MRK505183-UEN C
Instantaneous differential current, phase L3 Magnitude of fund. freq. differential current, phase L1 Magnitude of fund. freq. differential current, phase L2 Magnitude of fund. freq. differential current, phase L3 Magnitude of the bias current, common for L1, L2, L3 Magnitude of the negative sequence differential current
Table 61:
Name I3P1 I3P2 I3P3
Table 62:
Name TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2
1MRK505183-UEN C
Table 63:
Name I3P1 I3P2 I3P3 I3P4 I3P5 I3P6
Table 64:
Name TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA
1MRK505183-UEN C
Common, main, start output signal Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Common block signal, due to 2nd harmonic Block signal due to 2nd harmonic, phase L1 Block signal due to 2nd harmonic, phase L2 Block signal due to 2nd harmonic, phase L3 Common block signal, due to 5-th harmonic Block signal due to 5th harmonic, phase L1 Block signal due to 5th harmonic, phase L2 Block signal due to 5th harmonic, phase L3 An open CT was detected Alarm for sustained differential current Open CT Alarm output signal. Issued after a delay ... Instantaneous differential current, phase L1 Instantaneous differential current, phase L2 Instantaneous differential current, phase L3 Magnitude of fund. freq. differential current, phase L1 Magnitude of fund. freq. differential current, phase L2 Magnitude of fund. freq. differential current, phase L3 Magnitude of the bias current, common for L1, L2, L3 Magnitude of the negative sequence differential current
Table 65:
Name CTFAIL OUTSERV BLOCK
Table 66:
Name TRIP TRL1 TRL2
1MRK505183-UEN C
5.1.5
Table 67:
Name Operation IdMin IdMinHigh tIdMinHigh IdUnre NegSeqDiffEn NegSeqROA IMinNegSeq CrossBlockEn ChargCurEnable AddDelay IMaxAddDelay tDefTime tMinInv
Setting parameters
L3CPDIF Group settings (basic)
Values (Range) Off On 0.20 - 2.00 0.20 - 10.00 0.000 - 60.000 1.00 - 50.00 Off On 30.0 - 120.0 0.01 - 0.20 No Yes Off On Off On 0.20 - 5.00 0.000 - 6.000 0.001 - 6.000 Unit IB IB s IB Deg IB IB s s Step 0.01 0.01 0.001 0.01 1.0 0.01 0.01 0.001 0.001 Default Off 0.30 0.80 1.000 10.00 On 60.0 0.04 No Off Off 1.00 0.000 0.010 Description Operation Off / On Oper - restr charact., section 1 sensitivity, multiple IBase Initial lower sensitivity, as multiple of IBase Time interval of initial lower sensitivity, in sec Unrestrained differential current limit, multiple of IBase Off/On selection for internal / external fault discriminator Internal/external fault discriminator Operate Angle, degrees Min. value of neg. seq. curr. as multiple of IBase Off/On selection of the cross -block logic Off/On selection for compensation of charging currents Off/On selection for delayed diff. trip command Below limit, extra delay can be applied, multiple of IBase Definite time additional delay in seconds Inverse Delay Minimum Time. In seconds
1MRK505183-UEN C
k IdiffAlarm tAlarmdelay
IB s
Time Multiplier Setting (TMS) for inverse delays Sustained differential current alarm, factor of IBase Delay for alarm due to sustained differential current, in s
Table 68:
Name EndSection1 EndSection2 SlopeSection2 SlopeSection3 I2/I1Ratio I5/I1Ratio p a b c OpenCTEnable tOCTAlarmDelay tOCTResetDelay
1MRK505183-UEN C
Table 69:
Name NoOfTerminals Chan2IsLocal IBase
Table 70:
Name Operation IdMin IdMinHigh tIdMinHigh IdUnre NegSeqDiffEn NegSeqROA IMinNegSeq CrossBlockEn I2/I1Ratio I5/I1Ratio ChargCurEnable AddDelay IMaxAddDelay tDefTime tMinInv
1MRK505183-UEN C
k IdiffAlarm tAlarmdelay
IB s
Time Multiplier Setting (TMS) for inverse delays Sustained differential current alarm, factor of IBase Delay for alarm due to sustained differential current, in s
Table 71:
Name EndSection1 EndSection2 SlopeSection2 SlopeSection3 p a b c OpenCTEnable tOCTAlarmDelay tOCTResetDelay
1MRK505183-UEN C
Table 72:
Name NoOfTerminals
Chan2IsLocal IBase
0.1
No 3000.0
2-nd local current connected to input channel 2, Yes/ No Base (reference) current of the differential protection
Table 73:
Name Operation IdMin IdMinHigh tIdMinHigh IdUnre NegSeqDiffEn NegSeqROA IMinNegSeq CrossBlockEn ChargCurEnable AddDelay IMaxAddDelay tDefTime tMinInv
1MRK505183-UEN C
k IdiffAlarm tAlarmdelay
IB s
Time Multiplier Setting (TMS) for inverse delays Sustained differential current alarm, factor of IBase Delay for alarm due to sustained differential current, in s
Table 74:
Name EndSection1 EndSection2 SlopeSection2 SlopeSection3 I2/I1Ratio I5/I1Ratio p a b c OpenCTEnable tOCTAlarmDelay tOCTResetDelay
1MRK505183-UEN C
Table 75:
Name NoOfTerminals Chan2IsLocal IBase ZerSeqCurSubtr TraAOnInpCh
kV kV -
0.1 0.1 -
Transformer A rated voltage (kV) on winding 1 (HV winding) Transformer A rated voltage (kV) on winding 2 (LV winding) Transf. A phase shift in multiples of 30 deg, 5 for 150 deg
ZerSeqPassTraA TraBOnInpCh
No No Transf B
Yes/No for capability of transf A to transform zero seq curr Power transformer B applied on input channel X
kV kV -
0.1 0.1 -
Transformer B rated voltage (kV) on winding 1 (HV winding) Transformer B rated voltage (kV) on winding 2 (LV winding) Transf. B phase shift in multiples of 30 deg, 2 for 60 deg
ZerSeqPassTraB
No
1MRK505183-UEN C
Table 76:
Name Operation IdMin IdMinHigh tIdMinHigh IdUnre NegSeqDiffEn NegSeqROA IMinNegSeq CrossBlockEn I2/I1Ratio I5/I1Ratio ChargCurEnable AddDelay IMaxAddDelay tDefTime tMinInv CurveType
1MRK505183-UEN C
Table 77:
Name EndSection1 EndSection2 SlopeSection2 SlopeSection3 p a b c OpenCTEnable tOCTAlarmDelay tOCTResetDelay
Table 78:
Name NoOfTerminals
A -
0.1 -
No 3000.0 Off
2-nd local current connected to input channel 2, Yes/ No Base (reference) current of the differential protection Off/On for elimination of zero seq. from diff. and bias curr
1MRK505183-UEN C
kV kV -
0.1 0.1 -
Transformer A rated voltage (kV) on winding 1 (HV winding) Transformer A rated voltage (kV) on winding 2 (LV winding) Transf. A phase shift in multiples of 30 deg, 5 for 150 deg
ZerSeqPassTraA TraBOnInpCh
No No Transf B
Yes/No for capability of transf A to transform zero seq curr Power transformer B applied on input channel X
kV kV -
0.1 0.1 -
Transformer B rated voltage (kV) on winding 1 (HV winding) Transformer B rated voltage (kV) on winding 2 (LV winding) Transf. B phase shift in multiples of 30 deg, 2 for 60 deg
ZerSeqPassTraB
No
1MRK505183-UEN C
Table 79:
Name Operation testModeSet ReleaseLocal
5.1.6
Technical data
Table 80:
Function Minimum operate current SlopeSection2 SlopeSection3 EndSection 1 EndSection 2 Unrestrained limit function Second harmonic blocking Fifth harmonic blocking Inverse characteristics, see table 644, 645 and table 646 Operate time Reset time Critical impulse time Charging current compensation
5.2
HZPDIF
Id
SYMBOL-CC V2 EN
87
1MRK505183-UEN C
The 1Ph High impedance differential protection HZPDIF function can be used when the involved CT cores have the same turn ratio and similar magnetizing characteristic. It utilizes an external summation of the phases and neutral current and a series resistor and a voltage dependent resistor externally to the IED.
5.2.2
Principle of operation
The 1Ph High impedance differential protection (HZPDIF) function is based on one current input with external stabilizing resistors and voltage dependent resistors. Three functions can be used to provide a three phase differential protection function. The stabilizing resistor value is calculated from the IED operating value UR calculated to achieve through fault stability. The supplied stabilizing resistor has a link to allow setting of the correct resistance value. See the application manual for operating voltage and sensitivity calculation.
5.2.2.1
Logic diagram
The logic diagram shows the operation principles for the 1Ph High impedance differential protection function HZPDIF, see figure 64. It is a simple one step IED with an additional lower alarm level. By activating inputs, the HZPDIF function can either be blocked completely, or only the trip output.
IEC05000301 V1 EN
Figure 64:
1MRK505183-UEN C
5.2.3
Figure 65:
5.2.4
Table 82:
Name TRIP ALARM MEASVOLT
5.2.5
Table 83:
Name Operation U>Alarm tAlarm U>Trip SeriesResistor
Setting parameters
HZPDIF Group settings (basic)
Values (Range) Off On 2 - 500 0.000 - 60.000 5 - 900 10 - 20000 Unit V s V ohm Step 1 0.001 1 1 Default Off 10 5.000 100 250 Description Operation Off / On Alarm voltage level in volts on CT secondary side Time delay to activate alarm Operate voltage level in volts on CT secondary side Value of series resistor in Ohms
1MRK505183-UEN C
HZPDIFtechnical data
Range or value (20-400) V >95% U>Trip2/series resistor 200 W Accuracy 1.0% of Ur for U < Ur 1.0% of U for U > Ur -
1MRK505183-UEN C
Section 6
Impedance protection
6.1
S00346 V1 EN
ZMQAPDIS
21
S00346 V1 EN
ZDRDIR
21D
Z<->
IEC09000167 V1 EN
6.1.1
Introduction
The line distance protection is a, up to four zone full scheme protection with three fault loops for phase-to-phase faults and three fault loops for phase-to-earth fault for each of the independent zones. Individual settings for each zone in resistive and reactive reach gives flexibility for use as back-up protection for transformer connected to overhead lines and cables of different types and lengths. ZMQPDIS together with Phase selection with load encroachment FDPSPDIS has functionality for load encroachment, which increases the possibility to detect high resistive faults on heavily loaded lines, as shown in figure66.
1MRK505183-UEN C
X Forward operation
R Reverse operation
en05000034.vsd
IEC05000034 V1 EN
Figure 66:
Typical quadrilateral distance protection zone with Phase selection with load encroachment function FDPSPDIS activated
The independent measurement of impedance for each fault loop together with a sensitive and reliable built-in phase selection makes the function suitable in applications with single-phase autoreclosing. Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at load exporting end at phase-to-earth faults on heavily loaded power lines. The distance protection zones can operate independently of each other in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multiterminal lines, and so on.
6.1.2
6.1.2.1
Principle of operation
Full scheme measurement
The execution of the different fault loops within the IED are of full scheme type, which means that each fault loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are executed in parallel. Figure 67 presents an outline of the different measuring loops for up to five, impedance-measuring zones. There are 3 to 5 zones depending on product type and variant.
1MRK505183-UEN C
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 1
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 2
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 3
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 4
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 5
en05000458.vsd
IEC05000458 V1 EN
Figure 67:
The use of full scheme technique gives faster operation time compared to switched schemes which mostly uses a start element to select correct voltages and current depending on fault type. Each distance protection zone performs like one independent distance protection IED with six measuring elements.
6.1.2.2
Impedance characteristic
The distance measuring zone includes six impedance measuring loops; three intended for phase-to-earth faults, and three intended for phase-to-phase as well as, three-phase faults. The distance measuring zone will essentially operate according to the nondirectional impedance characteristics presented in figure 68 and figure 69. The phaseto-earth characteristic is illustrated with the full loop reach while the phase-tophase characteristic presents the per phase reach.
1MRK505183-UEN C
X (Ohm/loop)
Xn =
X1PE+Xn
X0PE-X1PE 3 R0PE-R1PE 3
Rn =
jN
RFPE RFPE
jN
R (Ohm/loop)
X1PE+Xn
RFPE R1PE+Rn
IEC08000280 V1 EN
RFPE
en08000280-2-en.vsd
Figure 68:
1MRK505183-UEN C
X RFPP
2
(Ohm/phase)
RFPP
2
R1PP
X1PP
X 0 PE - X 1RVPE XNRV = X 0 PG - 1 1RVPG X XNRV = X 0 PE - X 3RVPE = XNRV 33 X PE - - X 1FWPG XX 0 PE X 1X 1FWPE 0 0 PG - FWPE XNFW == XNFW = XNFW 3 3 3
j
R (Ohm/phase)
RFPP
2
RFPP
2
X1PP
RFPP
2
IEC07000062 V2 EN
R1PP
RFPP
2
en07000062.vsd
Figure 69:
The fault loop reach with respect to each fault type may also be presented as in figure 70. Note in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults and three-phase faults.
1MRK505183-UEN C
UL1
IL1
R1 + j X1
Phase-to-earth element
UL1
IL1
R1 + j X1
IL2 UL2 R1 + j X1
IL1
R1 + j X1
0.5RFPP
IL3 R1 + j X1 0.5RFPP
IEC08000282-2-en.vsd
IEC08000282 V2 EN
Figure 70:
The R1 and jX1 in figure 70 represents the positive sequence impedance from the measuring point to the fault location. The settings RFPE and RFPP are the eventual fault resistances in the faulty place. Regarding the illustration of three-phase fault in figure 70, there is of course fault current flowing also in the third phase during a three-phase fault. The illustration merely reflects the loop measurement, which is made phase-to-phase. The zone can be set to operate in Non-directional, Forward or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 71. The impedance reach is symmetric, in the sense that it conforms for forward and reverse direction. Therefore, all reach settings apply to both directions.
1MRK505183-UEN C
Non-directional
Forward
Reverse
en05000182.vsd
IEC05000182 V1 EN
Figure 71:
6.1.2.3
6.1.2.4
Measuring principles
Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits. The
1MRK505183-UEN C
apparent impedances at phase-to-phase faults follow equation 4 (example for a phase L1 to phase L2 fault).
UL1 UL2 ---------------------Zapp = -I L1 IL2
EQUATION1222 V1 EN
(Equation 4)
Here U and I represent the corresponding voltage and current phasors in the respective phase Ln (n = 1, 2, 3) The earth return compensation applies in a conventional manner to phase-to-earth faults (example for a phase L1 to earth fault) according to equation 5.
U L1 Z app = ----------------------------I L1 + I N KN
EQUATION1223 V1 EN
(Equation 5)
Where: UL1, IL1 and IN KN is defined as: are the phase voltage, phase current and residual current present to the IED
KN =
Z0 - Z1 3 Z1
EQUATION 2105 V1 EN
Z 0 = R0 + jX 0
EQUATION2106 V1 EN
Z1 = R1 + jX 1
EQUATION2107 V1 EN
Where R0 X0 R1 X1 is setting of the resistive zero sequence reach is setting of the reactive zero sequence reach is setting of the resistive positive sequence reach is setting of the reactive positive sequence reach
Here IN is a phasor of the residual current in IED point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X.
1MRK505183-UEN C
The formula given in equation 5 is only valid for radial feeder application without load. When load is considered in the case of single phase-to-earth fault, conventional distance protection might overreach at exporting end and underreach at importing end. The IED has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current between samples (DI) are brought from the input memory and fed to a recursive Fourier filter. The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 6,
X Di -- --U = R i + ---- -w 0 Dt
EQUATION1224 V1 EN
(Equation 6)
(Equation 7)
(Equation 8)
with
w0 = 2 p f 0
EQUATION356 V1 EN
(Equation 9)
where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency
The algorithm calculates Rmmeasured resistance from the equation for the real value of the voltage and substitutes it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:
1MRK505183-UEN C
(Equation 10)
(Equation 11)
The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors. The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the IED point.
6.1.2.5
< ArgNeg Re s
(Equation 12)
For the L1-L2 element, the equation in forward direction is according to.
- ArgDir < arg
EQUATION726 V2 EN
< ArgNeg Re s
(Equation 13)
where: ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 72. U1L1 U1L1M IL1 U1L1L2 U1L1L2M IL1L2 154 Technical reference manual is positive sequence phase voltage in phase L1 is positive sequence memorized phase voltage in phase L1 is phase current in phase L1 is voltage difference between phase L1 and L2 (L2 lagging L1) is memorized voltage difference between phase L1 and L2 (L2 lagging L1) is current difference between phase L1 and L2 (L2 lagging L1)
1MRK505183-UEN C
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively (as shown in figure 72). It should not be changed unless system studies have shown the necessity. ZDRDIR gives binary coded directional information per measuring loop on the output STDIRCND.
STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+ +STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+ +STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048
ArgNegRes
ArgDir
en05000722.vsd
IEC05000722 V1 EN
Figure 72:
Setting angles for discrimination of forward and reverse fault in Directional impedance quadrilateral function ZDRDIR
The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive sequence voltage exceeds 5% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100 ms or until the positive sequence voltage is restored. After 100ms the following occurs:
155 Technical reference manual
1MRK505183-UEN C
If the current is still above the set value of the minimum operating current (between 10 and 30% of the set IED rated current IBase), the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.
If the current decreases below the minimum operating value, the memory resets until the positive sequence voltage exceeds 10% of its rated value.
6.1.2.6
The design of the distance protection zones are presented for all measuring loops: phase-to-earth as well as phase-to-phase. Phase-to-earth related signals are designated by L1N, L2N and L3N. The phase-tophase signals are designated by L1L2, L2L3, and L3L1. Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (STCND), as presented in figure 73.
Two types of function block, ZMQPDIS and ZMQAPDIS, are used in the IED. ZMQPDIS is used for zone 1 and ZMQAPDIS for zone 2 - 5. The STCND input signal represents a connection of six different integer values from Phase selection with load encroachment, quadrilateral characteristic function FDPSPDIS within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. Input signal STCND is connected to FDPSPDIS function output STCNDZ. The input signal DIRCND is used to give condition for directionality for the distance measuring zones. The signal contains binary coded information for both forward and reverse direction. The zone measurement function filters out the relevant signals depending on the setting of the parameter OperationDir. It must be configured to the STDIR output on ZDRDIR function.
1MRK505183-UEN C
IEC99000557-TIFF V1 EN
Figure 73:
Composition of the phase start signals for a case, when the zone operates in a nondirectional mode, is presented in figure 74.
OR OR
BLK
en00000488.vsd
IEC00000488 V1 EN
Figure 74:
1MRK505183-UEN C
Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, as shown in figure 75.
STNDL1N DIRL1N STNDL2N DIRL2N STNDL3N DIRL3N STNDL1L2 DIRL1L2 STNDL2L3 DIRL2L3 STNDL3L1 DIRL3L1 AND
STZMPE
STL1
AND
OR
AND
STL2
BLK
OR
AND
15 ms t
START
en05000778.vsd
IEC05000778 V2 EN
Figure 75:
Tripping conditions for the distance protection zone one are symbolically presented in figure 76.
1MRK505183-UEN C
Timer tPP=On STZMPP Timer tPE=On STZMPE BLKTR BLK STL1 STL2 STL3 AND AND
tPP t tPE t OR OR
15ms AND
t
TRIP
en00000490-3.vsd
IEC00000490 2 V1 EN
Figure 76:
6.1.3
Function block
ZMQPDIS I3P* U3P* BLOCK VTSZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC06000256-2-en.vsd
IEC06000256 V2 EN
Figure 77:
ZMQAPDIS I3P* U3P* BLOCK VTSZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC09000884-1-en.vsd
IEC09000884 V1 EN
Figure 78:
1MRK505183-UEN C
IEC05000681-2-en.vsd
IEC05000681 V2 EN
Figure 79:
6.1.4
Table 86:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND
Table 87:
Name I3P U3P BLOCK VTSZ
1MRK505183-UEN C
Table 88:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND
Table 89:
Name I3P U3P
Table 90:
Name STDIR
6.1.5
Setting parameters
Signals and settings for ZMQPDIS are valid for zone 1 while signals and settings for ZMQAPDIS are valid for zone 2 - 5
1MRK505183-UEN C
Table 91:
Name Operation IBase UBase OperationDir
X1 R1 X0 R0 RFPP RFPE OperationPP Timer tPP tPP OperationPE Timer tPE tPE IMinOpPP IMinOpPE IMinOpIN
Positive sequence reactance reach Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle Fault resistance reach in ohm/loop, Ph-Ph Fault resistance reach in ohm/loop, Ph-E Operation mode Off / On of PhasePhase loops Operation mode Off / On of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Off / On of Phase-Earth loops Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E Minimum operate delta current for PhasePhase loops Minimum operate phase current for Phase-Earth loops Minimum operate residual current for Phase-Earth loops
Table 92:
Name Operation IBase UBase OperationDir
X1
ohm/p
0.01
40.00
1MRK505183-UEN C
Name R1 X0 R0 RFPP RFPE OperationPP Timer tPP tPP OperationPE Timer tPE tPE IMinOpPP IMinOpPE
Table 93:
Name ArgNegRes ArgDir IMinOp IBase UBase
6.1.6
Technical data
Table 94:
Function Number of zones Minimum operate residual current, zone 1 Minimum operate current, phaseto-phase and phase-to-earth Table continues on next page
1MRK505183-UEN C
2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Ur Current range: (0.5-30) x Ir Angle: at 0 degrees and 85 degrees
0.5% 10 ms -
6.2
Distance measuring zone, quadrilateral characteristic for series compensated lines ZMCPDIS, ZMCAPDIS, ZDSRDIR
Function description Distance measuring zone, quadrilateral characteristic for series compensated lines (zone 1) IEC 61850 identification ZMCPDIS IEC 60617 identification ANSI/IEEE C37.2 device number 21
S00346 V1 EN
Distance measuring zone, quadrilateral characteristic for series compensated lines (zone 2-5)
ZMCAPDIS
21
S00346 V1 EN
ZDSRDIR
21D
Z<->
IEC09000167 V1 EN
1MRK505183-UEN C
6.2.1
R Reverse operation
en05000034.vsd
IEC05000034 V1 EN
Figure 80:
Typical quadrilateral distance protection zone with load encroachment function activated
The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase auto-reclosing. Built-in adaptive load compensation algorithm for the quadrilateral function prevents overreaching of zone1 at load exporting end at phase to earth-faults on heavily loaded power lines. The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multi-terminal lines.
1MRK505183-UEN C
Principle of operation
Full scheme measurement
The execution of the different fault loops within the IED are of full scheme type, which means that earth fault loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are executed in parallel. Figure 81 presents an outline of the different measuring loops for the basic five, impedance-measuring zones.
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 2
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 3
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 4
L1-N
L2-N
L3-N
L1-L2
L2-L3
L3-L1
Zone 5
en05000458.vsd
IEC05000458 V1 EN
Figure 81:
The use of full scheme technique gives faster operation time compared to switched schemes which mostly uses a start element to select correct voltages and current depending on fault type. Each distance protection zone performs like one independent distance protection IED with six measuring elements.
6.2.2.2
Impedance characteristic
Distance measuring zone, quadrilateral characteristic for series compensated lines (ZMCPDIS) include six impedance measuring loops; three intended for phase-toearth faults, and three intended for phase-to-phase as well as, three-phase faults. The distance measuring zone operates according to the non-directional impedance characteristics presented in figure 82 and figure 83. The phase-to-earth characteristic is illustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase reach.
1MRK505183-UEN C
X (Ohm/loop)
X1FwPE+XNFw
jN
jN
RNFw =
R0 PE - R1PE 3
X1RvPE+XNRv
jN
RFRvPE
IEC09000625 V1 EN
RFFwPE
IEC09000625-1-en.vsd
Figure 82:
1MRK505183-UEN C
X RFRvPP
2
(Ohm/phase)
RFFwPP
2
R1PP
X1FwPP
X 0 PE - X 1RVPE XNRV = X 0 PG - 1 1RVPG X XNRV = X 0 PE - X 3RVPE = XNRV 33 X PE - - X 1FWPG XX 0 PE X 1X 1FWPE 0 0 PG - FWPE XNFW == XNFW = XNFW 3 3 3
j jN
RFRvPP
2
j
R (Ohm/phase)
RFFwPP
2
X1RvPP
jN
RFRvPP
2
IEC09000632 V1 EN
RFFwPP
2
IEC09000632-1-en.vsd
Figure 83:
The fault loop reach with respect to each fault type may also be presented as in figure 84. Note in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults and three-phase faults.
1MRK505183-UEN C
UL1
IL1
R1 + j X1
Phase-to-earth element
UL1
IL1
R1 + j X1
IL2 UL2 R1 + j X1
IL1
R1 + j X1
0.5RFPP
IL3 R1 + j X1 0.5RFPP
IEC08000282-2-en.vsd
IEC08000282 V2 EN
Figure 84:
The R1 and jX1 in figure 84 represents the positive sequence impedance from the measuring point to the fault location. The RFPE and RFPP is the eventual fault resistance in the fault place. Regarding the illustration of three-phase fault in figure 84, there is of course fault current flowing also in the third phase during a three-phase fault. The illustration merely reflects the loop measurement, which is made phase-to-phase. The zone may be set to operate in Non-directional, Forward or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 85. It may be convenient to once again mention that the impedance reach is symmetric, forward and reverse direction. Therefore, all reach settings apply to both directions.
1MRK505183-UEN C
Non-directional
Forward
Reverse
en05000182.vsd
IEC05000182 V1 EN
Figure 85:
6.2.2.3
6.2.2.4
Measuring principles
Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits. The
1MRK505183-UEN C
calculation of the apparent impedances at ph-ph faults follows equation 14 (example for a phase L1 to phase L2 fault).
UL1 UL2 ---------------------Zapp = -I L1 IL2
EQUATION1222 V1 EN
(Equation 14)
Here U and I represent the corresponding voltage and current phasors in the respective phase. The earth return compensation applies in a conventional manner to ph-E faults (example for a phase L1 to earth fault) according to equation 15.
U L1 Z app = ----------------------------I L1 + I N KN
EQUATION1223 V1 EN
(Equation 15)
Where: UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED KN is defined as:
KN =
Z0 - Z1 3 Z1
EQUATION 2105 V1 EN
Z 0 = R0 + jX 0
EQUATION2106 V1 EN
Z1 = R1 + jX 1
EQUATION2107 V1 EN
Where R0 X0 R1 X1 is setting of the resistive zero sequence reach is setting of the reactive zero sequence reach is setting of the resistive positive sequence reach is setting of the reactive positive sequence reach
Here IN is a phasor of the residual current at the IED point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X.
1MRK505183-UEN C
The formula given in equation 15 is only valid for no loaded radial feeder applications. When load is considered in the case of single phase-to-earth fault, conventional distance protection might overreach at exporting end and underreach at importing end. IED has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current between samples (DI) are brought from the input memory and fed to a recursive Fourier filter. The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 16,
X Di -- --U = R i + ---- -w 0 Dt
EQUATION1224 V1 EN
(Equation 16)
(Equation 17)
(Equation 18)
with
w0 = 2 p f 0
EQUATION356 V1 EN
(Equation 19)
where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value of the voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:
1MRK505183-UEN C
(Equation 20)
(Equation 21)
The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors. The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the IED point.
6.2.2.5
1MRK505183-UEN C
This memory control allows in the time domain unlimited correct directional measurement for all unsymmetrical faults also at voltage reversal. Only at three phase fault within the range of the set impedance reach of the criteria for control of the polarization voltage the memory has to be used and the measurement is limited to 100 ms and thereafter the direction is sealed-in. The special impedance measurement to control the polarization voltage is set separately and has only to cover (with some margin) the impedance to fault that can cause the voltage reversal. The evaluation of the directionality takes place in Directional impedance quadrilateral, including series compensation (ZDSRDIR) function. Equation 22 and equation 23 are used to classify that the fault is in forward direction for phase-toearth fault and phase-to-phase fault.
- ArgDir < arg
EQUATION2004 V2 EN
For the L1-L2 element, the equation in forward direction is according to:
- ArgDir < arg
EQUATION2006 V2 EN
where:
ArgDir
is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 86.
U1L1M IL1 U1L1L2M IL1L2 is positive sequence memorized phase voltage in phase L1 is phase current in phase L1 is memorized voltage difference between phase L1 and L2 (L2 lagging L1) is current difference between phase L1 and L2 (L2 lagging L1)
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively, see figure 86, and it should not be changed unless system studies have shown the necessity. ZDSRDIR generates a binary coded signal on the output STDIR depending on the evaluation where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4.
1MRK505183-UEN C
ArgNegRes
ArgDir
en05000722.vsd
IEC05000722 V1 EN
Figure 86:
The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees.
6.2.2.6
The design of distance protection zones are presented for all measuring loops: phaseto-earth as well as phase-to-phase. Phase-to-earth related signals are designated by Ln, where n represents the corresponding phase number (L1, L2, and L3). The phase-to-phase signals are designated by LnLm, where n and m represent the corresponding phase numbers (L1L2, L2L3, and L3L1). Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (STCND), as presented in figure 87.
Two types of function block, ZMCPDIS and ZMCAPDIS , are used in the IED. ZMQPDIS is used for zone 1 and ZMQAPDIS for zone 2 - 5.
1MRK505183-UEN C
The STCND input signal represents a connection of six different integer values from the phase selection function within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. It is connected to Phase selection with load enchroachment, quadrilateral characteristic (FDPSPDIS) function output STCDZ.
IEC99000557-TIFF V1 EN
Figure 87:
Composition of the phase starting signals for a case, when the zone operates in a nondirectional mode, is presented in figure 88.
1MRK505183-UEN C
IEC00000488-TIFF V1 EN
Figure 88:
Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, as shown in figure 89.
STNDL1N DIRL1N STNDL2N DIRL2N STNDL3N DIRL3N STNDL1L2 DIRL1L2 STNDL2L3 DIRL2L3 STNDL3L1 DIRL3L1 AND
STZMPE
STL1
AND
OR
AND
STL2
BLK
OR
AND
15 ms t
START
en05000778.vsd
IEC05000778 V2 EN
Figure 89:
Tripping conditions for the distance protection zone one are symbolically presented in figure 90.
1MRK505183-UEN C
Timer tPP=On STZMPP Timer tPE=On STZMPE BLKTR BLK STL1 STL2 STL3 AND AND
tPP t tPE t OR OR
15ms AND
t
TRIP
en00000490-3.vsd
IEC00000490 2 V1 EN
Figure 90:
6.2.3
Function block
ZMCPDIS I3P* U3P* BLOCK VTSZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC07000036-2-en.vsd
IEC07000036 V2 EN
Figure 91:
ZMCAPDIS I3P* U3P* BLOCK VTSZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC09000890-1-en.vsd
IEC09000890 V1 EN
Figure 92:
1MRK505183-UEN C
Figure 93:
6.2.4
Table 95:
Name I3P U3P BLOCK VTSZ BLKTR STCND DIRCND
Table 96:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND
1MRK505183-UEN C
Table 97:
Name I3P U3P BLOCK VTSZ BLKTR STCND DIRCND
Table 98:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND
Table 99:
Name I3P U3P
Table 100:
Name STFW STRV STDIRCND
1MRK505183-UEN C
6.2.5
Table 101:
Name Operation IBase UBase OperationDir
OperationPP X1FwPP R1PP RFFwPP X1RvPP RFRvPP Timer tPP tPP OperationPE X1FwPE R1PE X0PE R0PE RFFwPE X1RvPE RFRvPE Timer tPE tPE
ohm/p ohm/p ohm/l ohm/p ohm/l s ohm/p ohm/p ohm/p ohm/p ohm/l ohm/p ohm/l s
0.01 0.01 0.01 0.01 0.01 0.001 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.001
On 30.00 5.00 30.00 30.00 30.00 On 0.000 On 30.00 5.00 100.00 47.00 100.00 30.00 100.00 On 0.000
Operation mode Off / On of PhasePhase loops Positive sequence reactance reach, PhPh, forward Positive seq. resistance for characteristic angle, Ph-Ph Fault resistance reach, Ph-Ph, forward Positive sequence reactance reach, PhPh, reverse Fault resistance reach, Ph-Ph, reverse Operation mode Off / On of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Off / On of Phase-Earth loops Positive sequence reactance reach, PhE, forward Positive seq. resistance for characteristic angle, Ph-E Zero sequence reactance reach, Ph-E Zero seq. resistance for zone characteristic angle, Ph-E Fault resistance reach, Ph-E, forward Positive sequence reactance reach, PhE, reverse Fault resistance reach, Ph-E, reverse Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E
1MRK505183-UEN C
Minimum operate delta current for PhasePhase loops Minimum operate phase current for Phase-Earth loops Minimum operate residual current for Phase-Earth loops
Table 102:
Name Operation IBase UBase OperationDir
OperationPP X1FwPP R1PP RFFwPP X1RvPP RFRvPP Timer tPP tPP OperationPE X1FwPE R1PE X0PE R0PE RFFwPE X1RvPE RFRvPE Timer tPE
ohm/p ohm/p ohm/l ohm/p ohm/l s ohm/p ohm/p ohm/p ohm/p ohm/l ohm/p ohm/l -
0.01 0.01 0.01 0.01 0.01 0.001 0.01 0.01 0.01 0.01 0.01 0.01 0.01 -
On 30.00 5.00 30.00 30.00 30.00 On 0.000 On 30.00 5.00 100.00 47.00 100.00 30.00 100.00 On
Operation mode Off / On of PhasePhase loops Positive sequence reactance reach, PhPh, forward Positive seq. resistance for characteristic angle, Ph-Ph Fault resistance reach, Ph-Ph, forward Positive sequence reactance reach, PhPh, reverse Fault resistance reach, Ph-Ph, reverse Operation mode Off / On of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Off / On of Phase-Earth loops Positive sequence reactance reach, PhE, forward Positive seq. resistance for characteristic angle, Ph-E Zero sequence reactance reach, Ph-E Zero seq. resistance for zone characteristic angle, Ph-E Fault resistance reach, Ph-E, forward Positive sequence reactance reach, PhE, reverse Fault resistance reach, Ph-E, reverse Operation mode Off / On of Zone timer, Ph-E
1MRK505183-UEN C
Table 103:
Name OperationSC IBase UBase IMinOpPE IMinOpPP ArgNegRes ArgDir INReleasePE INBlockPP OperationLdCh RLdFw RLdRv ArgLd X1FwPP R1PP RFFwPP X1RvPP RFRvPP X1FwPE R1PE X0FwPE
1MRK505183-UEN C
Zero seq. resistance for zone characteristic angle, Ph-E Fault resistance reach, Ph-E, forward Positive sequence reactance reach, PhE, reverse Zero sequence reactance reach, Ph-E, reverse Fault resistance reach, Ph-E, reverse
6.2.6
Technical data
Table 104:
Function Number of zones Minimum operate residual current, zone 1 Minimum operate current, Ph-Ph and Ph-E Positive sequence reactance Positive sequence resistance Zero sequence reactance Zero sequence resistance Fault resistance, Ph-E Fault resistance, Ph-Ph Dynamic overreach Impedance zone timers Operate time Reset ratio Reset time
6.3
Z<phs
SYMBOL-DD V1 EN
1MRK505183-UEN C
6.3.1
6.3.2
Principle of operation
The basic impedance algorithm for the operation of the phase selection measuring elements is the same as for the distance zone measuring function. Phase selection with load encroachment, quadrilateral characteristic FDPSPDIS includes six impedance measuring loops; three intended for phase-to-earth faults, and three intended for phase-to-phase faults as well as for three-phase faults. The difference, compared to the distance zone measuring function, is in the combination of the measuring quantities (currents and voltages) for different types of faults. A current-based phase selection is also included. The measuring elements continuously measure three phase currents and the residual current, and compare them with the set values. The current signals are filtered by Fourier's recursive filter, and separate trip counter prevents too high overreaching of the measuring elements. The characteristic is basically non-directional, but FDPSPDIS uses information from the directional function to discriminate whether the fault is in forward or reverse direction. The start condition STCNDZ is essentially based on the following criteria: 1. 2. 3. Residual current criteria, that is, separation of faults with and without earth connection Regular quadrilateral impedance characteristic Load encroachment characteristics is always active but can be switched off by selecting a high setting.
185
1MRK505183-UEN C
The current start condition STCNDI is based on the following criteria: 1. 2. 3. Residual current criteria No quadrilateral impedance characteristic. The impedance reach outside the load area is theoretically infinite. The practical reach, however, will be determined by the minimum operating current limits. Load encroachment characteristic is always active, but can be switched off by selecting a high setting.
The STCNDI output is non-directional. The directionality is determined by the distance zones directional function. There are outputs from FDPSPDIS that indicate whether a start is in forward or reverse direction or non-directional, for example STFWL1, STRVL1 and STNDL1. These directional indications are based on the sector boundaries of the directional function and the impedance setting of FDPSPDIS function. Their operating characteristics are illustrated in figure 94.
X X X
Non-directional (ND)
Forward (FW)
Reverse (RV)
en08000286.vsd
IEC08000286 V1 EN
Figure 94:
Characteristics for non-directional, forward and reverse operation of Phase selection with load encroachment, quadrilateral characteristic FDPSPDIS
The setting of the load encroachment function may influence the total operating characteristic, (for more information, refer to section "Load encroachment"). The input DIRCND contains binary coded information about the directional coming from the directional function . It shall be connected to the STDIR output on ZDRDIR, directional measuring block. This information is also transferred to the input DIRCND on the distance measuring zones, that is, the ZMQPDIS, distance measuring block. The code built up for the directionality is as follows:
1MRK505183-UEN C
STDIR=
If the binary information is 1 then it will be considered that we have start in forward direction in phase L1. If the binary code is 3 then we have start in forward direction in phase L1 and L2, binary code 192 means start in reverse direction in phase L1 and L2A and B etc. The STCNDZ or STCNDI output contains, in a similar way as DIRCND, binary coded information, in this case information about the condition for opening correct fault loop in the distance measuring element. It shall be connected to the STCND input on the ZMQPDIS, distance measuring block. The code built up for release of the measuring fault loops is as follows: STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32
6.3.2.1
Phase-to-earth fault
For a phase-to-earth fault, the measured impedance by FDPSPDIS will be according to equation 24. Index PHS in images and equations reference settings for Phase selection with load encroachment function FDPSPDIS.
ZPHSn =
ULn ILn
(Equation 24)
EQUATION1255 V1 EN
The characteristic for FDPSPDIS function at phase-to-earth fault is according to figure 95. The characteristic has a fixed angle for the resistive boundary in the first quadrant of 60. The resistance RN and reactance XN are the impedance in the earth-return path defined according to equation 25 and equation 26.
RN = R0 - R1 3
(Equation 25)
EQUATION1256 V1 EN
1MRK505183-UEN C
XN =
X 0 - X1 3
(Equation 26)
EQUATION1257 V1 EN
60 deg
RFRvPE Kr(X1+XN)
RFFwPE
en06000396.vsd
IEC06000396 V2 EN
Figure 95:
Characteristic of FDPSPDIS for phase-to-earth fault (setting parameters in italic), ohm/loop domain (directional lines are drawn as "line-dot-dot-line")
Besides this, the 3I0 residual current must fulfil the conditions according to equation 27 and equation 28.
3 I0 0.5 IMinOpPE
EQUATION2108 V1 EN
(Equation 27)
(Equation 28)
where:
IMinOpPE
INReleasePE is the setting for the minimum residual current needed to enable operation in the phaseto-earth fault loops (in %).
Iphmax is the maximum phase current in any of three phases.
1MRK505183-UEN C
6.3.2.2
EQUATION1258 V1 EN
ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase current in the lagging phase n. The operation characteristic is shown in figure 96.
X (W / 0.5RFRvPP KrX1
phase)
0.5RFFwPP
0.5RFFwPP 60 deg
X1
60 deg
R (W / 0.5RFRvPP X1
Kr =
phase)
1 tan(60 deg)
KrX1 0.5RFRvPP
IEC09000047 V2 EN
0.5RFFwPP
IEC09000047-2-en.vsd
Figure 96:
The operation characteristics for FDPSPDIS at phase-to-phase fault (setting parameters in italic, directional lines drawn as "line-dotdot-line"), ohm/phase domain
In the same way as the condition for phase-to-earth fault, there are current conditions that have to be fulfilled in order to release the phase-to-phase loop. Those are according to equation 30 or equation 31.
3I 0 < IMinOpPE
EQUATION2109 V1 EN
(Equation 30)
1MRK505183-UEN C
3I 0 <
EQUATION2110 V1 EN
(Equation 31)
where:
IMinOpPE
6.3.2.3
Three-phase faults
The operation conditions for three-phase faults are the same as for phase-to-phase fault, that is equation 29, equation 30 and equation 31 are used to release the operation of the function. However, the reach is expanded by a factor 2/3 (approximately 1.1547) in all directions. At the same time the characteristic is rotated 30 degrees, counterclockwise. The characteristic is shown in figure 97.
X (O/phase) 4 X1 3 90 deg 0.5RFFwPPK3 X1K3 4 RFFwPP 6
IEC05000671-3-en.vsd
IEC05000671 V3 EN
Figure 97:
1MRK505183-UEN C
6.3.2.4
ArgLd
RLdRv
ArgLd
IEC09000042-1-en.vsd
IEC09000042 V1 EN
Figure 98:
The influence of load encroachment function on the operation characteristic is dependent on the chosen operation mode of FDPSPDIS function. When output signal STCNDZ is selected, the characteristic for FDPSPDIS (and also zone measurement depending on settings) will be reduced by the load encroachment characteristic (see figure 99, left illustration). When output signal STCNDI is selected, the operation characteristic will be as the right illustration in figure 99. The reach will in this case be limit by the minimum operation current and the distance measuring zones.
1MRK505183-UEN C
STCNDZ
STCNDI
en05000197.vsd
IEC05000197 V1 EN
Figure 99:
Difference in operating characteristic depending on operation mode when load encroachment is activated
When FDPSPDIS is set to operate together with a distance measuring zone the resultant operate characteristic could look like in figure 100. The figure shows a distance measuring zone operating in forward direction. Thus, the operating area is highlighted in black.
X "Phase selection" "quadrilateral" zone Distance measuring zone
en05000673.vsd
IEC05000673 V1 EN
Figure 100:
1MRK505183-UEN C
Figure 100 is valid for phase-to-earth. During a three-phase fault, or load, when the quadrilateral phase-to-phase characteristic is subject to enlargement and rotation the operate area is transformed according to figure 101. Notice in particular what happens with the resistive blinders of the "phase selection" "quadrilateral" zone. Due to the 30-degree rotation, the angle of the blinder in quadrant one is now 90 degrees instead of the original 60 degrees. The blinder that is nominally located to quadrant four will at the same time tilt outwards and increase the resistive reach around the R-axis. Consequently, it will be more or less necessary to use the load encroachment characteristic in order to secure a margin to the load impedance.
X (W / Phase selection Quadrilateral zone
phase)
R (W /
phase)
IEC09000049-1-en.vsd
IEC09000049 V1 EN
Figure 101:
Operating characteristic for FDPSPDIS in forward direction for threephase fault, ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is presented in fig 102. Since the load characteristic is based on the same measurement as the quadrilateral characteristic, it will rotate with the quadrilateral characteristic clockwise by 30 degrees when subject to a pure phase-to-phase fault. At the same time the characteristic will "shrink" by 2/3, from the full RLdFw and RLdRv reach, which is valid at load or three-phase fault.
1MRK505183-UEN C
IEC08000437.vsd
IEC08000437 V1 EN
Figure 102:
There is a gain in selectivity by using the same measurement as for the quadrilateral characteristic since not all phase-to-phase loops will be fully affected by a fault between two phases. It should also provide better fault resistive coverage in quadrant one. The relative loss of fault resistive coverage in quadrant four should not be a problem even for applications on series compensated lines.
6.3.2.5
6.3.2.6
1MRK505183-UEN C
logic circuits, when only a phase-to-earth or phase-to-phase measurement is available within the IED.
Load encroachment block
&
3I 0 < IMinOpPE
INBlockPP 3I 0 < Iph max 100
OR
&
IEC08000439_1_en.vsd
IEC08000439 1 EN V1 EN
Figure 103:
A special attention is paid to correct phase selection at evolving faults. A STCNDI output signal is created as a combination of the load encroachment characteristic and current criteria, refer to figure 103. This signal can be configured to STCND functional input signals of the distance protection zone and this way influence the operation of the phase-to-phase and phase-to-earth zone measuring elements and their phase related starting and tripping signals. Figure 104 presents schematically the composition of non-directional phase selective signals STNDLn. Internal signals ZMLnN and ZMLmLn (m and n change between one and three according to the phase number) represent the fulfilled operating criteria for each separate loop measuring element, that is, within the characteristic.
1MRK505183-UEN C
OR IRELPE ZML1N ZML2N ZML3N ZML1L2 ZML2L3 ZML3L1 IRELPP AND OR AND AND OR
15 ms t 15 ms t 15 ms t
STNDL1
STNDL2
STNDL3
15 ms t
STNDPP
IEC00000545_2_en.vsd
IEC00000545-TIFF V2 EN
Figure 104:
Composition of the directional (forward and reverse) phase selective signals is presented schematically in figure 106 and figure 105. The directional criteria appears as a condition for the correct phase selection in order to secure a high phase selectivity for simultaneous and evolving faults on lines within the complex network configurations. Internal signals DFWLn and DFWLnLm present the corresponding directional signals for measuring loops with phases Ln and Lm. Designation FW (figure 106) represents the forward direction as well as the designation RV (figure 105) represents the reverse direction. All directional signals are derived within the corresponding digital signal processor. Figure 105 presents additionally a composition of a STCNDZ output signal, which is created on the basis of impedance measuring conditions. This signal can be configured to STCND functional input signals of the distance protection zone and this way influence the operation of the phase-to-phase and phase-to-earth zone measuring elements and their phase related starting and tripping signals.
1MRK505183-UEN C
INDL1N DRVL1N INDL1L2 DRVL1L2 INDL3L1 DRVL3L1 INDL2N DRVL2N INDL1L2 AND INDL2L3 DRVL2L3 INDL3N DRVL3N INDL2L3 AND INDL3L1 AND OR OR AND AND OR AND 15 ms t INDL1N INDL2N INDL3N INDL1L2 INDL2L3 INDL3L1 15 ms
t
AND 15 ms t STRVL1
AND
OR
AND OR
15 ms t
STRVPE
STRVL2
Bool to integer
STCNDZ
STRVL3
15 ms
t
STRVPP
IEC00000546_2_en.vsd
IEC00000546-TIFF V2 EN
Figure 105:
1MRK505183-UEN C
AND INDL1N DFWL1N INDL1L2 DFWL1L2 INDL3L1 DFWL3L1 INDL2N DFWL2N INDL1L2 AND INDL2L3 DFWL2L3 INDL3N DFWL3N INDL2L3 AND INDL3L1 AND 15 ms t STFWPP OR AND 15 ms t STFW3PH AND AND 15 ms t STFWL3 AND OR AND OR 15 ms t 15 ms t STFW2PH AND AND 15 ms t STFWL2 AND OR AND OR AND 15 ms t STFWPE AND AND OR 15 ms t 15 ms t 15 ms t STFW1PH STFWL1
OR
IEC05000201_2_en.vsd
IEC05000201 V2 EN
Figure 106:
Figure 107 presents the composition of output signals TRIP and START, where internal signals STNDPP, STFWPP and STRVPP are the equivalent to internal signals STNDPE, STFWPE and STRVPE, but for the phase-to-phase loops.
1MRK505183-UEN C
tPP t tPE t
IEC08000441_2_en.vsd
IEC08000441 1 V2 EN
Figure 107:
6.3.3
Function block
FDPSPDIS I3P* U3P* BLOCK DIRCND TRIP START STFWL1 STFWL2 STFWL3 STFWPE STRVL1 STRVL2 STRVL3 STRVPE STNDL1 STNDL2 STNDL3 STNDPE STFW1PH STFW2PH STFW3PH STPE STPP STCNDZ STCNDI IEC06000258-2-en.vsd
IEC06000258 V2 EN
Figure 108:
1MRK505183-UEN C
Table 106:
Name TRIP START STFWL1 STFWL2 STFWL3 STFWPE STRVL1 STRVL2 STRVL3 STRVPE STNDL1 STNDL2 STNDL3 STNDPE STFW1PH STFW2PH STFW3PH STPE STPP STCNDZ STCNDI
1MRK505183-UEN C
6.3.5
Table 107:
Name IBase UBase INBlockPP INReleasePE RLdFw RLdRv ArgLd X1 X0 RFFwPP RFRvPP RFFwPE RFRvPE IMinOpPP IMinOpPE
Table 108:
Name TimerPP tPP TimerPE tPE
1MRK505183-UEN C
6.4
S00346 V1 EN
6.4.1
Introduction
The numerical mho line distance protection is a, up to four zone full scheme protection for back-up detection of short circuit and earth faults. The full scheme technique provides back-up protection of power lines with high sensitivity and low requirement on remote end communication. The four zones have fully independent measuring and settings, which gives high flexibility for all types of lines. The IED can be used up to the highest voltage levels. It is suitable for the protection of heavily loaded lines and multi-terminal lines where the requirement for tripping is one-, two- and/or three-pole.
1MRK505183-UEN C
The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase autoreclosing. Built-in adaptive load compensation algorithm prevents overreaching at phase-toearth faults on heavily loaded power lines, see figure 109.
jX
Operation area
Operation area
Operation area
No operation area
No operation area
en07000117.vsd
IEC07000117 V1 EN
Figure 109:
The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode (offset). This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multiterminal lines and so on. The possibility to use the phase-to-earth quadrilateral impedance characteristic together with the mho characteristic increases the possibility to overcome eventual lack of sensitivity of the mho element due to the shaping of the curve at remote end faults. The integrated control and monitoring functions offer effective solutions for operating and monitoring all types of transmission and sub-transmission lines.
6.4.2
6.4.2.1
Principle of operation
Full scheme measurement
The execution of the different fault loops within the IED are of full scheme type, which means that each fault loop for phase-to-earth faults and phase-to-phase faults are executed in parallel. The use of full scheme technique gives faster operation time compared to switched schemes which mostly uses a start element to select correct voltages and current
1MRK505183-UEN C
depending on fault type. So each distance protection zone performs like one independent distance protection function with six measuring elements.
6.4.2.2
Impedance characteristic
The distance function consists of five instances. Each instance can be selected to be either forward or reverse with positive sequence polarized mho characteristic alternatively self polarized offset mho characteristics with reverse offset. The operating characteristic is in accordance to figure 110 where zone 5 is selected offset mho.
jx X Mho, zone4 Mho, zone3 Zs=0 Mho, zone2 Mho, zone1 R
Zs=Z1 Zs=2Z1
IEC09000143-1-en.vsd
IEC09000143 V1 EN
Figure 110:
Mho, offset mho characteristic and the source impedance influence on the mho characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing the origin as for the mho to the left of figure 110, which is only valid where the source impedance is zero, the crossing point is moved to the coordinates of the negative source impedance given an expansion of the circle shown to the right of figure 110. The polarization quantities used for the mho circle are 100% memorized positive sequence voltages. This will give a somewhat less dynamic expansion of the mho circle during faults. However, if the source impedance is high, the dynamic expansion of the mho circle might lower the security of the function too much with high loading and mild power swing conditions. The mho distance element has a load encroachment function which cuts off a section of the characteristic when enabled. The function is enabled by setting the setting parameter LoadEnchMode to On. Enabling of the load encroachment
204 Technical reference manual
1MRK505183-UEN C
function increases the possibility to detect high resistive faults without interfering with the load impedance. The algorithm for the load encroachment is located in the Faulty phase identification with load encroachment for mho function FMPSPDIS, where also the relevant settings can be found. Information about the load encroachment from FMPSPDIS to the zone measurement is given in binary format to the input signal LDCND.
6.4.2.3
Z0-Z1 3 Z1
(Equation 32)
1MRK505183-UEN C
KNAng = arg
EQUATION1580 V1 EN
Z 0 - Z1 3 Z1
)
(Equation 33)
where Z0 Z1 is the complex zero sequence impedance of the line in /phase is the complex positive sequence impedance of the line in /phase
The phase-to-earth and phase-to-phase measuring loops can be time delayed individually by setting the parameter tPE and tPP respectively. To release the time delay, the operation mode for the timers, OpModetPE and OpModetPP, has to be set to On. This is also the case for instantaneous operation. The function can be blocked in the following ways: activating of input BLOCK blocks the whole function activating of the input BLKZ (fuse failure) blocks all output signals activating of the input BLKZMTD blocks the delta based algorithm activating of the input BLKHSIR blocks the instantaneous part of the algorithm for high SIR values activating of the input BLKTRIP blocks all output signals activating the input BLKPE blocks the phase-to-earth fault loop outputs activating the input BLKPP blocks the phase-to-phase fault loop outputs
The activation of input signal BLKZ can be made by external fuse failure function or from the loss of voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ in the Mho supervision logic shall be connected to the input BLKZ in the Mho distance function block (ZMHPDIS) The input signal BLKZMTD is activated during some ms after fault has been detected by ZSMGAPC to avoid unwanted operations due to transients. It shall be connected to the BLKZMTD output signal of ZSMGAPC function. At SIR values >10, the use of electronic CVT might cause overreach due to the builtin resonance circuit in the CVT, which reduce the secondary voltage for a while. The input BLKHSIR shall be connected to the output signal HSIR on ZSMGAPC for increasing of the filtering and high SIR values. This is valid only when permissive underreach scheme is selected by setting ReachMode=Underreach.
6.4.2.4
Theory of operation
The mho algorithm is based on phase comparison of a operating phasor and a polarizing phasor. When the operating phasor leads the reference phasor by more than 90 degrees, the function will operate and give a trip output.
1MRK505183-UEN C
(Equation 34)
where
U L1L2
EQUATION1790 V2 EN
I L1L2
EQUATION1791 V2 EN
is the current vector difference between phases L1 and L2 is the positive sequence impedance setting for phase-to-phase fault is the polarizing voltage
ZPP Upol
The polarized voltage consists of 100% memorized positive sequence voltage (UL1L2 for phase L1 to L2 fault). The memorized voltage will prevent collapse of the mho circle for close in faults. Operation occurs if 90270
1MRK505183-UEN C
IL1L2X
Upol UL1L2
IL1L2R
en07000109.vsd
IEC07000109 V1 EN
Figure 111:
Simplified mho characteristic and vector diagram for phase L1-toL2 fault
Offset Mho The characteristic for offset mho is a circle where two points on the circle are the setting parameters ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle AngZPP and the angle for ZRevPP is AngZPP+180. The condition for operation at phase-to-phase fault is that the angle between the two compensated voltages Ucomp1 and Ucomp2 is greater than or equal to 90 (figure 112). The angle will be 90 for fault location on the boundary of the circle. The angle for L1-to-L2 fault can be defined according to equation 35.
b = arg
EQUATION1792 V1 EN
U-(-IL1L2 ZRevPP)
U -IL1L2 ZPP
(Equation 35)
where
U
EQUATION1800 V1 EN
ZRevPP
is the positive sequence impedance setting for phase-to-phase fault in reverse direction
1MRK505183-UEN C
IL1L2jX
- IL1L2 Z RevPP
en07000110.vsd
IEC07000110 V1 EN
Figure 112:
Simplified offset mho characteristic and voltage vectors for phase L1-to-L2 fault.
Operation occurs if 90270. Offset mho, forward direction When forward direction has been selected for the offset mho, an extra criteria beside the one for offset mho (90<<270) is introduced, that is the angle between the voltage and the current must lie between the blinders in second quadrant and fourth quadrant. See figure 113. Operation occurs if 90270 and ArgDirArgNegRes.
where
ArgDir ArgNegRes
is the setting parameter for directional line in fourth quadrant in the directional element, ZDMRDIR. is the setting parameter for directional line in second quadrant in the directional element, ZDMRDIR. is calculated according to equation 35
The directional information is brought to the mho distance measurement from the mho directional element as binary coded information to the input DIRCND. See Directional impedance element for mho characteristic (ZDMRDIR) for information about the mho directional element.
1MRK505183-UEN C
IL1L2jX
ZPP
UL1L2
ArgNegRes
IL1L2
ArgDir
en07000111.vsd
IEC07000111 V1 EN
Figure 113:
Simplified offset mho characteristic in forward direction for phase L1-to-L2 fault
Offset mho, reverse direction The operation area for offset mho in reverse direction is according to figure 114. The operation area in second quadrant is ArgNegRes+180. Operation occurs if 90270 and 180 - ArgDir ArgNegRes + 180 The is derived according to equation 35 for the mho circle and is the angle between the voltage and current.
1MRK505183-UEN C
X ZPP
ArgNegRes
IL1L2
ArgDir
UL1L2
ZRevPP
en06000469.eps
IEC06000469 V1 EN
Figure 114:
Phase-to-earth fault
Mho The measuring of earth faults uses earth-return compensation applied in a conventional way. The compensation voltage is derived by considering the influence from the earth-return path. For an earth fault in phase L1, the compensation voltage Ucomp can be derived, as shown in figure 115.
(Equation 36)
where Upol Zloop is the polarizing voltage (memorized UL1 for Phase L1-to- earth fault) is the loop impedance, which in general terms can be expressed as
Z1+ZN = Z 1 1 + KN
EQUATION1799 V1 EN
)
(Equation 37)
1MRK505183-UEN C
where Z1 KN is the positive sequence impedance of the line (Ohm/phase) is the zero-sequence compensator factor
The angle between the Ucomp and the polarize voltage Upol for a L1-to-earth fault is
b = arg [UL1 -(IL1 +3I0 KN ) ZPE ] - arg( Upol)
GUID-A9492CDF-D3B7-4DC5-8E06-6638BEE2540B V1 EN
(Equation 38)
where UL1 IL1 IA 3I0 is the phase voltage in faulty phase L1 is the phase current in faulty phase L1 is the phase current in faulty phase A is the zero-sequence current in faulty phase L1
KN
EQUATION1593 V1 EN
Z0-Z1 3 Z1
EQUATION1594 V1 EN
the setting parameter for the zero sequence compensation consisting of the magnitude KN and the angle KNAng. Upol Vpol is the 100% of positive sequence memorized voltage UL1 is the 100% of positive sequence memorized voltage VA
IL1X IL1ZN
Ucomp
IL1 Zloop
IL1ZPE Upol f IL1 (Ref)
IL1R
en06000472_2.vsd
IEC06000472 V2 EN
Figure 115:
Simplified offset mho characteristic and vector diagram for phase L1-to-earth fault
1MRK505183-UEN C
Operation occurs if 90270. Offset mho The characteristic for offset mho at earth fault is a circle containing the two vectors from the origin ZPE and ZRevPE where ZPE and ZrevPE are the setting reach for the positive sequence impedance in forward respective reverse direction. The vector ZPE in the impedance plane has the settable angle AngZPE and the angle for ZRevPP is AngZPE+180. The condition for operation at phase-to-earth fault is that the angle between the two compensated voltages Ucomp1 and Ucomp2 is greater or equal to 90 see figure 116. The angle will be 90 for fault location on the boundary of the circle. The angle for L1-to-earth fault can be defined as
b = arg
EQUATION1802 V1 EN
where
U L1
EQUATION1 805 V1 EN
IL1L 2 jX
IL1 ZPE
UL1
- I L1 Z Re vPe
en 06000465 .vsd
IEC06000465 V1 EN
Figure 116:
Simplified offset mho characteristic and voltage vector for phase L1to-L2 fault
1MRK505183-UEN C
Operation occurs if 90270. Offset mho, forward direction In the same way as for phase-to-phase fault, selection of forward direction of offset mho will introduce an extra criterion for operation. Beside the basic criteria for offset mho according to equation 41 and 90270, also the criteria that the angle between the voltage and the current must lie between the blinders in second and fourth quadrant. See figure 117. Operation occurs if 90270 and ArgDirArgNegRes.
where
ArgDir ArgNegRes
is the setting parameter for directional line in fourth quadrant in the directional element, ZDMRDIR. is the setting parameter for directional line in second quadrant in the directional element, ZDMRDIR. is calculated according to equation 41
IL1 jX
UL1
ArgNegRes
IL1
ArgDir
IL1R
en 06000466 .vsd
IEC06000466 V1 EN
Figure 117:
Simplified characteristic for offset mho in forward direction for L1-toearth fault
Offset mho, reverse direction In the same way as for offset in forward direction, the selection of offset mho in reverse direction will introduce an extra criterion for operation compare to the normal offset mho. The extra is that the angle between the fault voltage and the fault current shall lie between the blinders in second and fourth quadrant. The operation area in second quadrant is limited by the blinder defined as 180 -ArgDir and in fourth quadrant ArgNegRes+180, see figure 118.
1MRK505183-UEN C
The conditions for operation of offset mho in reverse direction for L1-to-earth fault is 90270 and 180-ArgdirArgNegRes+180. The is derived according to equation 41 for the offset mho circle and is the angle between the voltage and current.
X ZPE
en06000470.eps
IEC06000470 V1 EN
Figure 118:
Simplified characteristic for offset mho in reverse direction for L1-toearth fault
1MRK505183-UEN C
IEC06000423_2_en.vsd
IEC06000423 V2 EN
Figure 119:
6.4.4
1MRK505183-UEN C
Table 111:
Name TRIP TRL1 TRL2 TRL3 TRPE TRPP START STL1 STL2 STL3 STPE STPP
6.4.5
Table 112:
Name Operation IBase UBase DirMode
Setting parameters
ZMHPDIS Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 Off Offset Forward Reverse Off On Overreach Underreach Off On 0.005 - 3000.000 10 - 90 0.00 - 3.00 -180 - 180 0.005 - 3000.000 0.000 - 60.000 Unit A kV Step 1 0.05 Default On 3000 400.00 Forward Description Operation Off/On Base current Base voltage Direction mode
Load enchroachment mode Off/On Reach mode Over/Underreach Operation mode Off / On of Phase-Earth loops Positive sequence impedance setting for Phase-Earth loop Angle for positive sequence line impedance for Phase-Earth loop Magnitud of earth return compensation factor KN Angle for earth return compensation factor KN Reverse reach of the phase to earth loop(magnitude) Delay time for operation of phase to earth elements
1MRK505183-UEN C
Minimum operation phase to earth current Operation mode Off / On of PhasePhase loops Impedance setting reach for phase to phase elements Angle for positive sequence line impedance for Phase-Phase elements Reverse reach of the phase to phase loop(magnitude) Delay time for operation of phase to phase Minimum operation phase to phase current
Table 113:
Name OffsetMhoDir
OpModetPE OpModetPP
On On
Operation mode Off / On of Zone timer, Ph-E Operation mode Off / On of Zone timer, Ph-ph
6.4.6
Technical data
Table 114:
Function Number of zones with selectable directions Minimum operate current Positive sequence impedance, phase-to-earth loop Positive sequence impedance angle, phase-to-earth loop Reverse reach, phase-to-earth loop (Magnitude) Magnitude of earth return compensation factor KN Angle for earth compensation factor KN Dynamic overreach Timers Table continues on next page
1MRK505183-UEN C
6.5
S00346 V1 EN
ZMMAPDIS
21
S00346 V1 EN
6.5.1
Introduction
The line distance protection is a zone protection with three fault loops for phase-toearth fault for each of the independent zones. Individual settings for each zone resistive and reactive reach give flexibility for use on overhead lines and cables of different types and lengths. The Full-scheme distance protection, quadrilateral for earth faults functions ZMMDPIS and ZMMAPDIS have functionality for load encroachment, which increases the possibility to detect high resistive faults on heavily loaded lines , see figure 66.
1MRK505183-UEN C
X Forward operation
R Reverse operation
en05000034.vsd
IEC05000034 V1 EN
Figure 120:
Typical quadrilateral distance protection zone with Phase selection, quadrilateral characteristic with settable angle function FRPSPDIS activated
The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase auto-reclosing. Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting end at phase to earth faults on heavily loaded power lines. The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multi-terminal lines.
6.5.2
6.5.2.1
Principle of operation
Full scheme measurement
The different fault loops within the IED are operating in parallel in the same principle as a full scheme measurement. Figure 121 presents an outline of the different measuring loops for the basic five, impedance-measuring zones l.
1MRK505183-UEN C
L1-N
L2-N
L3-N
Zone 1
L1-N
L2-N
L3-N
Zone 2
L1-N
L2-N
L3-N
Zone 3
L1-N
L2-N
L3-N
Zone 4
L1-N
L2-N
L3-N
Zone 5
en07000080.vsd
IEC07000080 V1 EN
Figure 121:
6.5.2.2
Impedance characteristic
The distance measuring zone include three impedance measuring loops; one fault loop for each phase. The distance measuring zone will essentially operate according to the nondirectional impedance characteristics presented in figure 122. The characteristic is illustrated with the full loop reach.
1MRK505183-UEN C
X (Ohm/loop)
Xn =
X1PE+Xn
X0PE-X1PE 3 R0PE-R1PE 3
Rn =
jN
RFPE RFPE
jN
R (Ohm/loop)
X1PE+Xn
RFPE R1PE+Rn
IEC08000280 V1 EN
RFPE
en08000280-2-en.vsd
Figure 122:
IEC06000412 V1 EN
Figure 123:
1MRK505183-UEN C
The R1 and jX1 in figure 123 represents the positive sequence impedance from the measuring point to the fault location. The RFPE is presented in order to convey the fault resistance reach. The zone may be set to operate in Non-directional, Forward, Off or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 124. It may be convenient to once again mention that the impedance reach is symmetric, in the sense that it is conform for forward and reverse direction. Therefore, all reach settings apply to both directions.
X X X
Non-directional
Forward
Reverse
en05000182.vsd
IEC05000182 V1 EN
Figure 124:
6.5.2.3
1MRK505183-UEN C
Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits. Here U and I represent the corresponding voltage and current phasors in the respective phase Ln (n = 1, 2, 3). The calculation of the apparant impedances at phase-to-earth fault follow equation 42 The earth return compensation applies in a conventional manner.
U L1 Z app = ----------------------------I L1 + I N KN
EQUATION1223 V1 EN
(Equation 42)
Where: UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED KN is defined as:
KN =
Z0 - Z1 3 Z1
EQUATION 2105 V1 EN
Z 0 = R0 + jX 0
EQUATION2106 V1 EN
Z1 = R1 + jX 1
EQUATION2107 V1 EN
Where R0 X0 R1 X1 is setting of the resistive zero sequence reach is setting of the reactive zero sequence reach is setting of the resistive positive sequence reach is setting of the reactive positive sequence reach
Here IN is a phasor of the residual current in IED point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X. The formula given in equation 42 is only valid for no loaded radial feeder applications. When load is considered in the case of single line-to-earth fault,
1MRK505183-UEN C
conventional distance protection might overreach at exporting end and underreach at importing end. IED has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current between samples (DI) are brought from the input memory and fed to a recursive Fourier filter. The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 43,
X Di -- --U = R i + ---- -w 0 Dt
EQUATION1224 V1 EN
(Equation 43)
(Equation 44)
(Equation 45)
with
w0 = 2 p f 0
EQUATION356 V1 EN
(Equation 46)
where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value of the voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:
Im ( U ) DRe ( I ) Re ( U ) D Im ( I ) ----------------------------------R m = -----------------------------------------------DRe ( I ) Im ( I ) D Im ( I ) Re ( I )
EQUATION357 V1 EN
(Equation 47)
1MRK505183-UEN C
(Equation 48)
The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors. The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the IED point.
6.5.2.5
Directional lines
The evaluation of the directionality takes place in the Directional impedance element for mho characteristic ZDMRDIR function. Equation 49 is used to classify that the fault is in forward direction for line-to-earth fault.
< ArgNeg Re s
(Equation 49)
where:
ArgDir
is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 125.
U1L1 U1L1M IL1 is positive sequence phase voltage in phase L1 is positive sequence memorized phase voltage in phase L1 is phase current in phase L1
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively (see figure 125) and it should not be changed unless system studies have shown the necessity. ZDMRDIR gives a binary coded signal on the output STDIRCND depending on the evaluation where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.
1MRK505183-UEN C
ArgNegRes
ArgDir
en05000722.vsd
IEC05000722 V1 EN
Figure 125:
The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100 ms or until the positive sequence voltage is restored. After 100 ms, the following occurs: If the current is still above the set value of the minimum operating current (between 10 and 30% of the set IED rated current IBase), the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.
If the current decreases below the minimum operating value, the memory resets until the positive sequence voltage exceeds 10% of its rated value.
1MRK505183-UEN C
The design of distance protection zone 1 is presented for all measuring: phase-toearth loops. Phase-to-earth related signals are designated by LnE, where n represents the corresponding phase number (L1E, L2E, and L3E). Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (STCND), as presented in figure 126.
The STCND input signal represents a connection of six different integer values from the phase selection function within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. It is connected to the Phase selection with load enchroachment, quadrilateral characteristic (FDPSPDIS) function output STCNDZ. The input signal DIRCND is used to give condition for directionality for the distance measuring zones. The signal contains binary coded information for both forward and reverse direction. The zone measurement function filter out the relevant signals on the DIRCND input depending on the setting of the parameter OperationDir. It shall be configured to the DIRCND output on the Directional impedance element for mho characteristic (ZDMRDIR) function.
1MRK505183-UEN C
Figure 126:
Composition of the phase starting signals for a case, when the zone operates in a nondirectional mode, is presented in figure 127.
STNDL1N AND STNDL2N AND STNDL3N AND AND 15 ms t 15 ms t 15 ms t 15 ms t
OR BLK
en06000409.vsd
IEC06000409 V1 EN
Figure 127:
Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, see figure 128.
1MRK505183-UEN C
AND
&
15 ms t
STL2
& BLK OR
15 ms t
STL3
&
15 ms t
START
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IEC07000081 V1 EN
Figure 128:
Tripping conditions for the distance protection zone one are symbolically presented in figure 129.
TRIP
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IEC07000082 V1 EN
Figure 129:
1MRK505183-UEN C
6.5.3
Figure 130:
ZMMAPDIS I3P* U3P* BLOCK BLKZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC09000947-1-en.vsd
IEC09000947 V1 EN
Figure 131:
6.5.4
Table 116:
Name TRIP TRL1 TRL2 TRL3
1MRK505183-UEN C
General Start, issued from any phase or loop Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Non-directional start, issued from any phase or loop
Table 117:
Name I3P U3P BLOCK BLKZ BLKTR STCND DIRCND
Table 118:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND
6.5.5
Table 119:
Name Operation IBase UBase
Setting parameters
ZMMPDIS Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 Unit A kV Step 1 0.05 Default On 3000 400.00 Description Operation Off / On Base current, i.e. rated current Base voltage, i.e. rated voltage
1MRK505183-UEN C
Name OperationDir
Positive sequence reactance reach Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle Fault resistance reach in ohm/loop, Ph-E Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E Minimum operate phase current for Phase-Earth loops Minimum operate residual current for Phase-Earth loops
Table 120:
Name Operation IBase UBase OperationDir
Positive sequence reactance reach Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle Fault resistance reach in ohm/loop, Ph-E Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E Minimum operate phase current for Phase-Earth loops
1MRK505183-UEN C
6.6
Directional impedance element for mho characteristic and additional distance protection directional function for earth faults ZDMRDIR, ZDARDIR
Function description Directional impedance element for mho characteristic IEC 61850 identification ZDMRDIR IEC 60617 identification ANSI/IEEE C37.2 device number 21D
S00346 V1 EN
Function description Additional distance protection directional function for earth faults
S00346 V1 EN
1MRK505183-UEN C
6.6.1
6.6.2
6.6.2.1
Principle of operation
Directional impedance element for mho characteristic ZDMRDIR
The evaluation of the directionality takes place in Directional impedance element for mho characteristic (ZDMRDIR). Equation 50 and equation 51 are used to classify that the fault is in the forward direction for phase-to-earth fault and phaseto-phase fault respectively.
< ArgNeg Re s
(Equation 50)
< ArgNeg Re s
(Equation 51)
Where: ArgDir ArgNegRes U1L1 U1L1M IL1 U1L1L2 U1L1L2M IL1L2 Setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) Setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 132 for mho characteristics. Positive sequence phase voltage in phase L1 Positive sequence memorized phase voltage in phase L1 Phase current in phase L1 Voltage difference between phase L1 and L2 (L2 lagging L1) Memorized voltage difference between phase L1 and L2 (L2 lagging L1) Current difference between phase L1 and L2 (L2 lagging L1)
The default settings for ArgDir and ArgNegRes are 15 (= -15) and 115 degrees respectively (see figure 132) and they should not be changed unless system studies show the necessity. If one sets DirEvalType to Comparator (which is recommended when using the mho characteristic) then the directional lines are computed by means of a comparatortype calculation, meaning that the directional lines are based on mho-circles (of infinite radius). The default setting value Impedance otherwise means that the
1MRK505183-UEN C
directional lines are implemented based on an impedance calculation equivalent to the one used for the quadrilateral impedance characteristics. When Directional impedance element for mho characteristic (ZDMRDIR) is used together with Fullscheme distance protection, mho characteristic (ZMHPDIS) the following settings for parameter DirEvalType is vital: alternative Comparator is strongly recommended alternative Imp/Comp should generally not be used alternative Impedance should not be used. This altenative is intended for use together with Distance protection zone, quadrilateral characteristic (ZMQPDIS)
ArgNegRes
-ArgDir
-Zs
en06000416.vsd
IEC06000416 V1 EN
Figure 132:
The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100ms or until the positive sequence voltage is restored. After 100ms, the following occurs:
1MRK505183-UEN C
If the current is still above the set value of the minimum operating current the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.
If the current decreases below the minimum operating value, no directional indications will be given until the positive sequence voltage exceeds 10% of its rated value.
The Directional impedance element for mho characteristic (ZDMRDIR) function has the following output signals: The STDIRCND output provides an integer signal that depends on the evaluation and is derived from a binary coded signal as follows:
bit 11 (2048) STRVL3L1= 1 bit 5 (32) STFWL3L1= 1 bit 10 (1024) STRVL2L3= 1 bit 4 (16) STFWL2L3= 1 bit 9 (512) STRVL1L2= 1 bit 3 (8) STFWL1L2= 1 bit 8 (256) STRVL3N=1 bit 2 (4) STFWL3N=1 bit 7 (128) STRVL2N=1 bit 1 (2) STFWL2N=1 bit 6 (64) STRVL1N=1 bit 0 (1) STFWL1N=1
The STFW output is a logical signal with value 1 or 0. It is made up as an ORfunction of all the forward starting conditions, that is, STFWL1N, STFWL2N, STFWL3N, STFWL1L2, STFWL2L3 and STFWL3L1. The STRV output is similar to the STFW output, the only difference being that it is made up as an ORfunction of all the reverse starting conditions, that is, STRVL1N, STRVL2N, STRVL3N, STRVL1L2, STRVL2L3 and STRVL3L1. Values for the following parameters are calculated, and may be viewed as service values: resistance phase L1 reactance phase L1 resistance phase L2 reactance phase L2 resistance phase L3 reactance phase L3 direction phase L1 direction phase L2 direction phase L3
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There are however some situations that can cause security problems like reverse phase to phase faults and double phase-to-earth faults during high load periods. To solve these, additional directional element is used. For phase-to-earth faults, directional elements using sequence components are very reliable for directional discrimination. The directional element can be based on one of following types of polarization: Zero-sequence voltage Negative-sequence voltage Zero-sequence current
These additional directional criteria are evaluated in the Additional distance protection directional function for earth faults (ZDARDIR). Zero-sequence voltage polarization is utilizing the phase relation between the zerosequence voltage and the zero-sequence current at the location of the protection. The measurement principle is illustrated in figure 133.
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- 3U 0
AngleOp AngleRCA
3I 0
en06000417.vsd
IEC06000417 V1 EN
Figure 133:
Negative-sequence voltage polarization is utilizing the phase relation between the negative-sequence voltage and the negative-sequence current at the location of the protection. Zero-sequence current polarization is utilizing the phase relation between the zerosequence current at the location of the protection and some reference zerosequence current, for example, the current in the neutral of a power transformer. The principle of zero-sequence voltage polarization with zero-sequence current compensation is described in figure 134. The same also applies for the negativesequence function.
Z0 SA
I0
Z0 Line
Z0 SB U0
I0
Charac te ris tic ang le
U0
K*I0 U0 + K*I0 IF
en06000418.vsd
IEC06000418 V1 EN
Figure 134:
Note that the sequence based additional directional element cannot give per phase information about direction to fault. This is why it is an AND-function with the normal directional element that works on a per phase base. The release signals are per phase and to have a release of a measuring element in a specific phase both the additional directional element, and the normal directional element, for that phase must indicate correct direction.
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AND
IEC06000419 V1 EN
Figure 135:
6.6.3
Function block
ZDMRDIR I3P* U3P* DIR_CURR DIR_VOLT DIR_POL STFW STRV STDIRCND IEC06000422_2_en.vsd
IEC06000422 V2 EN
Figure 136:
IEC06000425-2-en.vsd
IEC06000425 V2 EN
Figure 137:
6.6.4
1MRK505183-UEN C
Table 123:
Name DIR_CURR DIR_VOLT DIR_POL STFW STRV STDIRCND
Table 124:
Name I3P U3P I3PPOL DIRCND
Table 125:
Name STFWPE STRVPE DIREFCND
6.6.5
Table 126:
Name IBase UBase DirEvalType
Setting parameters
ZDMRDIR Group settings (basic)
Values (Range) 1 - 99999 0.05 - 2000.00 Impedance Comparator Imp/Comp 90 - 175 5 - 45 5 - 30 5 - 30 Unit Step 1 0.05 Default 3000 400.00 Comparator Description Base setting for current level Base setting for voltage level Directional evaluation mode Impedance / Comparator Angle of blinder in second quadrant for forward direction Angle of blinder in fourth quadrant for forward direction Minimum operate phase current for Phase-Earth loops Minimum operate delta current for PhasePhase loops 241
1 1 1 1
115 15 5 10
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Table 127:
Name IBase UBase PolMode
1 1 1 1
75 5 1 10
Characteristic relay angle (= MTA or base angle) Minimum operation current in % of IBase Minimum polarizing voltage in % of UBase Minimum polarizing current in % of IBase
Table 128:
Name AngleOp Kmag
6.7
6.7.1
Introduction
The Mho impedance supervision logic (ZSMGAPC) includes features for fault inception detection and high SIR detection. It also includes the functionality for loss of potential logic as well as for the pilot channel blocking scheme. ZSMGAPC can mainly be decomposed in two different parts: 1. 2. A fault inception detection logic High SIR detection logic
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6.7.2
6.7.2.1
Or A fault inception is detected If it is later detected that it was an internal fault that made the function issue the BLKCHST signal, the function will issue a CHSTOP signal to unblock the remote end. The criteria that have to be fulfilled for this are: 1. 2. 3. The function has to be in pilot mode, that is, the setting PilotMode has to be set to On The carrier send signal should be blocked, that is, input signal BLOCKCS is On and, A reverse fault should not have been detected while the carrier send signal was not blocked, that is, input signals REVSTART and BLOCKCS is not activated.
ZSMGAPC function has a built in loss of voltage detection based on the evaluation of the change in phase voltage or the change in zero sequence voltage (3U0). It operates if the change in phase voltages exceeds the setting DeltaU or 3U0 exceeds the setting Delta3U0. If loss of voltage is detected, but not a fault inception, the distance protection function will be blocked. This is also the case if a fuse failure is detected by the
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external fuse failure function and activate the input FUSEFAIL. Those blocks are generated by activating the output BLKZ, which shall be connected to the input BLKZ on the distance Mho function block. During fault inception a lot of transients will be developed which in turn might cause the distance function to overreach. The Mho supervision logic (ZSMGAPC) will increase the filtering during the most transient period of the fault. This is done by activating the output BLKZMD, which shall be connected to the input BLKZMTD on mho distance function block.
High SIR values increases the likelihood that CVT will introduce a prolonged and distorted transient, increasing the risk for overreach of the distance function. The SIR function calculates the SIR value as the source impedance divided by the setting Zreach and activates the output signal HSIR if the calculated value for any of the six basic shunt faults exceed the setting SIRLevel. The HSIR signal is intended to block the delta based mho impedance function.
6.7.3
Function block
ZSMGAPC I3P* BLKZMTD U3P* BLKCHST BLOCK CHSTOP REVSTART HSIR BLOCKCS CBOPEN IEC06000426-2-en.vsd
IEC06000426 V2 EN
Figure 138:
6.7.4
1MRK505183-UEN C
Table 130:
Name BLKZMTD BLKCHST CHSTOP HSIR
6.7.5
Table 131:
Name IBase UBase PilotMode Zreach IMinOp
Setting parameters
ZSMGAPC Group settings (basic)
Values (Range) 1 - 99999 0.05 - 2000.00 Off On 0.1 - 3000.0 10 - 30 Unit A kV ohm %IB Step 1 0.05 0.1 1 Default 3000 400.00 Off 38.0 20 Description Base value for current measurement Base value for voltage measurement Pilot mode Off/On Line impedance Minimum operating current for SIR measurement
Table 132:
Name DeltaI Delta3I0 DeltaU Delta3U0 SIRLevel
6.8
S00346 V1 EN
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The operation of transmission networks today is in many cases close to the stability limit. Due to environmental considerations the rate of expansion and reinforcement of the power system is reduced, for example difficulties to get permission to build new power lines. The ability to accurate and reliable classifying the different types of fault so that single phase tripping and autoreclosing can be used plays an important roll in this matter. The phase selection function is design to accurate select the proper fault loop in the distance function dependent on the fault type. The heavy load transfer that is common in many transmission networks may in some cases interfere with the distance protection zone reach and cause unwanted operation. Therefore the function has a built in algorithm for load encroachment, which gives the possibility to enlarge the resistive setting of the measuring zones without interfering with the load. The output signals from the phase selection function produce important information about faulty phase(s), which can be used for fault analysis as well.
6.8.2
6.8.2.1
Principle of operation
The phase selection function
Faulty phase identification with load encroachment for mho (FMPSPDIS) function can be decomposed into six different parts: 1. 2. 3. 4. 5. 6. A high speed delta based current phase selector A high speed delta based voltage phase selector A symmetrical components based phase selector Fault evaluation and selection logic A load encroachment logic A blinder logic
The delta based fault detection function uses adaptive technique and is based on patent US4409636. The aim of the delta based phase selector is to provide very fast and reliable phase selection for releasing of tripping from the high speed Mho measuring element and is essential to Directional Comparison Blocking scheme (DCB), which uses Power Line Carrier (PLC) communication system across the protected line. The current and voltage samples for each phase passes through a notch filter that filters out the fundamental components. Under steady state load conditions or when no fault is present, the output of the filter is zero or close to zero. When a fault
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occurs, currents and voltages change resulting in sudden changes in the currents and voltages resulting in non-fundamental waveforms being introduced on the line. At this point the notch filter produces significant non-zero output. The filter output is processed by the delta function. The algorithm uses an adaptive relationship between phases to determine if a fault has occurred, and determines the faulty phases. The current and voltage delta based phase selector gives a real output signal if the following criterion is fulfilled (only phase L1 shown): Max(UL1,UL2,UL3)>DeltaUMinOp Max(IL1,IL2,IL3)>DeltaIMinOp
where: UL1, UL2 and UL3 are the voltage change between sample t and sample t-1 are the minimum harmonic level settings for the voltage and current filters to decide that a fault has occurred. A slow evolving fault may not produce sufficient harmonics to detect the fault; however, in such a case speed is no longer the issue and the sequence components phase selector will operate.
The delta voltages ULn and delta current ILn (n prefix for phase order) are the voltage and current between sample t and sample t-1. The delta phase selector employs adaptive techniques to determine the fault type. The logic determines the fault type by summing up all phase values and dividing by the largest value. Both voltages and currents are filtered out and evaluated. The condition for fault type classification for the voltages and currents can be expressed as:
Fa ulType =
EQUATION1621 V1 EN
Fa ultType =
EQUATION1622 V1 EN
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The output signal is 1 for single phase-to-earth fault, 2 for phase-to-phase fault and 3 for three-phase fault. At this point the filter does not know if earth was involved or not. Typically there are induced harmonics in the non-faulted lines that will affect the result. This method allows for a significant tolerance in the evaluation of FaultType over its entire range. When a single phase-to-earth fault has been detected, the logic determines the largest quantity, and asserts that phase. If phase-to-phase fault is detected, the two largest phase quantities will be detected and asserted as outputs. The faults detected by the delta based phase selector are coordinated in a separate block. Different phases of faults may be detected at slightly different times due to differences in the angles of incidence of fault on the wave shape. Therefore the output is forced to wait a certain time by means of a timer. If the timer expires, and a fault is detected in one phase only, the fault is deemed as phase-to-earth. This way a premature single phase-to-earth fault detection is not released for a phase-tophase fault. If, however, earth current is detected before the timer expires, the phaseto-earth fault is released sooner. If another phase picks up during the time delay, the wait time is reduced by a certain amount. Each detection of either earth-to-phase or additional phases further reduce the initial time delay and allow the delta phase selector output to be faster. There is no time delay, if for example, all three phases are faulty. The delta function is released if the input DELTAREL is activated at the same time as input DELTABLK is not activated. Activating the DELTABLK input will block the delta function. The release signal has an internal pulse timer of 100 ms. When the DELTAREL signal has disappeared the delta logic is reset. In order not to get too abrupt change, the reset is decayed in pre-defined steps.
The symmetrical component phase selector uses preprocessed calculated sequence voltages and currents as inputs. It also uses sampled values of the phase currents. All the symmetrical quantities mentioned further in this section are with reference to phase L1. The function is made up of four main parts:
A B C D Detection of the presence of earth fault A phase-to-phase logic block based on U1/U2 angle relationship A phase-to-earth component based on patent US5390067 where the angle relationships between U2/I0 and U2/U1 is evaluated to determine earth fault or phase- to-phase to earth fault Logic for detection of three-phase fault
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INRelPE
The earth-fault loop is also released if the evaluation of the zero sequence current by the main sequence function meets the following conditions: |3I0|>IBase 0.5 |3I0|>maxIph INRelPE
where: maxIph is the maximal current magnitude found in any of the three phases is the setting of 3I0 limit for release of phase-to-earth measuring loop in % of IBase is the global setting of the base current (A)
INRelPE IBase
In systems where the source impedance for zero sequence is high the change of zero sequence current may not be significant and the above detection may fail. In those cases the detection enters the second level, with evaluation of zero and negative sequence voltage. The release of the earth-fault loops can then be achieved if all of the following conditions are fulfilled: |3U0|>|U2| 0.5 |3U0|>|U1| 0.2 |U1|> UBase 0.2/(3) and
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IMinOp
Phase-to-phase fault detection The detection of phase-to-phase fault is performed by evaluation of the angle difference between the sequence voltages U2 and U1.
60
U1L1 (Ref)
en06000383.vsd
IEC06000383 V1 EN
Figure 139:
The phase-to-phase loop for the faulty phases will be determined if the angle between the sequence voltages U2 and U1 lies within the sector defined according to figure 139 and the following conditions are fulfilled: |U1|>U1MinOP |U2|>U2MinOp
where:
are the setting parameters for positive sequence and negative sequence minimum operate voltages
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The positive sequence voltage U1L1 in figure 139 above is reference. If there is a three-phase fault, there will not be any release of the individual phase signals, even if the general conditions for U2 and U1 are fulfilled. Phase-to-earth and phase-to-phase-to-earth-fault detection The detection of phase-to-earth and phase-to-phase-to-earth fault (US patent 5390067) is based on two conditions: 1. Angle relationship between U2 and I0 2. Angle relationship between U2 and U1 The condition 1 determines faulty phase at single phase-to-earth fault by determine the argument between U2 and I0.
80
L2-E sector
L3-E sector
200
L1-E sector
320
IEC06000384-2-en.vsd
IEC06000384 V2 EN
Figure 140:
The angle is calculated in a directional function block and gives the angle in radians as input to the U2 and I0 function block. The input angle is released only if the fault is in forward direction. This is done by the directional element. The fault is classified as forward direction if the angle between U0 and I0 lies between 20 to 200 degrees, see figure 141.
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Forward
20
200
Reverse
en06000385.vsd
IEC06000385 V1 EN
Figure 141:
The input radians are summarized with an offset angle and the result evaluated. If the angle is within the boundaries for a specific sector, the phase indication for that sector will be active see figure 140. Only one sector signal is allowed to be activated at the same time. The sector function for condition 1 has an internal release signal which is active if the main sequence function has classified the angle between U0 and I0 as valid. The following conditions must be fulfilled for activating the release signals: |U2|>U2MinOp |3I0|> 0.05 IBase |3I0|>maxIph INRelPE
where: U2 and IN are the magnitude of the negative sequence voltage and zerosequence current (3I0) is the setting parameter for minimum operating negative sequence voltage is the maximum phase current is the setting parameter for 3I0 limit for releasing phase-to-earth loop
U2MinOp
maxIph
INRelPE
The angle difference is phase shifted by 180 degrees if the fault is in reverse direction. The condition 2 looks at the angle relationship between the negative sequence voltage U2 and the positive sequence voltage U1. Since this is a phase-to-phase voltage relationship, there is no need for shifting phases if the fault is in reverse direction. A phase shift is introduced so that the fault sectors will have the same angle boarders as for condition 1. If the calculated angle between U2 and U1 lies
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within one sector, the corresponding phase for that sector will be activated. The condition 2 is released if both the following conditions are fulfilled: |U2|>U2MinOp |U1|>U1MinOP
where: |U1| and |U2| are the magnitude of the positive and negative sequence voltages. are the setting parameters for positive sequence and negative sequence minimum operating voltages.
140
L3-E sector
20 U1L1 (Ref)
L1-E sector
L2-E sector
260
IEC06000413 V2 EN
IEC06000413_2_en.vsd
Figure 142:
If both conditions are true and there is sector match, the fault is deemed as single phase-to-earth. If the sectors, however, do not match the fault is determined to be the complement of the second condition, that is, a phase-to-phase-to- earth fault.
Condition 1 and L3-E L2-E Condition 2 L3-E L1-E Fault type L3-E L2-L3-E
The sequence phase selector is blocked when earth is not involved or if a threephase fault is detected. Three-phase fault detection Unless it has been categorized as a single or two-phase fault, the function classifies it as a three-phase fault if the following conditions are fulfilled: |U1|<U1Level
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The output signal for detection of three-phase fault is only released if not earth fault and phase-to-phase fault in the main sequence function is detected. The conditions for not detecting earth fault are the inverse of equation 5 to 10. The condition for not detecting phase-to-phase faults is determined by three conditions. Each of them gives condition for not detecting phase-to-phase fault. Those are:
1: earth fault is detected or |3I0IN|> 0.05 IBase and |3I0IN|>maxIph INRelPE 2: phase-to-earth and phase-to-phase faults are not fulfilled and maxIph<0.1 IBase and |I2|<0.1 maxIph 3: |3I0IN|>maxIph INBlockPP or |I2|<maxIph I2maxIL
where: maxIph is the maximum of the phase currents IL1, IL2 and IL3 is the setting parameter for 3I0 limit for release of phase-to-earth fault loops
INRelPE
1MRK505183-UEN C
|I2| I2ILmax
is the magnitude of the negative sequence current is the setting parameter for the relation between negative sequence current to the maximum phase current in percent of IBase is the setting parameter for 3I0 limit for blocking phase to phase measuring loops
INBlockPP
The phase selection logic has an evaluation procedure that can be simplified according to figure 143. Only phase L1 is shown in the figure. If the internal signal 3 Phase fault is activated, all four outputs START, STL1, STL2 and STL3 gets activated.
DeltaIL1 DeltaUL1
Sequence based function
a b
a
OR
OR
IL1Valid BLOCK
&
STL1
en06000386.vsd
IEC06000386 V1 EN
Figure 143:
Each of the six measuring loops has its own load (encroachment) characteristic based on the corresponding loop impedance. The load encroachment functionality is always activated in faulty phase identification with load encroachment for mho (FMPSPDIS) function but the influence on the zone measurement can be switched On/Offin the respective impedance measuring function. The outline of the characteristic is presented in figure 144. As illustrated, the resistive reach in forward and reverse direction and the angle of the sector is the same in all four quadrants. The reach for the phase selector will be reduced by the load encroachment function, as shown in figure 144.
1MRK505183-UEN C
Blinder provides a mean to discriminate high load from a fault. The operating characteristic is illustrated in figure 144. There are six individual measuring loops with the blinder functionality. Three phase-to-earth loops which estimate the impedance according to Zn = Uph / Iph and three phase-to-phase loops according to Zph-ph = Uph-ph / Iph-ph The start operations from respective loop are binary coded into one word and provides an output signal STCNDPLE.
X jX
Operation area
Operation area
No operation area
No operation area
en06000414.vsd
IEC06000414 V1 EN
Figure 144:
Outputs
The output of the sequence components based phase selector and the delta logic phase selector activates the output signals STL1, STL2 and STL3. If an earth fault is detected the signal STPE gets activated. The phase selector also gives binary coded signals that are connected to the zone measuring element for opening the correct measuring loop(s). This is done by the signal STCNDPHS. If only one phase is started (L1, L2 or L3), the corresponding phase-to- element is enabled. STPE is expected to be made available for two-phase and three-phase faults for the correct output to be selected. The fault loop is indicated by one of the decimal numbers below. The output STCNDPHS provides release information from the phase selection part only. STCNDLE provides release information from the load encroachment part only. STCNDPLE provides release information from the phase selection part and
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the load encroachment part combined, that is, both parts have to issue a release at the same time (this signal is normally not used in the zone measuring element). In these signals, each fault type has an associated value, which represents the corresponding zone measuring loop to be released. The values are presented in table 132.
0= 1= 2= 3= 4= 5= 6= 7= 8= 9= 10= 11= no faulted phases L1E L2E L3E -L1L2E -L2L3E -L3L1E -L1L2L3E -L1L2 -L2L3 -L3L1 L1L2L3
An additional logic is applied to handle the cases when phase-to-earth outputs are to be asserted when the earth input G is not asserted. The output signal STCNDPLE is activated when the load encroachment is operating. STCNDPLE is connected to the input STCND for selected quadrilateral impedance measuring zones to be blocked. The signal must be connected to the input LDCND for selected mho impedance measuring zones . The load encroachment at the measuring zone must be activated to release the blocking from the load encroachment function.
6.8.3
Function block
FMPSPDIS I3P* U3P* BLOCK ZSTART TR3PH 1POLEAR STL1 STL2 STL3 STPE STCNDPHS STCNDPLE STCNDLE START IEC06000429-2-en.vsd
IEC06000429 V2 EN
Figure 145:
1MRK505183-UEN C
Table 134:
Name STL1 STL2 STL3 STPE STCNDPHS STCNDPLE STCNDLE START
6.8.5
Table 135:
Name IBase UBase IMaxLoad RLd ArgLd
Setting parameters
FMPSPDIS Group settings (basic)
Values (Range) 1 - 99999 0.05 - 2000.00 10 - 5000 1.00 - 3000.00 5 - 70 Unit A kV %IB ohm/p Deg Step 1 0.05 1 0.01 1 Default 3000 400.00 200 80.00 20 Description Base current Base voltage Maximum load for identification of three phase fault in % of IBase Load encroachment resistive reach in ohm/phase Load encroachment inclination of load angular sector
1MRK505183-UEN C
Table 136:
Name DeltaIMinOp DeltaUMinOp U1Level I1LowLevel U1MinOp U2MinOp INRelPE INBlockPP
6.8.6
Technical data
Table 137:
Function Minimum operate current Load encroachment criteria: Load resistance, forward and reverse
6.9
Zpsb
SYMBOL-EE V1 EN
6.9.1
Introduction
Power swings may occur after disconnection of heavy loads or trip of big generation plants.
1MRK505183-UEN C
Power swing detection function (ZMRPSB) is used to detect power swings and initiate block of selected distance protection zones. Occurrence of earth-fault currents during a power swing can block ZMRPSB function to allow fault clearance.
6.9.2
Principle of operation
Power swing detection (ZMRPSB ) function comprises an inner and an outer quadrilateral measurement characteristic with load encroachment, as shown in figure 146. Its principle of operation is based on the measurement of the time it takes for a power swing transient impedance to pass through the impedance area between the outer and the inner characteristics. Power swings are identified by transition times longer than a transition time set on corresponding timers. The impedance measuring principle is the same as that used for the distance protection zones. The impedance and the characteristic passing times are measured in all three phases separately. One-out-of-three or two-out-of-three operating modes can be selected according to the specific system operating conditions.
X1OutFw X1InFw
jX
ZL
R1LIn
DFw j
DRv
ArgLd
R1FInRv
R1FInFw
DFw
ArgLd
R
DRv
RLdInRv RLdInFw
DFw DFw
DRv j DRv
IEC09000222 V1 EN
Figure 146:
1MRK505183-UEN C
The impedance measurement within ZMRPSB function is performed by solving equation 54 and equation 55 (n = 1, 2, 3 for each corresponding phase L1, L2 and L3).
(Equation 54)
(Equation 55)
6.9.2.1
RLdInFw = kLdRFwRLdOutFw
EQUATION1185 V2 EN
(Equation 56)
where:
The slope of the load encroachment inner and outer boundary is defined by setting the parameter ArgLd. The load encroachment in the fourth quadrant uses the same settings as in the first quadrant (same ArgLd and RLdOutFw and calculated value RLdInFw). The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the distance measuring zones. The angle is the same as the line angle and derived from the setting of the reactive reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The fault resistance coverage for the inner boundary is set by the parameter R1FInFw. From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between the inner and outer boundary, DFw, is calculated. This value is valid for R direction in first and fourth quadrant and for X direction in first and second quadrant.
1MRK505183-UEN C
To avoid load encroachment in reverse direction, the resistive reach is limited by setting the parameter RLdOutRv for the outer boundary of the load encroachment zone. The distance to the inner resistive load boundary RLdInRv is determined by using the setting parameter kLdRRv in equation 57.
RLdInRv = kLdRRvRLdOutRv
EQUATION1187 V2 EN
(Equation 57)
where:
From the setting parameter RLdOutRv and the calculated value RLdInRv, a distance between the inner and outer boundary, DRv, is calculated. This value is valid for R direction in second and third quadrant and for X direction in third and fourth quadrant. The inner resistive characteristic in the second quadrant outside the load encroachment part corresponds to the setting parameter R1FInRv for the inner boundary. The outer boundary is internally calculated as the sum of DRv+R1FInRv. The inner resistive characteristic in the third quadrant outside the load encroachment zone consist of the sum of the settings R1FInRv and the line resistance R1LIn. The argument of the tilted lines outside the load encroachment is the same as the tilted lines in the first quadrant. The distance between the inner and outer boundary is the same as for the load encroachment in reverse direction, that is DRv.
6.9.2.3
The inner characteristic for the reactive reach in reverse direction correspond to the setting parameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + DRv.
where: DRv = RLdOutRv - KLdRRv RLdOutRv
1MRK505183-UEN C
6.9.2.4
Signals ZOUTLn (outer boundary) and ZINLn (inner boundary) in figure 147 are related to the operation of the impedance measuring elements in each phase separately (n represents the corresponding L1, L2 and L3). They are internal signals, calculated by ZMRPSB function. The tP1 timer in figure 147 serve as detection of initial power swings, which are usually not as fast as the later swings are. The tP2 timer become activated for the detection of the consecutive swings, if the measured impedance exit the operate area and returns within the time delay, set on the tW waiting timer. The upper part of figure 147 (internal input signal ZOUTL1, ZINL1, AND-gates and tP-timers) are duplicated for phase L2 and L3. All tP1 and tP2 timers in the figure have the same settings.
ZOUTL1 ZINL1
0-tP1 0
AND
AND
0-tP2 0
AND
ZOUTL2 ZOUTL3
OR
detected
0 0-tW IEC05000113-2-en.vsd
IEC05000113 V2 EN
Figure 147:
1MRK505183-UEN C
>1
DET1of3 - int.
>1
DET2of3 - int.
Figure 148:
ZOUT
ZIN
TRSP I0CHECK
BLKI02
AND
10 ms t
OR tR1
AND -loop tR2 BLKI01 BLOCK -loop DET1of3 - int. REL1PH BLK1PH DET2of3 - int. REL2PH BLK2PH EXTERNAL AND t
OR
INHIBIT
AND
en05000114.vsd
IEC05000114 V1 EN
Figure 149:
1MRK505183-UEN C
6.9.2.5
1MRK505183-UEN C
IEC06000264-2-en.vsd
IEC06000264 V2 EN
Figure 150:
6.9.4
Table 139:
Name START ZOUT ZIN
1MRK505183-UEN C
6.9.5
Table 140:
Name Operation X1InFw R1LIn R1FInFw X1InRv R1FInRv OperationLdCh RLdOutFw ArgLd RLdOutRv kLdRFw kLdRRv tEF IMinOpPE IBase
Table 141:
Name tP1 tP2 tW tH tR1 tR2
1MRK505183-UEN C
(0.101000.00)W/loop (0.000-60.000) s
6.10
6.10.1
Introduction
Power Swing Logic (ZMRPSL) is a complementary function to Power Swing Detection (ZMRPSB) function. It provides possibility for selective tripping of faults on power lines during system oscillations (power swings or pole slips), when the distance protection function should normally be blocked. The complete logic consists of two different parts: Communication and tripping part: provides selective tripping on the basis of special distance protection zones and a scheme communication logic, which are not blocked during the system oscillations. Blocking part: blocks unwanted operation of instantaneous distance protection zone 1 for oscillations, which are initiated by faults and their clearing on the adjacent power lines and other primary elements.
6.10.2
6.10.2.1
Principle of operation
Communication and tripping logic
Communication and tripping logic as used by the power swing distance protection zones is schematically presented in figure 151.
1MRK505183-UEN C
&
tCS
&
&
CS
tTrip t CACC CR
tBlkTr t
&
BLKZMPS
&
>1
TRIP
en06000236.vsd
IEC06000236 V1 EN
Figure 151:
The complete logic remains blocked as long as there is a logical one on the BLOCK functional input signal. Presence of the logical one on the STDEF functional input signal also blocks the logic as long as this block is not released by the logical one on the AR1P1 functional input signal. The functional output signal BLKZMPS remains logical one as long as the function is not blocked externally (BLOCK is logical zero) and the earth-fault is detected on protected line (STDEF is logical one), which is connected in three-phase mode (AR1P1 is logical zero). Timer tBlkTr prolongs the duration of this blocking condition, if the measured impedance remains within the operate area of the Power Swing Detection (ZMRPSB) function (STPSD input active). The BLKZMPS can be used to block the operation of the power-swing zones. Logical one on functional input CSUR, which is normally connected to the TRIP functional output of a power swing carrier sending zone, activates functional output CS, if the function is not blocked by one of the above conditions. It also activates the TRIP functional output. Initiation of the CS functional output is possible only, if the STPSD input has been active longer than the time delay set on the security timer tCS. Simultaneous presence of the functional input signals PLTR_CRD and CR (local trip condition) also activates the TRIP functional output, if the function is not blocked by one of the above conditions and the STPSD signal has been present longer then the time delay set on the trip timer tTrip.
6.10.2.2
Blocking logic
Figure 152 presents the logical circuits, which control the operation of the underreaching zone (zone 1) at power swings, caused by the faults and their clearance on the remote power lines.
269
1MRK505183-UEN C
& &
STZML BLOCK STMZH STZMPSD STPSD BLKZMH STZMLL
& &
tZL t tDZ t
& >1
>1
&
-loop
en06000237.vsd
IEC06000237 V1 EN
Figure 152:
Control of underreaching distance protection (Zone 1) at power swings caused by the faults and their clearance on adjacent lines and other system elements
The logic is disabled by a logical one on functional input BLOCK. It can start only if the following conditions are simultaneously fulfilled: STPSD functional input signal must be a logical zero. This means, that Power swing detection (ZMRPSB) function must not detect power swinging over the protected power line. STZMPSD functional input must be a logical one. This means that the impedance must be detected within the external boundary of ZMRPSB function. STZMOR functional input must be a logical one. This means that the fault must be detected by the overreaching distance protection zone, for example zone 2.
The STZMURPS functional output, which can be used in complete terminal logic instead of a normal distance protection zone 1, becomes active under the following conditions: If the STZMUR signal appears at the same time as the STZMOR or if it appears with a time delay, which is shorter than the time delay set on timer tDZ. If the STZMUR signal appears after the STZMOR signal with a time delay longer than the delay set on the tDZ timer, and remains active longer than the time delay set on the tZL timer.
The BLKZMOR functional output signal can be used to block the operation of the higher distance protection zone, if the fault has moved into the zone 1 operate area after tDZ time delay.
1MRK505183-UEN C
6.10.3
IEC07000026-2-en.vsd
IEC07000026 V2 EN
Figure 153:
6.10.4
Table 144:
Name TRIP STZMURPS BLKZMUR BLKZMOR CS
1MRK505183-UEN C
Setting parameters
ZMRPSL Group settings (basic)
Values (Range) Off On 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit s s s s s Step 0.001 0.001 0.001 0.001 0.001 Default Off 0.050 0.200 0.100 0.100 0.300 Description Operation Off / On Permitted max oper time diff between higher and lower zone Delay for oper of underreach zone with detected diff in oper time Conditional timer for sending the CS at power swings Conditional timer for tripping at power swings Timer for blocking the overreaching zones trip
6.11
<
SYMBOL-MM V1 EN
6.11.1
Introduction
Sudden events in an electrical power system such as large changes in load, fault occurrence or fault clearance, can cause power oscillations referred to as power swings. In a non-recoverable situation, the power swings become so severe that the synchronism is lost, a condition referred to as pole slipping. The main purpose of the pole slip protection (PSPPPAM) is to detect, evaluate, and take the required action for pole slipping occurrences in the power system. The electrical system parts swinging to each other can be separated with the line/s closest to the centre of the power swing allowing the two systems to be stable as separated islands.
6.11.2
Principle of operation
If the generator is faster than the power system, the rotor movement in the impedance and voltage diagram is from right to left and generating is signalled. If the generator is slower than the power system, the rotor movement is from left to right and motoring is signalled (the power system drives the generator as if it were a motor).
1MRK505183-UEN C
The movements in the impedance plain can be seen in figure 154. The transient behaviour is described by the transient EMF's EA and EB, and by X'd, XT and the transient system impedance ZS.
Zone 1 EB Xd IED jX XT Zone 2 XS EA
A XS
XT
Xd B
IEC06000437_2_en.vsd
IEC06000437 V2 EN
Figure 154:
where: X'd XT ZS
= transient reactance of the generator = short-circuit reactance of the step-up transformer = impedance of the power system A
1MRK505183-UEN C
the minimum current exceeds 0.10 IN (IN is IBase parameter set under general setting). the maximum voltage falls below 0.92 UBase the voltage Ucos (the voltage in phase with the generator current) has an angular velocity of 0.2...8 Hz and the corresponding direction is not blocked.
en07000004.vsd
IEC07000004 V1 EN
Figure 155:
Different generator quantities as function of the angle between the equivalent generators
An alarm is given when movement of the rotor is detected and the rotor angle exceeds the angle set for 'WarnAngle'. Slipping is detected when: a change of rotor angle of min. 50 ms is recognized the slip line is crossed between ZA and ZB.
When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when signal EXTZONE1 is high (external device detects the direction of the centre of slipping). After the first slip, the signals ZONE1 or ZONE2 and depending on the direction of slip - either GEN or MOTOR are issued.
1MRK505183-UEN C
Every time pole slipping is detected, the impedance of the point where the slip line is crossed and the instantaneous slip frequency are displayed as measurements. Further slips are only detected, if they are in the same direction and if the rate of rotor movement has reduced in relation to the preceding slip or the slip line is crossed in the opposite direction outside ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all the signals and is then signalled itself as a first slip. The TRIP1 tripping command and signal are generated after N1 slips in zone 1, providing the rotor angle is less than TripAngle. The TRIP2 signal is generated after N2 slips in zone 2, providing the rotor angle is less than TripAngle. All signals are reset if: the direction of movement reverses the rotor angle detector resets without a slip being counted or no rotor relative movement was detected during the time ResetTime.
0.2 Slip.Freq. 8 Hz
d startAngle ZONE1
Z cross line ZA - ZC
AND
Z cross line ZC - ZB
AND
ZONE2
Counter N1Limit
a b
ab
AND
TRIP1
OR a b ab
TRIP
AND
TRIP2
en07000005.vsd
IEC07000005 V1 EN
Figure 156:
1MRK505183-UEN C
IEC07000030-2-en.vsd
IEC07000030 V2 EN
Figure 157:
6.11.4
Table 147:
Name TRIP TRIP1 TRIP2 START ZONE1 ZONE2 GEN MOTOR SFREQ SLIPZOHM SLIPZPER UCOSKV UCOSPER
1MRK505183-UEN C
6.11.5
Table 148:
Name Operation OperationZ1 OperationZ2 ImpedanceZA ImpedanceZB ImpedanceZC AnglePhi StartAngle TripAngle N1Limit N2Limit
Table 149:
Name ResetTime
Table 150:
Name IBase UBase MeasureMode
InvertCTcurr
No
6.11.6
Technical data
Table 151:
Function Impedance reach Characteristic angle Start and trip angles Zone 1 and Zone 2 trip counters
1MRK505183-UEN C
6.12
Automatic switch onto fault logic, voltage and current based ZCVPSOF
Function description Automatic switch onto fault logic, voltage and current based IEC 61850 identification ZCVPSOF IEC 60617 identification ANSI/IEEE C37.2 device number -
6.12.1
Introduction
Automatic switch onto fault logic, voltage and current based (ZCVPSOF) is a function that gives an instantaneous trip at closing of breaker onto a fault. A dead line detection check is provided to activate the function when the line is dead. Mho distance protections can not operate for switch onto fault condition when the phase voltages are close to zero. An additional logic based on UI Level is used for this purpose.
6.12.2
Principle of operation
Automatic switch onto fault logic, voltage and current based function (ZCVPSOF) can be activated externally by Breaker Closed Input or internally (automatically) by using UI Level Based Logic see figure 158. The activation from the Dead line detection function is released if the internal signal deadLine from the UILevel function is activated at the same time as the input ZACC is not activated during at least for a duration tDLD and the setting parameter AutoInit is set to On. When the setting AutoInit is Off, the function is activated by an external binary input BC. To get a trip one of the following operation modes must also be selected by the parameter Mode: Mode = Impedance; trip is released if the input ZACC is activated (normal connected to non directional distance protection zone). Mode = UILevel; trip is released if UILevel detector is activated. Mode = UILvl&Imp; trip is initiated based on impedance measured criteria or UILevel detection. The internal signal deadLine from the UILevel detector is activated if all three phase currents and voltages are below the setting IPh< and UPh<. UI Level based measurement detects the switch onto fault condition even though the voltage is very low. The logic is based on current and voltage levels. The internal signal SOTF UILevel is activated if a phase voltage is below the setting
1MRK505183-UEN C
UPh< and corresponding phase current is above the setting IPh< longer than the time tDuration. ZCVPSOF can be activated externally from input BC and thus setting AutoInit is bypassed. The function is released during a settable time tSOTF. The function can be blocked by activating the input BLOCK.
BLOCK
AND
15
TRIP
BC
AutiInit=On
200 1000 OR
ZACC
AND
deadLine
SOTFU ILevel
Mode = Impedance
AND
Mode = UILevel
OR
AND
OR
Mode = UILvl&Imp
AND
en07000084.vsd
IEC07000084 V2 EN
Figure 158:
Simplified logic diagram for Automatic switch onto fault logic, voltage and current based.
1MRK505183-UEN C
IEC06000459-2-en.vsd
IEC06000459 V2 EN
Figure 159:
6.12.4
Table 153:
Name TRIP
6.12.5
Table 154:
Name Operation IBase UBase Mode
Setting parameters
ZCVPSOF Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 Impedance UILevel UILvl&Imp Off On 1 - 100 1 - 100 Unit A kV Step 1 0.05 Default On 3000 400.00 UILevel Description Operation Off / On Base current (A) Base voltage L-L (kV) Mode of operation of SOTF Function
%IB %UB
1 1
Off 20 70
Automatic switchonto fault initialization Current level for detection of dead line in % of IBase Voltage level for detection of dead line in % of UBase
1MRK505183-UEN C
6.12.6
Technical data
Table 155:
Parameter Operate voltage, detection of dead line Operate current, detection of dead line Delay following dead line detection input before Automatic switch into fault logic function is automatically turned On Time period after circuit breaker closure in which Automatic switch into fault logic function is active
UBase IBase
(1100)% of (0.00060.000) s
(0.00060.000) s
0.5% 10 ms
6.13
6.13.1
Introduction
Phase preference logic function PPLPHIZ is intended to be used in isolated or high impedance earthed networks where there is a requirement to trip only one of the faulty lines at cross-country fault. Phase preference logic inhibits tripping for single phase-to-earth faults in isolated and high impedance earthed networks, where such faults are not to be cleared by distance protection. For cross-country faults, the logic selects either the leading or the lagging phase-earth loop for measurement and initiates tripping of the preferred fault based on the selected phase preference. A number of different phase preference combinations are available for selection.
6.13.2
Principle of operation
Phase preference logic PPLPHIZ has 10 operation modes, which can be set by the parameter OperMode. The different modes and their explanation are shown in
1MRK505183-UEN C
table 156 below. The difference between cyclic and acyclic operation can be explained by the following example. Assume a L1 fault on one line and a L3 fault on another line. For OperMode = 1231c the line with L3 fault will be tripped (L3 before L1) while for OperMode = 123a the line with L1 1 fault will be tripped (L1 before L3).
Table 156:
OperMode No filter
The function can be divided into two parts; one labeled voltage and current discrimination and the second one labeled phase preference evaluation, see figure 160. The aim with the voltage and current discrimination part is to discriminate faulty phases and to determine if there is a cross-country fault. If cross-country fault is detected, an internal signal Detected cross-country fault is created and sent to the phase preference part to be used in the evaluation process for determining the condition for trip. The voltage and current discrimination part gives phase segregated start signals if the respective measured phase voltage is below the setting parameter UPN< at the same time as the zero sequence voltage is above the setting parameter 3U0>. If there is a start in any phase the START out put signal will be activated. The internal signal for detection of cross-country fault, DetectCrossCountry, that come from the voltage and current discrimination part of the function can be achieved in three different ways:
1MRK505183-UEN C
1. 2.
3.
The magnitude of 3I0 has been above the setting parameter IN> for a time longer than the setting of pick-up timer tIN. The magnitude of 3I0 has been above the setting parameter IN> at the same time as the magnitude of 3U0 has been above the setting parameter 3U0> during a time longer than the setting of pick-up timer tUN. The magnitude of 3I0 has been above the setting parameter IN> at the same time as one of the following conditions are fulfilled: the measured phase-to-phase voltage in at least one of the phase combinations has been below the setting parameter UPP< for more than 20 ms. At least two of the phase voltages are below the setting parameter UPN< for more than 20 ms.
The second part, phase preference evaluation, uses the internal signal DetectCrossCountry from the voltage and current evaluation together with the input signal STCND together with phase selection start condition (from phase selection functions) connected to input STCND, and the information from the setting parameter OperMode are used to determine the condition for trip. To release the Phase preference logic, at least two out of three phases must be faulty. The fault classification whether it is a single phase-to-earth, two-phase or crosscountry fault and which phase to be tripped at cross-country fault is converted into a binary coded signal and sent to the distance protection measuring zone to release the correct measuring zone according to the setting of OperMode. This is done by activating the output ZREL and it shall be connected to the input STCND on the distance zone measuring element. The release signals from phase selection will only be gated with the cross-country check from IN and UN but without time delay. If no phase selection start has occurred, the release is based on current and voltage discriminating part only. The input signal STCND consist of binary information of fault type and is connected to the output STCND on phase selection function. The fault must be activated in at least two phases to be classified as a cross-country fault in the phase preference part of the logic. The input signals RELxxx are additional fault release signals that can be connected to external protection functions through binary input. The output START and trip signals can be blocked by activating the input BLOCK
1MRK505183-UEN C
UL1UL2 UL2UL3
UL3UL1 IN UN UPN< UPP< IN> UN0> Detect CrossCountry fault
AND
START
AND
ZREL
STCND
BLOCK
IEC09000220_1_en.vsd
IEC09000220 V2 EN
Figure 160:
6.13.3
Function block
PPLPHIZ I3P* U3P* BLOCK RELL1N RELL2N RELL3N STCND START ZREL
IEC07000029-2-en.vsd
IEC07000029 V2 EN
Figure 161:
6.13.4
1MRK505183-UEN C
Table 158:
Name START ZREL
6.13.5
Table 159:
Name IBase UBase OperMode
Setting parameters
PPLPHIZ Group settings (basic)
Values (Range) 1 - 99999 0.05 - 2000.00 No Filter NoPref 1231c 1321c 123a 132a 213a 231a 312a 321a 10.0 - 100.0 10.0 - 100.0 5.0 - 70.0 10 - 200 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit A kV Step 1 0.01 Default 3000 400.00 No Filter Description Base current Base voltage Operating mode (c=cyclic,a=acyclic)
Operate value of phase undervoltage (% of UBase) Operate value of line to line undervoltage (% of UBase) Operate value of residual voltage (% of UBase) Operate value of residual current (% of IBase) Pickup-delay for residual voltage Dropoff-delay for residual voltage Pickup-delay for residual current
1MRK505183-UEN C
Table 160:
Function
Operate value, phase-to-phase and phase-to-neutral undervoltage Reset ratio, undervoltage Operate value, residual voltage Reset ratio, residual voltage Operate value, residual current Reset ratio, residual current Timers Operating mode
< 105% (5.0 - 70.0)% of UBase > 95% (10 - 200)% of IBase > 95% (0.000 - 60.000) s No Filter, NoPref Cyclic: 1231c, 1321c Acyclic: 123a, 132a, 213a, 231a, 312a, 321a
1MRK505183-UEN C
Section 7
Current protection
7.1
3I>>
SYMBOL-Z V1 EN
7.1.1
Introduction
The instantaneous three phase overcurrent function has a low transient overreach and short tripping time to allow use as a high set short-circuit protection function.
7.1.2
Principle of operation
The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block. The RMS value of each phase current is derived from the fundamental frequency components, as well as sampled values of each phase current. These phase current values are fed to the instantaneous phase overcurrent protection function PHPIOC. In a comparator the RMS values are compared to the set operation current value of the function (IP>>). If a phase current is larger than the set operation current a signal from the comparator for this phase is set to true. This signal will, without delay, activate the output signal TRLn (n=1,2,3) for this phase and the TRIP signal that is common for all three phases. There is an operation mode (OpMode) setting: 1 out of 3 or 2 out of 3. If the parameter is set to 1 out of 3 any phase trip signal will be activated. If the parameter is set to 2 out of 3 at least two phase signals must be activated for trip. There is also a possibility to activate a preset change of the set operation current (StValMult) via a binary input (ENMULT). In some applications the operation value needs to be changed, for example due to transformer inrush currents.
287
1MRK505183-UEN C
7.1.3
Function block
PHPIOC I3P* BLOCK ENMULT TRIP TRL1 TRL2 TRL3 IEC04000391-2-en.vsd
IEC04000391 V2 EN
Figure 162:
7.1.4
Table 162:
Name TRIP TRL1 TRL2 TRL3
7.1.5
Table 163:
Name Operation IBase OpMode IP>>
Setting parameters
PHPIOC Group settings (basic)
Values (Range) Off On 1 - 99999 2 out of 3 1 out of 3 1 - 2500 Unit A %IB Step 1 1 Default Off 3000 1 out of 3 200 Description Operation Off / On Base current Select operation mode 2-out of 3 / 1-out of 3 Operate phase current level in % of IBase
Table 164:
Name StValMult
1MRK505183-UEN C
7.1.6
7.2
TOC-REVA V1 EN
7.2.1
Introduction
The four step phase overcurrent protection function OC4PTOC has an inverse or definite time delay independent for each step separately. All IEC and ANSI time delayed characteristics are available together with an optional user defined time characteristic. The directional function is voltage polarized with memory. The function can be set to be directional or non-directional independently for each of the steps. A 2nd harmonic blocking can be set individually for each step.
7.2.2
Principle of operation
The Four step overcurrent protection function OC4PTOC is divided into four different sub-functions, one for each step. For each step x , where x is step 1, 2, 3
1MRK505183-UEN C
and 4, an operation mode is set by DirModex: Off/Non-directional/Forward/ Reverse. The protection design can be decomposed in four parts: The direction element The harmonic Restraint Blocking function The four step over current function The mode selection If VT inputs are not available or not connected, setting parameter DirModex shall be left to default value, Non-directional.
Direction Element
faultState
START
TRIP
I3P
harmRestrBlock
en05000740.vsd
IEC05000740 V1 EN
Figure 163:
A common setting for all steps, StartPhSel, is used to specify the number of phase currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3.
1MRK505183-UEN C
The sampled analogue phase currents are processed in a pre-processing function block. Using a parameter setting MeasType within the general settings for the four step phase overcurrent protection function OC4PTOC, it is possible to select the type of the measurement used for all overcurrent stages. It is possible to select either discrete Fourier filter (DFT) or true RMS filter (RMS). If DFT option is selected then only the RMS value of the fundamental frequency components of each phase current is derived. Influence of DC current component and higher harmonic current components are almost completely suppressed. If RMS option is selected then the true RMS values is used. The true RMS value in addition to the fundamental frequency component includes the contribution from the current DC component as well as from higher current harmonic. The selected current values are fed to OC4PTOC. In a comparator, for each phase current, the DFT or RMS values are compared to the set operation current value of the function (I1>, I2>, I3> or I4>). If a phase current is larger than the set operation current, outputs START, STx, STL1, STL2 and STL3 are, without delay, activated. Output signals STL1, STL2 and STL3 are common for all steps. This means that the lowest set step will initiate the activation. The START signal is common for all three phases and all steps. It shall be noted that the selection of measured value (DFT or RMS) do not influence the operation of directional part of OC4PTOC. Service value for individually measured phase currents are also available on the local HMI for OC4PTOC function, which simplifies testing, commissioning and in service operational checking of the function. A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the phase currents and the relation is compared to a set restrain current level. The function can be directional. The direction of the fault current is given as current angle in relation to the voltage angle. The fault current and fault voltage for the directional function is dependent of the fault type. To enable directional measurement at close in faults, causing low measured voltage, the polarization voltage is a combination of the apparent voltage (85%) and a memory voltage (15%). The following combinations are used.
Phase-phase short circuit:
U refL1L 2 = U L1 - U L 2
EQUATION1449 V1 EN
I dirL1L 2 = I L1 - I L 2
(Equation 58)
U refL 2 L 3 = U L 2 - U L 3
EQUATION1450 V1 EN
I dirL 2 L 3 = I L 2 - I L 3
(Equation 59)
U refL 3 L1 = U L 3 - U L1
EQUATION1451 V1 EN
I dirL 3 L1 = I L 3 - I L1
(Equation 60)
1MRK505183-UEN C
U refL1 = U L1
EQUATION1452 V1 EN
I dirL1 = I L1
(Equation 61)
U refL 2 = U L 2
EQUATION1453 V1 EN
I dirL 2 = I L 2
(Equation 62)
U refL 3 = U L 3
EQUATION1454 V1 EN
I dirL 3 = I L 3
(Equation 63)
The polarizing voltage is available as long as the positive-sequence voltage exceeds 4% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100 ms or until the positive sequence voltage is restored. After 100 ms, the following occurs: If the current is still above the set value of the minimum operating current (between 10 and 30% of the set terminal rated current IBase), the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.
If the current decreases below the minimum operating value, the memory resets until the positive sequence voltage exceeds 10% of its rated value.
The directional setting is given as a characteristic angle AngleRCA for the function and an angle window AngleROA.
1MRK505183-UEN C
Reverse
Uref RCA
ROA
ROA
Forward
Idir
en05000745.vsd
IEC05000745 V1 EN
Figure 164:
The default value of AngleRCA is 65. The parameters AngleROA gives the angle sector from AngleRCA for directional borders. A minimum current for directional phase start current signal can be set: IminOpPhSel. If no blockings are given the start signals will start the timers of the step. The time characteristic for each step can be chosen as definite time delay or inverse time characteristic. A wide range of standardized inverse time characteristics is available. It is also possible to create a tailor made time characteristic. The possibilities for inverse time characteristics are described in section "Inverse characteristics". All four steps in OC4PTOC can be blocked from the binary input BLOCK. The binary input BLKSTx (x=1, 2, 3 or 4) blocks the operation of respective step. Different types of reset time can be selected as described in section "Inverse characteristics". There is also a possibility to activate a preset change (IxMult x= 1, 2, 3 or 4) of the set operation current via a binary input (enable multiplier). In some applications the operation value needs to be changed, for example due to changed network switching state. The function can be blocked from the binary input BLOCK. The start signals from the function can be blocked from the binary input BLKST. The trip signals from the function can be blocked from the binary input BLKTR.
293 Technical reference manual
1MRK505183-UEN C
Figure 165:
7.2.4
1MRK505183-UEN C
Table 167:
Name TRIP TR1 TR2 TR3 TR4 TRL1 TRL2 TRL3 TR1L1 TR1L2 TR1L3 TR2L1 TR2L2 TR2L3 TR3L1 TR3L2 TR3L3 TR4L1 TR4L2 TR4L3 START ST1 ST2 ST3 ST4 STL1 STL2
1MRK505183-UEN C
Start signal from step1 phase L1 Start signal from step1 phase L2 Start signal from step1 phase L3 Start signal from step2 phase L1 Start signal from step2 phase L2 Start signal from step2 phase L3 Start signal from step3 phase L1 Start signal from step3 phase L2 Start signal from step3 phase L3 Start signal from step4 phase L1 Start signal from step4 phase L2 Start signal from step4 phase L3 Block from second harmonic detection Direction for phase1 Direction for phase2 Direction for phase3
7.2.5
Table 168:
Name Operation IBase UBase AngleRCA AngleROA StartPhSel
Setting parameters
OC4PTOC Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 40 - 65 40 - 89 Not Used 1 out of 3 2 out of 3 3 out of 3 Off Non-directional Forward Reverse Unit A kV Deg Deg Step 1 0.05 1 1 Default Off 3000 400.00 55 80 1 out of 3 Description Operation Off / On Base current Base voltage Relay characteristic angle (RCA) Relay operation angle (ROA) Number of phases required for op (1 of 3, 2 of 3, 3 of 3)
DirMode1
Non-directional
1MRK505183-UEN C
Name Characterist1
%IB s s -
Phase current operate level for step1 in % of IBase Definitive time delay of step 1 Time multiplier for the inverse time delay for step 1 Minimum operate time for inverse curves for step 1 Multiplier for current operate level for step 1 Directional mode of step 2 (off, nodir, forward, reverse)
Characterist2
I2> t2 k2
%IB s -
1 0.001 0.01
Phase current operate level for step2 in % of IBase Definitive time delay of step 2 Time multiplier for the inverse time delay for step 2
1MRK505183-UEN C
Multiplier for current operate level for step 2 Minimum operate time for inverse curves for step 2 Directional mode of step 3 (off, nodir, forward, reverse)
Characterist3
%IB s s -
Phase current operate level for step3 in % of IBase Definitive time delay of step 3 Time multiplier for the inverse time delay for step 3 Minimum operate time for inverse curves for step 3 Multiplier for current operate level for step 3 Directional mode of step 4 (off, nodir, forward, reverse)
Characterist4
1MRK505183-UEN C
Table 169:
Name IMinOpPhSel 2ndHarmStab ResetTypeCrv1
tReset1 tPCrv1 tACrv1 tBCrv1 tCCrv1 tPRCrv1 tTRCrv1 tCRCrv1 HarmRestrain1 ResetTypeCrv2
s -
0.020 1.000 13.500 0.00 1.0 0.500 13.500 1.0 Off Instantaneous
Reset time delay used in IEC Definite Time curve step 1 Parameter P for customer programmable curve for step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter PR for customer programmable curve for step 1 Parameter TR for customer programmable curve for step 1 Parameter CR for customer programmable curve for step 1 Enable block of step 1 from harmonic restrain Selection of reset curve type for step 2
s -
Reset time delay used in IEC Definite Time curve step 2 Parameter P for customer programmable curve for step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2
1MRK505183-UEN C
Parameter C for customer programmable curve for step 2 Parameter PR for customer programmable curve for step 2 Parameter TR for customer programmable curve for step 2 Parameter CR for customer programmable curve for step 2 Enable block of step 2 from harmonic restrain Selection of reset curve type for step 3
tReset3 tPCrv3 tACrv3 tBCrv3 tCCrv3 tPRCrv3 tTRCrv3 tCRCrv3 HarmRestrain3 ResetTypeCrv4
s -
0.020 1.000 13.500 0.00 1.0 0.500 13.500 1.0 Off Instantaneous
Reset time delay used in IEC Definite Time curve step 3 Parameter P for customer programmable curve for step 3 Parameter A for customer programmable curve for step 3 Parameter B for customer programmable curve for step 3 Parameter C for customer programmable curve for step 3 Parameter PR for customer programmable curve for step 3 Parameter TR for customer programmable curve for step 3 Parameter CR for customer programmable curve for step 3 Enable block of step3 from harmonic restrain Selection of reset curve type for step 4
s -
Reset time delay used in IEC Definite Time curve step 4 Parameter P for customer programmable curve for step 4 Parameter A for customer programmable curve for step 4 Parameter B for customer programmable curve for step 4 Parameter C for customer programmable curve for step 4 Parameter PR for customer programmable curve for step 4
1MRK505183-UEN C
Table 170:
Name MeasType
7.2.6
Technical data
Table 171:
Function Operate current Reset ratio Min. operating current Relay characteristic angle (RCA) Maximum forward angle Minimum forward angle 2nd harmonic blocking Independent time delay Minimum operate time Inverse characteristics, see table 644, table 645 and table 646 Operate time, start function Reset time, start function Critical impulse time Impulse margin time
7.3
1MRK505183-UEN C
IN>>
IEF V1 EN
7.3.1
Introduction
The Instantaneous residual overcurrent protection EFPIOC has a low transient overreach and short tripping times to allow the use for instantaneous earth-fault protection, with the reach limited to less than typical eighty percent of the line at minimum source impedance. EFPIOC can be configured to measure the residual current from the three-phase current inputs or the current from a separate current input. EFPIOC can be blocked by activating the input BLOCK.
7.3.2
Principle of operation
The sampled analog residual currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of the residual current, as well as from the sample values the equivalent RMS value is derived. This current value is fed to the Instantaneous residual overcurrent protection (EFPIOC). In a comparator the RMS value is compared to the set operation current value of the function (IN>>). If the residual current is larger than the set operation current a signal from the comparator is set to true. This signal will, without delay, activate the output signal TRIP. There is also a possibility to activate a preset change of the set operation current via a binary input (enable multiplier MULTEN). In some applications the operation value needs to be changed, for example due to transformer inrush currents. EFPIOC function can be blocked from the binary input BLOCK. The trip signals from the function can be blocked from the binary input BLKAR, that can be activated during single pole trip and autoreclosing sequences.
7.3.3
Function block
EFPIOC I3P* BLOCK BLKAR MULTEN TRIP
IEC06000269-2-en.vsd
IEC06000269 V2 EN
Figure 166:
1MRK505183-UEN C
7.3.4
Table 173:
Name TRIP
7.3.5
Table 174:
Name Operation IBase IN>>
Setting parameters
EFPIOC Group settings (basic)
Values (Range) Off On 1 - 99999 1 - 2500 Unit A %IB Step 1 1 Default Off 3000 200 Description Operation Off / On Base current Operate residual current level in % of IBase
Table 175:
Name StValMult
7.3.6
Technical data
Table 176:
Function Operate current Reset ratio Operate time Reset time Critical impulse time Operate time Table continues on next page
1MRK505183-UEN C
7.4
IN 4 4 alt
TEF-REVA V1 EN
7.4.1
Introduction
The four step residual overcurrent protection EF4PTOC has an inverse or definite time delay independent for each step separately. All IEC and ANSI time delayed characteristics are available together with an optional user defined characteristic. The directional function is voltage polarized, current polarized or dual polarized. EF4PTOC can be set directional or non-directional independently for each of the steps. A second harmonic blocking can be set individually for each step. EF4PTOC can be used as main protection for phase-to-earth faults. EF4PTOC can also be used to provide a system back-up for example, in the case of the primary protection being out of service due to communication or voltage transformer circuit failure. Directional operation can be combined together with corresponding communication logic in permissive or blocking teleprotection scheme. Current reversal and weak-end infeed functionality are available as well. EF4PTOC can be configured to measure the residual current from the three-phase current inputs or the current from a separate current input.
1MRK505183-UEN C
7.4.2
These inputs are connected from the corresponding pre-processing function blocks in the Configuration Tool within PCM600.
7.4.2.1
2.
calculated from three-phase current input within the IED (when the fourth analog input into the pre-processing block connected to EF4PTOC function Analog Input I3P is not connected to a dedicated CT input of the IED in PCM600). In such case the pre-processing block will calculate 3I0 from the first three inputs into the pre-processing block by using the following formula:
(Equation 64)
where: IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental frequency component of the residual current is derived. The phasor magnitude is used within the EF4PTOC protection to compare it with the
305 Technical reference manual
1MRK505183-UEN C
set operation current value of the four steps (IN1>, IN2>, IN3> or IN4>). If the residual current is larger than the set operation current and the step is used in nondirectional mode a signal from the comparator for this step is set to true. This signal will, without delay, activate the output signal STINx (x=step 1-4) for this step and a common START signal.
7.4.2.2
Internal polarizing
A polarizing quantity is used within the protection in order to determine the direction to the earth fault (Forward/Reverse). The function can be set to use voltage polarizing, current polarizing or dual polarizing.
Voltage polarizing
When voltage polarizing is selected the protection will use the residual voltage -3U0 as polarizing quantity U3P. This voltage can be: 1. directly measured (when a dedicated VT input of the IED is connected in PCM600 to the fourth analog input of the pre-processing block connected to EF4PTOC function input U3P). This dedicated IED VT input shall be then connected to open delta winding of a three phase main VT. calculated from three phase voltage input within the IED (when the fourth analog input into the pre-processing block connected to EF4PTOC analog function input U3P is NOT connected to a dedicated VT input of the IED in PCM600). In such case the pre-processing block will calculate -3U0 from the first three inputs into the pre-processing block by using the following formula:
2.
(Equation 65)
where: UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages. Note! In order to use this all three phase-to-earth voltages must be connected to three IED VT inputs.
The residual voltage is pre-processed by a discrete fourier filter. Thus, the phasor of the fundamental frequency component of the residual voltage is derived. This phasor is used together with the phasor of the operating current, in order to determine the direction to the earth fault (Forward/Reverse). In order to enable voltage polarizing the magnitude of polarizing voltage shall be bigger than a minimum level defined by setting parameter UpolMin. It shall be noted that 3U0 is used to determine the location of the earth fault. This insures the required inversion of the polarizing voltage within the earth-fault function.
1MRK505183-UEN C
2.
calculated from three phase current input within the IED (when the fourth analog input into the pre-processing block connected to EF4PTOC function analog input I3PPOL is NOT connected to a dedicated CT input of the IED in PCM600). In such case the pre-processing block will calculate 3I0 from the first three inputs into the pre-processing block by using the following formula:
(Equation 66)
where: IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
The residual polarizing current is pre-processed by a discrete fourier filter. Thus the phasor of the fundamental frequency component of the residual current is derived. This phasor is then multiplied with pre-set equivalent zero-sequence source Impedance in order to calculate equivalent polarizing voltage UIPol in accordance with the following formula:
UIPol = Z 0s IPol = (RNPol + j XNPol) IPol
EQUATION1877 V2 EN
(Equation 67)
, which will be then used, together with the phasor of the operating current, in order to determine the direction to the earth fault (Forward/Reverse). In order to enable current polarizing the magnitude of polarizing current shall be bigger than a minimum level defined by setting parameter IPolMin.
Dual polarizing
When dual polarizing is selected the function will use the vectorial sum of the voltage based and current based polarizing in accordance with the following formula:
1MRK505183-UEN C
(Equation 68)
Then the phasor of the total polarizing voltage UTotPol will be used, together with the phasor of the operating current, to determine the direction of the earth fault (Forward/Reverse).
7.4.2.3
7.4.2.4
7.4.2.5
7.4.2.6
308
1MRK505183-UEN C
that the directional decision (Forward/Reverse) is not made within the residual overcurrent step itself. The direction of the fault is determined in common directional supervision element. Residual current pickup value. Type of operating characteristic (inverse or definite time). By this parameter setting it is possible to select inverse or definite time delay for the earth-fault protection. Most of the standard IEC and ANSI inverse characteristics are available. For the complete list of available inverse curves please refer to section "Inverse characteristics". Type of reset characteristic (Instantaneous / IEC Reset / ANSI Reset). By this parameter setting it is possible to select the reset characteristic of the step. For the complete list of available reset curves please refer to section "Inverse time characteristics". Time delay related settings. By these parameter settings the properties like definite time delay, minimum operating time for inverse curves, reset time delay and parameters to define user programmable inverse curve are defined. Supervision by second harmonic blocking feature (On/Off). By this parameter setting it is possible to prevent operation of the step if the second harmonic content in the residual current exceeds the preset level. Multiplier for scaling of the set residual current pickup value by external binary signal. By this parameter setting it is possible to increase residual current pickup value when function binary input ENMULTx has logical value 1.
Simplified logic diagram for one residual overcurrent step is shown in figure 167.
BLKTR Characteristx=DefTime
a b a>b
|IOP| ENMULTx INxMult INx> BLKSTx BLOCK 2ndH_BLOCK_Int HarmRestrain1=Disabled DirModex=Off DirModex=Non-directional DirModex=Forward DirModex=Reverse
tx
OR
AND
TRINx
T F
AND
STINx
Inverse
Characteristx=Inverse
OR
OR
STAGEx_DIR_Int
FORWARD_Int
AND
OR
REVERSE_Int
AND
en07000064.vsd
IEC07000064 V1 EN
Figure 167:
The protection can be completely blocked from the binary input BLOCK. Output signals for respective step, STINx and TRINx, can be blocked from the binary
309 Technical reference manual
1MRK505183-UEN C
input BLKSTx. The trip signals from the function can be blocked from the binary input BLKTR.
7.4.2.7
The operating and polarizing quantity are then used inside the directional element, as shown in figure 168, in order to determine the direction of the earth fault.
1MRK505183-UEN C
Reverse Area
IEC07000066-3-en.vsd
IEC07000066 V3 EN
Figure 168:
Two relevant setting parameters for directional supervision element are: Directional element will be internally enabled to operate as soon as Iop is bigger than 40% of IN>Dir and directional condition is fulfilled in set direction. Relay characteristic angle AngleRCA, which defines the position of forward and reverse areas in the operating characteristic.
Directional comparison step, built-in within directional supervision element, will set EF4PTOC function output binary signals: 1. 2. STFW=1 when operating quantity magnitude Iop x cos( - AngleRCA) is bigger than setting parameterIN>Dir and directional supervision element detects fault in forward direction. STRV=1 when operating quantity magnitude Iop x cos( - AngleRCA) is bigger than 60% of setting parameter IN>Dir and directional supervision element detects fault in reverse direction.
These signals shall be used for communication based earth-fault teleprotection communication schemes (permissive or blocking). Simplified logic diagram for directional supervision element with integrated directional comparison step is shown in figure 169:
311 Technical reference manual
1MRK505183-UEN C
|Iop|
a a>b b
REVERSE_Int
a
AND
STRV
X
a>b b
FORWARD_Int
AND
STFW
AND
FORWARD_Int
T 0.0 F
Directional Characteristic
UPolMin
IPol RNPol XNPol Complex Number X UIPol 0.0 T F STAGE1_DIR_Int STAGE2_DIR_Int STAGE3_DIR_Int STAGE4_DIR_Int
RVS
AND
REVERSE_Int
OR AND
BLOCK
IEC07000067-3-en.vsd
IEC07000067 V3 EN
Figure 169:
Simplified logic diagram for directional supervision element with integrated directional comparison step
7.4.2.8
1MRK505183-UEN C
switched in, the asymmetric inrush current of the switched in transformer will cause partial saturation of the transformer already in service. This is called transferred saturation. The 2nd harmonic of the inrush currents of the two transformers will be in phase opposition. The summation of the two currents will thus give a small 2nd harmonic current. The residual fundamental current will however be significant. The inrush current of the transformer in service before the parallel transformer energizing, will be a little delayed compared to the first transformer. Therefore we will have high 2nd harmonic current component initially. After a short period this current will however be small and the normal 2nd harmonic blocking will reset. If the BlkParTransf function is activated the 2nd harmonic restrain signal will be latched as long as the residual current measured by the relay is larger than a selected step current level. This feature has been called Block for Parallel Transformers. This 2nd harmonic sealin feature will be activated when all of the following three conditions are simultaneously fulfilled: 1. 2. 3. Feature is enabled by entering setting parameter BlkParTransf = On. Basic 2nd harmonic restraint feature has been active for at least 70ms. Residual current magnitude is higher than the set start value for one of the four residual overcurrent stages. By a parameter setting UseStartValue it is possible to select which one of the four start values that will be used (IN1> or IN2> or IN3> or IN4>).
Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking signal will be sealed-in until the residual current magnitude falls below a value defined by parameter setting UseStartValue (see condition 3 above). Simplified logic diagram for 2nd harmonic blocking feature is shown in figure 170.
1MRK505183-UEN C
BLOCK
IOP
a>b
OR
2NDHARMD
2ndHarmStab
q-1
t=70ms t BlkParTransf=On
|IOP|
a b a>b
OR
AN D
OR
2ndH_BLOCK_Int
en07000068-2.vsd
IEC07000068 V2 EN
Figure 170:
Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers feature
7.4.2.9
1MRK505183-UEN C
function. The Under-Time logic can also be blocked by the 2nd harmonic restraint feature. This enables high sensitivity even if power transformer inrush currents can occur at breaker closing. This logic is typically used to detect asymmetry of CB poles immediately after switching of the circuit breaker. The Under-Time logic is activated either from change in circuit breaker position or from circuit breaker close and open command pulses. This selection is done by setting parameter ActUnderTime. In case of a start from step 4 this logic will give a trip after a set delay tUnderTime. This delay is normally set to a relatively short time (default 300 ms). Practically the Under-Time logic acts as circuit breaker pole-discordance protection, but it is only active immediately after breaker switching. The UnderTime logic can only be used in solidly or low impedance grounded systems.
SOTF
ActivationSOTF
tSOTF
t
HarmResSOFT
OR
Open Close
OR
ActUnderTime
AND
Figure 171:
EF4PTOC Logic Diagram Simplified logic diagram for the complete EF4PTOC function is shown in figure 172:
1MRK505183-UEN C
Direction Element
TRIP
3I0
harmRestrBlock
start step 2, 3 and 4 Blocking at parallel transformers SwitchOnToFault CB pos or cmd TRIP
Mode Selection
en06000376.vsd
IEC06000376 V1 EN
Figure 172:
7.4.3
Function block
EF4PTOC I3P* U3P* I3PPOL* BLOCK BLKTR BLKST1 BLKST2 BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 CBPOS CLOSECB OPENCB TRIP TRIN1 TRIN2 TRIN3 TRIN4 TRSOTF START STIN1 STIN2 STIN3 STIN4 STSOTF STFW STRV 2NDHARMD
IEC06000424-2-en.vsd
IEC06000424 V2 EN
Figure 173:
1MRK505183-UEN C
7.4.4
Table 178:
Name TRIP TRIN1 TRIN2 TRIN3 TRIN4 TRSOTF START STIN1 STIN2 STIN3 STIN4 STSOTF
1MRK505183-UEN C
Forward directional start signal Reverse directional start signal 2nd harmonic block signal
7.4.5
Table 179:
Name Operation IBase UBase AngleRCA polMethod
Setting parameters
EF4PTOC Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 -180 - 180 Voltage Current Dual 1 - 100 2 - 100 0.50 - 1000.00 0.50 - 3000.00 1 - 100 5 - 100 Off On IN1> IN2> IN3> IN4> Off SOTF UnderTime SOTF+UnderTime Open Closed CloseCommand Step 2 Step 3 Off On 0.000 - 60.000 0.000 - 60.000 Unit A kV Deg Step 1 0.05 1 Default Off 3000 400.00 65 Voltage Description Operation Off / On Base value for current settings Base value for voltage settings Relay characteristic angle (RCA) Type of polarization
1 1 0.01 0.01 1 1 -
Minimum voltage level for polarization in % of UBase Minimum current level for polarization in % of IBase Real part of source Z to be used for current polarisation Imaginary part of source Z to be used for current polarisation Residual current level for Direction release in % of IBase Second harmonic restrain operation in % of IN amplitude Enable blocking at parallel transformers Current level blk at parallel transf (step1, 2, 3 or 4)
SOTF
Off
ActivationSOTF
Open
s s
0.001 0.001
Selection of step used for SOTF Enable harmonic restrain function in SOTF Time delay for SOTF Switch-onto-fault active time
1MRK505183-UEN C
Name DirMode1
Characterist1
%IB s s -
Operate residual current level for step 1 in % of IBase Independent (defenite) time delay of step 1 Time multiplier for the dependent time delay for step 1 Multiplier for scaling the current setting value for step 1 Minimum operate time for inverse curves for step 1 Enable block of step 1 from harmonic restrain Directional mode of step 2 (off, nodir, forward, reverse)
Characterist2
1MRK505183-UEN C
Operate residual current level for step 2 in % of IBase Independent (definitive) time delay of step 2 Time multiplier for the dependent time delay for step 2 Multiplier for scaling the current setting value for step 2 Minimum operate time for inverse curves step 2 Enable block of step 2 from harmonic restrain Directional mode of step 3 (off, nodir, forward, reverse)
Characterist3
%IB s s -
Operate residual current level for step 3 in % of IBase Independent time delay of step 3 Time multiplier for the dependent time delay for step 3 Multiplier for scaling the current setting value for step 3 Minimum operate time for inverse curves for step 3 Enable block of step 3 from harmonic restrain Directional mode of step 4 (off, nodir, forward, reverse)
1MRK505183-UEN C
Name Characterist4
%IB s s -
Operate residual current level for step 4 in % of IBase Independent (definitive) time delay of step 4 Time multiplier for the dependent time delay for step 4 Multiplier for scaling the current setting value for step 4 Minimum operate time in inverse curves step 4 Enable block of step 4 from harmonic restrain
Table 180:
Name ActUnderTime tUnderTime ResetTypeCrv1
s -
Reset curve type for step 1 Parameter P for customer programmable curve for step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter PR for customer programmable curve for step 1
1MRK505183-UEN C
Parameter TR for customer programmable curve for step 1 Parameter CR for customer programmable curve for step 1 Reset curve type for step 2
s -
Reset curve type for step 2 Parameter P for customer programmable curve for step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter PR for customer programmable curve for step 2 Parameter TR for customer programmable curve for step 2 Parameter CR for customer programmable curve for step 2 Reset curve type for step 3
s -
Reset curve type for step 3 Parameter P for customer programmable curve for step 3 Parameter A for customer programmable curve for step 3 Parameter B for customer programmable curve for step 3 Parameter C for customer programmable curve step 3 Parameter PR for customer programmable curve step 3 Parameter TR for customer programmable curve step 3 Parameter CR for customer programmable curve for step 3 Reset curve type for step 4
s -
Reset curve type for step 4 Parameter P for customer programmable curve for step 4 Parameter A for customer programmable curve step 4
1MRK505183-UEN C
7.4.6
Technical data
Table 181:
Function Operate current Reset ratio Operate current for directional comparison Timers Inverse characteristics, see table 644, table 645 and table 646 Second harmonic restrain operation Relay characteristic angle Minimum polarizing voltage Minimum polarizing current Real part of source Z used for current polarization Imaginary part of source Z used for current polarization Operate time, start function Reset time, start function Critical impulse time Impulse margin time
7.5
1MRK505183-UEN C
7.5.1
Introduction
In networks with high impedance earthing, the phase-to-earth fault current is significantly smaller than the short circuit currents. Another difficulty for earthfault protection is that the magnitude of the phase-to-earth fault current is almost independent of the fault location in the network. Directional residual current can be used to detect and give selective trip of phase-toearth faults in high impedance earthed networks. The protection uses the residual current component 3I0 cos , where is the angle between the residual current and the residual voltage (-3U0), compensated with a characteristic angle. Alternatively, the function can be set to strict 3I0 level with an check of angle 3I0 and cos . Directional residual power can also be used to detect and give selective trip of phaseto-earth faults in high impedance earthed networks. The protection uses the residual power component 3I0 3U0 cos , where is the angle between the residual current and the reference residual voltage, compensated with a characteristic angle. A normal non-directional residual current function can also be used with definite or inverse time delay. A back-up neutral point voltage function is also available for non-directional sensitive back-up protection. In an isolated network, that is, the network is only coupled to earth via the capacitances between the phase conductors and earth, the residual current always has -90 phase shift compared to the reference residual voltage. The characteristic angle is chosen to -90 in such a network. In resistance earthed networks or in Petersen coil earthed, with a parallel resistor, the active residual current component (in phase with the residual voltage) should be used for the earth-fault detection. In such networks the characteristic angle is chosen to 0. As the amplitude of the residual current is independent of the fault location the selectivity of the earth-fault protection is achieved by time selectivity. When should the sensitive directional residual overcurrent protection be used and when should the sensitive directional residual power protection be used? Consider the following facts:
1MRK505183-UEN C
Sensitive directional residual overcurrent protection gives possibility for better sensitivity Sensitive directional residual power protection gives possibility to use inverse time characteristics. This is applicable in large high impedance earthed networks, with large capacitive earth-fault current In some power systems a medium size neutral point resistor is used, for example, in low impedance earthed system. Such a resistor will give a resistive earth-fault current component of about 200 - 400 A at a zero resistive phase-toearth fault. In such a system the directional residual power protection gives better possibilities for selectivity enabled by inverse time power characteristics.
7.5.2
7.5.2.1
Principle of operation
Function inputs
The function is using phasors of the residual current and voltage. Group signals I3P and U3P containing phasors of residual current and voltage is taken from preprocessor blocks. The sensitive directional earth fault protection has the following sub-functions included:
1MRK505183-UEN C
Uref
3I0
IEC06000648_2_en.vsd
IEC06000648 V2 EN
Figure 174:
RCADir set to 0
Uref
IEC06000649_2_en.vsd
IEC06000649 V2 EN
Figure 175:
For trip, both the residual current 3I0cos and the release voltage 3U0, must be larger than the set levels: INCosPhi> and UNRel>. Trip from this function can be blocked from the binary input BLKTRDIR.
1MRK505183-UEN C
When the function is activated binary output signals START and STDIRIN are activated. If the activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are activated. The trip from this sub-function has definite time delay. There is a possibility to increase the operate level for currents where the angle is larger than a set value as shown in the figure below. This is equivalent to blocking of the function if > ROADir. This option is used to handle angle error for the instrument transformers.
RCADir = 0o
3I0
Operate area
ROADir
IEC06000650_2_en.vsd
IEC06000650 V2 EN
Figure 176:
The function indicates forward/reverse direction to the fault. Reverse direction is defined as 3I0cos ( + 180) the set value. It is also possible to tilt the characteristic to compensate for current transformer angle error with a setting RCAComp as shown in the figure 177:
1MRK505183-UEN C
RCADir = 0
Operate area
-3U0 =Uref
3I0 (prim)
en06000651.vsd
IEC06000651 V2 EN
Figure 177:
Explanation of RCAComp
1MRK505183-UEN C
EQUATION1942 V2 EN
en06000652.vsd
IEC06000652 V2 EN
Figure 178:
Example of characteristic
For trip, both the residual current 3I0 and the release voltage 3U0, shall be larger than the set levels INDir> and UNREL> and the angle shall be in the set sector ROADir and RCADir. Trip from this function can be blocked from the binary input BLKTRDIR. When the function is activated binary output signals START and STDIRIN are activated. If the activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are activated. The function indicate forward/reverse direction to the fault. Reverse direction is defined as is within the angle sector: RCADir + 180 ROADir This variant shall have definite time delay.
1MRK505183-UEN C
For all the directional functions there are directional start signals STFW: fault in the forward direction, and STRV: start in the reverse direction. Even if the directional function is set to operate for faults in the forward direction a fault in the reverse direction will give the start signal STRV. Also if the directional function is set to operate for faults in the reverse direction a fault in the forward direction will give the start signal STFW.
This function will measure the residual current without checking the phase angle. The function will be used to detect cross-country faults. This function can serve as alternative or back-up to distance protection with phase preference logic. To assure selectivity the distance protection can block the non-directional earth fault current function via the input BLKNDN. If available the non-directional function is using the calculated residual current, derived as sum of the phase currents. This will give a better ability to detect crosscountry faults with high residual current, also when dedicated core balance CT for the sensitive earth fault protection will saturate. This variant shall have the possibility of choice between definite time delay and inverse time delay. The inverse time delay shall be according to IEC 60255-3. For trip, the residual current 3I0 shall be larger than the set levels (INNonDir>). Trip from this function can be blocked from the binary input BLKNDN. When the function is activated binary output signal STNDIN is activated. If the activation is active after the set delay tINNonDir or after the inverse time delay the binary output signals TRIP and TRNDIN are activated.
The directional function shall be released when the residual voltage gets higher than a set level. There shall also be a separate trip, with its own definite time delay, from this set voltage level. For trip, the residual voltage 3U0 shall be larger than the set levels (UN>). Trip from this function can be blocked from the binary input BLKUN. When the function is activated binary output signal STUN is activated. If the activation is active after the set delay tUNNonDir TRIP and TRUN are activated. A simplified logical diagram of the total function is shown in figure 179.
1MRK505183-UEN C
INNonDir> t UN> t
OpMODE=3I0cosfi
IN> INcosPhi>
OpMODE=3I03U0cosfi
&
&
t
STARTDIRIN
SN TimeChar = InvTime
&
TRDIRIN
&
TimeChar = DefTime
&
&
1 STFW
& STRV
en06000653.vsd
IEC06000653 V2 EN
Figure 179:
7.5.3
Function block
SDEPSDE I3P* U3P* BLOCK BLKTR BLKTRDIR BLKNDN BLKUN TRIP TRDIRIN TRNDIN TRUN START STDIRIN STNDIN STUN STFW STRV STDIR UNREL IEC07000032-2-en.vsd
IEC07000032 V2 EN
Figure 180:
1MRK505183-UEN C
Table 183:
Name TRIP TRDIRIN TRNDIN TRUN START STDIRIN STNDIN STUN STFW STRV STDIR UNREL
1MRK505183-UEN C
7.5.5
Table 184:
Name Operation OpMode
DirMode RCADir RCAComp ROADir INCosPhi> SN> INDir> tDef SRef kSN OpINNonDir> INNonDir> tINNonDir TimeChar
Forward -90 0.0 90 1.00 10.00 5.00 0.100 10.00 0.10 Off 10.00 1.000 IEC Norm. inv.
Direction of operation forward or reverse Relay characteristic angle RCA, in deg Relay characteristic angle compensation Relay open angle ROA used as release in phase mode, in deg Set level for 3I0cosFi, directional res over current, in %Ib Set level for 3I03U0cosFi, starting inv time count, in %Sb Set level for directional residual over current prot, in %Ib Definite time delay directional residual overcurrent, in sec Reference value of res power for inverse time count, in %Sb Time multiplier setting for directional residual power mode Operation of non-directional residual overcurrent protection Set level for non directional residual over current, in %Ib Time delay for non-directional residual over current, in sec Operation curve selection for IDMT operation
1MRK505183-UEN C
Minimum operate time for IEC IDMT curves, in sec IDMT time mult for non-dir res over current protection Operation of non-directional residual overvoltage protection Set level for non-directional residual over voltage, in %Ub Time delay for non-directional residual over voltage, in sec Residual release current for all directional modes, in %Ib Residual release voltage for all direction modes, in %Ub
Table 185:
Name tReset tPCrv tACrv tBCrv tCCrv ResetTypeCrv
Setting PR for customer programmable curve Setting TR for customer programmable curve Setting CR for customer programmable curve
Table 186:
Name IBase UBase SBase
1MRK505183-UEN C
Table 187:
Name RotResU
7.5.6
Technical data
Table 188:
Function Operate level for 3I0cosj directional residual overcurrent
Operate level for non directional residual overvoltage Residual release current for all directional modes
Residual release voltage for all directional modes Reset ratio Timers Inverse characteristics, see table 644, table 645 and table 646 Relay characteristic angle RCA Relay open angle ROA Operate time, non directional residual over current Reset time, non directional residual over current Operate time, start function Reset time, start function
(-179 to 180) degrees (0-90) degrees 60 ms typically at 0 to 2 x Iset 60 ms typically at 2 to 0 x Iset 150 ms typically at 0 to 2 x Iset 50 ms typically at 2 to 0 x Iset
1MRK505183-UEN C
7.6
SYMBOL-A V1 EN
7.6.1
Introduction
The increasing utilizing of the power system closer to the thermal limits has generated a need of a thermal overload protection also for power lines. A thermal overload will often not be detected by other protection functions and the introduction of the thermal overload protection can allow the protected circuit to operate closer to the thermal limits. The three-phase current measuring protection has an I2t characteristic with settable time constant and a thermal memory. An alarm level gives early warning to allow operators to take action well before the line is tripped.
7.6.2
Principle of operation
The sampled analog phase currents are pre-processed and for each phase current the RMS value is derived. These phase current values are fed to the thermal overload protection, one time constant function LPTTR. From the largest of the three-phase currents a final temperature is calculated according to the expression:
Q final
I = I ref
Tref
(Equation 70)
EQUATION1167 V1 EN
where: I Iref Tref is the largest phase current, is a given reference current and is steady state temperature corresponding to Iref
1MRK505183-UEN C
The ambient temperature is added to the calculated final temperature. If this temperature is larger than the set operate temperature level, TripTemp, a START output signal is activated. The actual temperature at the actual execution cycle is calculated as:
Dt Qn = Qn -1 + ( Q final - Q n-1 ) 1 - e t
EQUATION1168 V1 EN
(Equation 71)
where: Qn Qn-1 Qfinal Dt is the calculated present temperature, is the calculated temperature at the previous time step, is the calculated final temperature with the actual current, is the time step between calculation of the actual temperature and is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by adding the ambient temperature to the calculated temperature, as shown above. The ambient temperature can be taken from a separate sensor or can be given a constant value. The calculated component temperature is available as a real figure signal, TEMP. When the component temperature reaches the set alarm level AlarmTemp the output signal ALARM is set. When the component temperature reaches the set trip level TripTemp the output signal TRIP is set. There is also a calculation of the present time to operate with the present current. This calculation is only performed if the final temperature is calculated to be above the operation temperature:
(Equation 72)
The calculated time to trip is available as a real figure signal, TTRIP. After a trip, caused by the thermal overload protection, there can be a lockout to reconnect the tripped circuit. The output lockout signal LOCKOUT is activated when the device temperature is above the set lockout release temperature setting ReclTemp. The time to lockout release is calculated that is, a calculation of the cooling time to a set value. The thermal content of the function can be reset with input RESET.
1MRK505183-UEN C
(Equation 73)
Here the final temperature is equal to the set or measured ambient temperature. The calculated time to reset of lockout is available as a real figure signal, TENRECL. In some applications the measured current can involve a number of parallel lines. This is often used for cable lines where one bay connects several parallel cables. By setting the parameter IMult to the number of parallel lines (cables) the actual current on one line is used in the protection algorithm. To activate this option the input ENMULT must be activated. The protection has a reset input: RESET. By activating this input the calculated temperature is reset to its default initial value. This is useful during testing when secondary injected current has given a calculated false temperature level.
Final Temp > TripTemp START
actual temperature
LOCKOUT
TTRIP
TENRECL
IEC09000637_1_en.vsd
IEC09000637 V1 EN
Figure 181:
338
1MRK505183-UEN C
7.6.3
IEC04000396-2-en.vsd
IEC04000396 V3 EN
Figure 182:
7.6.4
Table 190:
Name TRIP START ALARM LOCKOUT
7.6.5
Table 191:
Name Operation IBase TRef
Setting parameters
LPTTR Group settings (basic)
Values (Range) Off On 0 - 99999 0 - 600 Unit A Deg Step 1 1 Default Off 3000 90 Description Operation Off / On Base current in A End temperature rise above ambient of the line when loaded with IRef
1MRK505183-UEN C
The load current (in %of IBase) leading to TRef temperature Current multiplier when function is used for two or more lines Time constant of the line in minutes. Temperature level for start (alarm) Temperature level for trip Temperature for reset of lockout after trip Operate pulse length. Minimum one execution cycle External temperature sensor availiable Ambient temperature used when AmbiSens is set to Off. Temperature raise above ambient temperature at startup
7.6.6
Technical data
Table 192:
Function Reference current Start temperature reference Operate time:
I 2 - I p2 t = t ln 2 I - Ib 2
EQUATION1356 V1 EN
(Equation 74)
I = actual measured current Ip = load current before overload occurs Ib = base current, IBase Alarm temperature Trip temperature Reset level temperature (0-200)C (0-400)C (0-400)C 2.0% of heat content trip 2.0% of heat content trip 2.0% of heat content trip
7.7
1MRK505183-UEN C
3I>BF
SYMBOL-U V1 EN
7.7.1
Introduction
Breaker failure protection (CCRBRF) ensures fast back-up tripping of surrounding breakers in case of own breaker failure to open. CCRBRF can be current based, contact based, or adaptive combination between these two principles. A current check with extremely short reset time is used as check criteria to achieve a high security against unnecessary operation. A contact check criteria can be used where the fault current through the breaker is small. CCRBRF can be single- or three-phase initiated to allow use with single phase tripping applications. For the three-phase version of CCRBRF the current criteria can be set to operate only if two out of four for example, two phases or one phase plus the residual current start. This gives a higher security to the back-up trip command. CCRBRF function can be programmed to give a single- or three-phase re-trip of the own breaker to avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to mistakes during testing.
7.7.2
Principle of operation
Breaker failure protection CCRBRF is initiated from protection trip command, either from protection functions within the IED or from external protection devices. The start signal can be phase selective or general (for all three phases). Phase selective start signals enable single pole re-trip function. This means that a second attempt to open the breaker is done. The re-trip attempt can be made after a set time delay. For transmission lines single pole trip and autoreclosing is often used. The re-trip function can be phase selective if it is initiated from phase selective line protection. The re-trip function can be done with or without current check. With the current check the re-trip is only performed if the current through the circuit breaker is larger than the operate current level. The start signal can be an internal or external protection trip signal. This signal will start the back-up trip timer. If the opening of the breaker is successful this is detected by the function, by detection of either low current through RMS evaluation and a special adapted current algorithm or by open contact indication. The special algorithm enables a very fast detection of successful breaker opening,
1MRK505183-UEN C
that is, fast resetting of the current measurement. If the current and/or contact detection has not detected breaker opening before the back-up timer has run its time a back-up trip is initiated. Further the following possibilities are available: The minimum length of the re-trip pulse, the back-up trip pulse and the backup trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the backup trip pulse 2 will however sustain as long as there is an indication of closed breaker. In the current detection it is possible to use three different options: 1 out of 3 where it is sufficient to detect failure to open (high current) in one pole, 1 out of 4 where it is sufficient to detect failure to open (high current) in one pole or high residual current and 2 out of 4 where at least two current (phase current and/ or residual current) shall be high for breaker failure detection. The current detection level for the residual current can be set different from the setting of phase current detection. It is possible to have different back-up time delays for single-phase faults and for multi-phase faults. The back-up trip can be made without current check. It is possible to have this option activated for small load currents only. It is possible to have instantaneous back-up trip function if a signal is high if the circuit breaker is insufficient to clear faults, for example at low gas pressure.
START STL1
30 ms
OR
BFP Started L1
150 ms
AND S R OR
BLOCK Reset L1
SR
AND
Time out L1
IEC09000976-1-en.vsd
IEC09000976 V1 EN
Figure 183:
1MRK505183-UEN C
IP>
a b
a>b
OR AND
FunctionMode
Current Contact
OR
Reset L1
Time out L1
Current and Contact
OR AND
Current High L1
CB Closed L1
OR
IL1
AND
BFP Started L1
a
I>BlkCont CBCLDL1
a>b
AND
OR
AND
AND
AND
Contact Closed L1
IEC09000977-1-en.vsd
IEC09000977 V1 EN
Figure 184:
BFP Started L1
t1
t
TRRETL3 TRRETL2
OR
TRRET TRRETL1
RetripMode
tPulse
OR OR
No CBPos Check
1
OR
AND
CBFLT
AND
IEC09000978-1-en.vsd
IEC09000978 V1 EN
Figure 185:
1MRK505183-UEN C
IN IN> BUTripMode
1
a b
a>b
AND
Contact Closed L1
OR OR
Current High L1
AND
AND
t2
BFP Started L1
t2MPh
AND
t
OR
AND
Backup Trip L1
OR
AND
OR
tPulse
OR OR
TRBU
tPulse t3
S AND R
SR
OR
TRBU2
IEC09000979-1-en.vsd
IEC09000979 V1 EN
Figure 186:
Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in respective phase has magnitude larger than setting parameter IP>.
7.7.3
Function block
CCRBRF I3P* BLOCK START STL1 STL2 STL3 CBCLDL1 CBCLDL2 CBCLDL3 CBFLT TRBU TRBU2 TRRET TRRETL1 TRRETL2 TRRETL3 CBALARM
IEC06000188-2-en.vsd
IEC06000188 V2 EN
Figure 187:
1MRK505183-UEN C
7.7.4
Table 194:
Name TRBU TRBU2 TRRET TRRETL1 TRRETL2 TRRETL3 CBALARM
7.7.5
Table 195:
Name Operation IBase FunctionMode
Setting parameters
CCRBRF Group settings (basic)
Values (Range) Off On 1 - 99999 Current Contact Current&Contact Unit A Step 1 Default Off 3000 Current Description Operation Off / On Base current Detection principle for back-up trip
1MRK505183-UEN C
RetripMode
Retrip Off
%IB %IB s s s s
Operate phase current level in % of IBase Operate residual current level in % of IBase Time delay of re-trip Time delay of back-up trip Time delay of back-up trip at multi-phase start Trip pulse duration
Table 196:
Name I>BlkCont t3 tCBAlarm
7.7.6
Technical data
Table 197:
Function Operate phase current Reset ratio, phase current Operate residual current Reset ratio, residual current Phase current level for blocking of contact function Reset ratio Timers Operate time for current detection Reset time for current detection
1MRK505183-UEN C
7.8
3I>STUB
SYMBOL-T V1 EN
7.8.1
Introduction
When a power line is taken out of service for maintenance and the line disconnector is opened in multi-breaker arrangements the voltage transformers will mostly be outside on the disconnected part. The primary line distance protection will thus not be able to operate and must be blocked. The stub protection STBPTOC covers the zone between the current transformers and the open disconnector. The three-phase instantaneous overcurrent function is released from a normally open, NO (b) auxiliary contact on the line disconnector.
7.8.2
Principle of operation
The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. These phase current values are fed to a comparator in the stub protection function STBPTOC. In a comparator the RMS values are compared to the set operating current value of the function I>. If a phase current is larger than the set operating current the signal from the comparator for this phase is activated. This signal will, in combination with the release signal from line disconnection (RELEASE input), activate the timer for the TRIP signal. If the fault current remains during the timer delay t, the TRIP output signal is activated. The function can be blocked by activation of the BLOCK input.
1MRK505183-UEN C
BLOCK TRIP
AND
en05000731.vsd
IEC05000731 V1 EN
Figure 188:
7.8.3
Function block
STBPTOC I3P* BLOCK BLKTR RELEASE TRIP START
IEC05000678-2-en.vsd
IEC05000678 V2 EN
Figure 189:
7.8.4
Table 199:
Name TRIP START
1MRK505183-UEN C
7.8.5
Table 200:
Name Operation IBase ReleaseMode I>
Table 201:
Name t
7.8.6
Technical data
Table 202:
Function Operating current Reset ratio Definite time Operating time, start function Resetting time, startfunction Critical impulse time Impulse margin time
7.9
PD
SYMBOL-S V1 EN
1MRK505183-UEN C
Single pole operated circuit breakers can due to electrical or mechanical failures end up with the different poles in different positions (close-open). This can cause negative and zero sequence currents which gives thermal stress on rotating machines and can cause unwanted operation of zero sequence or negative sequence current functions. Normally the own breaker is tripped to correct such a situation. If the situation persists the surrounding breaker should be tripped to clear the unsymmetrical load situation. The Polediscordance protection function CCRPLD operates based on information from auxiliary contacts of the circuit breaker for the three phases with additional criteria from unsymmetrical phase current when required.
7.9.2
Principle of operation
The detection of pole discordance can be made in two different ways. If the contact based function is used an external logic can be made by connecting the auxiliary contacts of the circuit breaker so that a pole discordance is indicated, see figure 190.
circuit breaker
Figure 190:
This binary signal is connected to a binary input of the IED. The appearance of this signal will start a timer that will give a trip signal after the set time delay. There is also a possibility to connect all phase selective auxiliary contacts (phase contact open and phase contact closed) to binary inputs of the IED, see figure 191.
1MRK505183-UEN C
C.B.
poleOneClosed from C.B. poleTwoClosed from C.B. poleThreeClosed from C.B. + poleOneOpened from C.B. poleTwoOpened from C.B. poleThreeOpened from C.B.
en05000288.vsd
IEC05000288 V1 EN
Figure 191:
In this case the logic is realized within the function. If the inputs are indicating pole discordance the trip timer is started. This timer will give a trip signal after the set delay. Pole discordance can also be detected by means of phase selective current measurement. The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. The smallest and the largest phase current are derived. If the smallest phase current is lower than the setting CurrUnsymLevel times the largest phase current the settable trip timer (tTrip) is started. The tTrip timer gives a trip signal after the set delay. The TRIP signal is a pulse 150 ms long. The current based pole discordance function can be set to be active either continuously or only directly in connection to breaker open or close command. The function also has a binary input that can be configured from the autoreclosing function, so that the pole discordance function can be blocked during sequences with a single pole open if single pole autoreclosing is used. The simplified block diagram of the current and contact based Pole discordance protection function CCRPLD is shown in figure 192.
1MRK505183-UEN C
BLOCK BLKDBYAR OR
PolPosAuxCont POLE1OPN POLE1CL POLE2OPN POLE2CL POLE3OPN POLE3CL AND Discordance detection AND OR PD Signal from CB EXTPDIND CLOSECMD OPENCMD OR AND Unsymmetry current detection en05000747.vsd
IEC05000747 V1 EN
t t
150 ms TRIP
AND
t+200 ms
Figure 192:
Simplified block diagram of pole discordance function CCRPLD contact and current based
CCRPLDis blocked if: The IED is in TEST mode and CCRPLD has been blocked from the local HMI The input signal BLOCK is high The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discordance protection. It can be connected to a binary input in the IED in order to receive a block command from external devices or can be software connected to other internal functions in the IED itself in order to receive a block command from internal functions. Through OR gate it can be connected to both binary inputs and internal function outputs. The BLKDBYAR signal blocks the pole discordance operation when a single phase autoreclosing cycle is in progress. It can be connected to the output signal 1PT1 on SMBRRECfunction block. If the autoreclosing function is an external device, then BLKDBYAR has to be connected to a binary input in the IED and this binary input is connected to a signalization 1phase autoreclosing in progress from the external autoreclosing device. If the pole discordance protection is enabled, then two different criteria can generate a trip signal TRIP: Pole discordance signaling from the circuit breaker. Unsymmetrical current detection.
1MRK505183-UEN C
7.9.2.1
7.9.2.2
If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS is turned high. This detection is enabled to generate a trip after a set time delay tTrip if the detection occurs in the next 200 ms after the circuit breaker has received a command to open trip or close and if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation during unsymmetrical load conditions. The pole discordance protection is informed that a trip or close command has been given to the circuit breaker through the inputs CLOSECMD (for closing command information) and OPENCMD (for opening command information). These inputs can be connected to terminal binary inputs if the information are generated from the field (that is from auxiliary contacts of the close and open push buttons) or may be software connected to the outputs of other integrated functions (that is close command from a control function or a general trip from integrated protections).
7.9.3
Function block
CCRPLD I3P* BLOCK BLKDBYAR CLOSECMD OPENCMD EXTPDIND POLE1OPN POLE1CL POLE2OPN POLE2CL POLE3OPN POLE3CL TRIP START
IEC06000275-2-en.vsd
IEC06000275 V2 EN
Figure 193:
1MRK505183-UEN C
Table 204:
Name TRIP START
7.9.5
Table 205:
Name Operation IBase tTrip ContSel
Setting parameters
CCRPLD Group settings (basic)
Values (Range) Off On 1 - 99999 0.000 - 60.000 Off PD signal from CB Pole pos aux cont. Off CB oper monitor Continuous monitor 0 - 100 0 - 100 Unit s Step 1 0.001 Default Off 3000 0.300 Off Description Operation Off / On Base current Time delay between trip condition and trip signal Contact function selection
CurrSel
Off
CurrUnsymLevel CurrRelLevel
% %IB
1 1
80 10
Unsym magn of lowest phase current compared to the highest. Current magnitude for release of the function in % of IBase
1MRK505183-UEN C
7.9.6
7.10
P<
SYMBOL-LL V1 EN
7.10.1
Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on a rotating shaft to electric energy. Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous motor and starts to take electric power from the rest of the power system. This operating state, where individual synchronous machines operate as motors, implies no risk for the machine itself. If the generator under consideration is very large and if it consumes lots of electric power, it may be desirable to disconnect it to ease the task for the rest of the power system. Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the reverse power protection is to protect the turbine and not to protect the generator itself. Figure 194 illustrates the reverse power protection with underpower IED and with overpower IED. The underpower IED gives a higher margin and should provide better dependability. On the other hand, the risk for unwanted operation immediately after synchronization may be higher. One should set the underpower IED to trip if the active power from the generator is less than about 2%. One should set the overpower IED to trip if the power flow from the network to the generator is higher than 1% depending on the type of turbine.
1MRK505183-UEN C
Underpower IED Q
Overpower IED Q
IEC06000315-2-en.vsd
IEC06000315 V2 EN
Figure 194:
7.10.2
Principle of operation
A simplified scheme showing the principle of the power protection function is shown in figure 195. The function has two stages with individual settings.
P Derivation of S(composant) in Char angle S(angle) S(angle) < Power1 t TRIP1 START1
TRIP2 START2
P = POWRE Q = POWIM
IEC09000018-2-en.vsd
IEC09000018 V2 EN
Figure 195:
The function will use voltage and current phasors calculated in the pre-processing blocks. The apparent complex power is calculated according to chosen formula as shown in table 207.
1MRK505183-UEN C
Table 207:
Set value: Mode L1, L2, L3
S = U L1 I L1* + U L 2 I L 2* + U L 3 I L 3*
EQUATION1697 V1 EN
(Equation 75)
Arone
S = U L1L 2 I L1* - U L 2 L 3 I L 3*
EQUATION1698 V1 EN
(Equation 76)
PosSeq
S = 3 U PosSeq I PosSeq *
EQUATION1699 V1 EN
(Equation 77)
L1L2
S = U L1L 2 ( I L1* - I L 2* )
EQUATION1700 V1 EN
(Equation 78)
L2L3
S = U L 2 L 3 ( I L 2* - I L 3* )
EQUATION1701 V1 EN
(Equation 79)
L3L1
S = U L 3 L1 ( I L 3* - I L1* )
EQUATION1702 V1 EN
(Equation 80)
L1
S = 3 U L1 I L1*
EQUATION1703 V1 EN
(Equation 81)
L2
S = 3 U L 2 I L 2*
EQUATION1704 V1 EN
(Equation 82)
L3
S = 3 U L 3 I L 3*
EQUATION1705 V1 EN
(Equation 83)
The active and reactive power is available from the function and can be used for monitoring and fault recording. The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle is 0 the active power component P is calculated. If this angle is 90 the reactive power component Q is calculated. The calculated power component is compared to the power pick up setting Power1(2). For directional underpower protection, a start signal START1(2) is activated if the calculated power component is smaller than the pick up value. For directional overpower protection, a start signal START1(2) is activated if the calculated power component is larger than the pick up value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At activation of any of the two stages a common signal START will be activated. At trip from any of the two stages also a common signal TRIP will be activated. To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + droppower1(2)). For generator low forward power protection the power setting is very
1MRK505183-UEN C
low, normally down to 0.02 p.u. of rated generator power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) + Hysteresis1(2) For small power1 values the hysteresis1 may not be too big, because the droppower1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 Power1(2)) is corrected to the minimal value. If the measured power drops under the drop-power1(2) value, the function will reset after a set time DropDelay1(2). The reset means that the start signal will drop out and that the timer of the stage will reset.
7.10.2.1
(Equation 84)
Where S Sold is a new measured value to be used for the protection function is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (that is without any additional delay). When k is set to value bigger than 0, the filtering is enabled. A typical value for k=0.92 in case of slow operating functions.
7.10.2.2
1MRK505183-UEN C
IEC05000652 V2 EN
Figure 196:
Calibration curves
The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals. Analog outputs (Monitored data) from the function can be used for service values or in the disturbance report. The active power is provided as MW value: P, or in percent of base power: PPERCENT. The reactive power is provided as Mvar value: Q, or in percent of base power: QPERCENT.
7.10.3
Function block
GUPPDUP I3P* U3P* BLOCK BLOCK1 BLOCK2 TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT IEC07000027-2-en.vsd
IEC07000027 V2 EN
Figure 197:
1MRK505183-UEN C
Table 209:
Name TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT
7.10.5
Table 210:
Name Operation OpMode1 Power1 Angle1 TripDelay1 DropDelay1 OpMode2 Power2 Angle2 TripDelay2 DropDelay2 360
Setting parameters
GUPPDUP Group settings (basic)
Values (Range) Off On Off UnderPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Off UnderPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Unit %SB Deg s s %SB Deg s s Step 0.1 0.1 0.001 0.001 0.1 0.1 0.001 0.001 Default Off UnderPower 1.0 0.0 1.000 0.060 UnderPower 1.0 0.0 1.000 0.060 Description Operation Off / On Operation mode 1 Power setting for stage 1 in % of Sbase Angle for stage 1 Trip delay for stage 1 Drop delay for stage 1 Operation mode 2 Power setting for stage 2 in % of Sbase Angle for stage 2 Trip delay for stage 2 Drop delay for stage 2
1MRK505183-UEN C
Table 211:
Name k Hysteresis1 Hysteresis2 IAmpComp5 IAmpComp30 IAmpComp100 UAmpComp5 UAmpComp30 UAmpComp100 IAngComp5 IAngComp30 IAngComp100
Table 212:
Name IBase UBase Mode
7.10.6
Technical data
Table 213:
Function Power level
1MRK505183-UEN C
7.11
P>
DOCUMENT172362-IMG158942 V1 EN
7.11.1
Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on a rotating shaft to electric energy. Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous motor and starts to take electric power from the rest of the power system. This operating state, where individual synchronous machines operate as motors, implies no risk for the machine itself. If the generator under consideration is very large and if it consumes lots of electric power, it may be desirable to disconnect it to ease the task for the rest of the power system. Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the reverse power protection is to protect the turbine and not to protect the generator itself. Figure 198 illustrates the reverse power protection with underpower IED and with overpower IED. The underpower IED gives a higher margin and should provide better dependability. On the other hand, the risk for unwanted operation immediately after synchronization may be higher. One should set the underpower IED to trip if the active power from the generator is less than about 2%. One should set the overpower IED to trip if the power flow from the network to the generator is higher than 1%.
1MRK505183-UEN C
Underpower IED Q
Overpower IED Q
IEC06000315-2-en.vsd
IEC06000315 V2 EN
Figure 198:
7.11.2
Principle of operation
A simplified scheme showing the principle of the power protection function is shown in figure 199. The function has two stages with individual settings.
P Derivation of S(composant) in Char angle S(angle) S(angle) > Power1 t TRIP1 START1
TRIP2 START2
P = POWRE Q = POWIM
IEC06000567-2-en.vsd
IEC06000567 V2 EN
Figure 199:
The function will use voltage and current phasors calculated in the pre-processing blocks. The apparent complex power is calculated according to chosen formula as shown in table 214.
1MRK505183-UEN C
Table 214:
Set value: Mode L1, L2, L3
S = U L1 I L1* + U L 2 I L 2* + U L 3 I L 3*
EQUATION1697 V1 EN
(Equation 85)
Arone
S = U L1L 2 I L1* - U L 2 L 3 I L 3*
EQUATION1698 V1 EN
(Equation 86)
PosSeq
S = 3 U PosSeq I PosSeq *
EQUATION1699 V1 EN
(Equation 87)
L1L2
S = U L1L 2 ( I L1* - I L 2* )
EQUATION1700 V1 EN
(Equation 88)
L2L3
S = U L 2 L 3 ( I L 2* - I L 3* )
EQUATION1701 V1 EN
(Equation 89)
L3L1
S = U L 3 L1 ( I L 3* - I L1* )
EQUATION1702 V1 EN
(Equation 90)
L1
S = 3 U L1 I L1*
EQUATION1703 V1 EN
(Equation 91)
L2
S = 3 U L 2 I L 2*
EQUATION1704 V1 EN
(Equation 92)
L3
S = 3 U L 3 I L 3*
EQUATION1705 V1 EN
(Equation 93)
The active and reactive power is available from the function and can be used for monitoring and fault recording. The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle is 0 the active power component P is calculated. If this angle is 90 the reactive power component Q is calculated. The calculated power component is compared to the power pick up setting Power1(2). A start signal START1(2) is activated if the calculated power component is larger than the pick up value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At activation of any of the two stages a common signal START will be activated. At trip from any of the two stages also a common signal TRIP will be activated. To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) droppower1(2)). For generator reverse power protection the power setting is very low, normally down to 0.02 p.u. of rated generator power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be
1MRK505183-UEN C
calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) Hysteresis1(2) For small power1 values the hysteresis1 may not be too big, because the droppower1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 Power1(2)) is corrected to the minimal value. If the measured power drops under the drop-power1(2) value the function will reset after a set time DropDelay1(2). The reset means that the start signal will drop out ant that the timer of the stage will reset.
7.11.2.1
(Equation 94)
Where S Sold is a new measured value to be used for the protection function is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (that is, without any additional delay). When k is set to value bigger than 0, the filtering is enabled. A typical value for k = 0.14.
7.11.2.2
1MRK505183-UEN C
IEC05000652 V2 EN
Figure 200:
Calibration curves
The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals. Analog outputs from the function can be used for service values or in the disturbance report. The active power is provided as MW value: P, or in percent of base power: PPERCENT. The reactive power is provided as Mvar value: Q, or in percent of base power: QPERCENT.
7.11.3
Function block
GOPPDOP I3P* U3P* BLOCK BLOCK1 BLOCK2 TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT IEC07000028-2-en.vsd
IEC07000028 V2 EN
Figure 201:
1MRK505183-UEN C
7.11.4
Table 216:
Name TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT
7.11.5
Table 217:
Name Operation OpMode1 Power1 Angle1 TripDelay1 DropDelay1 OpMode2 Power2 Angle2 TripDelay2 DropDelay2
Setting parameters
GOPPDOP Group settings (basic)
Values (Range) Off On Off OverPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Off OverPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Unit %SB Deg s s %SB Deg s s Step 0.1 0.1 0.001 0.001 0.1 0.1 0.001 0.001 Default Off OverPower 120.0 0.0 1.000 0.060 OverPower 120.0 0.0 1.000 0.060 Description Operation Off / On Operation mode 1 Power setting for stage 1 in % of Sbase Angle for stage 1 Trip delay for stage 1 Drop delay for stage 1 Operation mode 2 Power setting for stage 2 in % of Sbase Angle for stage 2 Trip delay for stage 2 Drop delay for stage 2 367
1MRK505183-UEN C
Table 218:
Name k Hysteresis1 Hysteresis2 IAmpComp5 IAmpComp30 IAmpComp100 UAmpComp5 UAmpComp30 UAmpComp100 IAngComp5 IAngComp30 IAngComp100
Table 219:
Name IBase UBase Mode
1MRK505183-UEN C
7.11.6
7.12
7.12.1
Introduction
Conventional protection functions can not detect the broken conductor condition. Broken conductor check (BRCPTOC) function, consisting of continuous current unsymmetrical check on the line where the IED is connected will give alarm or trip at detecting broken conductors.
7.12.2
Principle of operation
Broken conductor check (BRCPTOC) detects a broken conductor condition by detecting the asymmetry between currents in the three phases. The currentmeasuring elements continuously measure the three-phase currents. The current asymmetry signal output START is set on if: The difference in currents between the phase with the lowest current and the phase with the highest current is greater than set percentage Iub> of the highest phase current The highest phase current is greater than the minimum setting value IP>. The lowest phase current is below 50% of the minimum setting value IP>
The third condition is included to avoid problems in systems involving parallel lines. If a conductor breaks in one phase on one line, the parallel line will experience an increase in current in the same phase. This might result in the first two conditions being satisfied. If the unsymmetrical detection lasts for a period longer than the set time tOper the TRIP output is activated.
369 Technical reference manual
1MRK505183-UEN C
The simplified logic diagram of the broken conductor check function is shown in figure 202 BRCPTOC is disabled (blocked) if: The IED is in TEST status and the function has been blocked from the local HMI test menu (BlockBRC=Yes). The input signal BLOCK is high.
The BLOCK input can be connected to a binary input of the IED in order to receive a block command from external devices, or can be software connected to other internal functions of the IED itself to receive a block command from internal functions. The output trip signal TRIP is a three-phase trip. It can be used to command a trip to the circuit breaker or for alarm purpose only.
TEST TEST-ACTIVE
&
Block BRCPTOC=Yes START
BLOCK
=1
=1
IEC09000158-1-en.vsd
IEC09000158 V1 EN
Figure 202:
7.12.3
Function block
BRCPTOC I3P* BLOCK BLKTR TRIP START
IEC07000034-2-en.vsd
IEC07000034 V2 EN
Figure 203:
1MRK505183-UEN C
7.12.4
Table 222:
Name TRIP START
7.12.5
Table 223:
Name Operation IBase Iub> IP> tOper
Setting parameters
BRCPTOC Group settings (basic)
Values (Range) Off On 0 - 99999 50 - 90 5 - 100 0.000 - 60.000 Unit A %IM %IB s Step 1 1 1 0.001 Default Off 3000 50 20 5.000 Description Operation Off / On IBase Unbalance current operation value in percent of max current Minimum phase current for operation of Iub> in % of Ibase Operate time delay
Table 224:
Name tReset
7.12.6
Technical data
Table 225:
Function Minimum phase current for operation Unbalance current operation Timer
372
1MRK505183-UEN C
Section 8
Voltage protection
8.1
3U<
SYMBOL-R V1 EN
8.1.1
Introduction
Undervoltages can occur in the power system during faults or abnormal conditions. Two step undervoltage protection (UV2PTUV) function can be used to open circuit breakers to prepare for system restoration at power outages or as long-time delayed back-up to primary protection. UV2PTUV has two voltage steps, each with inverse or definite time delay.
8.1.2
Principle of operation
Two-step undervoltage protection (UV2PTUV) is used to detect low power system voltage. UV2PTUV has two voltage measuring steps with separate time delays. If one, two or three phase voltages decrease below the set value, a corresponding START signal is generated. UV2PTUV can be set to START/TRIP based on 1 out of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being below the set point. If the voltage remains below the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to disconnection of the related high voltage equipment, a voltage controlled blocking of the function is available, that is, if the voltage is lower than the set blocking level the function is blocked and no START or TRIP signal is generated. The time delay characteristic is individually chosen for each step and can be either definite time delay or inverse time delay.
1MRK505183-UEN C
UV2PTUV can be set to measure phase-to-earth fundamental value, phase-to-phase fundamental value, phase-to-earth true RMS value or phase-to-phase true RMS value. The choice of the measuring is done by the parameter ConnType. The voltage related settings are made in percent of base voltage which is set in kV phaseto-phase voltage. This means operation for phase-to-earth voltage under:
(Equation 95)
(Equation 96)
8.1.2.1
Measurement principle
Depending on the set ConnType value, UV2PTUV measures phase-to-earth or phaseto-phase voltages and compare against set values, U1< and U2<. The parameters OpMode1 and OpMode2 influence the requirements to activate the START outputs. Either 1 out of 3, 2 out of 3, or 3 out of 3 measured voltages have to be lower than the corresponding set point to issue the corresponding START signal. To avoid oscillations of the output START signal, a hysteresis has been included.
8.1.2.2
Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay three different modes are available: inverse curve A inverse curve B customer programmable inverse curve
t=
k U < -U U<
(Equation 97)
EQUATION1431 V1 EN
1MRK505183-UEN C
t=
+ 0.055
EQUATION1432 V1 EN
(Equation 98)
kA +D t= p U < -U -C B U<
EQUATION1433 V1 EN
(Equation 99)
When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U< down to U< (1.0 CrvSatn/100) the used voltage will be: U< (1.0 CrvSatn/ 100). If the programmable curve is used this parameter must be calculated so that:
EQUATION1435 V1 EN
The lowest voltage is always used for the inverse time delay integration. The details of the different inverse time characteristics are shown in section 22.3 "Inverse characteristics". Trip signal issuing requires that the undervoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some special voltage level dependent time curves for the inverse time mode (IDMT). If the start condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2pickup for the inverse time) the corresponding start output is reset. Here it should be noted that after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. Note that for the undervoltage function the IDMT reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time. See figure 204 and figure 205.
1MRK505183-UEN C
U1<
Time Integrator t1
Frozen Timer
Instantaneous Reset
IEC05000010 V3 EN
Time
Linear Decrease IEC05000010-3-en.vsd
Figure 204:
Voltage profile not causing a reset of the start signal for step 1, and inverse time delay
1MRK505183-UEN C
Voltage START
U1<
Time START t1
TRIP
Time Integrator t1
Frozen Timer
Linear Decrease
IEC05000011-en-2.vsd
Figure 205:
Voltage profile causing a reset of the start signal for step 1, and inverse time delay
Definite timer delay When definite time delay is selected the function will operate as shown in figure 206. Detailed information about individual stage reset/operation behavior is shown in figure 207 and figure 208 receptively. Note that by setting tResetn = 0.0s instantaneous reset of the definite time delayed stage is ensured.
1MRK505183-UEN C
ST1
U U1<
a b>a b
IEC09000785-1-en.vsd
IEC09000785 V1 EN
Figure 206:
Un<
START
TRIP tResetn
tn
IEC10000039-1-en.vsd
IEC10000039 V1 EN
Figure 207:
1MRK505183-UEN C
Un<
START
TRIP
tResetn
tn
IEC10000040-1-en.vsd
IEC10000040 V1 EN
Figure 208:
8.1.2.3
Blocking
It is possible to block Two step undervoltage protection UV2PTUV partially or completely, by binary input signals or by parameter settings, where:
BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2: blocks all outputs blocks all trip outputs of step 1 blocks all start and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all start and trip outputs related to step 2
If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output of step 1, or both the trip and the START outputs of step 1, are blocked. The characteristic of the blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to Off resulting in no voltage based blocking. Corresponding settings and functionality are valid also for step 2. In case of disconnection of the high voltage component the measured voltage will get very low. The event will START both the under voltage function and the blocking function, as seen in figure 209. The delay of the blocking function must be set less than the time delay of under voltage function.
1MRK505183-UEN C
Disconnection
tBlkUV1 < t1,t1Min IntBlkStVal1 IntBlkStVal2 Time Block step 1 Block step 2
en05000466.vsd
IEC05000466 V1 EN
Figure 209:
Blocking function
8.1.2.4
Design
The voltage measuring elements continuously measure the three phase-to-neutral voltages or the three phase-to-phase voltages. Recursive fourier filters, true RMS filters or input voltage signals are used. The voltages are individually compared to the set value, and the lowest voltage is used for the inverse time characteristic integration. A special logic is included to achieve the 1 out of 3, 2 out of 3 and 3 out of 3 criteria to fulfill the START condition. The design of Two step undervoltage protection UV2PTUV is schematically shown in figure 210.
1MRK505183-UEN C
UL1
Comparator UL1 < U1< Comparator UL2 < U1< Comparator UL3 < U1<
UL2
ST1L2
Phase 2 Phase 3
UL3
OR
MinVoltSelect or
TRIP
OR
Comparator UL1 < U2< Comparator UL2 < U2< Comparator UL3 < U2<
OR
MinVoltSelect or
TRIP
TR2L3
TR2 OR START
OR
OR
TRIP
en05000012.vsd
IEC05000834 V1 EN
Figure 210:
1MRK505183-UEN C
Figure 211:
8.1.4
Table 227:
Name TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START
1MRK505183-UEN C
8.1.5
Table 228:
Name Operation UBase OperationStep1 Characterist1
Setting parameters
UV2PTUV Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 100 0.00 - 6000.00 0.000 - 60.000 0.05 - 1.10 Off Block of trip Block all 1 - 100 0.000 - 60.000 0.0 - 100.0 Off On Definite time Inverse curve A Inverse curve B Prog. inv. curve Unit kV Step 0.05 Default Off 400.00 On Definite time Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1
OpMode1
1 out of 3
Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 1 Voltage setting/start val (DT & IDMT) in % of UBase, step 1 Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Internal (low level) blocking mode, step 1
%UB s s -
%UB s %UB -
1 0.001 0.1 -
Voltage setting for internal blocking in % of UBase, step 1 Time delay of internal (low level) blocking for step 1 Absolute hysteresis in % of UBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2
1MRK505183-UEN C
Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 2 Voltage setting/start val (DT & IDMT) in % of UBase, step 2 Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Internal (low level) blocking mode, step 2
%UB s s -
%UB s %UB
1 0.001 0.1
20 0.000 0.5
Voltage setting for internal blocking in % of UBase, step 2 Time delay of internal (low level) blocking for step 2 Absolute hysteresis in % of UBase, step 2
Table 229:
Name tReset1 ResetTypeCrv1
s % s -
Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. under voltage IDMT curve, step 1 Reset time delay used in IEC Definite Time curve step 2 Selection of reset curve type for step 2
tIReset2 ACrv2
s -
0.001 0.001
0.025 1.000
Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2
1MRK505183-UEN C
Table 230:
Name ConnType
8.1.6
Technical data
Table 231:
Function Operate voltage, low and high step Absolute hysteresis Internal blocking level, low and high step Inverse time characteristics for low and high step, see table 648 Definite time delays Minimum operate time, inverse characteristics Operate time, start function Reset time, start function Critical impulse time Impulse margin time
(0.000-60.000) s (0.00060.000) s
0.5% 10 ms 0.5% 10 ms
1MRK505183-UEN C
8.2
3U>
SYMBOL-C V1 EN
8.2.1
Introduction
Overvoltages may occur in the power system during abnormal conditions, such as, sudden power loss, tap changer regulating failures, open line ends on long lines. Two step overvoltage protection OV2PTOV can be used as open line end detector, normally then combined with directional reactive over-power function or as system voltage supervision, normally then giving alarm only or switching in reactors or switch out capacitor banks to control the voltage. OV2PTOV has two voltage steps, each of them with inverse or definite time delayed. OV2PTOV has an extremely high reset ratio to allow setting close to system service voltage.
8.2.2
Principle of operation
Two step overvoltage protection OV2PTOV is used to detect high power system voltage. OV2PTOV has two steps with separate time delays. If one-, two- or threephase voltages increase above the set value, a corresponding START signal is issued. OV2PTOV can be set to START/TRIP, based on 1 out of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being above the set point. If the voltage remains above the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. The time delay characteristic is individually chosen for the two steps and can be either, definite time delay or inverse time delay. The voltage related settings are made in percent of the global set base voltage, which is set in kV, phase-to-phase. OV2PTOV can be set to measure phase-to-earth fundamental value, phase-to-phase fundamental value, phase-to-earth RMS value or phase-to-phase RMS value. The choice of measuring is done by the parameter ConnType. The setting of the analog inputs are given as primary phase-to-earth or phase-tophase voltage. OV2PTOV will operate if the voltage gets higher than the set
1MRK505183-UEN C
percentage of the set base voltage UBase. This means operation for phase-to-earth voltage over:
(Equation 101)
(Equation 102)
8.2.2.1
Measurement principle
All the three voltages are measured continuously, and compared with the set values, U1> and U2>. The parameters OpMode1 and OpMode2 influence the requirements to activate the START outputs. Either 1 out of 3, 2 out of 3 or 3 out of 3 measured voltages have to be higher than the corresponding set point to issue the corresponding START signal. To avoid oscillations of the output START signal, a hysteresis has been included.
8.2.2.2
Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay four different modes are available: inverse curve A inverse curve B inverse curve C customer programmable inverse curve
t=
k U -U > U>
(Equation 103)
IEC09000051 V1 EN
2.0
IECEQUATION2287 V1 EN
(Equation 104)
1MRK505183-UEN C
3.0
IECEQUATION2288 V1 EN
(Equation 105)
t=
kA U -U > -C B U>
p
+D
EQUATION1439 V1 EN
(Equation 106)
When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore, a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U< down to U< (1.0 CrvSatn/100) the used voltage will be: U< (1.0 CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:
EQUATION1435 V1 EN
The highest phase (or phase-to-phase) voltage is always used for the inverse time delay integration, see figure 212. The details of the different inverse time characteristics are shown in section "Inverse characteristics"
1MRK505183-UEN C
Time
en05000016.vsd
IEC05000016 V1 EN
Figure 212:
Trip signal issuing requires that the overvoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by selected voltage level dependent time curves for the inverse time mode (IDMT). If the START condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the corresponding START output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. The hysteresis value for each step is settable (HystAbs2) to allow an high and accurate reset of the function. It should be noted that for Two step overvoltage protection OV2PTOV the IDMT reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time..
1MRK505183-UEN C
U1>
Hysteresis
Measured Voltage
Time START t1
TRIP
Linear Decrease
Instantaneous Reset
IEC09000055 V1 EN
Time
IEC09000055-en-1.vsd
Figure 213:
Voltage profile not causing a reset of the START signal for step 1, and inverse time delay
1MRK505183-UEN C
Voltage START
tReset1
Time START t1
TRIP
Time Integrator
Frozen Timer
t1
Linear Decrease
IEC05000020-en-2.vsd
Figure 214:
Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite time delay When definite time delay is selected the function will operate as shown in figure 215. Detailed information about individual stage reset/operation behavior is shown in figure 207 and figure 208 receptively. Note that by setting tResetn = 0.0s instantaneous reset of the definite time delayed stage is ensured
1MRK505183-UEN C
ST1
U U1>
a b<a b
IEC10000100-1-en.vsd
IEC10000100 V1 EN
Figure 215:
Un>
START
TRIP tResetn
tn
IEC10000037-1-en.vsd
IEC10000037 V1 EN
Figure 216:
1MRK505183-UEN C
Un>
START
TRIP
tResetn
tn
IEC10000038-1-en.vsd
IEC10000038 V1 EN
Figure 217:
8.2.2.3
Blocking
It is possible to block Two step overvoltage protection OV2PTOV partially or completely, by binary input signals where:
BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2: blocks all outputs blocks all trip outputs of step 1 blocks all start and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all start and trip outputs related to step 2
8.2.2.4
Design
The voltage measuring elements continuously measure the three phase-to-earth voltages or the three phase-to-phase voltages. Recursive Fourier filters filter the input voltage signals. The phase voltages are individually compared to the set value, and the highest voltage is used for the inverse time characteristic integration. A special logic is included to achieve the 1 out of 3, 2 out of 3 or 3 out of 3 criteria to fulfill the START condition. The design of Two step overvoltage protection (OV2PTOV) is schematically described in figure 218.
1MRK505183-UEN C
UL1
Comparator UL1 > U1> Comparator UL2 > U1> Comparator UL3 > U1>
UL2
ST1L2
Phase 2 Phase 3
UL3
OR
MaxVoltSelect or
TRIP
OR
Comparator UL1 > U2> Comparator UL2 > U2> Comparator UL3 > U2>
OR
MaxVoltSelect or
OR OR
OR
TRIP
en05000013.vsd
IEC05000013-WMF V1 EN
Figure 218:
1MRK505183-UEN C
8.2.3
Figure 219:
8.2.4
Table 233:
Name TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START
1MRK505183-UEN C
Common start signal from step1 Start signal from step1 phase L1 Start signal from step1 phase L2 Start signal from step1 phase L3 Common start signal from step2 Start signal from step2 phase L1 Start signal from step2 phase L2 Start signal from step2 phase L3
8.2.5
Table 234:
Name Operation UBase OperationStep1 Characterist1
Setting parameters
OV2PTOV Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 200 0.00 - 6000.00 0.000 - 60.000 0.05 - 1.10 0.0 - 100.0 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 200 Unit kV Step 0.05 Default Off 400.00 On Definite time Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1
OpMode1
1 out of 3
Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 1 Voltage setting/start val (DT & IDMT) in % of UBase, step 1 Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Absolute hysteresis in % of UBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2
%UB s s %UB -
OpMode2
1 out of 3
Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 2 Voltage setting/start val (DT & IDMT) in % of UBase, step 2
U2>
%UB
150
1MRK505183-UEN C
Table 235:
Name tReset1 ResetTypeCrv1
s % s -
Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. over voltage IDMT curve, step 1 Reset time delay used in IEC Definite Time curve step 2 Selection of reset curve type for step 2
s %
Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. over voltage IDMT curve, step 2
1MRK505183-UEN C
Table 236:
Name ConnType
8.2.6
Technical data
Table 237:
Function Operate voltage, low and high step Absolute hysteresis Inverse time characteristics for low and high step, see table 647 Definite time delays Minimum operate time, Inverse characteristics Operate time, start function Reset time, start function Critical impulse time Impulse margin time
(0.000-60.000) s (0.000-60.000) s
0.5% 10 ms 0.5% 10 ms
8.3
3U0
TRV V1 EN
8.3.1
Introduction
Residual voltages may occur in the power system during earth faults.
1MRK505183-UEN C
Two step residual overvoltage protection ROV2PTOV calculates the residual voltage from the three-phase voltage input transformers or from a single-phase voltage input transformer fed from an open delta or neutral point voltage transformer. ROV2PTOV has two voltage steps, each with inverse or definite time delayed.
8.3.2
Principle of operation
Two step residual overvoltage protection ROV2PTOV is used to detect high singlephase voltage, such as high residual voltage, also called 3U0. The residual voltage can be measured directly from a voltage transformer in the neutral of a power transformer or from a three-phase voltage transformer, where the secondary windings are connected in an open delta. Another possibility is to measure the threephase voltages and internally in the IED calculate the corresponding residual voltage and connect this calculated residual voltage to ROV2PTOV. ROV2PTOV has two steps with separate time delays. If the single-phase (residual) voltage remains above the set value for a time period corresponding to the chosen time delay, the corresponding TRIP signal is issued. The time delay characteristic is individually chosen for the two steps and can be either, definite time delay or inverse time delay. The voltage related settings are made in percent of the base voltage, which is set in kV, phase-phase.
8.3.2.1
Measurement principle
The residual voltage is measured continuously, and compared with the set values, U1> and U2>. To avoid oscillations of the output START signal, a hysteresis has been included.
8.3.2.2
Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay four different modes are available: inverse curve A inverse curve B inverse curve C customer programmable inverse curve
t=
k U -U > U>
(Equation 108)
IEC09000051 V1 EN
1MRK505183-UEN C
2.0
IECEQUATION2287 V1 EN
(Equation 109)
3.0
IECEQUATION2288 V1 EN
(Equation 110)
t=
kA U -U > -C B U>
p
+D
EQUATION1439 V1 EN
(Equation 111)
When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U> up to U> (1.0 + CrvSatn/100) the used voltage will be: U> (1.0 + CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:
EQUATION1440 V1 EN
The details of the different inverse time characteristics are shown in section "Inverse characteristics". TRIP signal issuing requires that the residual overvoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some special voltage level dependent time curves for the inverse time mode (IDMT). If the START condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the corresponding START output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back to
400 Technical reference manual
1MRK505183-UEN C
the hysteresis area. Also notice that for the overvoltage function IDMT reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time. See figure 213 and figure 214.
tReset 1 Voltage START tReset1 TRIP
U1>
Hysteresis
Measured Voltage
Time START t1
TRIP
Linear Decrease
Instantaneous Reset
IEC09000055 V1 EN
Time
IEC09000055-en-1.vsd
Figure 220:
Voltage profile not causing a reset of the START signal for step 1, and inverse time delay
1MRK505183-UEN C
Voltage START
tReset1
Time START t1
TRIP
Time Integrator
Frozen Timer
t1
Linear Decrease
IEC05000020-en-2.vsd
Figure 221:
Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite timer delay When definite time delay is selected the function will operate as shown in figure 222. Detailed information about individual stage reset/operation behavior is shown in figure 207 and figure 208 receptively. Note that by setting tResetn = 0.0s instantaneous reset of the definite time delayed stage is ensured
1MRK505183-UEN C
ST1
U U1>
a b<a b
IEC10000100-1-en.vsd
IEC10000100 V1 EN
Figure 222:
Un<
START
TRIP tResetn
tn
IEC10000039-1-en.vsd
IEC10000039 V1 EN
Figure 223:
1MRK505183-UEN C
Un<
START
TRIP
tResetn
tn
IEC10000040-1-en.vsd
IEC10000040 V1 EN
Figure 224:
8.3.2.3
Blocking
It is possible to block Two step residual overvoltage protection ROV2PTOV partially or completely, by binary input signals where:
BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2: blocks all outputs blocks all trip outputs of step 1 blocks all start and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all START and trip inputs related to step 2
8.3.2.4
Design
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier filters filter the input voltage signal. The single input voltage is compared to the set value, and is also used for the inverse time characteristic integration. The design of Two step residual overvoltage protection (ROV2PTOV) is schematically described in figure 225.
1MRK505183-UEN C
UN
ST1 TR1
TRIP
ST2 TR2
OR
START
TRIP
TRIP
en05000748.vsd
IEC05000748 V1 EN
Figure 225:
8.3.3
Function block
ROV2PTOV U3P* BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2 TRIP TR1 TR2 START ST1 ST2 IEC06000278-2-en.vsd
IEC06000278 V2 EN
Figure 226:
1MRK505183-UEN C
Table 239:
Name TRIP TR1 TR2 START ST1 ST2
8.3.5
Table 240:
Name Operation UBase OperationStep1 Characterist1
Setting parameters
ROV2PTOV Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 - 200 0.00 - 6000.00 0.000 - 60.000 0.05 - 1.10 0.0 - 100.0 Unit kV Step 0.05 Default Off 400.00 On Definite time Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1
%UB s s %UB
Voltage setting/start val (DT & IDMT), step 1 in % of UBase Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Absolute hysteresis in % of UBase, step 1
1MRK505183-UEN C
%UB s s %UB
Voltage setting/start val (DT & IDMT), step 2 in % of UBase Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Absolute hysteresis in % of UBase, step 2
Table 241:
Name tReset1 ResetTypeCrv1
s % s -
Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. over voltage IDMT curve, step 1 Time delay in DT reset (s), step 2 Selection of reset curve type for step 2
s -
Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2
1MRK505183-UEN C
Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. over voltage IDMT curve, step 2
8.3.6
Technical data
Table 242:
Function Operate voltage, low and high step Absolute hysteresis Inverse time characteristics for low and high step, see table 649 Definite time setting Minimum operate time Operate time, start function Reset time, start function Critical impulse time Impulse margin time
0.5% 10 ms 0.5% 10 ms -
8.4
U/f >
SYMBOL-Q V1 EN
8.4.1
Introduction
When the laminated core of a power transformer or generator is subjected to a magnetic flux density beyond its design limits, stray flux will flow into nonlaminated components not designed to carry flux and cause eddy currents to flow.
1MRK505183-UEN C
The eddy currents can cause excessive heating and severe damage to insulation and adjacent parts in a relatively short time. Overexcitation protection OEXPVPH has settable inverse operating curve and independent alarm stage.
8.4.2
Principle of operation
The importance of Overexcitation protection OEXPVPH is growing as the power transformers as well as other power system elements today operate most of the time near their designated limits. Modern design transformers are more sensitive to overexcitation than earlier types. This is a result of the more efficient designs and designs which rely on the improvement in the uniformity of the excitation level of modern systems. Thus, if emergency that includes overexcitation does occur, transformers may be damaged unless corrective action is promptly taken. Transformer manufacturers recommend an overexcitation protection as a part of the transformer protection system. Overexcitation results from excessive applied voltage, possibly in combination with below-normal frequency. Such condition may occur when a transformer unit is on load, but are more likely to arise when it is on open circuit, or at a loss of load occurrence. Transformers directly connected to generators are in particular danger to experience overexcitation condition. It follows from the fundamental transformer equation, see equation 113, that peak flux density Bmax is directly proportional to induced voltage E, and inversely proportional to frequency f, and turns n.
E = 4.44 f n Bmax A
EQUATION898 V2 EN
(Equation 113)
E f
( Ur ) ( fr )
(Equation 114)
Disproportional variations in quantities E and f may give rise to core overfluxing. If the core flux density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will no longer be contained within the core only but will extend into other (non-laminated) parts of the power transformer and give rise to eddy current circulations. Overexcitation will result in: overheating of the non-laminated metal parts a large increase in magnetizing currents an increase in core and winding temperature an increase in transformer vibration and noise
1MRK505183-UEN C
Protection against overexcitation is based on calculation of the relative volt per hertz (V/Hz) ratio. The action of the protection is usually to initiate a reduction of excitation and, if this should fail, or is not possible, to trip the transformer after a delay which can be from seconds to minutes, typically 5 - 10 seconds. Overexcitation protection may be of particular concern on directly connected generator unit transformers. Directly connected generator-transformers are subjected to a wide range of frequencies during the acceleration and deceleration of the turbine. In such cases, the overexcitation protection may trip the field breaker during a start-up of a machine, by means of the overexcitation ALARM signal. If this is not possible, the power transformer can be disconnected from the source, after a delay, by the TRIP signal. The IEC 60076 - 1 standard requires that transformers shall be capable of operating continuously at 10% above rated voltage at no load, and rated frequency. At no load, the ratio of the actual generator terminal voltage to the actual frequency should not exceed 1.1 times the ratio of transformer rated voltage to the rated frequency on a sustained basis, see equation 115.
E ------- 1.1 Ur fr f
EQUATION900 V1 EN
(Equation 115)
IECEQUATION2297 V1 EN
where:
V/Hz>
V/Hz> is a setting parameter. The setting range is 100% to 180%. If the user does not know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the default value V/Hz> = 110% shall be used. In OEXPVPH, the relative excitation M is expressed according to equation 117.
M ( p.u. ) =
IECEQUATION2299 V1 EN
E f Ur fr
(Equation 117)
It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and f, where the ratio E/f is equal to Ur/fr. A power transformer is not overexcited as long as the relative excitation is M V/Hz>, V/Hz> expressed in % of Ur/fr.
410 Technical reference manual
1MRK505183-UEN C
The overexcitation protection algorithm is fed with an input voltage U which is in general not the induced voltage E from the fundamental transformer equation. For no load condition, these two voltages are the same, but for a loaded power transformer the internally induced voltage E may be lower or higher than the voltage U which is measured and fed to OEXPVPH , depending on the direction of the power flow through the power transformer, the power transformer side where OEXPVPH is applied, and the power transformer leakage reactance of the winding. It is important to specify in the application configuration on which side of the power transformer OEXPVPH is placed. As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8 power factor, 105% voltage on the load side, the actual flux level in the transformer core, will not be significantly different from that at the 110% voltage, no load, rated frequency, provided that the short circuit impedance X can be equally divided between the primary and the secondary winding: Xleak = Xleak1 = Xleak2 = Xsc / 2 = 0.075 pu. OEXPVPH calculates the internal induced voltage E if Xleak (meaning the leakage reactance of the winding where OEXPVPH is connected) is known to the user. The assumption taken for two-winding power transformers that Xleak = Xsc / 2 is unfortunately most often not true. For a two-winding power transformer the leakage reactances of the two windings depend on how the windings are located on the core with respect to each other. In the case of three-winding power transformers the situation is still more complex. If a user has the knowledge on the leakage reactance, then it should applied. If a user has no idea about it, Xleak can be set to Xc/2. OEXPVPH protection will then take the given measured voltage U, as the induced voltage E. It is assumed that overexcitation is a symmetrical phenomenon, caused by events such as loss-of-load, and so on. It will be observed that a high phase-to-earth voltage does not mean overexcitation. For example, in an unearthed power system, a single phase-to-earth fault means high voltages of the healthy two phases-toearth, but no overexcitation on any winding. The phase-to-phase voltages will remain essentially unchanged. The important voltage is the voltage between the two ends of each winding.
8.4.2.1
Measured voltage
If one phase-to-phase voltage is available from the side where overexcitation protection is applied, then Overexcitation protection OEXPVPH shall be set to measure this voltage, MeasuredU. The particular voltage which is used determines the two currents that must be used. This must be chosen with the setting MeasuredI. It is extremely important that MeasuredU and MeasuredI are set to same value. If, for example, voltage UL1L2 is fed to OEXPVPH, then currents IL1, and IL2 must be applied. From these two input currents, current IL1L2 = IL1 - IL2 is
411
1MRK505183-UEN C
calculated internally by the OEXPVPH algorithm. The phase-to-phase voltage must be higher than 70% of the rated value, otherwise the protection algorithm exits without calculating the excitation. ERROR output is set to 1, and the displayed value of relative excitation V/Hz shows 0.000. If three phase-to-earth voltages are available from the side where overexcitation is connected, then OEXPVPH shall be set to measure positive sequence voltage and current. In this case the positive sequence voltage and the positive sequence current are used by OEXPVPH. A check is made if the positive sequence voltage is higher than 70% of rated phase-to-earth voltage, when below this value, OEXPVPH exits immediately, and no excitation is calculated. ERROR output is set to 1, and the displayed value of relative excitation V/Hz shows 0.000. The frequency value is received from the pre-processing block. The function is in operation for frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and 60 Hz respectively. OEXPVPH can be connected to any power transformer side, independent from the power flow. The side with a possible load tap changer must not be used.
8.4.2.2
The so called IEEE law approximates a square law and has been chosen based on analysis of the various transformers overexcitation capability characteristics. They can match well a transformer core capability. The square law is according to equation 118.
top = 0.18 k
M V Hz> - 1
IECEQUATION2298 V1 EN
(Equation 118)
where: M the relative excitation is maximum continuously allowed voltage at no load, and rated frequency, in pu and is time multiplier for inverse time functions, see figure 228. Parameter k (time multiplier setting) selects one delay curve from the family of curves.
V/Hz>
k
1MRK505183-UEN C
An analog overexcitation relay would have to evaluate the following integral expression, which means to look for the instant of time t = top according to equation 119.
(M (t) - V
0
IECEQUATION2300 V1 EN
top
Hz > ) dt 0.18 k
2
(Equation 119)
A digital, numerical relay will instead look for the lowest j (that is, j = n) where it becomes true that:
n
Dt
( M(j)
j=k
V/Hz> ) 0.18 k
(Equation 120)
EQUATION906 V1 EN
where: Dt is the time interval between two successive executions of OEXPVPH and M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is given as Ur/fr.
As long as M > V/Hz> (that is, overexcitation condition), the above sum can only be larger with time, and if the overexcitation persists, the protected transformer will be tripped at j = n. Inverse delays as per figure 228, can be modified (limited) by two special definite delay settings, namely tMax and tMin, see figure 227.
delay in s tMax
under excitation
overexcitation tMin 0 M=V/Hz> V/Hz> Mmax - V/Hz> Overexcitation M-V/Hz> Mmax Emax Excitation M E (only if f = fr = const) 99001067.vsd
IEC99001067 V1 EN
Figure 227:
1MRK505183-UEN C
A definite maximum time, tMax, can be used to limit the operate time at low degrees of overexcitation. Inverse delays longer than tMax will not be allowed. In case the inverse delay is longer than tMax, OEXPVPH trips after tMax seconds. A definite minimum time, tMin, can be used to limit the operate time at high degrees of overexcitation. In case the inverse delay is shorter than tMin, OEXPVPH function trips after tMin seconds. Also, the inverse delay law is no more valid beyond excitation Mmax. Beyond Mmax (for excitation M > V/Hz>), the delay will always be tMin, irrespective of the overexcitation level.
Time (s) IEEE OVEREXCITATION CURVES
1000
100 k = 60
k = 20
10
k=1 1 2 3 4 5 10 20 30 40
OVEREXCITATION IN %
(M-Emaxcont)*100)
en01000373.vsd
IEC01000373 V1 EN
Figure 228:
The critical value of excitation M is determined indirectly via OEXPVPH setting V/ Hz>>. V/Hz>> can be thought of as a no-load-rated-frequency voltage, where the inverse law should be replaced by a short definite delay, tMin. If, for example, V/ Hz>> = 140 %, then M is according to equation 121.
1MRK505183-UEN C
M=
= 1.40
(Equation 121)
IECEQUATION2286 V1 EN
The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the interval between M = V/Hz>, and M = Mmax is automatically divided into five equal subintervals, with six delays. (settings t1, t2, t3, t4, t5 and t6) as shown in figure 229. These times should be set so that t1 => t2 => t3 => t4 => t5 => t6.
delay in s
tMax
underexcitation 0 Emaxcont
IEC99001068 V1 EN
Figure 229:
Delays between two consecutive points, for example t3 and t4, are obtained by linear interpolation. Should it happen that tMax be lower than, for example, delays t1, and t2, the actual delay would be tMax. Above Mmax, the delay can only be tMin.
8.4.2.3
Cooling
Overexcitation protection OEXPVPH is basically a thermal protection; therefore a cooling process has been introduced. Exponential cooling process is applied. Parameter Setting tool is an OEXPVPH setting, with a default time constant tCooling of 20 minutes. This means that if the voltage and frequency return to their previous normal values (no more overexcitation), the normal temperature is assumed to be reached not before approximately 5 times tCooling minutes. If an overexcitation condition would return before that, the time to trip will be shorter than it would be otherwise.
8.4.2.4
1MRK505183-UEN C
If the overexcitation is so low that the valid delay is tMax, then the estimation of the remaining time to trip is done against tMax. The relative excitation M, shown on the local HMI and in PCM600 as a monitored data value VPERHZ, is calculated from the expression:
M ( p.u. ) =
IECEQUATION2299 V1 EN
E f Ur fr
(Equation 122)
If VPERHZ value is less than setting V/Hz> (in %), the power transformer is underexcited. If VPERHZ is equal to V/Hz> (in %), the excitation is exactly equal to the power transformer continuous capability. If VPERHZ is higher than V/Hz>, the protected power transformer is overexcited. For example, if VPERHZ = 1.100, while V/Hz> = 110 %, then the power transformer is exactly on its maximum continuous excitation limit. Monitored data value THERMSTA shows the thermal status of the protected power transformer iron core. THERMSTA gives the thermal status in % of the trip value which corresponds to 100%. THERMSTA should reach 100% at the same time, as TMTOTRIP reaches 0 seconds. If the protected power transformer is then for some reason not switched off, THERMSTA shall go over 100%. If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or tMin, then the Thermal status will generally not reach 100% at the same time, when tTRIP reaches 0 seconds. For example, if, at low degrees of overexcitation, the very long delay is limited by tMax, then the OEXPVPH TRIP output signal will be set to 1 before the Thermal status reaches 100%.
8.4.2.5
Overexcitation alarm
A separate step, AlarmLevel, is provided for alarming purpose. It is normally set 2% lower than (V/Hz>) and has a definite time delay, tAlarm. This will give the operator an early abnormal voltages warning.
1MRK505183-UEN C
8.4.2.6
t
M>V/Hz> tAlarm
t>tAlarm
&
ALARM
t
V/Hz> U3P I3P Calculation of internal induced voltage Ei tMin k M
t>tMin
&
TRIP
Ei
IEEE law
t
tMax
Figure 230:
Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The cooling process is not shown. It is not shown that voltage and frequency are separately checked against their respective limit values.
8.4.3
Function block
OEXPVPH I3P* U3P* BLOCK RESET TRIP START ALARM
IEC05000329-2-en.vsd
IEC05000329 V3 EN
Figure 231:
8.4.4
1MRK505183-UEN C
Table 244:
Name TRIP START ALARM
8.4.5
Table 245:
Name Operation IBase UBase V/Hz> V/Hz>> XLeak TrPulse tMin tMax tCooling CurveType kForIEEE AlarmLevel tAlarm
Setting parameters
OEXPVPH Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 100.0 - 180.0 100.0 - 200.0 0.000 - 200.000 0.000 - 60.000 0.000 - 60.000 0.00 - 9000.00 0.10 - 9000.00 IEEE Tailor made 1 - 60 50.0 - 120.0 0.00 - 9000.00 Unit A kV %UB/f %UB/f ohm s s s s % s Step 1 0.05 0.1 0.1 0.001 0.001 0.001 0.01 0.01 1 0.1 0.01 Default Off 3000 400.00 110.0 140.0 0.000 0.100 7.000 1800.00 1200.00 IEEE 1 100.0 5.00 Description Operation Off / On Base current (rated phase current) in A Base voltage (main voltage) in kV Operate level of V/Hz at no load and rated freq in % of (Ubase/frated) High level of V/Hz above which tMin is used, in % of (Ubase/frated) Winding leakage reactance in primary ohms Length of the pulse for trip signal (in sec) Minimum trip delay for V/Hz inverse curve, in sec Maximum trip delay for V/Hz inverse curve, in sec Transformer magnetic core cooling time constant, in sec Inverse time curve selection, IEEE/Tailor made Time multiplier for IEEE inverse type curve Alarm operate level as % of operate level Alarm time delay, in sec
Table 246:
Name t1Tailor t2Tailor t3Tailor t4Tailor t5Tailor t6Tailor
1MRK505183-UEN C
Table 247:
Name MeasuredU
MeasuredI
L1L2
8.4.6
Technical data
Table 248:
Function Operate value, start Operate value, alarm Operate value, high level Curve type
EQUATION1319 V1 EN
(Equation 123)
where M = (E/f)/(Ur/fr) Minimum time delay for inverse function Maximum time delay for inverse function Alarm time delay (0.00060.000) s (0.009000.00) s (0.00060.000) s 0.5% 10 ms 0.5% 10 ms 0.5% 10 ms
8.5
8.5.1
Introduction
A voltage differential monitoring function is available. It compares the voltages from two three phase sets of voltage transformers and has one sensitive alarm step and one trip step. It can be used to supervise the voltage from two fuse groups or two different voltage transformers fuses as a fuse/MCB supervision function.
1MRK505183-UEN C
The Voltage differential protection function VDCPTOV (60) is based on comparison of the amplitudes of the two voltages connected in each phase. Possible differences between the ratios of the two Voltage/Capacitive voltage transformers can be compensated for with a ratio correction factors RFLx. The voltage difference is evaluated and if it exceeds the alarm level UDAlarm or trip level UDATrip signals for alarm (ALARM output) or trip (TRIP output) is given after definite time delay tAlarm respectively tTrip. The two three phase voltage supplies are also supervised with undervoltage settings U1Low and U2Low. The outputs for loss of voltage U1LOW resp U2LOW will be activated. The U1 voltage is supervised for loss of individual phases whereas the U2 voltage is supervised for loss of all three phases. Loss of all U1or all U2 voltages will block the differential measurement. This blocking can be switched off with setting BlkDiffAtULow = No. VDCPTOV function can be blocked from an external condition with the binary BLOCK input. It can for example, be activated from Fuse failure supervision function SDDRFUF. To allow easy commissioning the measured differential voltage is available as service value. This allows simple setting of the ratio correction factor to achieve full balance in normal service. The principle logic diagram is shown in figure 232.
1MRK505183-UEN C
UDTripL1>
UDTripL1>
AND
AND
TRIP
UDTripL1>
AND AND
START
UDAlarmL1>
AND O R tAlarm
UDAlarmL1>
AND
AND
ALARM
UDAlarmL1>
AND
U1<L1 U1<L2 U1<L3 BlkDiffAtULow U2<L1 U2<L2 U2<L3 BLOCK AND t1 t AND U2LOW OR AND tAlarm t AND U1LOW
AND
en06000382-1.vsd
IEC06000382 V2 EN
Figure 232:
8.5.3
Function block
VDCPTOV U3P1* U3P2* BLOCK TRIP START ALARM U1LOW U2LOW UL1DIFF UL2DIFF UL3DIFF IEC06000528-2-en.vsd
IEC06000528 V2 EN
Figure 233:
1MRK505183-UEN C
Table 250:
Name TRIP START ALARM U1LOW U2LOW UL1DIFF UL2DIFF UL3DIFF
8.5.5
Table 251:
Name Operation UBase BlkDiffAtULow UDTrip tTrip tReset U1Low U2Low tBlock UDAlarm tAlarm
Setting parameters
VDCPTOV Group settings (basic)
Values (Range) Off On 0.50 - 2000.00 No Yes 0.0 - 100.0 0.000 - 60.000 0.000 - 60.000 0.0 - 100.0 0.0 - 100.0 0.000 - 60.000 0.0 - 100.0 0.000 - 60.000 Unit kV %UB s s %UB %UB s %UB s Step 0.01 0.1 0.001 0.001 0.1 0.1 0.001 0.1 0.001 Default Off 400.00 Yes 5.0 1.000 0.000 70.0 70.0 0.000 2.0 2.000 Description Operation Off/On Base Voltage Block operation at low voltage Operate level, in % of UBase Time delay for voltage differential operate, in milliseconds Time delay for voltage differential reset, in seconds Input 1 undervoltage level, in % of UBase Input 2 undervoltage level, in % of UBase Reset time for undervoltage block Alarm level, in % of UBase Time delay for voltage differential alarm, in seconds
1MRK505183-UEN C
Table 252:
Name RFL1 RFL2 RFL3
8.5.6
Technical data
Table 253:
Function Voltage difference for alarm and trip Under voltage level Timers
8.6
8.6.1
Introduction
Loss of voltage check (LOVPTUV) is suitable for use in networks with an automatic system restoration function. LOVPTUV issues a three-pole trip command to the circuit breaker, if all three phase voltages fall below the set value for a time longer than the set time and the circuit breaker remains closed.
8.6.2
Principle of operation
The operation of Loss of voltage check LOVPTUV is based on line voltage measurement. LOVPTUV is provided with a logic, which automatically recognises if the line was restored for at least tRestore before starting the tTrip timer. All three phases are required to be low before the output TRIP is activated. The START output signal indicates start. Additionally, LOVPTUV is automatically blocked if only one or two phase voltages have been detected low for more than tBlock.
1MRK505183-UEN C
LOVPTUV operates again only if the line has been restored to full voltage for at least tRestore. Operation of the function is also inhibited by fuse failure and open circuit breaker information signals, by their connection to dedicated inputs of the function block. Due to undervoltage conditions being continuous the trip pulse is limited to a length set by setting tPulse. The operation of LOVPTUV is supervised by the fuse-failure function (VTSU input) and the information about the open position (CBOPEN) of the associated circuit breaker. The BLOCK input can be connected to a binary input of the IED in order to receive a block command from external devices or can be software connected to other internal functions of the IED itself in order to receive a block command from internal functions. LOVPTUV is also blocked when the IED is in TEST status and the function has been blocked from the HMI test menu. (Blocked=Yes).
1MRK505183-UEN C
TEST TEST-ACTIVE
&
Blocked = Yes
BLOCK
>1
Function Enable tTrip tPulse
START
& &
TRIP
&
tBlock
>1
CBOPEN VTSU
>1
Reset Enable
&
>1
tRestore t
>1
IEC07000089_2_en.vsd
IEC07000089 V2 EN
Figure 234:
8.6.3
Function block
LOVPTUV U3P* BLOCK CBOPEN VTSU TRIP START
IEC07000039-2-en.vsd
IEC07000039 V2 EN
Figure 235:
1MRK505183-UEN C
Table 255:
Name TRIP START
8.6.5
Table 256:
Name Operation UBase UPE tTrip
Setting parameters
LOVPTUV Group settings (basic)
Values (Range) Off On 0.1 - 9999.9 1 - 100 0.000 - 60.000 Unit kV %UB s Step 0.1 1 0.001 Default Off 400.0 70 7.000 Description Operation Off/On Base voltage Operate voltagein% of base voltage Ubase Operate time delay
Table 257:
Name tPulse tBlock tRestore
8.6.6
Technical data
Table 258:
Function Operate voltage Pulse timer Timers
1MRK505183-UEN C
Section 9
Frequency protection
9.1
f<
SYMBOL-P V1 EN
9.1.1
Introduction
Underfrequency occurs as a result of lack of generation in the network. Underfrequency protection SAPTUF is used for load shedding systems, remedial action schemes, gas turbine startup and so on. SAPTUF is provided with an under voltage blocking. The operation may be based on single-phase, phase-to-phase or positive-sequence voltage measurement.
9.1.2
Principle of operation
Underfrequency protection SAPTUF is used to detect low power system frequency. SAPTUF can either have a definite time delay or a voltage magnitude dependent time delay. If the voltage magnitude dependent time delay is applied, the time delay will be longer if the voltage is higher, and the delay will be shorter if the voltage is lower. If the frequency remains below the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, that is, if the
1MRK505183-UEN C
voltage is lower than the set blocking voltage IntBlockLevel the function is blocked and no START or TRIP signal is issued.
9.1.2.1
Measurement principle
The fundamental frequency of the measured input voltage is measured continuously, and compared with the set value, StartFrequency. The frequency function is dependent on the voltage magnitude. If the voltage magnitude decreases the setting IntBlockLevel, SAPTUF gets blocked, and the output BLKDMAGN is issued. All voltage settings are made in percent of the setting UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output START signal, a hysteresis has been included.
9.1.2.2
Time delay
The time delay for underfrequency protection SAPTUF can be either a settable definite time delay or a voltage magnitude dependent time delay, where the time delay depends on the voltage level; a high voltage level gives a longer time delay and a low voltage level causes a short time delay. For the definite time delay, the setting TimeDlyOperate sets the time delay. For the voltage dependent time delay the measured voltage level and the settings UNom, UMin, Exponent, tMax and tMin set the time delay according to figure 236 and equation 124. The setting TimerOperation is used to decide what type of time delay to apply. Trip signal issuing requires that the underfrequency condition continues for at least the user set time delay TimeDlyOperate. If the START condition, with respect to the measured frequency ceases during this user set delay time, and is not fulfilled again within a user defined reset time, TimeDlyReset, the START output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. On the output of SAPTUF a 100ms pulse is issued, after a time delay corresponding to the setting of TimeDlyRestore, when the measured frequency returns to the level corresponding to the setting RestoreFreq.
9.1.2.3
1MRK505183-UEN C
similar way as for the inverse time characteristic for the undervoltage and overvoltage functions.
U - UMin t= UNom - UMin
EQUATION1182 V1 EN
Exponent
(Equation 124)
where: t U Exponent tMax, tMin is the voltage dependent time delay (at constant voltage), is the measured voltage is a setting, are time settings.
TimeDlyOperate [s]
Exponenent 3
0.5
1 2
90
95
100
U [% of UBase]
en05000075.vsd
IEC05000075 V1 EN
Figure 236:
Voltage dependent inverse time characteristics for underfrequency protection SAPTUF. The time delay to operate is plotted as a function of the measured voltage, for the Exponent = 0, 1, 2, 3, 4 respectively.
1MRK505183-UEN C
It is possible to block underfrequency protection SAPTUF partially or completely, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: BLKREST: blocks all outputs blocks the TRIP output blocks the RESTORE output
If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the TRIP outputs, are blocked.
9.1.2.5
Design
The frequency measuring element continuously measures the frequency of the positive sequence voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid transients due to switchings and faults. The time integrator can operate either due to a definite delay time or to the special voltage dependent delay time. When the frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after the time delay TimeDlyRestore. The design of underfrequency protection SAPTUF is schematically described in figure 237.
Voltage
Time integrator TimerOperation Mode Selector TimeDlyOperate TimeDlyReset START TRIP Start & Trip Output Logic START
Frequency
TRIP
en05000726.vsd
IEC05000726 V1 EN
Figure 237:
1MRK505183-UEN C
9.1.3
Figure 238:
9.1.4
Table 260:
Name TRIP START RESTORE BLKDMAGN FREQ
9.1.5
Table 261:
Name Operation UBase StartFrequency IntBlockLevel TimeDlyOperate TimeDlyReset TimeDlyRestore
Setting parameters
SAPTUF Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 35.00 - 75.00 0 - 100 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit kV Hz %UB s s s Step 0.05 0.01 1 0.001 0.001 0.001 Default Off 400.00 48.80 50 0.200 0.000 0.000 Description Operation Off / On Base voltage Frequency setting/start value. Internal blocking level in % of UBase. Operate time delay in over/underfrequency mode. Time delay for reset. Restore time delay.
1MRK505183-UEN C
Restore frequency if frequency is above frequency value. Setting for choosing timer mode. Nominal voltage in % of UBase for voltage based timer. Lower operation limit in % of UBase for voltage based timer. For calculation of the curve form for voltage based timer. Maximum time operation limit for voltage based timer. Minimum time operation limit for voltage based timer.
9.1.6
Technical data
Table 262:
Function Operate value, start function Operate time, start function Reset time, start function Operate time, definite time function Reset time, definite time function Voltage dependent time delay
U - UMin t= UNom - UMin
EQUATION1182 V1 EN
Exponent
(Equation 125)
U=Umeasured
9.2
f>
SYMBOL-O V1 EN
1MRK505183-UEN C
9.2.1
9.2.2
Principle of operation
Overfrequency protection SAPTOF is used to detect high power system frequency. SAPTOF has a settable definite time delay. If the frequency remains above the set value for a time period corresponding to the chosen time delay, the corresponding TRIP signal is issued. To avoid an unwanted TRIP due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available from the preprocessing function, that is, if the voltage is lower than the set blocking voltage in the preprocessing function, the function is blocked and no START or TRIP signal is issued.
9.2.2.1
Measurement principle
The fundamental frequency of the positive sequence voltage is measured continuously, and compared with the set value, StartFrequency. Overfrequency protection SAPTOF is dependent on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel, SAPTOF is blocked, and the output BLKDMAGN is issued. All voltage settings are made in percent of the UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output START signal, a hysteresis has been included.
9.2.2.2
Time delay
The time delay for Overfrequency protection SAPTOF (81) is a settable definite time delay, specified by the setting TimeDlyOperate. TRIP signal issuing requires that the overfrequency condition continues for at least the user set time delay, TimeDlyReset. If the START condition, with respect to the measured frequency ceases during this user set delay time, and is not fulfilled again within a user defined reset time, TimeDlyReset, the START output is reset, after that the defined reset time has elapsed. It is to be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area.
433
1MRK505183-UEN C
It is possible to block overfrequency protection SAPTOF partially or completely, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: blocks all outputs blocks the TRIP output
If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the TRIP outputs, are blocked.
9.2.2.4
Design
The frequency measuring element continuously measures the frequency of the positive sequence voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid transients due to switchings and faults in the power system. The time integrator operates due to a definite delay time. The design of overfrequency protection SAPTOF is schematically described in figure 239.
Voltage
START
Frequency
en05000735.vsd
IEC05000735 V1 EN
Figure 239:
1MRK505183-UEN C
9.2.3
Figure 240:
9.2.4
Table 264:
Name TRIP START BLKDMAGN FREQ
9.2.5
Table 265:
Name Operation UBase StartFrequency IntBlockLevel TimeDlyOperate TimeDlyReset
Setting parameters
SAPTOF Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 35.00 - 75.00 0 - 100 0.000 - 60.000 0.000 - 60.000 Unit kV Hz %UB s s Step 0.05 0.01 1 0.001 0.001 Default Off 400.00 51.20 50 0.000 0.000 Description Operation Off / On Base voltage Frequency setting/start value. Internal blocking level in % of UBase. Operate time delay in over/underfrequency mode. Time delay for reset.
1MRK505183-UEN C
9.3
9.3.1
Introduction
Rate-of-change frequency protection function (SAPFRC) gives an early indication of a main disturbance in the system. SAPFRC can be used for generation shedding, load shedding, remedial action schemes. SAPFRC can discriminate between positive or negative change of frequency. SAPFRC is provided with an undervoltage blocking. The operation may be based on single-phase, phase-to-phase or positive-sequence voltage measurement.
9.3.2
Principle of operation
Rate-of-change frequency protection SAPFRC is used to detect fast power system frequency changes, increase as well as, decrease at an early stage. SAPFRC has a settable definite time delay. If the rate-of-change of frequency remains below the set value, for negative rate-of-change, for a time period equal to the chosen time delay, the TRIP signal is issued. If the rate-of-change of frequency remains above the set value, for positive rate-of-change, for a time period equal to the chosen time delay, the TRIP signal is issued. To avoid an unwanted TRIP due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, that is if the voltage is lower than the set blocking voltage
1MRK505183-UEN C
IntBlockLevel, the function is blocked and no START or TRIP signal is issued. If the frequency recovers, after a frequency decrease, a restore signal is issued.
9.3.2.1
Measurement principle
The rate-of-change of the fundamental frequency of the selected voltage is measured continuously, and compared with the set value, StartFreqGrad. Rate-ofchange frequency protection SAPFRC is also dependent on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel, SAPFRC is blocked, and the output BLKDMAGN is issued. The sign of the setting StartFreqGrad, controls if SAPFRC reacts on a positive or on a negative change in frequency. If SAPFRC is used for decreasing frequency that is, the setting StartFreqGrad has been given a negative value, and a trip signal has been issued, then a 100 ms pulse is issued on the RESTORE output, when the frequency recovers to a value higher than the setting RestoreFreq. A positive setting of StartFreqGrad, sets SAPFRC to START and TRIP for frequency increases. To avoid oscillations of the output START signal, a hysteresis has been included.
9.3.2.2
Time delay
Rate-of-change frequency protection SAPFRC has a settable definite time delay, tTrip. . Trip signal issuing requires that the rate-of-change of frequency condition continues for at least the user set time delay, tTrip. If the START condition, with respect to the measured frequency ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the START output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back into the hysteresis area. The RESTORE output of SAPFRC is set, after a time delay equal to the setting of tRestore, when the measured frequency has returned to the level corresponding to RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s the restore functionality is disabled, and no output will be given. The restore functionality is only active for lowering frequency conditions and the restore sequence is disabled if a new negative frequency gradient is detected during the restore period, defined by the settings RestoreFreq and tRestore.
9.3.2.3
Blocking
Rate-of-change frequency protection (SAPFRC) can be partially or totally blocked, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: BLKREST: blocks all outputs blocks the TRIP output blocks the RESTORE output
1MRK505183-UEN C
If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the TRIP outputs, are blocked.
9.3.2.4
Design
Rate-of-change frequency protection (SAPFRC) measuring element continuously measures the frequency of the selected voltage and compares it to the setting StartFreqGrad. The frequency signal is filtered to avoid transients due to power system switchings and faults. The time integrator operates with a definite delay time. When the frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore, if the TRIP signal has earlier been issued. The sign of the setting StartFreqGrad is essential, and controls if the function is used for raising or lowering frequency conditions. The design of SAPFRC is schematically described in figure 241.
BLOCK BLKTRIP BLKRESET OR Comparator U < IntBlockLevel Start & Trip Output Logic BLOCK BLKDMAGN
Voltage
Rate-of-Change of Frequency
Comparator If [StartFreqGrad<0 START AND df/dt < StartFreqGrad] OR [StartFreqGrad>0 AND df/dt > StartFreqGrad] Then START
START
TRIP
en05000835.vsd
IEC05000835 V1 EN
Figure 241:
1MRK505183-UEN C
9.3.3
Figure 242:
9.3.4
Table 268:
Name TRIP START RESTORE BLKDMAGN
9.3.5
Table 269:
Name Operation UBase StartFreqGrad IntBlockLevel tTrip RestoreFreq tRestore tReset
Setting parameters
SAPFRC Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 -10.00 - 10.00 0 - 100 0.000 - 60.000 45.00 - 65.00 0.000 - 60.000 0.000 - 60.000 Unit kV Hz/s %UB s Hz s s Step 0.05 0.01 1 0.001 0.01 0.001 0.001 Default Off 400.00 0.50 50 0.200 49.90 0.000 0.000 Description Operation Off / On Base setting for the phase-phase voltage in kV Frequency gradient start value. Sign defines direction. Internal blocking level in % of UBase. Operate time delay in pos./neg. frequency gradient mode. Restore frequency if frequency is above frequency value (Hz) Restore time delay. Time delay for reset.
1MRK505183-UEN C
1MRK505183-UEN C
Section 10
Multipurpose protection
10.1
10.1.1
Introduction
The General current and voltage protection (CVGAPC) can be utilized as a negative sequence current protection detecting unsymmetrical conditions such as open phase or unsymmetrical faults. CVGAPC can also be used to improve phase selection for high resistive earth faults, outside the distance protection reach, for the transmission line. Three functions are used, which measures the neutral current and each of the three phase voltages. This will give an independence from load currents and this phase selection will be used in conjunction with the detection of the earth fault from the directional earth fault protection function.
10.1.2
10.1.2.1
Principle of operation
Measured quantities within CVGAPC
General current and voltage protection (CVGAPC) function is always connected to three-phase current and three-phase voltage input in the configuration tool, but it will always measure only one current and one voltage quantity selected by the end user in the setting tool. The user can select to measure one of the current quantities shown in table 271.
1MRK505183-UEN C
Table 271:
CurrentInput
1 2 3 4 5 6 7 8 9 Phase1 Phase2 Phase3 PosSeq NegSeq 3ZeroSeq MaxPh MinPh
UnbalancePh
10
Phase1-Phase2
11
Phase2-Phase3
12
Phase3-Phase1
13 14 15
The user can select to measure one of the voltage quantities shown in table 272:
Table 272: Voltage selection for CVGAPC function
Comment CVGAPC function will measure the phase L1 voltage phasor CVGAPC function will measure the phase L2 voltage phasor CVGAPC function will measure the phase L3 voltage phasor
VoltageInput
1 2 3 Phase1 Phase2 Phase3
1MRK505183-UEN C
VoltageInput
4 5
Comment CVGAPC function will measure internally calculated positive sequence voltage phasor CVGAPC function will measure internally calculated negative sequence voltage phasor. This voltage phasor will be intentionally rotated for 180 in order to enable easier settings for the directional feature when used. CVGAPC function will measure internally calculated zero sequence voltage phasor multiplied by factor 3. This voltage phasor will be intentionally rotated for 180 in order to enable easier settings for the directional feature when used. CVGAPC function will measure voltage phasor of the phase with maximum magnitude CVGAPC function will measure voltage phasor of the phase with minimum magnitude CVGAPC function will measure magnitude of unbalance voltage, which is internally calculated as the algebraic magnitude difference between the voltage phasor of the phase with maximum magnitude and voltage phasor of the phase with minimum magnitude. Phase angle will be set to 0 all the time CVGAPC function will measure the voltage phasor internally calculated as the vector difference between the phase L1 voltage phasor and phase L2 voltage phasor (UL1-UL2) CVGAPC function will measure the voltage phasor internally calculated as the vector difference between the phase L2 voltage phasor and phase L3 voltage phasor (UL2-UL3) CVGAPC function will measure the voltage phasor internally calculated as the vector difference between the phase L3 voltage phasor and phase L1 voltage phasor ( UL3-UL1) CVGAPC function will measure ph-ph voltage phasor with the maximum magnitude CVGAPC function will measure ph-ph voltage phasor with the minimum magnitude CVGAPC function will measure magnitude of unbalance voltage, which is internally calculated as the algebraic magnitude difference between the ph-ph voltage phasor with maximum magnitude and phph voltage phasor with minimum magnitude. Phase angle will be set to 0 all the time
-3ZeroSeq
7 8 9
10
Phase1-Phase2
11
Phase2-Phase3
12
Phase3-Phase1
13 14 15
It is important to notice that the voltage selection from table 272 is always applicable regardless the actual external VT connections. The three-phase VT inputs can be connected to IED as either three phase-to-ground voltages UL1, UL2 & UL3 or three phase-to-phase voltages UL1L2, UL2L3 & UL3L1). This information about actual VT connection is entered as a setting parameter for the pre-processing block, which will then take automatic care about it. The user can select one of the current quantities shown in table 273 for built-in current restraint feature:
1MRK505183-UEN C
Table 273:
Set value for the parameter RestrCurr 1 2 3 4 PosSeq NegSeq 3ZeroSeq MaxPh
10.1.2.2
Base voltage shall be entered as: 1. 2. rated phase-to-earth voltage of the protected object in primary kV, when the measured Voltage Quantity is selected from 1 to 9, as shown in table 272. rated phase-to-phase voltage of the protected object in primary kV, when the measured Voltage Quantity is selected from 10 to 15, as shown in table 272.
10.1.2.3
1MRK505183-UEN C
The overcurrent protection step can be restrained by a second harmonic component in the measured current quantity (see table 271). However it shall be noted that this feature is not applicable when one of the following measured currents is selected: PosSeq (positive sequence current) NegSeq (negative sequence current) UnbalancePh (unbalance phase current) UnbalancePh-Ph (unbalance ph-ph current)
This feature will simple prevent overcurrent step start if the second-to-first harmonic ratio in the measured current exceeds the set level.
Directional feature
The overcurrent protection step operation can be can be made dependent on the relevant phase angle between measured current phasor (see table 271) and measured voltage phasor (see table 272). In protection terminology it means that the General currrent and voltage protection (CVGAPC) function can be made directional by enabling this built-in feature. In that case overcurrent protection step will only operate if the current flow is in accordance with the set direction (Forward, which means towards the protected object, or Reverse, which means from the protected object). For this feature it is of the outmost importance to understand that the measured voltage phasor (see table 272) and measured current phasor (see table 271) will be used for directional decision. Therefore it is the sole responsibility of the end user to select the appropriate current and voltage signals in order to get a proper directional decision. CVGAPC function will NOT do this automatically. It will just simply use the current and voltage phasors selected by the end user to check for the directional criteria. Table 274 gives an overview of the typical choices (but not the only possible ones) for these two quantities for traditional directional relays.
Table 274:
Set value for the parameter
CurrentInput
PosSeq
VoltageInput
PosSeq
NegSeq
-NegSeq
3ZeroSeq
-3ZeroSeq
1MRK505183-UEN C
CurrentInput
VoltageInput
Comment Directional overcurrent function for the first phase is obtained. Typical setting for RCADir is +30 or +45 Directional overcurrent function for the second phase is obtained. Typical setting for RCADir is +30 or +45 Directional overcurrent function for the third phase is obtained. Typical setting for RCADir is +30 or +45
Unbalance current or voltage measurement shall not be used when the directional feature is enabled. Two types of directional measurement principles are available, I & U and IcosPhi&U. The first principle, referred to as "I & U" in the parameter setting tool, checks that: the magnitude of the measured current is bigger than the set pick-up level the phasor of the measured current is within the operating region (defined by the relay operate angle, ROADir parameter setting; see figure 243).
U=-3U0
Figure 243:
where:
The second principle, referred to as "IcosPhi&U" in the parameter setting tool, checks that:
1MRK505183-UEN C
that the product Icos() is bigger than the set pick-up level, where is angle between the current phasor and the mta line that the phasor of the measured current is within the operating region (defined by the Icos() straight line and the relay operate angle, ROADir parameter setting; see figure 243).
U=-3U0
en05000253.vsd
IEC05000253 V1 EN
Figure 244:
where:
Note that it is possible to decide by a parameter setting how the directional feature shall behave when the magnitude of the measured voltage phasor falls below the preset value. User can select one of the following three options: Non-directional (operation allowed for low magnitude of the reference voltage) Block (operation prevented for low magnitude of the reference voltage) Memory (memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that time the current direction will be locked to the one determined during memory time and it will re-set only if the current fails below set pickup level or voltage goes above set voltage memory limit.
The overcurrent protection step operation can be can be made dependent of a measured voltage quantity (see table 272). Practically then the pickup level of the overcurrent step is not constant but instead decreases with the decrease in the magnitude of the measured voltage quantity. Two different types of dependencies are available: Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)
447 Technical reference manual
1MRK505183-UEN C
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
ULowLimit_OC1
IEC05000324 V1 EN
Figure 245:
Example for OC1 step current pickup level variation as function of measured voltage magnitude in Slope mode of operation
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
UHighLimit_OC1
IEC05000323 V1 EN
Figure 246:
Example for OC1 step current pickup level variation as function of measured voltage magnitude in Step mode of operation
This feature will simply change the set overcurrent pickup level in accordance with magnitude variations of the measured voltage. It shall be noted that this feature will as well affect the pickup current value for calculation of operate times for IDMT
1MRK505183-UEN C
curves (overcurrent with IDMT curve will operate faster during low voltage conditions). The overcurrent protection step operation can be made dependent of a restraining current quantity (see table 273). Practically then the pickup level of the overcurrent step is not constant but instead increases with the increase in the magnitude of the restraining current.
IMeasured
te ra pe O
IsetHigh
ea ar
ain
IsetLow
atan(RestrCoeff) Restraint
en05000255.vsd
IEC05000255 V1 EN
Figure 247:
This feature will simply prevent overcurrent step to start if the magnitude of the measured current quantity is smaller than the set percentage of the restrain current magnitude. However this feature will not affect the pickup current value for calculation of operate times for IDMT curves. This means that the IDMT curve operate time will not be influenced by the restrain current magnitude. When set, the start signal will start definite time delay or inverse (IDMT) time delay in accordance with the end user setting. If the start signal has value one for longer time than the set time delay, the overcurrent step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the end user setting.
10.1.2.4
1MRK505183-UEN C
signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the setting.
10.1.2.5
10.1.2.6
10.1.2.7
Logic diagram
The simplified internal logics, for CVGAPC function are shown in the following figures.
1MRK505183-UEN C
IED
ADM CVGAPC function
Current and voltage selection settings
Selection of which current and voltage shall be given to the built-in protection elements
IEC05000169_2_en.vsd
IEC05000169 V2 EN
Figure 248:
Figure 248 shows how internal treatment of measured currents is done for multipurpose protection function The following currents and voltages are inputs to the multipurpose protection function. They must all be expressed in true power system (primary) Amperes and kilovolts. 1. 2. 3. Instantaneous values (samples) of currents & voltages from one three-phase current and one three-phase voltage input. Fundamental frequency phasors from one three-phase current and one threephase voltage input calculated by the pre-processing modules. Sequence currents & voltages from one three-phase current and one threephase voltage input calculated by the pre-processing modules.
The multipurpose protection function: 1. 2. 3. Selects one current from the three-phase input system (see table 271) for internally measured current. Selects one voltage from the three-phase input system (see table 272) for internally measured voltage. Selects one current from the three-phase input system (see table 273) for internally measured restraint current.
1MRK505183-UEN C
CURRENT
UC1 2
Selected current
nd
Harmonic restraint
TRUC1
UC2 2nd Harmonic restraint OC1 2nd Harmonic restraint Current restraint Directionality Voltage control / restraint 1
STUC2 TRUC2
OC2 2nd Harmonic restraint Current restraint Directionality Voltage control / restraint 1
STOC2 TROC2
UDIRLOW DIROC2
STOV1
OV1
TROV1 STOV2
OV2
Selected voltage
TROV2 STUV1
UV1
TRUV1 STUV2
UV2
TRUV2
VOLTAGE
en05000170.vsd
IEC05000170 V1 EN
Figure 249:
1MRK505183-UEN C
Logic in figure 249 can be summarized as follows: 1. 2. 3. The selected currents and voltage are given to built-in protection elements. Each protection element and step makes independent decision about status of its START and TRIP output signals. More detailed internal logic for every protection element is given in the following four figures Common START and TRIP signals from all built-in protection elements & steps (internal OR logic) are available from multipurpose function as well.
DEF
OR
BLKTROC 1
AND
TROC1
Selected current
a b
a>b
OC1=On BLKOC1
StartCurr_OC1
AND
STOC1
Inverse Voltage control or restraint feature Directionality check DIR_OK Inverse time selected
Selected voltage
en05000831.vsd
IEC05000831 V1 EN
Figure 250:
Simplified internal logic diagram for built-in first overcurrent step that is, OC1 (step OC2 has the same internal logic)
1MRK505183-UEN C
Selected current
a b
b>a
DEF
AND
TRUC1
StartCurr_UC1
AND
STUC1
en05000750.vsd
IEC05000750 V1 EN
Figure 251:
Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2 has the same internal logic)
DEF
BLKTROV1
AND
TROV1
OR
a>b
StartVolt_OV1
AND
Inverse
STOV1
en05000751.vsd
IEC05000751 V1 EN
Figure 252:
Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the same internal logic)
1MRK505183-UEN C
DEF OR
BLKTRUV 1
AND
TRUV1
b>a
StartVolt_UV1
AND Inverse
STUV1
en05000752.vsd
IEC05000752 V1 EN
Figure 253:
Simplified internal logic diagram for built-in first undervoltage step UV1 (step UV2 has the same internal logic)
10.1.3
Function block
CVGAPC I3P* U3P* BLOCK BLKOC1 BLKOC1TR ENMLTOC1 BLKOC2 BLKOC2TR ENMLTOC2 BLKUC1 BLKUC1TR BLKUC2 BLKUC2TR BLKOV1 BLKOV1TR BLKOV2 BLKOV2TR BLKUV1 BLKUV1TR BLKUV2 BLKUV2TR TRIP TROC1 TROC2 TRUC1 TRUC2 TROV1 TROV2 TRUV1 TRUV2 START STOC1 STOC2 STUC1 STUC2 STOV1 STOV2 STUV1 STUV2 BLK2ND DIROC1 DIROC2 UDIRLOW CURRENT ICOSFI VOLTAGE UIANGLE IEC05000372-2-en.vsd
IEC05000372 V2 EN
Figure 254:
1MRK505183-UEN C
Table 276:
Name TRIP TROC1 TROC2 TRUC1 TRUC2 TROV1 TROV2 TRUV1 TRUV2
1MRK505183-UEN C
10.1.5
Table 277:
Name Operation CurrentInput
Setting parameters
CVGAPC Group settings (basic)
Values (Range) Off On phase1 phase2 phase3 PosSeq NegSeq 3*ZeroSeq MaxPh MinPh UnbalancePh phase1-phase2 phase2-phase3 phase3-phase1 MaxPh-Ph MinPh-Ph UnbalancePh-Ph 1 - 99999 Unit Step Default Off MaxPh Description Operation Off / On Select current signal which will be measured inside function
IBase
3000
Base Current
1MRK505183-UEN C
kV % %IB -
0.05 1.0 1 -
Base Voltage Operation of 2nd harmonic restrain Off / On Ratio of second to fundamental current harmonic in % Harm analyse disabled above this current level in % of Ibase Enable current restrain function On / Off Select current signal which will be used for curr restrain
Restraining current coefficient Relay Characteristic Angle Relay Operate Angle Below this level in % of Ubase setting ActLowVolt takes over Operation OC1 Off / On Operate current level for OC1 in % of Ibase Selection of time delay curve type for OC1
1MRK505183-UEN C
%UB %UB -
Voltage dependent mode OC1 (step, slope) Multiplying factor for I pickup when OC1 is U dependent Voltage low limit setting OC1 in % of Ubase Voltage high limit setting OC1 in % of Ubase Enable block of OC1 by 2nd harmonic restrain Directional mode of OC1 (nondir, forward,reverse) Measuring on IandU or IcosPhiandU for OC1 Low voltage level action for Dir_OC1 (Nodir, Blk, Mem) Operation OC2 Off / On Operate current level for OC2 in % of Ibase Selection of time delay curve type for OC2
DirPrinc_OC1 ActLowVolt1_VM
I&U Non-directional
%IB -
1.0 -
tDef_OC2 k_OC2
s -
0.01 0.01
0.50 0.30
Independent (definitive) time delay of OC2 Time multiplier for the dependent time delay for OC2
1MRK505183-UEN C
Minimum operate time for IEC IDMT curves for OC2 Control mode for voltage controlled OC2 function
%UB %UB -
Voltage dependent mode OC2 (step, slope) Multiplying factor for I pickup when OC2 is U dependent Voltage low limit setting OC2 in % of Ubase Voltage high limit setting OC2 in % of Ubase Enable block of OC2 by 2nd harmonic restrain Directional mode of OC2 (nondir, forward,reverse) Measuring on IandU or IcosPhiandU for OC2 Low voltage level action for Dir_OC2 (Nodir, Blk, Mem) Operation UC1 Off / On Enable internal low current level blocking for UC1 Internal low current blocking level for UC1 in % of Ibase Operate undercurrent level for UC1 in % of Ibase Independent (definitive) time delay of UC1 Reset time delay used in IEC Definite Time curve UC1 Enable block of UC1 by 2nd harmonic restrain Operation UC2 Off / On Enable internal low current level blocking for UC2 Internal low current blocking level for UC2 in % of Ibase Operate undercurrent level for UC2 in % of Ibase Independent (definitive) time delay of UC2 Enable block of UC2 by 2nd harmonic restrain Operation OV1 Off / On
DirPrinc_OC2 ActLowVolt2_VM
I&U Non-directional
Operation_UC1 EnBlkLowI_UC1 BlkLowCurr_UC1 StartCurr_UC1 tDef_UC1 tResetDef_UC1 HarmRestr_UC1 Operation_UC2 EnBlkLowI_UC2 BlkLowCurr_UC2 StartCurr_UC2 tDef_UC2 HarmRestr_UC2 Operation_OV1
Off Off 20 70.0 0.50 0.00 Off Off Off 20 70.0 0.50 Off Off
1MRK505183-UEN C
s s %UB -
Operate time delay in sec for definite time use of OV1 Minimum operate time for IDMT curves for OV1 Time multiplier for the dependent time delay for OV1 Operation OV2 Off / On Operate voltage level for OV2 in % of Ubase Selection of time delay curve type for OV2
s s %UB -
Operate time delay in sec for definite time use of OV2 Minimum operate time for IDMT curves for OV2 Time multiplier for the dependent time delay for OV2 Operation UV1 Off / On Operate undervoltage level for UV1 in % of Ubase Selection of time delay curve type for UV1
s s %UB %UB
Operate time delay in sec for definite time use of UV1 Minimum operate time for IDMT curves for UV1 Time multiplier for the dependent time delay for UV1 Enable internal low voltage level blocking for UV1 Internal low voltage blocking level for UV1 in % of Ubase Operation UV2 Off / On Operate undervoltage level for UV2 in % of Ubase
1MRK505183-UEN C
s s %UB
Operate time delay in sec for definite time use of UV2 Minimum operate time for IDMT curves for UV2 Time multiplier for the dependent time delay for UV2 Enable internal low voltage level blocking for UV2 Internal low voltage blocking level for UV2 in % of Ubase
Table 278:
Name CurrMult_OC1
ResCrvType_OC1
tResetDef_OC1 P_OC1 A_OC1 B_OC1 C_OC1 PR_OC1 TR_OC1 CR_OC1 CurrMult_OC2 ResCrvType_OC2
s -
0.00 0.020 0.140 0.000 1.000 0.500 13.500 1.0 2.0 Instantaneous
Reset time delay used in IEC Definite Time curve OC1 Parameter P for customer programmable curve for OC1 Parameter A for customer programmable curve for OC1 Parameter B for customer programmable curve for OC1 Parameter C for customer programmable curve for OC1 Parameter PR for customer programmable curve for OC1 Parameter TR for customer programmable curve for OC1 Parameter CR for customer programmable curve for OC1 Multiplier for scaling the current setting value for OC2 Selection of reset curve type for OC2
s -
Reset time delay used in IEC Definite Time curve OC2 Parameter P for customer programmable curve for OC2 Parameter A for customer programmable curve for OC2
1MRK505183-UEN C
s s -
Reset time delay in sec for definite time use of OV1 Reset time delay in sec for IDMT curves for OV1 Parameter A for customer programmable curve for OV1 Parameter B for customer programmable curve for OV1 Parameter C for customer programmable curve for OV1 Parameter D for customer programmable curve for OV1 Parameter P for customer programmable curve for OV1 Selection of reset curve type for OV2
s s -
Reset time delay in sec for definite time use of OV2 Reset time delay in sec for IDMT curves for OV2 Parameter A for customer programmable curve for OV2 Parameter B for customer programmable curve for OV2 Parameter C for customer programmable curve for OV2 Parameter D for customer programmable curve for OV2 Parameter P for customer programmable curve for OV2 Selection of reset curve type for UV1
1MRK505183-UEN C
Reset time delay in sec for definite time use of UV1 Reset time delay in sec for IDMT curves for UV1 Parameter A for customer programmable curve for UV1 Parameter B for customer programmable curve for UV1 Parameter C for customer programmable curve for UV1 Parameter D for customer programmable curve for UV1 Parameter P for customer programmable curve for UV1 Selection of reset curve type for UV2
s s -
Reset time delay in sec for definite time use of UV2 Reset time delay in sec for IDMT curves for UV2 Parameter A for customer programmable curve for UV2 Parameter B for customer programmable curve for UV2 Parameter C for customer programmable curve for UV2 Parameter D for customer programmable curve for UV2 Parameter P for customer programmable curve for UV2
10.1.6
Technical data
Table 279:
Function Measuring current input
Base voltage
1MRK505183-UEN C
Voltage level where voltage memory takes over Start overvoltage, step 1 and 2 Start undervoltage, step 1 and 2 Operate time, start overvoltage Reset time, start overvoltage Operate time start undervoltage Reset time start undervoltage High and low voltage limit, voltage dependent operation Directional function Relay characteristic angle Relay operate angle Reset ratio, overcurrent Reset ratio, undercurrent
1.0% of Ur
(2.0 - 200.0)% of UBase (2.0 - 150.0)% of UBase 25 ms typically at 0 to 2 x Uset 25 ms typically at 2 to 0 x Uset 25 ms typically 2 to 0 x Uset 25 ms typically at 0 to 2 x Uset (1.0 - 200.0)% of UBase
1.0% of Ur for U<Ur 1.0% of U for U>Ur 1.0% of Ur for U<Ur 1.0% of U for U>Ur 1.0% of Ur for U<Ur 1.0% of U for U>Ur 2.0 degrees 2.0 degrees -
Settable: NonDir, forward and reverse (-180 to +180) degrees (1 to 90) degrees > 95% < 105%
1MRK505183-UEN C
1MRK505183-UEN C
Section 11
11.1
11.1.1
Introduction
Open or short circuited current transformer cores can cause unwanted operation of many protection functions such as differential, earth-fault current and negativesequence current functions. It must be remembered that a blocking of protection functions at an occurrence of open CT circuit will mean that the situation will remain and extremely high voltages will stress the secondary circuit. Current circuit supervision (CCSRDIF) compares the residual current from a three phase set of current transformer cores with the neutral point current on a separate input taken from another set of cores on the current transformer. A detection of a difference indicates a fault in the circuit and is used as alarm or to block protection functions expected to give unwanted tripping.
11.1.2
Principle of operation
Current circuit supervision CCSRDIF compares the absolute value of the vectorial sum of the three phase currents |Iphase| and the numerical value of the residual current |Iref| from another current transformer set, see figure 255. The FAIL output will be set to a logical one when the following criteria are fulfilled:
1MRK505183-UEN C
The numerical value of the difference |Iphase| |Iref| is higher than 80% of the numerical value of the sum |Iphase| + |Iref|. The numerical value of the current |Iphase| |Iref| is equal to or higher than the set operate value IMinOp. No phase current has exceeded Ip>Block during the last 10 ms. CCSRDIF is enabled by setting Operation = On.
The FAIL output remains activated 100 ms after the AND-gate resets when being activated for more than 20 ms. If the FAIL lasts for more than 150 ms an ALARM will be issued. In this case the FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents unwanted resetting of the blocking function when phase current supervision element(s) operate, for example, during a fault.
IEC05000463 V1 EN
Figure 255:
1MRK505183-UEN C
| I phase | - | I ref |
Slope = 1
Operation area
| I phase | + | I ref |
99000068.vsd
IEC99000068 V1 EN
Figure 256:
Operate characteristics
Due to the formulas for the axis compared, |SIphase | - |I ref | and |S I phase | + | I ref | respectively, the slope can not be above 2.
11.1.3
Function block
CCSRDIF I3P* IREF* BLOCK FAIL ALARM
IEC05000389-2-en.vsd
IEC05000389 V2 EN
Figure 257:
11.1.4
1MRK505183-UEN C
Table 281:
Name FAIL ALARM
11.1.5
Table 282:
Name Operation IBase IMinOp
Setting parameters
CCSRDIF Group settings (basic)
Values (Range) Off On 1 - 99999 5 - 200 Unit A %IB Step 1 1 Default Off 3000 20 Description Operation Off / On IBase value for current level detectors Minimum operate current differential level in % of IBase
Table 283:
Name Ip>Block
11.1.6
Technical data
Table 284:
Function Operate current Block current
11.2
11.2.1
Introduction
The aim of the fuse failure supervision function (SDDRFUF) is to block voltage measuring functions at failures in the secondary circuits between the voltage
1MRK505183-UEN C
transformer and the IED in order to avoid unwanted operations that otherwise might occur. The fuse failure supervision function basically has two different algorithms, negative sequence and zero sequence based algorithm and an additional delta voltage and delta current algorithm. The negative sequence detection algorithm is recommended for IEDs used in isolated or high-impedance earthed networks. It is based on the negative-sequence measuring quantities, a high value of voltage 3U2 without the presence of the negative-sequence current 3I2. The zero sequence detection algorithm is recommended for IEDs used in directly or low impedance earthed networks. It is based on the zero sequence measuring quantities, a high value of voltage 3U0 without the presence of the residual current 3I0. A criterion based on delta current and delta voltage measurements can be added to the fuse failure supervision function in order to detect a three phase fuse failure, which in practice is more associated with voltage transformer switching during station operations. For better adaptation to system requirements, an operation mode setting has been introduced which makes it possible to select the operating conditions for negative sequence and zero sequence based function. The selection of different operation modes makes it possible to choose different interaction possibilities between the negative sequence and zero sequence based algorithm.
11.2.2
11.2.2.1
Principle of operation
Zero and negative sequence detection
The zero and negative sequence function continuously measures the currents and voltages in all three phases and calculates, see figure 258: the zero-sequence voltage 3U0 the zero-sequence current 3I0 the negative sequence current 3I2 the negative sequence voltage 3U2
The measured signals are compared with their respective set values 3U0< and 3I0>, 3U2< and 3I2>. The function enable the internal signal FuseFailDetZeroSeq if the measured zerosequence voltage is higher than the set value 3U0> and the measured zerosequence current is below the set value 3I0<.
1MRK505183-UEN C
The function enable the internal signal FuseFailDetNegSeq if the measured negative sequence voltage is higher than the set value 3U2> and the measured negative sequence current is below the set value 3I2<. A drop off delay of 100 ms for the measured zero-sequence and negative sequence current will prevent a false fuse failure detection at un-equal breaker opening at the two line ends.
Sequence Detection
3I0< IL1 Zero sequence filter Negative sequence filter
a b
CurrZeroSeq 3I0
a b
IL2
a>b
100 ms t
IL3
a>b
100 ms t
AND
FuseFailDetNegSeq VoltZeroSeq
a b
a>b VoltNegSeq
3U0
UL2
a b
UL3 3U2>
a>b
3U2
IEC10000036-1-en.vsd
IEC10000036 V1 EN
Figure 258:
The calculated values 3U0, 3I0, 3I2 and 3U2 are available as service values on local HMI and monitoring tool in PCM600.
The output signals 3PH, BLKU and BLKZ can be blocked in the following conditions: The input BLOCK is activated The input BLKTRIP is activated at the same time as the internal signal fufailStarted is not present The operation mode selector OpMode is set to Off. The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from the HMI (BlockFUSE=Yes)
The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision function. It can be connected to a binary input of the IED in order to receive a block command from external devices or can be software connected to other internal functions of the IED itself in order to receive a block command from
1MRK505183-UEN C
internal functions. Through OR gate it can be connected to both binary inputs and internal function outputs. The input BLKSP is intended to be connected to the trip output at any of the protection functions included in the IED. When activated for more than 20 ms, the operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted operations during the opening of the breaker, which might cause unbalance conditions for which the fuse failure might operate. The output signal BLKZ will also be blocked if the internal dead line detection is activated. The block signal has a 200 ms drop-off time delay. The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related functions when the MCB is open independent of the setting of OpMode selector. The additional drop-off timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage dependent function due to non simultaneous closing of the main contacts of the miniature circuit breaker. The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order to block the voltage related functions when the line disconnector is open. The impedance protection function is not affected by the position of the line disconnector since there will be no line currents that can cause maloperation of the distance protection. If DISCPOS=0 it signifies that the line is connected to the system and when the DISCPOS=1 it signifies that the line is disconnected from the system and the block signal BLKU is generated. The output BLKU can be used for blocking the voltage related measuring functions (undervoltage protection, synchro-check etc.) except for the impedance protection. The function output BLKZ can be used for blocking the impedance protection function. The BLKZ will only be activated if not the internal dead line detection is activated at the same time. The fuse failure condition is unlatched when the normal voltage conditions are restored. When the output 3PH is activated, all three voltage are low.
11.2.2.2
1MRK505183-UEN C
respective set values DI< and DU> and the algorithm, detects a fuse failure if a sufficient change in voltage without a sufficient change in current is detected in each phase separately. The following quantities are calculated in all three phases: The change in voltage DU The change in current DI
The internal FuseFailDetDUDI signal is activated if the following conditions are fulfilled for a phase: The magnitude of the phase-ground voltage has been above UPh> for more than 1.5 cycle The magnitude of DU is higher than the corresponding setting DU> The magnitude of DI is below the setting DI>
and at least one of the following conditions are fulfilled: The magnitude of the phase current in the same phase is higher than the setting IPh> The circuit breaker is closed (CBCLOSED = True)
The first criterion means that detection of failure in one phase together with high current for the same phase will set the output. The measured phase current is used to reduce the risk of false fuse failure detection. If the current on the protected line is low, a voltage drop in the system (not caused by fuse failure) is not by certain followed by current change and a false fuse failure might occur The second criterion requires that the delta condition shall be fulfilled in any phase at the same time as circuit breaker is closed. Opening circuit breaker at one end and energizing the line from other end onto a fault could lead to wrong start of the fuse failure function at the end with the open breaker. If this is considering to be an important disadvantage, connect the CBCLOSED input to FALSE. In this way only the first criterion can activate the delta function.
1MRK505183-UEN C
DUDI Detection
DUDI detection Phase 1
IL1 One cycle delay |DI| DI< UL1 One cycle delay |DU| DU>
a a b a b
a>b
a>b
AND
a>b
20 ms t
1.5 cycle t
IL3 UL3
UL1
a b
a<b
IL1 IPh>
a b
a>b
AND OR AND
CBCLOSED UL2
a b
AND
OR
a<b
IL2
a b
a>b
AND OR AND
AND UL3
a b
OR
a<b
IL3
a b
a>b
AND
OR
IEC10000034-1-en.vsd
IEC10000034 V1 EN
Figure 259:
1MRK505183-UEN C
A simplified diagram for the functionality is found in figure 260. A dead phase condition is indicated if both the voltage and the current in one phase is below their respective setting values UDLD< and IDLD<. If at least one phase is considered to be dead the output DLD1PH and the internal signal DeadLineDet1Ph is activated. If all three phases are considered to be dead the output DLD3PH is activated
Dead Line Detection
IL1 IL2 IL3 IDLD< UL1 UL2 UL3 UDLD< intBlock
a b a b a b a b a b a b
AllCurrLow
DeadLineDet1Ph a<b a<b a<b AND OR AND AND AND AND DLD3PH AND DLD1PH
IEC10000035-1-en.vsd
IEC10000035 V1 EN
Figure 260:
11.2.2.4
Main logic
A simplified diagram for the functionality is found in figure 261. The fuse failure supervision function (SDDRFUF) can be switched on or off by the setting parameter Operation to On or Off. For increased flexibility and adaptation to system requirements an operation mode selector, OpMode, has been introduced to make it possible to select different operating modes for the negative and zero sequence based algorithms. The different operation modes are: Off; The negative and zero sequence function is switched off UNsINs; Negative sequence is selected UZsIZs; Zero sequence is selected
1MRK505183-UEN C
UZsIZsORUNsINs; Both negative and zero sequence is activated and working in parallel in an OR-condition UZsIZs AND UNsINs; Both negative and zero sequence is activated and working in series (AND-condition for operation) OptimZsNs; Optimum of negative and zero sequence (the function that has the highest magnitude of measured negative and zero sequence current will be activated)
The delta function can be activated by setting the parameter OpDUDI to On. When selected it operates in parallel with the sequence based algorithms. As soon as any fuse failure situation is detected, signals FuseFailDetZeroSeq, FuseFailDetNegSeq or FuseFailDetDUDI, and the specific functionality is released, the function will activate the output signal BLKU. The output signal BLKZ will be activated as well if not the internal dead phase detection, DeadLineDet1Ph, is activated at the same time. The output BLKU can be used for blocking voltage related measuring functions (under voltage protection, synchrocheck, and so on). For blocking of impedance protection functions output BLKZ shall be used. If the fuse failure situation is present for more than 5 seconds and the setting parameter SealIn is set to On it will be sealed in over under-voltage as long as at least one phase voltages is below the set value USealIn<. This will keep the BLKU and BLKZ signals activated as long as any phase voltage is below the set value USealIn<. If all three phase voltages drop below the set value USealIn< and the setting parameter SealIn is set to On also the output signal 3PH will be activated. The signals 3PH, BLKU and BLKZ signals will now be active as long as any phase voltage is below the set value USealIn<. If SealIn is set to On fuse failure condition is stored in the non volatile memory in the IED. At start-up (due to auxiliary power interruption or re-start due to configuration change) the IED checks the stored value in its non volatile memory and re-establishes the conditions present before the shut down. All phase voltages must became above USealIn< before fuse failure is de-activated and inhibits the block of different protection functions. The output signal BLKU will also be active if all phase voltages have been above the setting USealIn< for more than 60 seconds, the zero or negative sequence voltage has been above the set value 3U0> and 3U2> for more than 5 seconds, all phase currents are below the setting IDLD< (operate level for dead line detection) and the circuit breaker is closed (input CBCLOSED is activated). The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related functions when the MCB is open independent of the setting of OpMode or OpDUDI. An additional drop-out timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of
1MRK505183-UEN C
voltage dependent function due to non simultaneous closing of the main contacts of the miniature circuit breaker. The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order to block the voltage related functions when the line disconnector is open. The impedance protection function does not have to be affected since there will be no line currents that can cause malfunction of the distance protection. The output signals 3PH, BLKU and BLKZ as well as the signals DLD1PH and DLD3PH from dead line detections are blocked if any of the following conditions occur: The operation mode selector OpMode is set to Off The input BLOCK is activated The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from the HMI (BlockFUSE=Yes)
The input BLOCK is a general purpose blocking signal of the fuse failure supervision function. It can be connected to a binary input of the IED in order to receive a block command from external devices or can be software connected to other internal functions of the IED. Through OR gate it can be connected to both binary inputs and internal function outputs. The input BLKTRIP is intended to be connected to the trip output of any of the protection functions included in the IED and/or trip from external equipments via binary inputs. When activated for more than 20 ms without any fuse fail detected, the operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted operations during the opening of the breaker, which might cause unbalance conditions for which the fuse failure might operate.
1MRK505183-UEN C
AND
3PH
AND FuseFailDetNegSeq AND UNsINs UZsIZs OpMode UZsIZs OR UNsINs UZsIZs AND UNsINs OptimZsNs
a b
OR OR
CurrZeroSeq CurrNegSeq
OR
a>b
AND AND
DeadLineDet1Ph MCBOP
200 ms t
AND 150 ms t
OR
AND
BLKZ
60 sec t 5 sec t
OR AND
OR
AND
BLKU
OR
IEC10000033-1-en.vsd
IEC10000033 V1 EN
Figure 261:
Simplified logic diagram for fuse failure supervision function, Main logic
1MRK505183-UEN C
IEC05000700-2-en.vsd
IEC05000700 V3 EN
Figure 262:
11.2.4
Table 286:
Name BLKZ BLKU 3PH DLD1PH DLD3PH
11.2.5
Table 287:
Name Operation IBase UBase
Setting parameters
SDDRFUF Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 Unit A kV Step 1 0.05 Default On 3000 400.00 Description Operation Off / On Base current Base voltage
1MRK505183-UEN C
Name OpMode
3U0> 3I0< 3U2> 3I2< OpDUDI DU> DI< UPh> IPh> SealIn USealln< IDLD< UDLD<
%UB %IB %UB %IB %UB %IB %UB %IB %UB %IB %UB
1 1 1 1 1 1 1 1 1 1 1
30 10 30 10 Off 60 15 70 10 On 70 5 60
Operate level of residual overvoltage element in % of UBase Operate level of residual undercurrent element in % of IBase Operate level of neg seq overvoltage element in % of UBase Operate level of neg seq undercurrent element in % of IBase Operation of change based function Off/ On Operate level of change in phase voltage in % of UBase Operate level of change in phase current in % of IBase Operate level of phase voltage in % of UBase Operate level of phase current in % of IBase Seal in functionality Off/On Operate level of seal-in phase voltage in % of UBase Operate level for open phase current detection in % of IBase Operate level for open phase voltage detection in % of UBase
11.2.6
Technical data
Table 288:
Function Operate voltage, zero sequence Operate current, zero sequence Operate voltage, negative sequence Operate current, negative sequence Operate voltage change level Operate current change level
482
1MRK505183-UEN C
Section 12 Control
Section 12
Control
12.1
sc/vc
SYMBOL-M V1 EN
12.1.1
Introduction
The Synchronizing function allows closing of asynchronous networks at the correct moment including the breaker closing time. The systems can thus be reconnected after an autoreclose or manual closing, which improves the network stability. Synchrocheck, energizing check (SESRSYN) function checks that the voltages on both sides of the circuit breaker are in synchronism, or with at least one side dead to ensure that closing can be done safely. SESRSYN function includes a built-in voltage selection scheme for double bus and 1 breaker or ring busbar arrangements. Manual closing as well as automatic reclosing can be checked by the function and can have different settings. For systems which are running asynchronous a synchronizing function is provided. The main purpose of the synchronizing function is to provide controlled closing of circuit breakers when two asynchronous systems are going to be connected. It is used for slip frequencies that are larger than those for synchrocheck and lower than a set maximum level for the synchronizing function.
1MRK505183-UEN C
Principle of operation
Basic functionality
The synchrocheck function measures the conditions across the circuit breaker and compares them to set limits. The output is only given when all measured quantities are simultaneously within their set limits. The energizing check function measures the bus and line voltages and compares them to both high and low threshold detectors. The output is given only when the actual measured quantities match the set conditions. The synchronizing function measures the conditions across the circuit breaker, and also determines the angle change occurring during the closing delay of the circuit breaker, from the measured slip frequency. The output is given only when all measured conditions are simultaneously within their set limits. The issue of the output is timed to give closure at the optimal time including the time for the circuit breaker and the closing circuit. For single circuit breaker and 1 breaker circuit breaker arrangements, the SESRSYN function blocks have the capability to make the necessary voltage selection. For single circuit breaker arrangements, selection of the correct voltage is made using auxiliary contacts of the bus disconnectors. For 1 breaker circuit breaker arrangements, correct voltage selection is made using auxiliary contacts of the bus disconnectors as well as the circuit breakers. The internal logic for each function block as well as, the input and outputs, and the setting parameters with default setting and setting ranges is described in this document. For application related information, please refer to the application manual.
12.1.2.2
Synchrocheck
The voltage difference, frequency difference and phase angle difference values are measured in the IED centrally and are available for the synchrocheck function for evaluation. If the bus voltage is connected as phase-phase and the line voltage as phase-neutral (or the opposite), this need to be compensated. This is done with a setting, which scales up the line voltage to a level equal to the bus voltage. When the function is set to OperationSC = On, the measuring will start. The function will compare the bus and line voltage values with the set values for UHighBusSC and UHighLineSC.
1MRK505183-UEN C
Section 12 Control
If both sides are higher than the set values, the measured values are compared with the set values for acceptable frequency, phase angle and voltage difference: FreqDiff, PhaseDiff and UDiff. If a compensation factor is set due to the use of different voltages on the bus and line, the factor is deducted from the line voltage before the comparison of the phase angle values. The frequency on both sides of the circuit breaker is also measured. The frequencies must not deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus frequency and the line frequency is measured and may not exceed the set value. Two sets of settings for frequency difference and phase angle difference are available and used for the manual closing and autoreclose functions respectively, as required. The inputs BLOCK and BLKSC are available for total block of the complete Synchrocheck function and block of the Synchrocheck function respectively. Input TSTSC will allow testing of the function where the fulfilled conditions are connected to a separate test output. The outputs MANSYOK and AUTOSYOK are activated when the actual measured conditions match the set conditions for the respective output. The output signal can be delayed independently for MANSYOK and AUTOSYOK conditions. A number of outputs are available as information about fulfilled checking conditions. UOKSC shows that the voltages are high, UDIFFSC, FRDIFFA, FRDIFFM, PHDIFFA, PHDIFFM shows when the voltage difference, frequency difference and phase angle difference conditions are met.
Section 12 Control
1MRK505183-UEN C
TSTAUTSY
AUTOSYOK
UDiffSC
AND
50 ms t
UHighBusSC UHighLineSC
AND 1
1 1
IEC07000114-2-en.vsd
IEC07000114 V2 EN
Figure 263:
Synchronizing
When the function is set to OperationSynch = On the measuring will be performed. The function will compare the values for the bus and line voltage with the set values for UHighBusSynch and UHighLineSynch, which is a supervision that the voltages are both live. If both sides are higher than the set values the measured values are compared with the set values for acceptable frequency, rate of change of frequency, phase angle and voltage difference FreqDiffMax, FreqDiffMin and UDiffSynch. Measured frequencies between the settings for the maximum and minimum frequency will initiate the measuring and the evaluation of the angle change to allow operation to be sent in the right moment including the set tBreaker time. There is a phase angle release internally to block any incorrect closing pulses. At operation the SYNOK output will be activated with a pulse tClosePulse and the function reset. The function will also reset if the synchronizing conditions are not fulfilled within the set tMaxSynch time. This prevents that the functions are, by mistake, maintained in operation for a long time, waiting for conditions to be fulfilled.
1MRK505183-UEN C
Section 12 Control
The inputs BLOCK and BLKSYNCH are available for total block of the complete function respective of the synchronizing part. TSTSYNCH will allow testing of the function where the fulfilled conditions are connected to a separate output.
SYN1 OPERATION SYNCH OFF ON TEST MODE OFF ON
STARTSYN
AND
BLKSYNCH OR
S R
AND
SYNPROGR
UDiffSynch
50 ms
AND
AND
SYNOK
OR AND OR
TSTSYNOK
AND
tClose Pulse
tMax Synch
SYNFAIL
IEC06000636-2-en.vsd
IEC06000636 V2 EN
Figure 264:
Energizing check
Voltage values are measured in the IED centrally and are available for evaluation by the Energizing check function. If the bus voltage is connected as phase-phase and the line voltage as phase-neutral, (or the opposite) this needs to be compensated. This is done with a setting, which scales the line voltage to a level equal to the bus voltage. The function measures voltages on the busbar and the line to verify whether they are live or dead. This is done by comparing with the set values UHighBusEnerg and ULowBusEnerg for bus energizing and UHighLineEnerg and ULowLineEnerg for line energizing. The frequency on both sides of the circuit breaker is also measured. The frequencies must not deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus frequency and the line frequency is measured and shall not exceed a set value.
Section 12 Control
1MRK505183-UEN C
The Energizing direction can be selected individually for the Manual and the Automatic functions respectively. When the conditions are met the outputs AUTOENOK and MANENOK respectively will be activated if the fuse supervision conditions are fulfilled. The output signal can be delayed independently for MANENOK and AUTOENOK conditions. The Energizing direction can also be selected by an integer input AENMODE respective MENMODE, which for example, can be connected to a Binary to Integer function block (B16I). Integers supplied shall be 1=off, 2=DLLB, 3=DBLL and 4= Both. Not connected input with connection of INTZERO output from Fixed Signals (FIXDSIGN) function block will mean that the setting is done from Parameter Setting tool. The active position can be read on outputs MODEAEN resp MODEMEN. The modes are 0=OFF, 1=DLLB, 2=DBLL and 3=Both. The inputs BLOCK and BLKENERG are available for total block of the complete Synchronizing function respective block of the Energizing check function. TSTENERG will allow testing of the function where the fulfilled conditions are connected to a separate test output.
Voltage selection
The voltage selection module including supervision of included voltage transformer fuses for the different arrangements is a basic part of the Synchronizing function and determines the parameters fed to the Synchronizing, Synchrocheck and Energizing check functions. This includes the selection of the appropriate Line and Bus voltages and fuse supervision. The voltage selection type to be used is set with the parameter CBConfig. If No voltage sel. is set the default voltages used will be ULine1 and UBus1. This is also the case when external voltage selection is provided. Fuse failure supervision for the used inputs must also be connected. The voltage selection function, selected voltages, and fuse conditions are the Synchronizing, Synchrocheck and Energizing check inputs. For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply Disconnector Open and Closed positions but, it is also possible to use an inverter for one of the positions.
This function uses the binary input from the disconnectors auxiliary contacts B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select between bus 1 and bus 2 voltages. If the disconnector connected to bus 2 is closed and the disconnector connected to bus 1 is opened the bus 2 voltage is used. All other combinations use the bus 1 voltage. The Outputs B1SEL and B2SEL respectively indicate the selected Bus voltage. The function checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers. Inputs UB1OK-UB1FF supervise the fuse for Bus 1 and UB2OKUB2FF supervises the fuse for Bus 2. ULN1OK-ULN1FF supervises the fuse for the Line voltage transformer. The inputs fail (FF) or healthy (OK) can alternatively
488 Technical reference manual
1MRK505183-UEN C
Section 12 Control
be used dependent on the available signal. If a fuse-failure is detected in the selected voltage source an output signal USELFAIL is set. This output signal is true if the selected bus or line voltages have a fuse failure. This output as well as the function can be blocked with the input signal BLOCK. The function logic diagram is shown in figure 265.
B1QOPEN B1QCLD B2QOPEN B2QCLD
AND AND
B1SEL B2SEL
1
AND
invalidSelection busVoltage
bus1Voltage bus2Voltage
OR
selectedFuseOK USELFAIL
OR
OR
BLOCK
en05000779.vsd
IEC05000779 V1 EN
Figure 265:
Logic diagram for the voltage selection function of a single circuit breaker with double busbars
Note that with 1 breaker schemes two Synchrocheck functions must be used in the IED (three for two IEDs in a complete bay). Below, the scheme for one Bus breaker and the Tie breakers is described. This voltage selection function uses the binary inputs from the disconnectors and circuit breakers auxiliary contacts to select the right voltage for the Synchrocheck (Synchronism and Energizing check) function. For the bus circuit breaker one side of the circuit breaker is connected to the busbar and the other side is connected either to line 1, line 2 or the other busbar depending on the arrangement. Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD, LN2QOPEN-LN2QCLD are inputs for the position of the Line disconnectors
489 Technical reference manual
Section 12 Control
1MRK505183-UEN C
respectively the Bus and Tie breakers. The Outputs LN1SEL, LN2SEL and B2SEL will give indication of the selected Line voltage as a reference to the fixed Bus 1 voltage. The fuse supervision is connected to ULNOK-ULNFF, and with alternative Healthy or Failing fuse signals depending on what is available for each of fuse (MCB). The tie circuit breaker is connected either to bus 1 or line 1 on one side and the other side is connected either to bus 2 or line 2. Four different output combinations are possible, bus to bus, bus to line, line to bus and line to line. The line 1 voltage is selected if the line 1 disconnector is closed. The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1 circuit breaker is closed. The line 2 voltage is selected if the line 2 disconnector is closed. The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2 Circuit breaker is closed.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a fuse-failure is detected in the selected voltage an output signal USELFAIL is set. This output signal is true if the selected bus or line voltages have a fuse failure. This output as well as the function can be blocked with the input signal BLOCK. The function block diagram for the voltage selection of a bus circuit breaker is shown in figure 266 and for the tie circuit breaker in figure 267
1MRK505183-UEN C
Section 12 Control
LN1SEL
lineVoltage
selectedFuseOK USELFAIL
OR
AND
AND
OR
AND
en05000780.vsd
IEC05000780 V1 EN
Figure 266:
Simplified logic diagram for the voltage selection function for a bus circuit breaker in a 1 1/2 breaker arrangement
Section 12 Control
1MRK505183-UEN C
LN1QOPEN LN1QCLD
AND
LN1SEL 1 B1SEL
AND
B1QOPEN B1QCLD
AND
AND
busVoltage
LN2SEL 1 B2SEL
AND OR
B2QOPEN B2QCLD
AND
invalidSelection
AND
line2Voltage bus2Voltage UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF ULN2OK ULN2FF BLOCK
lineVoltage
OR
AND OR AND
OR
AND
selectedFuseOK USELFAIL
OR
AND
AND
OR
AND
en05000781.vsd
IEC05000781 V1 EN
Figure 267:
Simplified logic diagram for the voltage selection function for the tie circuit breaker in 1 1/2 breaker arrangement.
External fuse failure signals or signals from a tripped fuse switch/MCB are connected to binary inputs that are configured to the inputs of the synchronizing functions in the IED. Alternatively, the internal signals from fuse failure supervision can be used when available. There are two alternative connection possibilities. Inputs labelled OK must be connected if the available contact indicates that the voltage circuit is healthy. Inputs labelled FF must be connected if the available contact indicates that the voltage circuit is faulty.
492 Technical reference manual
1MRK505183-UEN C
Section 12 Control
The UB1OK/UB2OK and UB1FF/UB2FF inputs are related to the busbar voltage and the ULN1OK/ULN2OK and ULN1FF/ULN2FF inputs are related to the line voltage. Configure them to the binary input or function outputs that indicate the status of the external fuse failure of the busbar and line voltages. In the event of a fuse failure, the energizing check functions are blocked. The synchronizing and the synchrocheck function requires full voltage on both sides and will be blocked automatically in the event of fuse failures.
12.1.3
Function block
SESRSYN U3PBB1* SYNOK U3PBB2* AUTOSYOK U3PLN1* AUTOENOK U3PLN2* MANSYOK BLOCK MANENOK BLKSYNCH TSTSYNOK BLKSC TSTAUTSY BLKENERG TSTMANSY B1QOPEN TSTENOK B1QCLD USELFAIL B2QOPEN B1SEL B2QCLD B2SEL LN1QOPEN LN1SEL LN1QCLD LN2SEL LN2QOPEN SYNPROGR LN2QCLD SYNFAIL UB1OK UOKSYN UB1FF UDIFFSYN UB2OK FRDIFSYN UB2FF FRDIFFOK ULN1OK FRDERIVA ULN1FF UOKSC ULN2OK UDIFFSC ULN2FF FRDIFFA STARTSYN PHDIFFA TSTSYNCH FRDIFFM TSTSC PHDIFFM TSTENERG UDIFFME AENMODE FRDIFFME MENMODE PHDIFFME MODEAEN MODEMEN IEC06000534-2-en.vsd
IEC06000534 V2 EN
Figure 268:
12.1.4
Section 12 Control
Name BLOCK BLKSYNCH BLKSC BLKENERG B1QOPEN B1QCLD B2QOPEN B2QCLD LN1QOPEN LN1QCLD LN2QOPEN LN2QCLD UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF ULN2OK ULN2FF STARTSYN TSTSYNCH TSTSC TSTENERG AENMODE MENMODE Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Description General block Block synchronizing Block synchro check Block energizing check
1MRK505183-UEN C
Open status for CB or disconnector connected to bus1 Close status for CB or disconnector connected to bus1 Open status for CB or disconnector connected to bus2 Close status for CB or disconnector connected to bus2 Open status for CB or disconnector connected to line1 Close status for CB or disconnector connected to line1 Open status for CB or disconnector connected to line2 Close status for CB or disconnector connected to line2 Bus1 voltage transformer OK Bus1 voltage transformer fuse failure Bus2 voltage transformer OK Bus2 voltage transformer fuse failure Line1 voltage transformer OK Line1 voltage transformer fuse failure Line2 voltage transformer OK Line2 voltage transformer fuse failure Start synchronizing Set synchronizing in test mode Set synchro check in test mode Set energizing check in test mode Input for setting of automatic energizing mode Input for setting of manual energizing mode
Table 290:
Name SYNOK AUTOSYOK AUTOENOK MANSYOK MANENOK
1MRK505183-UEN C
Section 12 Control
Name TSTSYNOK TSTAUTSY TSTMANSY TSTENOK USELFAIL B1SEL B2SEL LN1SEL LN2SEL SYNPROGR SYNFAIL UOKSYN UDIFFSYN FRDIFSYN FRDIFFOK FRDERIVA UOKSC UDIFFSC FRDIFFA PHDIFFA FRDIFFM PHDIFFM UDIFFME FRDIFFME PHDIFFME MODEAEN MODEMEN Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL INTEGER INTEGER Description Synchronizing OK test output Auto synchro check OK test output Manual synchro check OK test output Energizing check OK test output Selected voltage transformer fuse failed Bus1 selected Bus2 selected Line1 selected Line2 selected Synchronizing in progress Synchronizing failed Voltage amplitudes for synchronizing above set limits Voltage difference out of limit for synchronizing Frequency difference out of limit for synchronizing Frequency difference in band for synchronizing Frequency derivative out of limit for synchronizing Voltage amplitudes above set limits Voltage difference out of limit Frequency difference out of limit for Auto operation Phase angle difference out of limit for Auto operation Frequency difference out of limit for Manual operation Phase angle difference out of limit for Manual Operation Calculated difference in voltage Calculated difference in frequency Calculated difference of phase angle Selected mode for automatic energizing Selected mode for manual energizing
1MRK505183-UEN C
Setting parameters
SESRSYN Group settings (basic)
Values (Range) Off On phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 No voltage sel. Double bus 1 1/2 bus CB 1 1/2 bus alt. CB Tie CB 0.001 - 9999.999 -180 - 180 0.040 - 25.000 Off On 50.0 - 120.0 50.0 - 120.0 2.0 - 50.0 0.003 - 0.250 0.050 - 0.250 0.000 - 0.500 0.000 - 60.000 Unit Step Default Off phase2 Description Operation Off / On Select phase for bus1
SelPhaseBus2
phase2
SelPhaseLine1
phase2
SelPhaseLine2
phase2
CBConfig
No voltage sel.
Select CB configuration
UBase PhaseShift URatio OperationSynch UHighBusSynch UHighLineSynch UDiffSynch FreqDiffMin FreqDiffMax FreqRateChange tBreaker
400.000 0 1.000 Off 80.0 80.0 10.0 0.010 0.200 0.300 0.080
Base voltage in kV Phase shift Voltage ratio Operation for synchronizing function Off/ On Voltage high limit bus for synchronizing in % of UBase Voltage high limit line for synchronizing in % of UBase Voltage difference limit for synchronizing in % of UBase Minimum frequency difference limit for synchronizing Maximum frequency difference limit for synchronizing Maximum allowed frequency rate of change Closing time of the breaker
1MRK505183-UEN C
Section 12 Control
Values (Range) 0.050 - 60.000 0.00 - 6000.00 0.000 - 60.000 Off On 50.0 - 120.0 50.0 - 120.0 2.0 - 50.0 0.003 - 1.000 0.003 - 1.000 5.0 - 90.0 5.0 - 90.0 0.000 - 60.000 0.000 - 60.000 Off DLLB DBLL Both Off DLLB DBLL Both Off On 50.0 - 120.0 50.0 - 120.0 10.0 - 80.0 10.0 - 80.0 50.0 - 180.0 0.000 - 60.000 0.000 - 60.000 Unit s s s %UB %UB %UB Hz Hz Deg Deg s s Step 0.001 0.01 0.001 1.0 1.0 1.0 0.001 0.001 1.0 1.0 0.001 0.001 Default 0.200 600.00 2.000 On 80.0 80.0 15.0 0.010 0.010 25.0 25.0 0.100 0.100 DBLL Description Breaker closing pulse duration Resets synch if no close has been made before set time Minimum time to accept synchronizing conditions Operation for synchronism check function Off/On Voltage high limit bus for synchrocheck in % of UBase Voltage high limit line for synchrocheck in % of UBase Voltage difference limit in % of UBase Frequency difference limit between bus and line Auto Frequency difference limit between bus and line Manual Phase angle difference limit between bus and line Auto Phase angle difference limit between bus and line Manual Time delay output for synchrocheck Auto Time delay output for synchrocheck Manual Automatic energizing check mode
Name tClosePulse tMaxSynch tMinSynch OperationSC UHighBusSC UHighLineSC UDiffSC FreqDiffA FreqDiffM PhaseDiffA PhaseDiffM tSCA tSCM AutoEnerg
ManEnerg
Both
Manual dead bus, dead line energizing Voltage high limit bus for energizing check in % of UBase Voltage high limit line for energizing check in % of UBase Voltage low limit bus for energizing check in % of UBase Voltage low limit line for energizing check in % of UBase Maximum voltage for energizing in % of UBase Time delay for automatic energizing check Time delay for manual energizing check
1MRK505183-UEN C
> 95% (0.003-1.000) Hz (5.0-90.0) degrees (2.0-50.0)% of UBase (0.000-60.000) s (50.0-120.0)% of UBase > 95% (10.0-80.0)% of UBase < 105% (50.0-180.0)% of UBase (0.000-60.000) s 160 ms typically 80 ms typically
12.2
Autorecloser SMBRREC
Function Description Autorecloser IEC 61850 identification SMBRREC IEC 60617 identification ANSI/IEEE C37.2 device number 79
O->I
SYMBOL-L V1 EN
1MRK505183-UEN C
12.2.1
12.2.2
12.2.2.1
Principle of operation
Logic Diagrams
The logic diagrams below illustrate the principles applicable in the understanding of the functionality.
12.2.2.2
12.2.2.3
Section 12 Control
12.2.2.4
1MRK505183-UEN C
After the start has been accepted, it is latched in and an internal signal Started is set. It can be interrupted by certain events, like an inhibit signal. To start auto-reclosing by CB position Open instead of from protection trip signals, one has to configure the CB Open position signal to inputs CBPOS and START and set a parameter StartByCBOpen = On and CBAuxContType = NormClosed (normally closed). One also has to configure and connect signals from manual trip commands to input INHIBIT. The logic for switching the auto-recloser On/Off and the starting of the reclosing is shown in figure 269. The following should be considered: Setting Operation can be set to Off, External ctrl or On. External ctrl offers the possibility of switching by external switches to inputs ON and OFF, communication commands to the same inputs, and so on. SMBRREC is normally started by tripping. It is either a Zone 1 and Communication aided trip, or a general trip. If the general trip is used the function must be blocked from all back-up tripping connected to INHIBIT. In both alternatives the breaker failure function must be connected to inhibit the function. START makes a first attempt with synchrocheck, STARTHS makes its first attempt without synchrocheck. TRSOTF starts shots 2-5. Circuit breaker checks that the breaker was closed for a certain length of time before the starting occurred and that the CB has sufficient stored energy to perform an auto-reclosing sequence and is connected to inputs CBPOS and CBREADY.
1MRK505183-UEN C
Section 12 Control
Operation:On Operation:Off Operation:External Ctrl ON OFF START STARTHS autoInitiate TRSOTF CBREADY CBPOS Additional conditions AND start AND tCBClosedMin t AND Blocking conditions Inhibit condistions count 0
en05000782.vsd
AND AND
OR AND S OR R
SETON
OR OR initiate
120 ms t CB Closed
AND S R
AND
OR
AND
READY
IEC05000782 V1 EN
Figure 269:
12.2.2.5
12.2.2.6
Section 12 Control
1MRK505183-UEN C
auto-reclosing open time is extended by tExtended t1. If Extended t1 = Off, a long trip signal interrupts the reclosing sequence in the same way as a signal to input INHIBIT.
Extended t1
PLCLOST initiate
AND tTrip t
OR
AND
AND
Extend t1
start
AND
AND
IEC05000783 V2 EN
Figure 270:
Control of extended auto-reclosing open time and long trip pulse detection
When dead time has elapsed during the auto-reclosing procedure certain conditions must be fulfilled before the CB closing command is issued. To achieve this, signals are exchanged between program modules to check that these conditions are met. In three-phase reclosing a synchronizing and/or energizing check can be used. It is possible to use a synchrocheck function in the same physical device or an external one. The release signal is configured by connecting to the auto-reclosing function input SYNC. If reclosing without checking is preferred the SYNC input can be set to TRUE (set high). Another possibility is to set the output of the synchro-check function to a permanently activated state. At confirmation from the synchro-check, or if the reclosing is of single-phase or two-phase type, the signal passes on. At singlephase, two-phase reclosing and at three-phase high-speed reclosing started by STARTHS, synchronization is not checked, and the state of the SYNC input is disregarded. By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the readiness of the circuit breaker is also checked before issuing the CB closing command. If the CB has a readiness contact of type CBReadyType = OCO (CB ready for an Open-Close-Open sequence) this condition may not be complied with after the tripping and at the moment of reclosure. The Open-Close-Open condition was however checked at the start of the reclosing cycle and it is then likely that the CB is prepared for a Close-Open sequence.
1MRK505183-UEN C
Section 12 Control
The synchro-check or energizing check must be fulfilled within a set time interval, tSync. If it is not, or if other conditions are not met, the reclosing is interrupted and blocked. The reclaim timer defines a time from the issue of the reclosing command, after which the reclosing function resets. Should a new trip occur during this time, it is treated as a continuation of the first fault. The reclaim timer is started when the CB closing command is given. A number of outputs for Autoreclosing state control keeps track of the actual state in the reclosing sequence.
Section 12 Control
1MRK505183-UEN C
t1 1Ph t
1P2PTO 3PHSTO 3PT1TO 3PT2TO 3PT3TO 3PT4TO 3PT5TO SYNC initiate CBREADY
1P2PTO
OR
AND OR AND
AND
AND
OR
Blocking out
AND
tSync t
CL
AND
TR2P TR3P start initiate Shot 0 Shot 1 Shot 2 Shot 3 Shot 4 Shot 5
0 1 2 3 4 5
INPROGR
IEC05000784_2_en.vsd
IEC05000784 V2 EN
Figure 271:
The CB closing command, CLOSECB is a pulse with a duration set by parameter tPulse. For circuit-breakers without anti-pumping function, the close pulse cutting described below can be used. This is done by selecting the parameter
504 Technical reference manual
1MRK505183-UEN C
Section 12 Control
CutPulse=On. In case of a new trip pulse, the closing command pulse is cut (interrupted). The minimum duration of the pulse is always 50 ms. See figure 272 When a reclosing command is issued, the appropriate reclosing operation counter is incremented. There is a counter for each type of reclosing and one for the total number of reclosing commands issued.
tPulse **) AND OR
pulse initiate
CLOSECB
50 ms
1PT1 2PT1 3PT1 3PT2 3PT3 3PT4 3PT5 RSTCOUNT **) Only if "CutPulse" = On
AND
counter
AND
counter
AND
counter
AND
counter
AND
counter
AND
counter
AND
counter counter
en05000785.vsd
IEC05000785 V1 EN
Figure 272:
After the reclosing command the reclaim timer tReclaim starts running for the set time. If no tripping occurs within this time, the auto-reclosing will reset. If a new trip occurs after the CB closing command, and a new input signal START or TRSOTF appears, the output UNSUCCL (unsuccessful closing) is set high. The timers for the first shot can no longer be started. Depending on the setting for the number of reclosing shots, further shots may be made or the reclosing sequence
505 Technical reference manual
Transient fault
Section 12 Control
1MRK505183-UEN C
will be ended. After the reclaim time has elapsed, the auto-reclosing function resets but the CB remains open. The CB closed data at the CBPOS input will be missing. Because of this, the reclosing function will not be ready for a new reclosing cycle. Normally the signal UNSUCCL appears when a new trip and start is received after the last reclosing shot has been made and the auto-reclosing function is blocked. The signal resets once the reclaim time has elapsed. The unsuccessful signal can also be made to depend on CB position input. The parameter UnsucClByCBChk should then be set to CBCheck, and a timer tUnsucCl should also be set. If the CB does not respond to the closing command and does not close, but remains open, the output UNSUCCL is set high after time tUnsucCl.
initiate block start
AND
OR
AND
UNSUCCL
OR AND
tUnsucCl t
AND
CBclosed
eno5000786.vsd
IEC05000786 V1 EN
Figure 273:
The auto-reclosing function can be programmed to proceed to the following reclosing shots (if selected) even if the start signals are not received from the protection functions, but the breaker is still not closed. This is done by setting parameter AutoCont = On and tAutoContWait to the required delay for the function to proceed without a new start.
1MRK505183-UEN C
Section 12 Control
tAutoContWait t
AND
CLOSECB
AND
S Q R
AND
CBPOS
CBClosed
OR
START
OR
initiate
en05000787.vsd
IEC05000787 V1 EN
Figure 274:
If a user wants to apply starting of auto-reclosing from CB open position instead of from protection trip signals, the function offers such a possibility. This starting mode is selected by a setting parameter StartByCBOpen = On. One needs then to block reclosing at all manual trip operations. Typically, one also set CBAuxContType = NormClosed and connect a CB auxiliary contact of type NC (normally closed) to inputs CBPOS and START. When the signal changes from CB closed to CB open an auto-reclosing start pulse of limited length is generated and latched in the function, subject to the usual checks. Then the reclosing sequence continues as usual. One needs to connect signals from manual tripping and other functions, which shall prevent reclosing, to the input INHIBIT.
Section 12 Control
1MRK505183-UEN C
start
en05000788.vsd
IEC05000788 V1 EN
Figure 275:
12.2.2.7
CB READY START SYNC READY INPROG 1PT1 ACTIVE CLOSE CB PREP3P SUCCL
Time t1 1Ph tPulse (Trip) tReclaim
en04000196-2-en.vsd
IEC04000196 V2 EN
Figure 276:
1MRK505183-UEN C
Section 12 Control
Fault
CB POS
Closed Open
CB READY START TR3P SYNC READY INPROGR 3PT1 3PT2 ACTIVE CLOSE CB PREP3P UNSUCCL
t1 3Ph (Trip)
Open
Time
en04000197.vsd
IEC04000197 V1 EN
Figure 277:
Section 12 Control
1MRK505183-UEN C
Fault
AR01-CBCLOSED AR01-CBREADY(CO) AR01-START AR01-TR3P AR01-SYNC AR01-READY AR01-INPROGR AR01-1PT1 AR01-T1 AR01-T2 AR01-CLOSECB AR01-P3P AR01-UNSUC
tReclaim t1s
en04000198.vsd
IEC04000198 V1 EN
Figure 278:
Fault
AR01-CBCLOSED AR01-CBREADY(CO) AR01-START AR01-TR3P AR01-SYNC AR01-READY AR01-INPROGR AR01-1PT1 AR01-T1 AR01-T2 AR01-CLOSECB AR01-P3P AR01-UNSUC
tReclaim t1s t2
en04000199.vsd
IEC04000199 V1 EN
Figure 279:
Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph, two-shot reclosing
1MRK505183-UEN C
12.2.3
Figure 280:
12.2.4
Section 12 Control
Name THOLHOLD CBREADY CBPOS PLCLOST SYNC WAIT RSTCOUNT MODEINT Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER Default 0 0 0 0 0 0 0 0 Description Hold the AR in wait state
1MRK505183-UEN C
CB must be ready for CO/OCO operation to allow start / close Status of the circuit breaker Closed/Open Power line carrier or other form of permissive sig nal lost Synchronizing check fulfilled (for 3Ph attempts) Wait for master (in Multi-breaker arrangements) Resets all counters Integer input used to set the reclosingMode, alternative to setting
Table 294:
Name BLOCKED SETON READY ACTIVE SUCCL UNSUCCL INPROGR 1PT1 2PT1 3PT1 3PT2 3PT3 3PT4 3PT5 PERMIT1P PREP3P CLOSECB WFMASTER COUNT1P COUNT2P COUNT3P1
1MRK505183-UEN C
Section 12 Control
Name COUNT3P2 COUNT3P3 COUNT3P4 COUNT3P5 COUNTAR MODE Type INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER Description Counting the number of three-phase reclosing shot 2 Counting the number of three-phase reclosing shot 3 Counting the number of three-phase reclosing shot 4 Counting the number of three-phase reclosing shot 5 Counting total number of reclosing shots Integer output for reclosing mode
12.2.5
Table 295:
Name Operation
Setting parameters
SMBRREC Group settings (basic)
Values (Range) Off External ctrl On 3 phase 1/2/3ph 1/2ph 1ph+1*2ph 1/2ph+1*3ph 1ph+1*2/3ph 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.00 - 6000.00 0.00 - 6000.00 0.000 - 60.000 0.000 - 60.000 0.00 - 6000.00 0.00 - 6000.00 None Low High 0.00 - 6000.00 Unit Step Default External ctrl Description Off, ExternalCtrl, On
ARMode
1/2/3ph
t1 1Ph t1 3Ph t1 3PhHS tReclaim tSync tTrip tPulse tCBClosedMin tUnsucCl Priority
s s s s s s s s s -
1.000 6.000 0.400 60.00 30.00 0.200 0.200 5.00 30.00 None
Open time for shot 1, single-phase Open time for shot 1, delayed reclosing 3ph Open time for shot 1, high speed reclosing 3ph Duration of the reclaim time Maximum wait time for synchrocheck OK Maximum trip pulse duration Duration of the circuit breaker closing pulse Min time that CB must be closed before new sequence allows Wait time for CB before indicating Unsuccessful/Successful Priority selection between adjacent terminals None/Low/High Maximum wait time for release from Master
tWaitForMaster
0.01
60.00
Section 12 Control
1MRK505183-UEN C
Table 296:
Name NoOfShots
StartByCBOpen CBAuxContType CBReadyType t1 2Ph t2 3Ph t3 3Ph t4 3Ph t5 3Ph Extended t1 tExtended t1 tInhibit CutPulse Follow CB AutoCont tAutoContWait UnsucClByCBChk BlockByUnsucCl ZoneSeqCoord
s s s s s s s s -
Off NormOpen CO 1.000 30.00 30.00 30.00 30.00 Off 0.500 5.000 Off Off Off 2.000 NoCBCheck Off Off
To be set ON if AR is to be started by CB open position Select the CB aux contact type NC/NO for CBPOS input Select type of circuit breaker ready signal CO/OCO Open time for shot 1, two-phase Open time for shot 2, three-phase Open time for shot 3, three-phase Open time for shot 4, three-phase Open time for shot 5, three-phase Extended open time at loss of permissive channel Off/On 3Ph Dead time is extended with this value at loss of perm ch Inhibit reclosing reset time Shorten closing pulse at a new trip Off/On Advance to next shot if CB has been closed during dead time Continue with next reclosing-shot if breaker did not close Wait time after close command before proceeding to next shot Unsuccessful closing signal obtained by checking CB position Block AR at unsuccessful reclosing Coordination of down stream devices to local prot units AR
1MRK505183-UEN C
12.2.6
(0.00-6000.00) s
(0.000-60.000) s (0.00-6000.00) s (0.000-60.000) s (0.000-60.000) s (0.00-6000.00) s (0.00-6000.00) s (0.000-60.000) s (0.00-6000.00) s (0.00-6000.00) s (0.000-60.000) s
12.3
12.3.1
12.3.2
Principle of operation
A bay can handle, for example a power line, a transformer, a reactor, or a capacitor bank. The different primary apparatuses within the bay can be controlled via the apparatus control function directly by the operator or indirectly by automatic sequences.
Section 12 Control
1MRK505183-UEN C
Because a primary apparatus can be allocated to many functions within a Substation Automation system, the object-oriented approach with a function module that handles the interaction and status of each process object ensures consistency in the process information used by higher-level control functions. Primary apparatuses such as breakers and disconnectors are controlled and supervised by one software module (SCSWI) each. Because the number and type of signals connected to a breaker and a disconnector are almost the same, the same software is used to handle these two types of apparatuses. The software module is connected to the physical process in the switchyard via an interface module by means of a number of digital inputs and outputs. One type of interface module is intended for a circuit breaker (SXCBR) and another type is intended for a disconnector or earthing switch (SXSWI). Four types of function blocks are available to cover most of the control and supervision within the bay. These function blocks are interconnected to form a control function reflecting the switchyard configuration. The total number used depends on the switchyard configuration. These four types are: Bay control QCBAY Switch controller SCSWI Circuit breaker SXCBR Circuit switch SXSWI
The three latter functions are logical nodes according to IEC 61850. The functions Local Remote (LOCREM) and Local Remote Control (LOCREMCTRL), to handle the local/remote switch, and the functions Bay reserve (QCRSV) and Reservation input (RESIN), for the reservation function, also belong to the apparatus control function. The principles of operation, function block, input and output signals and setting parameters for all these functions are described below.
12.3.3
Error handling
Depending on the error that occurs during the command sequence the error signal will be set with a value. Table 298 describes vendor specific cause values in addition to these specified in IEC 61850-8-1 standard. The list of values of the cause are in order of priority. The values are available over the IEC 61850. An output L_CAUSE on the function block for Switch controller (SCSWI), Circuit breaker (SXCBR) and Circuit switch (SXSWI) indicates the latest value of the error during the command.
1MRK505183-UEN C
Section 12 Control
Table 298:
Section 12 Control
Attribute value Vendor specific -20 -21 -23 -24 -25 -26 -27 -28 -29 -30 -31 -32 -33 -34 -35 Description Not in use Not in use blocked-for-command blocked-for-opencommand blocked-for-closecommand Not in use Not in use Not in use Not in use long-operation-time switch-not-start-moving persisting-intermediatestate switch-returned-to-initialposition switch-in-bad-state not-expected-finalposition
1MRK505183-UEN C
Supported
X X X
X X X X X X
12.3.4
12.3.4.1
12.3.4.2
Principle of operation
The functionality of the Bay control (QCBAY) function is not defined in the IEC 6185081 standard, which means that the function is a vendor specific logical node. The function sends information about the Permitted Source To Operate (PSTO) and blocking conditions to other functions within the bay for example, switch control functions, voltage control functions and measurement functions.
The local panel switch is a switch that defines the operator place selection. The switch connected to this function can have three positions remote/local/off. The positions are here defined so that remote means that operation is allowed from station/ remote level and local from the IED level. The local/remote switch is normally situated on the control/protection IED itself, which means that the position of the
518 Technical reference manual
1MRK505183-UEN C
Section 12 Control
switch and its validity information are connected internally, and not via I/O boards. When the switch is mounted separately on the IED the signals are connected to the function via I/O boards. When the local panel switch is in Off position all commands from remote and local level will be ignored. If the position for the local/remote switch is not valid the PSTO output will always be set to faulty state (3), which means no possibility to operate. To adapt the signals from the local HMI or from an external local/remote switch, the function blocks LOCREM and LOCREMCTRL are needed and connected to QCBAY. The actual state of the operator place is presented by the value of the Permitted Source To Operate, PSTO signal. The PSTO value is evaluated from the local/ remote switch position according to table 299. In addition, there is one configuration parameter that affects the value of the PSTO signal. If the parameter AllPSTOValid is set and LR-switch position is in Local or Remote state, the PSTO value is set to 5 (all), that is, it is permitted to operate from both local and remote level without any priority. When the external panel switch is in Off position the PSTO value shows the actual state of switch that is, 0. In this case it is not possible to control anything.
Table 299:
Local panel switch positions 0 = Off 1 = Local 1 = Local 2 = Remote 2 = Remote 3 = Faulty
0 1 5 2 5 3
Blockings
The blocking states for position indications and commands are intended to provide the possibility for the user to make common blockings for the functions configured within a complete bay. The blocking facilities provided by the bay control function are the following:
Section 12 Control
1MRK505183-UEN C
Blocking of position indications, BL_UPD. This input will block all inputs related to apparatus positions for all configured functions within the bay. Blocking of commands, BL_CMD. This input will block all commands for all configured functions within the bay. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC 6185081). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible.
The switching of the Local/Remote switch requires at least system operator level. The password will be requested at an attempt to operate if authority levels have been defined in the IED. Otherwise the default authority level, SuperUser, can handle the control without LogOn. The users and passwords are defined in PCM600.
12.3.4.3
Function block
QCBAY LR_OFF LR_LOC LR_REM LR_VALID BL_UPD BL_CMD PSTO UPD_BLKD CMD_BLKD
IEC05000796-2-en.vsd
IEC05000796 V2 EN
Figure 281:
12.3.4.4
Table 301:
Name PSTO UPD_BLKD CMD_BLKD
1MRK505183-UEN C
Section 12 Control
Setting parameters
12.3.4.5
Table 302:
Name AllPSTOValid
12.3.5
12.3.5.1
Local/Remote switch
Introduction
The signals from the local HMI or from an external local/remote switch are applied via function blocks LOCREM and LOCREMCTRL to the Bay control (QCBAY) function block. A parameter in function block LOCREM is set to choose if the switch signals are coming from the local HMI or from an external hardware switch connected via binary inputs.
12.3.5.2
Principle of operation
The function block Local remote (LOCREM) handles the signals coming from the local/remote switch. The connections are seen in figure 282, where the inputs on function block LOCREM are connected to binary inputs if an external switch is used. When a local HMI is used, the inputs are not used and are set to FALSE in the configuration. The outputs from the LOCREM function block control the output PSTO (Permitted Source To Operate) on Bay control (QCBAY).
Section 12 Control
1MRK505183-UEN C
QCBAY LR_OFF PSTO LR_LOC UPD_BLKD LR_REM CMD_BLKD LR_VALID BL_UPD BL_CMD QCBAY LR_OFF PSTO LR_LOC UPD_BLKD LR_REM CMD_BLKD LR_VALID BL_UPD BL_CMD
LOCREMCTRL PSTO1 HMICTR1 PSTO2 HMICTR2 PSTO3 HMICTR3 PSTO4 HMICTR4 PSTO5 HMICTR5 PSTO6 HMICTR6 PSTO7 HMICTR7 PSTO8 HMICTR8 PSTO9 HMICTR9 PSTO10 HMICTR10 PSTO11 HMICTR11 PSTO12 HMICTR12 IEC05000250_2_en.vsd
IEC05000250 V2 EN
Figure 282:
Configuration for the local/remote handling for a local HMI with two bays and two screen pages
If the IED contains control functions for several bays, the local/remote position can be different for the included bays. When the local HMI is used the position of the local/remote switch can be different depending on which single line diagram screen page that is presented on the local HMI. The function block Local remote control (LOCREMCTRL) controls the presentation of the LEDs for the local/remote position to applicable bay and screen page. The switching of the local/remote switch requires at least system operator level. The password will be requested at an attempt to operate if authority levels have been defined in the IED. Otherwise the default authority level, SuperUser, can handle the control without LogOn. The users and passwords are defined in PCM600.
12.3.5.3
Function block
LOCREM CTRLOFF LOCCTRL REMCTRL LHMICTRL OFF LOCAL REMOTE VALID IEC05000360-2-en.vsd
IEC05000360 V2 EN
Figure 283:
1MRK505183-UEN C
Section 12 Control
PSTO1 PSTO2 PSTO3 PSTO4 PSTO5 PSTO6 PSTO7 PSTO8 PSTO9 PSTO10 PSTO11 PSTO12
LOCREMCTRL HMICTR1 HMICTR2 HMICTR3 HMICTR4 HMICTR5 HMICTR6 HMICTR7 HMICTR8 HMICTR9 HMICTR10 HMICTR11 HMICTR12 IEC05000361-2-en.vsd
IEC05000361 V2 EN
Figure 284:
12.3.5.4
Table 304:
Name OFF LOCAL REMOTE VALID
Table 305:
Name PSTO1 PSTO2 PSTO3 PSTO4 PSTO5 PSTO6 PSTO7 PSTO8 PSTO9
Section 12 Control
Name PSTO10 PSTO11 PSTO12 Type INTEGER INTEGER INTEGER Default 0 0 0 Description PSTO input channel 10 PSTO input channel 11 PSTO input channel 12
1MRK505183-UEN C
Table 306:
Name HMICTR1 HMICTR2 HMICTR3 HMICTR4 HMICTR5 HMICTR6 HMICTR7 HMICTR8 HMICTR9 HMICTR10 HMICTR11 HMICTR12
12.3.5.5
Table 307:
Name ControlMode
Setting parameters
LOCREM Non group settings (basic)
Values (Range) Internal LR-switch External LR-switch Unit Step Default Internal LR-switch Description Control mode for internal/external LRswitch
12.3.6
12.3.6.1
12.3.6.2
Principle of operation
The Switch controller (SCSWI) is provided with verification checks for the select execute sequence, that is, checks the conditions prior each step of the operation. The involved functions for these condition verifications are interlocking, reservation, blockings and synchrocheck.
1MRK505183-UEN C
Section 12 Control
Control handling
Two types of control models can be used. The two control models are "direct with normal security" and "SBO (Select-Before-Operate) with enhanced security". The parameter CtlModel defines which one of the two control models is used. The control model "direct with normal security" does not require a select whereas, the "SBO with enhanced security" command model requires a select before execution. The parameter CtlModel's alternative settings Dir Norm and Dir Norm (ABB) have identical functionality and so have SBO Enh (ABB) and SBO Enh. Normal security means that only the command is evaluated and the resulting position is not supervised. Enhanced security means that the command sequence is supervised in three steps, the selection, command evaluation and the supervision of position. Each step ends up with a pulsed signal to indicate that the respective step in the command sequence is finished. If an error occurs in one of the steps in the command sequence, the sequence is terminated and the error is mapped into the enumerated variable "cause" attribute belonging to the pulsed response signal for the IEC 61850 communication. The last cause L_CAUSE can be read from the function block and used for example at commissioning. There is no relation between the command direction and the actual position. For example, if the switch is in close position it is possible to execute a close command. Before an execution command, an evaluation of the position is done. If the parameter PosDependent is true and the position is in intermediate state or in bad state no execution command is sent. If the parameter is false the execution command is sent independent of the position value.
Evaluation of position
In the case when there are three one-phase switches connected to the switch control function, the switch control will "merge" the position of the three switches to the resulting three-phase position. In the case when the position differ between the onephase switches, following principles will be applied: The position output from switch (SXCBR or SXSWI) is connected to SCSWI. With the group signal connection the SCSWI obtains the position, time stamps and quality attributes of the position which is used for further evaluation.
All switches in open position: All switches in close position: One switch =open, two switches= close (or inversely): Any switch in intermediate position: Any switch in bad state: switch control position = open switch control position = close switch control position = intermediate switch control position = intermediate switch control position = bad state
Section 12 Control
1MRK505183-UEN C
The time stamp of the output three-phase position from switch control will have the time stamp of the last changed phase when it goes to end position. When it goes to intermediate position or bad state, it will get the time stamp of the first changed phase. In addition, there is also the possibility that one of the one-phase switches will change position at any time due to a trip. Such situation is here called pole discordance and is supervised by this function. In case of a pole discordance situation, that is, the position of the one-phase switches are not equal for a time longer than the setting tPoleDiscord, an error signal POLEDISC will be set. In the supervision phase, the switch controller function evaluates the "cause" values from the switch modules Circuit breaker (SXCBR)/ Circuit switch (SXSWI). At error the "cause" value with highest priority is shown.
Blocking principles
The blocking signals are normally coming from the bay control function (QCBAY) and via the IEC 61850 communication from the operator place. The different blocking possibilities are: Block/deblock of command. It is used to block command for operation of position. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC 61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible. The different block conditions will only affect the operation of this function, that is, no blocking signals will be "forwarded" to other functions. The above blocking outputs are stored in a non-volatile memory.
The Switch controller (SCSWI) works in conjunction with the synchrocheck and the synchronizing function (SESRSYN). It is assumed that the synchrocheck function is continuously in operation and gives the result to SCSWI. The result from the synchrocheck function is evaluated during the close execution. If the operator performs an override of the synchrocheck, the evaluation of the synchrocheck state is omitted. When there is a positive confirmation from the synchrocheck function, SCSWI will send the close signal EXE_CL to the switch function Circuit breaker (SXCBR). When there is no positive confirmation from the synchrocheck function, SCSWI will send a start signal START_SY to the synchronizing function, which will send the closing command to SXCBR when the synchronizing conditions are fulfilled, see figure 285. If no synchronizing function is included, the timer for supervision of the "synchronizing in progress signal" is set to 0, which means no start of the
1MRK505183-UEN C
Section 12 Control
synchronizing function. SCSWI will then set the attribute "blocked-bysynchrocheck" in the "cause" signal. See also the time diagram in figure 289.
SCSWI EXE_CL OR SXCBR CLOSE
IEC09000209_1_en.vsd
IEC09000209 V1 EN
Figure 285:
Example of interaction between SCSWI, SESRSYN (synchrocheck and synchronizing function) and SXCBR function
Time diagrams
The Switch controller (SCSWI) function has timers for evaluating different time supervision conditions. These timers are explained here. The timer tSelect is used for supervising the time between the select and the execute command signal, that is, the time the operator has to perform the command execution after the selection of the object to operate.
select execute command tSelect timer t1 t1>tSelect, then longoperation-time in 'cause' is set
en05000092.vsd
IEC05000092 V1 EN
Figure 286:
tSelect
The parameter tResResponse is used to set the maximum allowed time to make the reservation, that is, the time between reservation request and the feedback reservation granted from all bays involved in the reservation function.
Section 12 Control
1MRK505183-UEN C
select reservation request RES_RQ reservation granted RES_GRT command termination tResResponse timer t1 t1>tResResponse, then 1-of-n-control in 'cause' is set
en05000093.vsd
IEC05000093 V1 EN
Figure 287:
tResResponse
The timer tExecutionFB supervises the time between the execute command and the command termination, see figure 288.
execute command position L1 open close position L2 open close position L3 open close cmd termination L1 cmd termination L2 cmd termination L3 cmd termination position open close tExecutionFB timer t1>tExecutionFB, then long-operation-time in 'cause' is set *
t1
Figure 288:
tExecutionFB
The parameter tSynchrocheck is used to define the maximum allowed time between the execute command and the input SYNC_OK to become true. If SYNC_OK=true at the time the execute command signal is received, the timer "tSynchrocheck" will not start. The start signal for the synchronizing is obtained if the synchrocheck conditions are not fulfilled.
1MRK505183-UEN C
Section 12 Control
execute command SYNC_OK tSynchrocheck START_SY SY_INPRO tSynchronizing t2 t2>tSynchronizing, then blocked-by-synchrocheck in 'cause' is set
en05000095.vsd
IEC05000095 V1 EN
t1
Figure 289:
12.3.6.3
Function block
SCSWI BLOCK PSTO L_SEL L_OPEN L_CLOSE AU_OPEN AU_CLOSE BL_CMD RES_GRT RES_EXT SY_INPRO SYNC_OK EN_OPEN EN_CLOSE XPOS1 XPOS2 XPOS3 EXE_OP EXE_CL SELECTED RES_RQ START_SY POSITION OPENPOS CLOSEPOS POLEDISC CMD_BLK L_CAUSE XOUT POS_INTR
IEC05000337-2-en.vsd
IEC05000337 V2 EN
Figure 290:
12.3.6.4
Section 12 Control
Name RES_GRT RES_EXT SY_INPRO SYNC_OK EN_OPEN EN_CLOSE XPOS1 XPOS2 XPOS3 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Default 0 0 0 0 0 0 Description
1MRK505183-UEN C
Positive acknowledge that all reservations are made Reservation is made externally Synchronizing function in progress Closing is permitted at set to true by the synchrocheck Enables open operation Enables close operation Pos 1 Pos 2 Pos 3
Table 309:
Name EXE_OP EXE_CL SELECTED RES_RQ START_SY POSITION OPENPOS CLOSEPOS POLEDISC CMD_BLK L_CAUSE XOUT POS_INTR
1MRK505183-UEN C
Section 12 Control
Setting parameters
12.3.6.5
Table 310:
Name CtlModel
s s s s s s
Permission to operate depending on the position Max time between select and execute signals Allowed time from reservation request to reservation granted Allowed time for synchrocheck to fulfil close conditions Supervision time to get the signal synchronizing in progress Max time from command execution to termination Allowed time to have discrepancy between the poles
12.3.7
12.3.7.1
12.3.7.2
Principle of operation
The users of the Circuit breaker function (SXCBR) is other functions such as for example, switch controller, protection functions, autorecloser function or an IEC 61850 client residing in another IED or the operator place. This switch function executes commands, evaluates block conditions and evaluates different time supervision conditions. Only if all conditions indicate a switch operation to be allowed, the function performs the execution command. In case of erroneous conditions, the function indicates an appropriate "cause" value. SXCBR has an operation counter for closing and opening commands. The counter value can be read remotely from the operator place. The value is reset from a binary input or remotely from the operator place by configuring a signal from the Single Point Generic Control 8 signals (SPC8GGIO) for example.
Section 12 Control
Local/Remote switch
1MRK505183-UEN C
One binary input signal LR_SWI is included in SXCBR to indicate the local/ remote switch position from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of position is allowed only from switchyard level. If the signal is set to FALSE it means that command from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of position) from internal IED clients are rejected, even trip commands from protection functions are rejected. The functionality of the local/remote switch is described in figure 291.
Local= Operation at switch yard level
E RU
From I/O
switchLR
FAL SE
Figure 291:
Local/Remote switch
Blocking principles
SXCBR includes several blocking principles. The basic principle for all blocking signals is that they will affect commands from all other clients for example, operators place, protection functions, autoreclosure and so on. The blocking possibilities are: Block/deblock for open command. It is used to block operation for open command. Note that this block signal also affects the input OPEN for immediate command. Block/deblock for close command. It is used to block operation for close command. Note that this block signal also affects the input CLOSE for immediate command. Update block/deblock of positions. It is used to block the updating of position values. Other signals related to the position will be reset. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC 61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible.
Substitution
The substitution part in SXCBR is used for manual set of the position for the switch. The typical use of substitution is that an operator enters a manual value because that the real process value is erroneous for some reason. SXCBR will then
1MRK505183-UEN C
Section 12 Control
use the manually entered value instead of the value for positions determined by the process. It is always possible to make a substitution, independently of the position indication and the status information of the I/O board. When substitution is enabled, the position values are blocked for updating and other signals related to the position are reset. The substituted values are stored in a non-volatile memory.
There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStartMove supervises that the primary device starts moving after the execute output pulse is sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 292 explains these two timers during the execute phase.
EXE_CL Close pulse duration AdaptivePulse = TRUE
Time diagrams
OPENPOS
CLOSEPOS
en05000097.vsd
IEC05000097 V1 EN
Figure 292:
The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to the primary equipment. Note that the output pulses for open and close command can have different pulse lengths. The pulses can also be set to be adaptive with the configuration parameter AdaptivePulse. Figure 293 shows the principle of the execute output pulse. The AdaptivePulse parameter will have affect on both execute output pulses.
Section 12 Control
1MRK505183-UEN C
OPENPOS
CLOSEPOS
EXE_CL tClosePulse
AdaptivePulse=FALSE
EXE_CL tClosePulse
AdaptivePulse=TRUE
en05000098.vsd
IEC05000098 V1 EN
Figure 293:
If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or tClosePulse. The execute output pulses are reset when: the new expected final position is reached and the configuration parameter AdaptivePulse is set to true the timer tOpenPulse or tClosePulse has elapsed an error occurs due to the switch does not start moving, that is, tStartMove has elapsed.
There is one exception from the first item above. If the primary device is in open position and an open command is executed or if the primary device is in closed position and a close command is executed. In these cases, with the additional condition that the configuration parameter AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove has elapsed. If the configuration parameter AdaptivePulse is set to false the execution output remains active until the pulse duration timer has elapsed. If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is executed the execute output pulse resets only when timer tOpenPulse or tClosePulse has elapsed. An example of when a primary device is open and an open command is executed is shown in figure 294 .
1MRK505183-UEN C
Section 12 Control
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
AdaptivePulse=TRUE
en05000099.vsd
IEC05000099 V1 EN
Figure 294:
12.3.7.3
Function block
SXCBR BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE TR_OPEN TR_CLOSE RS_CNT XIN XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS TR_POS CNT_VAL L_CAUSE IEC05000338-2-en.vsd
IEC05000338 V2 EN
Figure 295:
12.3.7.4
Section 12 Control
Name POSOPEN POSCLOSE TR_OPEN TR_CLOSE RS_CNT XIN Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 Description
1MRK505183-UEN C
Signal for open position of apparatus from I/O Signal for close position of apparatus from I/O Signal for open position of truck from I/O Signal for close position of truck from I/O Resets the operation counter Execution information from CSWI
Table 312:
Name XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS TR_POS CNT_VAL L_CAUSE
12.3.7.5
Table 313:
Name tStartMove tIntermediate AdaptivePulse tOpenPulse tClosePulse
Setting parameters
SXCBR Non group settings (basic)
Values (Range) 0.000 - 60.000 0.000 - 60.000 Not adaptive Adaptive 0.000 - 60.000 0.000 - 60.000 Unit s s s s Step 0.001 0.001 0.001 0.001 Default 0.100 0.150 Not adaptive 0.200 0.200 Description Supervision time for the apparatus to move after a command Allowed time for intermediate position The output resets when a new correct end position is reached Output pulse length for open command Output pulse length for close command
12.3.8
1MRK505183-UEN C
Section 12 Control
Introduction
The purpose of Circuit switch (SXSWI) function is to provide the actual status of positions and to perform the control operations, that is, pass all the commands to primary apparatuses in the form of disconnectors or earthing switches via output boards and to supervise the switching operation and position.
12.3.8.1
12.3.8.2
Principle of operation
The users of the Circuit switch (SXSWI) is other functions such as for example, switch controller, protection functions, autorecloser function, or a 61850 client residing in another IED or the operator place. SXSWI executes commands, evaluates block conditions and evaluates different time supervision conditions. Only if all conditions indicate a switch operation to be allowed, SXSWI performs the execution command. In case of erroneous conditions, the function indicates an appropriate "cause" value. SXSWI has an operation counter for closing and opening commands. The counter value can be read remotely from the operator place. The value is reset from a binary input or remotely from the operator place by configuring a signal from the Single Point Generic Control 8 signals (SPC8GGIO) for example.
Local/Remote switch
One binary input signal LR_SWI is included in SXSWI to indicate the local/remote switch position from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of position is allowed only from switchyard level. If the signal is set to FALSE it means that command from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of position) from internal IED clients are rejected, even trip commands from protection functions are rejected. The functionality of the local/remote switch is described in figure 296.
Local= Operation at switch yard level
E RU
From I/O
switchLR
FAL SE
Figure 296:
Local/Remote switch
Blocking principles
SXSWI includes several blocking principles. The basic principle for all blocking signals is that they will affect commands from all other clients for example, operators place, protection functions, autorecloser and so on.
Section 12 Control
1MRK505183-UEN C
The blocking possibilities are: Block/deblock for open command. It is used to block operation for open command. Note that this block signal also affects the input OPEN for immediate command. Block/deblock for close command. It is used to block operation for close command. Note that this block signal also affects the input CLOSE for immediate command. Update block/deblock of positions. It is used to block the updating of position values. Other signals related to the position will be reset. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC 61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible.
Substitution
The substitution part in SXSWI is used for manual set of the position for the switch. The typical use of substitution is that an operator enters a manual value because the real process value is erroneous of some reason. SXSWI will then use the manually entered value instead of the value for positions determined by the process. It is always possible to make a substitution, independently of the position indication and the status information of the I/O board. When substitution is enabled, the position values are blocked for updating and other signals related to the position are reset. The substituted values are stored in a non-volatile memory.
There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStartMove supervises that the primary device starts moving after the execute output pulse is sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 297 explains these two timers during the execute phase.
Time diagrams
1MRK505183-UEN C
Section 12 Control
AdaptivePulse = TRUE
OPENPOS
CLOSEPOS
en05000097.vsd
IEC05000097 V1 EN
Figure 297:
The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to the primary equipment. Note that the output pulses for open and close command can have different pulse lengths. The pulses can also be set to be adaptive with the configuration parameter AdaptivePulse. Figure 298 shows the principle of the execute output pulse. The AdaptivePulse parameter will have affect on both execute output pulses.
OPENPOS
CLOSEPOS
EXE_CL tClosePulse
AdaptivePulse=FALSE
EXE_CL tClosePulse
AdaptivePulse=TRUE
en05000098.vsd
IEC05000098 V1 EN
Figure 298:
If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or tClosePulse. The execute output pulses are reset when:
Section 12 Control
1MRK505183-UEN C
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is executed the execute output pulse resets only when timer tOpenPulse or tClosePulse has elapsed. the new expected final position is reached and the configuration parameter AdaptivePulse is set to true the timer tOpenPulse or tClosePulse has elapsed an error occurs due to the switch does not start moving, that is, tStartMove has elapsed.
There is one exception from the first item above. If the primary device is in open position and an open command is executed or if the primary device is in close position and a close command is executed. In these cases, with the additional condition that the configuration parameter AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove has elapsed. If the configuration parameter AdaptivePulse is set to false the execution output remains active until the pulse duration timer has elapsed. An example when a primary device is open and an open command is executed is shown in figure 299.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
AdaptivePulse=TRUE
en05000099.vsd
IEC05000099 V1 EN
Figure 299:
1MRK505183-UEN C
Section 12 Control
Function block
SXSWI BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE RS_CNT XIN XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS CNT_VAL L_CAUSE IEC05000339-2-en.vsd
IEC05000339 V2 EN
12.3.8.3
Figure 300:
12.3.8.4
Table 315:
Name XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION
Section 12 Control
Name OPENPOS CLOSEPOS CNT_VAL L_CAUSE Type BOOLEAN BOOLEAN INTEGER INTEGER Description Apparatus open position Apparatus closed position
1MRK505183-UEN C
The value of the operation counter Latest value of the error indication during command
12.3.8.5
Table 316:
Name tStartMove tIntermediate AdaptivePulse tOpenPulse tClosePulse SwitchType
Setting parameters
SXSWI Non group settings (basic)
Values (Range) 0.000 - 60.000 0.000 - 60.000 Not adaptive Adaptive 0.000 - 60.000 0.000 - 60.000 Load Break Disconnector Earthing Switch HS Earthing Switch Unit s s s s Step 0.001 0.001 0.001 0.001 Default 3.000 15.000 Not adaptive 0.200 0.200 Disconnector Description Supervision time for the apparatus to move after a command Allowed time for intermediate position The output resets when a new correct end position is reached Output pulse length for open command Output pulse length for close command Switch Type
12.3.9
12.3.9.1
12.3.9.2
Principle of operation
The Bay reserve (QCRSV) function handles the reservation. QCRSV function starts to operate in two ways. It starts when there is a request for reservation of the own bay or if there is a request for reservation from another bay. It is only possible to reserve the function if it is not currently reserved. The signal that can reserve the own bay is the input signal RES_RQx (x=1-8) coming from switch controller (SCWI). The signals for request from another bay are the outputs RE_RQ_B and V_RE_RQ from function block RESIN. These signals are included in signal EXCH_OUT from RESIN and are connected to RES_DATA in QCRSV. The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE) or other bays (FALSE). To reserve the own bay only means that no reservation request RES_BAYS is created.
1MRK505183-UEN C
Section 12 Control
Reservation request of own bay
If the reservation request comes from the own bay, the function QCRSV has to know which apparatus the request comes from. This information is available with the input signal RES_RQx and parameter ParamRequestx (where x=1-8 is the number of the requesting apparatus). In order to decide if a reservation request of the current bay can be permitted QCRSV has to know whether the own bay already is reserved by itself or another bay. This information is available in the output signal RESERVED. If the RESERVED output is not set, the selection is made with the output RES_GRTx (where x=1-8 is the number of the requesting apparatus), which is connected to switch controller SCSWI. If the bay already is reserved the command sequence will be reset and the SCSWI will set the attribute "1-of-n-control" in the "cause" signal.
When the function QCRSV receives a request from an apparatus in the own bay that requires other bays to be reserved as well, it checks if it already is reserved. If not, it will send a request to the other bays that are predefined (to be reserved) and wait for their response (acknowledge). The request of reserving other bays is done by activating the output RES_BAYS. When it receives acknowledge from the bays via the input RES_DATA, it sets the output RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not acknowledgement from all bays is received within a certain time defined in SCSWI (tResResponse), the SCSWI will reset the reservation and set the attribute "1-of-ncontrol" in the "cause" signal.
When another bay requests for reservation, the input BAY_RES in corresponding function block RESIN is activated. The signal for reservation request is grouped into the output signal EXCH_OUT in RESIN, which is connected to input RES_DATA in QCRSV. If the bay is not reserved, the bay will be reserved and the acknowledgment from output ACK_T_B is sent back to the requested bay. If the bay already is reserved the reservation is kept and no acknowledgment is sent.
If QCRSV function is blocked (input BLK_RES is set to true) the reservation is blocked. That is, no reservation can be made from the own bay or any other bay. This can be set, for example, via a binary input from an external device to prevent operations from another operator place at the same time. The reservation function can also be overridden in the own bay with the OVERRIDE input signal, that is, reserving the own bay without waiting for the external acknowledge.
If only one instance of QCRSV is used for a bay that is, use of up to eight apparatuses, the input EXCH_IN must be set to FALSE.
Section 12 Control
1MRK505183-UEN C
If there are more than eight apparatuses in the bay there has to be one additional QCRSV. The two QCRSV functions have to communicate and this is done through the input EXCH_IN and EXCH_OUT according to figure 301. If more then one QCRSV are used, the execution order is very important. The execution order must be in the way that the first QCRSV has a lower number than the next one.
QCRSV EXCH_IN RES_GRT1 RES_RQ1 RES_GRT2 RES_RQ2 RES_GRT3 RES_RQ3 RES_GRT4 RES_RQ4 RES_GRT5 RES_RQ5 RES_GRT6 RES_RQ6 RES_GRT7 RES_RQ7 RES_GRT8 RES_RQ8 RES_BAYS BLK_RES ACK_TO_B OVERRIDE RESERVED RES_DATA EXCH_OUT
QCRSV EXCH_IN RES_GRT1 RES_RQ1 RES_GRT2 RES_RQ2 RES_GRT3 RES_RQ3 RES_GRT4 RES_RQ4 RES_GRT5 RES_RQ5 RES_GRT6 RES_RQ6 RES_GRT7 RES_RQ7 RES_GRT8 RES_RQ8 RES_BAYS BLK_RES ACK_TO_B OVERRIDE RESERVED RES_DATA EXCH_OUT
1 1 1
RES_BAYS
ACK_TO_B
RESERVED
IEC05000088_2_en.vsd
IEC05000088 V2 EN
Figure 301:
12.3.9.3
Function block
QCRSV EXCH_IN RES_RQ1 RES_RQ2 RES_RQ3 RES_RQ4 RES_RQ5 RES_RQ6 RES_RQ7 RES_RQ8 BLK_RES OVERRIDE RES_DATA RES_GRT1 RES_GRT2 RES_GRT3 RES_GRT4 RES_GRT5 RES_GRT6 RES_GRT7 RES_GRT8 RES_BAYS ACK_TO_B RESERVED EXCH_OUT IEC05000340-2-en.vsd
IEC05000340 V2 EN
Figure 302:
1MRK505183-UEN C
Section 12 Control
Input and output signals
Table 317:
Name EXCH_IN RES_RQ1 RES_RQ2 RES_RQ3 RES_RQ4 RES_RQ5 RES_RQ6 RES_RQ7 RES_RQ8 BLK_RES OVERRIDE RES_DATA
12.3.9.4
Table 318:
Name RES_GRT1 RES_GRT2 RES_GRT3 RES_GRT4 RES_GRT5 RES_GRT6 RES_GRT7 RES_GRT8 RES_BAYS ACK_TO_B RESERVED EXCH_OUT
Section 12 Control
12.3.9.5
Table 319:
Name tCancelRes ParamRequest1 ParamRequest2 ParamRequest3 ParamRequest4 ParamRequest5 ParamRequest6 ParamRequest7 ParamRequest8
1MRK505183-UEN C
Setting parameters
QCRSV Non group settings (basic)
Values (Range) 0.000 - 60.000 Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Unit s Step 0.001 Default 10.000 Only own bay res. Only own bay res. Only own bay res. Only own bay res. Only own bay res. Only own bay res. Only own bay res. Only own bay res. Description Supervision time for canceling the reservation Reservation of the own bay only, at selection of apparatus 1 Reservation of the own bay only, at selection of apparatus 2 Reservation of the own bay only, at selection of apparatus 3 Reservation of the own bay only, at selection of apparatus 4 Reservation of the own bay only, at selection of apparatus 5 Reservation of the own bay only, at selection of apparatus 6 Reservation of the own bay only, at selection of apparatus 7 Reservation of the own bay only, at selection of apparatus 8
12.3.10
12.3.10.1
12.3.10.2
Principle of operation
The reservation input (RESIN) function is based purely on Boolean logic conditions. The logic diagram in figure 303 shows how the output signals are created. The inputs of the function block are connected to a receive function block representing signals transferred over the station bus from another bay.
1MRK505183-UEN C
Section 12 Control
EXCH_IN
INT BIN
& FutureUse 1
ACK_F_B
BAY_ACK
ANY_ACK
& BAY_VAL 1
VALID_TX
RE_RQ_B
BAY_RES
& 1 V _RE_RQ
BIN INT
EXCH_OUT
en05000089.vsd
IEC05000089 V1 EN
Figure 303:
Figure 304 describes the principle of the data exchange between all RESIN modules in the current bay. There is one RESIN function block per "other bay" used in the reservation mechanism. The output signal EXCH_OUT in the last RESIN functions are connected to the module bay reserve (QCRSV) that handles the reservation function in the own bay. The value to the input EXCH_IN on the first RESIN module in the chain has the integer value 5. This is provided by the use of instance number one of the function block RESIN, where the input EXCH_IN is set to #5, but is hidden for the user.
Section 12 Control
1MRK505183-UEN C
Bay 1
RESIN BAY_ACK ACK_F_B BAY_VAL ANY_ACK BAY_RES VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT
Bay 2
RESIN EXCH_IN ACK_F_B BAY_ACK ANY_ACK BAY_VAL VALID_TX BAY_RES RE_RQ_B V_RE_RQ EXCH_OUT
Bay n
RESIN EXCH_IN ACK_F_B BAY_ACK ANY_ACK BAY_VAL VALID_TX BAY_RES RE_RQ_B V_RE_RQ EXCH_OUT
QCRSV RES_DATA
en05000090.vsd
IEC05000090 V2 EN
Figure 304:
12.3.10.3
Function block
RESIN1 BAY_ACK BAY_VAL BAY_RES ACK_F_B ANY_ACK VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT IEC05000341-2-en.vsd
IEC05000341 V2 EN
Figure 305:
RESIN2 EXCH_IN BAY_ACK BAY_VAL BAY_RES ACK_F_B ANY_ACK VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT IEC09000807_1_en.vsd
IEC09000807 V1 EN
Figure 306:
1MRK505183-UEN C
Section 12 Control
Input and output signals
Table 320:
Name BAY_ACK BAY_VAL BAY_RES
12.3.10.4
Table 321:
Name ACK_F_B ANY_ACK VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT
Table 322:
Name EXCH_IN BAY_ACK BAY_VAL BAY_RES
Table 323:
Name ACK_F_B ANY_ACK VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT
Section 12 Control
12.3.10.5
Table 324:
Name FutureUse
1MRK505183-UEN C
Setting parameters
RESIN1 Non group settings (basic)
Values (Range) Bay in use Bay future use Unit Step Default Bay in use Description The bay for this ResIn block is for future use
Table 325:
Name FutureUse
12.4
12.4.1
Interlocking
Introduction
The interlocking function blocks the possibility to operate high-voltage switching devices, for instance when a disconnector is under load, in order to prevent material damage and/or accidental human injury. Each control IED has interlocking functions for different switchyard arrangements, each handling the interlocking of one bay. The function is distributed to each control IED and not dependent on any central function. For the station-wide interlocking, the IEDs communicate via the station bus or by using hard wired binary inputs/outputs. The interlocking conditions depend on the circuit configuration and status of the installation at any given time.
12.4.2
Principle of operation
The interlocking function consists of software modules located in each control IED. The function is distributed and not dependent on any central function. Communication between modules in different bays is performed via the station bus. The reservation function (see section "Introduction") is used to ensure that HV apparatuses that might affect the interlock are blocked during the time gap, which arises between position updates. This can be done by means of the communication system, reserving all HV apparatuses that might influence the interlocking condition of the intended operation. The reservation is maintained until the operation is performed. After the selection and reservation of an apparatus, the function has complete data on the status of all apparatuses in the switchyard that are affected by the selection.
1MRK505183-UEN C
Section 12 Control
Other operators cannot interfere with the reserved apparatus or the status of switching devices that may affect it. The open or closed positions of the HV apparatuses are inputs to software modules distributed in the control IEDs. Each module contains the interlocking logic for a bay. The interlocking logic in a module is different, depending on the bay function and the switchyard arrangements, that is, double-breaker or 1 1/2 breaker bays have different modules. Specific interlocking conditions and connections between standard interlocking modules are performed with an engineering tool. Bay-level interlocking signals can include the following kind of information: Positions of HV apparatuses (sometimes per phase) Valid positions (if evaluated in the control module) External release (to add special conditions for release) Line voltage (to block operation of line earthing switch) Output signals to release the HV apparatus
The interlocking module is connected to the surrounding functions within a bay as shown in figure 307.
Interlocking modules in other bays Apparatus control modules
SCILO SCSWI SXSWI
Interlocking module
IEC04000526 V1 EN
Figure 307:
Bays communicate via the station bus and can convey information regarding the following: Unearthed busbars Busbars connected together Other bays connected to a busbar Received data from other bays is valid
Section 12 Control
1MRK505183-UEN C
Station bus
Bay 1 Disc QB1 and QB2 closed Bay n Disc QB1 and QB2 closed Bus coupler WA1 unearthed WA1 unearthed WA1 and WA2 interconn WA1 and WA2 interconn in other bay
WA1 not earthed WA2 not earthed WA1 and WA2 interconn
... ..
WA1 not earthed WA2 not earthed WA1 and WA2 interconn
WA1 WA2 QB1 QB2 QA1 QB9 QB1 QB2 QA1 QB9
en05000494.vsd
IEC05000494 V1 EN
QB1
QB2
QC1
QC2
QA1
Figure 308:
When invalid data such as intermediate position, loss of a control IED, or input board error are used as conditions for the interlocking condition in a bay, a release for execution of the function will not be given. On the local HMI an override function exists, which can be used to bypass the interlocking function in cases where not all the data required for the condition is valid. For all interlocking modules these general rules apply: The interlocking conditions for opening or closing of disconnectors and earthing switches are always identical. Earthing switches on the line feeder end, for example, rapid earthing switches, are normally interlocked only with reference to the conditions in the bay where they are located, not with reference to switches on the other side of the line. So a line voltage indication may be included into line interlocking modules. If there is no line voltage supervision within the bay, then the appropriate inputs must be set to no voltage, and the operator must consider this when operating. Earthing switches can only be operated on isolated sections for example, without load/voltage. Circuit breaker contacts cannot be used to isolate a section, that is, the status of the circuit breaker is irrelevant as far as the earthing switch operation is concerned. Disconnectors cannot break power current or connect different voltage systems. Disconnectors in series with a circuit breaker can only be operated if the circuit breaker is open, or if the disconnectors operate in parallel with other closed connections. Other disconnectors can be operated if one side is completely isolated, or if the disconnectors operate in parallel to other closed connections, or if they are earthed on both sides. Circuit breaker closing is only interlocked against running disconnectors in its bay or additionally in a transformer bay against the disconnectors and earthing
1MRK505183-UEN C
Section 12 Control
switch on the other side of the transformer, if there is no disconnector between CB and transformer. Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar transfer is in progress.
To make the implementation of the interlocking function easier, a number of standardized and tested software interlocking modules containing logic for the interlocking conditions are available: Line for double and transfer busbars, ABC_LINE Bus for double and transfer busbars, ABC_BC Transformer bay for double busbars, AB_TRAFO Bus-section breaker for double busbars, A1A2_BS Bus-section disconnector for double busbars, A1A2_DC Busbar earthing switch, BB_ES Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B 1 1/2-CB diameter, BH_LINE_A, BH_CONN, BH_LINE_B
The interlocking conditions can be altered, to meet the customer specific requirements, by adding configurable logic by means of the graphical configuration tool PCM600. The inputs Qx_EXy on the interlocking modules are used to add these specific conditions. The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer of information from other bays. Required signals with designations ending in TR are intended for transfer to other bays.
12.4.3
12.4.3.1
12.4.3.2
Logic diagram
The function contains logic to enable the open and close commands respectively if the interlocking conditions are fulfilled. That means also, if the switch has a defined end position for example, open, then the appropriate enable signal (in this case EN_OPEN) is false. The enable signals EN_OPEN and EN_CLOSE can be true at the same time only in the intermediate and bad position state and if they are enabled by the interlocking function. The position inputs come from the logical nodes Circuit breaker/Circuit switch (SXCBR/SXSWI) and the enable signals
Section 12 Control
1MRK505183-UEN C
come from the interlocking logic. The outputs are connected to the logical node Switch controller (SCSWI). One instance per switching device is needed.
POSOPEN POSCLOSE SCILO =1
1 &
EN_OPEN >1
&
OPEN_EN CLOSE_EN
& &
IEC04000525 V1 EN
>1
EN_CLOSE
en04000525.vsd
Figure 309:
12.4.3.3
Function block
SCILO POSOPEN POSCLOSE OPEN_EN CLOSE_EN EN_OPEN EN_CLOSE
IEC05000359-2-en.vsd
IEC05000359 V2 EN
Figure 310:
12.4.3.4
Table 327:
Name EN_OPEN EN_CLOSE
12.4.4
1MRK505183-UEN C
Section 12 Control
Introduction
The interlocking for busbar earthing switch (BB_ES) function is used for one busbar earthing switch on any busbar parts according to figure 311.
12.4.4.1
QC
en04000504.vsd
IEC04000504 V1 EN
Figure 311:
12.4.4.2
Function block
BB_ES QC_OP QC_CL BB_DC_OP VP_BB_DC EXDU_BB QCREL QCITL BBESOPTR BBESCLTR
IEC05000347-2-en.vsd
IEC05000347 V2 EN
Figure 312:
12.4.4.3
Logic diagram
BB_ES VP_BB_DC BB_DC_OP EXDU_BB QC_OP QC_CL
IEC04000546 V1 EN
&
12.4.4.4
Section 12 Control
1MRK505183-UEN C
Table 329:
Name QCREL QCITL BBESOPTR BBESCLTR
12.4.5
12.4.5.1
QC1
QB1 QA1
QB2
QC2
QC3
QC4
A1A2_BS
IEC04000516 V1 EN
en04000516.vsd
Figure 313:
1MRK505183-UEN C
Section 12 Control
Function block
QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QC3_OP QC3_CL QC4_OP QC4_CL S1QC1_OP S1QC1_CL S2QC2_OP S2QC2_CL BBTR_OP VP_BBTR EXDU_12 EXDU_ES QA1O_EX1 QA1O_EX2 QA1O_EX3 QB1_EX1 QB1_EX2 QB2_EX1 QB2_EX2 A1A2_BS QA1OPREL QA1OPITL QA1CLREL QA1CLITL QB1REL QB1ITL QB2REL QB2ITL QC3REL QC3ITL QC4REL QC4ITL S1S2OPTR S1S2CLTR QB1OPTR QB1CLTR QB2OPTR QB2CLTR VPS1S2TR VPQB1TR VPQB2TR
12.4.5.2
IEC05000348-2-en.vsd
IEC05000348 V2 EN
Figure 314:
Section 12 Control
12.4.5.3 Logic diagram
QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QC3_OP QC3_CL QC4_OP QC4_CL S1QC1_OP S1QC1_CL S2QC2_OP S2QC2_CL VPQB1 QB1_OP QA1O_EX1 VPQB2 QB2_OP QA1O_EX2 VP_BBTR BBTR_OP EXDU_12 QA1O_EX3 VPQB1 VPQB2 VPQA1 VPQC3 VPQC4 VPS1QC1 QA1_OP QC3_OP QC4_OP S1QC1_OP EXDU_ES QB1_EX1 VPQC3 VPS1QC1 QC3_CL S1QC1_CL EXDU_ES QB1_EX2 A1A2_BS =1 =1 =1 =1 =1 =1 =1 & & & >1
1
1MRK505183-UEN C
&
en04000542.vsd
IEC04000542 V1 EN
1MRK505183-UEN C
Section 12 Control
VPQA1 VPQC3 VPQC4 VPS2QC2 QA1_OP QC3_OP QC4_OP S2QC2_OP EXDU_ES QB2_EX1 VPQC4 VPS2QC2 QC4_CL S2QC2_CL EXDU_ES QB2_EX2 VPQB1 VPQB2 QB1_OP QB2_OP QB1_OP QB1_CL VPQB1 QB2_OP QB2_CL VPQB2 QB1_OP QB2_OP QA1_OP VPQB1 VPQB2 VPQA1
IEC04000543 V1 EN
&
>1
1
QB2REL QB2ITL
&
&
1 1
QC3REL QC3ITL QC4REL QC4ITL QB1OPTR QB1CLTR VPQB1TR QB2OPTR QB2CLTR VPQB2TR
>1 &
12.4.5.4
Section 12 Control
Name EXDU_12 EXDU_ES QA1O_EX1 QA1O_EX2 QA1O_EX3 QB1_EX1 QB1_EX2 QB2_EX1 QB2_EX2 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 Description
1MRK505183-UEN C
No transm error from any bay connected to busbar 1 and 2 No transm error from bays containing earth. sw. QC1 or QC2 External open condition for apparatus QA1 External open condition for apparatus QA1 External open condition for apparatus QA1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB2 External condition for apparatus QB2
Table 331:
Name QA1OPREL QA1OPITL QA1CLREL QA1CLITL QB1REL QB1ITL QB2REL QB2ITL QC3REL QC3ITL QC4REL QC4ITL S1S2OPTR S1S2CLTR QB1OPTR QB1CLTR QB2OPTR QB2CLTR VPS1S2TR VPQB1TR VPQB2TR
12.4.6
560
1MRK505183-UEN C
Section 12 Control
Introduction
The interlocking for bus-section disconnector (A1A2_DC) function is used for one bus-section disconnector between section 1 and 2 according to figure 315. A1A2_DC function can be used for different busbars, which includes a bus-section disconnector.
QB WA1 (A1) WA2 (A2)
12.4.6.1
QC1
QC2
A1A2_DC
IEC04000492 V1 EN
en04000492.vsd
Figure 315:
12.4.6.2
Function block
A1A2_DC QB_OP QBOPREL QB_CL QBOPITL S1QC1_OP QBCLREL S1QC1_CL QBCLITL S2QC2_OP DCOPTR S2QC2_CL DCCLTR S1DC_OP VPDCTR S2DC_OP VPS1_DC VPS2_DC EXDU_ES EXDU_BB QBCL_EX1 QBCL_EX2 QBOP_EX1 QBOP_EX2 QBOP_EX3 IEC05000349-2-en.vsd
IEC05000349 V2 EN
Figure 316:
Section 12 Control
12.4.6.3 Logic diagram
A1A2_DC QB_OP QB_CL S1QC1_OP S1QC1_CL S2QC2_OP S2QC2_CL VPS1QC1 VPS2QC2 VPS1_DC S1QC1_OP S2QC2_OP S1DC_OP EXDU_ES EXDU_BB QBOP_EX1 VPS1QC1 VPS2QC2 VPS2_DC S1QC1_OP S2QC2_OP S2DC_OP EXDU_ES EXDU_BB QBOP_EX2 VPS1QC1 VPS2QC2 S1QC1_CL S2QC2_CL EXDU_ES QBOP_EX3 =1 VPQB VPDCTR DCOPTR DCCLTR =1 =1 VPS1QC1 VPS2QC2
1MRK505183-UEN C
&
>1
1
QBOPREL QBOPITL
&
&
en04000544.vsd
IEC04000544 V1 EN
IEC04000545 V1 EN
12.4.6.4
1MRK505183-UEN C
Section 12 Control
Name S2QC2_OP S2QC2_CL S1DC_OP S2DC_OP VPS1_DC VPS2_DC EXDU_ES EXDU_BB QBCL_EX1 QBCL_EX2 QBOP_EX1 QBOP_EX2 QBOP_EX3 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 0 0 Description QC2 on bus section 2 is in open position QC2 on bus section 2 is in closed position All disconnectors on bus section 1 are in open position All disconnectors on bus section 2 are in open position Switch status of disconnectors on bus section 1 are valid Switch status of disconnectors on bus section 2 are valid No transm error from bays containing earth. sw. QC1 or QC2 No transm error from bays with disc conn to section 1 and 2 External close condition for section disconnector QB External close condition for section disconnector QB External open condition for section disconnector QB External open condition for section disconnector QB External open condition for section disconnector QB
Table 333:
Name QBOPREL QBOPITL QBCLREL QBCLITL DCOPTR DCCLTR VPDCTR
12.4.7
12.4.7.1
Section 12 Control
1MRK505183-UEN C
WA1 (A) WA2 (B) WA7 (C) QB1 QB2 QC1 QA1 QB20 QB7
QC2
en04000514.vsd
IEC04000514 V1 EN
Figure 317:
12.4.7.2
Function block
ABC_BC QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QB7_OP QB7_CL QB20_OP QB20_CL QC1_OP QC1_CL QC2_OP QC2_CL QC11_OP QC11_CL QC21_OP QC21_CL QC71_OP QC71_CL BBTR_OP BC_12_CL VP_BBTR VP_BC_12 EXDU_ES EXDU_12 EXDU_BC QA1O_EX1 QA1O_EX2 QA1O_EX3 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 QB20_EX1 QB20_EX2 QB7_EX1 QB7_EX2 QA1OPREL QA1OPITL QA1CLREL QA1CLITL QB1REL QB1ITL QB2REL QB2ITL QB7REL QB7ITL QB20REL QB20ITL QC1REL QC1ITL QC2REL QC2ITL QB1OPTR QB1CLTR QB220OTR QB220CTR QB7OPTR QB7CLTR QB12OPTR QB12CLTR BC12OPTR BC12CLTR BC17OPTR BC17CLTR BC27OPTR BC27CLTR VPQB1TR VQB220TR VPQB7TR VPQB12TR VPBC12TR VPBC17TR VPBC27TR
IEC05000350-2-en.vsd
IEC05000350 V2 EN
Figure 318:
564
1MRK505183-UEN C
Section 12 Control
Logic diagram
QA1_OP QA1_CL QB1_OP QB1_CL QB20_OP QB20_CL QB7_OP QB7_CL QB2_OP QB2_CL QC1_OP QC1_CL QC2_OP QC2_CL QC11_OP QC11_CL QC21_OP QC21_CL QC71_OP QC71_CL VPQB1 QB1_OP QA1O_EX1 VPQB20 QB20_OP QA1O_EX2 VP_BBTR BBTR_OP EXDU_12 QA1O_EX3 VPQB1 VPQB2 VPQB7 VPQB20
IEC04000533 V1 EN
12.4.7.3
VPQA1 VPQB1 VPQB20 VPQB7 VPQB2 VPQC1 VPQC2 VPQC11 VPQC21 VPQC71 QA1OPREL QA1OPITL
&
QA1CLREL QA1CLITL
en04000533.vsd
VPQA1 VPQB2 VPQC1 VPQC2 VPQC11 QA1_OP QB2_OP QC1_OP QC2_OP QC11_OP EXDU_ES QB1_EX1 VPQB2 VP_BC_12 QB2_CL BC_12_CL EXDU_BC QB1_EX2 VPQC1 VPQC11 QC1_CL QC11_CL EXDU_ES QB1_EX3
&
>1
1
QB1REL QB1ITL
&
&
en04000534.vsd
IEC04000534 V1 EN
Section 12 Control
1MRK505183-UEN C
VPQA1 VPQB1 VPQC1 VPQC2 VPQC21 QA1_OP QB1_OP QC1_OP QC2_OP QC21_OP EXDU_ES QB2_EX1 VPQB1 VP_BC_12 QB1_CL BC_12_CL EXDU_BC QB2_EX2 VPQC1 VPQC21 QC1_CL QC21_CL EXDU_ES QB2_EX3
&
>1
1
QB2REL QB2ITL
&
&
en04000535.vsd
IEC04000535 V1 EN
VPQA1 VPQB20 VPQC1 VPQC2 VPQC71 QA1_OP QB20_OP QC1_OP QC2_OP QC71_OP EXDU_ES QB7_EX1 VPQC2 VPQC71 QC2_CL QC71_CL EXDU_ES QB7_EX2 VPQA1 VPQB7 VPQC1 VPQC2 VPQC21 QA1_OP QB7_OP QC1_OP QC2_OP QC21_OP EXDU_ES QB20_EX1 VPQC2 VPQC21 QC2_CL QC21_CL EXDU_ES QB20_EX2
&
>1
1
QB7REL QB7ITL
&
&
>1
1
QB20REL QB20ITL
&
en04000536.vsd
IEC04000536 V1 EN
1MRK505183-UEN C
Section 12 Control
VPQB1 VPQB20 VPQB7 VPQB2 QB1_OP QB20_OP QB7_OP QB2_OP QB1_OP QB1_CL VPQB1 QB20_OP QB2_OP VPQB20 VPQB2 QB7_OP QB7_CL VPQB7 QB1_OP QB2_OP VPQB1 VPQB2 QA1_OP QB1_OP QB20_OP VPQA1 VPQB1 VPQB20 QA1_OP QB1_OP QB7_OP VPQA1 VPQB1 VPQB7 QA1_OP QB2_OP QB7_OP VPQA1 VPQB2 VPQB7
IEC04000537 V1 EN
&
1 1
& &
QB1OPTR QB1CLTR VPQB1TR QB220OTR QB220CTR VQB220TR QB7OPTR QB7CLTR VPQB7TR QB12OPTR QB12CLTR VPQB12TR BC12OPTR BC12CLTR VPBC12TR BC17OPTR BC17CLTR VPBC17TR BC27OPTR BC27CLTR VPBC27TR
en04000537.vsd
12.4.7.4
Section 12 Control
Name QC11_CL QC21_OP QC21_CL QC71_OP QC71_CL BBTR_OP BC_12_CL VP_BBTR VP_BC_12 EXDU_ES EXDU_12 EXDU_BC QA1O_EX1 QA1O_EX2 QA1O_EX3 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 QB20_EX1 QB20_EX2 QB7_EX1 QB7_EX2 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Description
1MRK505183-UEN C
Earthing switch QC11 on busbar WA1 is in closed position Earthing switch QC21 on busbar WA2 is in open position Earthing switch QC21 on busbar WA2 is in closed position Earthing switch QC71 on busbar WA7 is in open position Earthing switch QC71 on busbar WA7 is in closed position No busbar transfer is in progress A bus coupler connection exists between busbar WA1 and WA2 Status are valid for app. involved in the busbar transfer Status of the bus coupler app. between WA1 and WA2 are valid No transm error from any bay containing earthing switches No transm error from any bay connected to WA1/ WA2 busbars No transmission error from any other bus coupler bay External open condition for apparatus QA1 External open condition for apparatus QA1 External open condition for apparatus QA1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB20 External condition for apparatus QB20 External condition for apparatus QB7 External condition for apparatus QB7
Table 335:
Name QA1OPREL QA1OPITL QA1CLREL QA1CLITL
1MRK505183-UEN C
Section 12 Control
Name QB1REL QB1ITL QB2REL QB2ITL QB7REL QB7ITL QB20REL QB20ITL QC1REL QC1ITL QC2REL QC2ITL QB1OPTR QB1CLTR QB220OTR QB220CTR QB7OPTR QB7CLTR QB12OPTR QB12CLTR BC12OPTR BC12CLTR BC17OPTR BC17CLTR BC27OPTR BC27CLTR VPQB1TR VQB220TR VPQB7TR VPQB12TR VPBC12TR VPBC17TR VPBC27TR Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Switching of QB1 is allowed Switching of QB1 is forbidden Switching of QB2 is allowed Switching of QB2 is forbidden Switching of QB7 is allowed Switching of QB7 is forbidden Switching of QB20 is allowed Switching of QB20 is forbidden Switching of QC1 is allowed Switching of QC1 is forbidden Switching of QC2 is allowed Switching of QC2 is forbidden QB1 is in open position QB1 is in closed position QB2 and QB20 are in open position QB2 or QB20 or both are not in open position QB7 is in open position QB7 is in closed position QB1 or QB2 or both are in open position QB1 and QB2 are not in open position No connection via the own bus coupler between WA1 and WA2 Conn. exists via the own bus coupler between WA1 and WA2 No connection via the own bus coupler between WA1 and WA7 Conn. exists via the own bus coupler between WA1 and WA7 No connection via the own bus coupler between WA2 and WA7 Conn. exists via the own bus coupler between WA2 and WA7 Switch status of QB1 is valid (open or closed) Switch status of QB2 and QB20 are valid (open or closed) Switch status of QB7 is valid (open or closed) Switch status of QB1 and QB2 are valid (open or closed) Status of the bus coupler app. between WA1 and WA2 are valid Status of the bus coupler app. between WA1 and WA7 are valid Status of the bus coupler app. between WA2 and WA7 are valid
1MRK505183-UEN C
QB61
QA1
QB62
QB9 QC9
BH_CONN en04000513.vsd
IEC04000513 V1 EN
Figure 319:
Three types of interlocking modules per diameter are defined. BH_LINE_A and BH_LINE_B are the connections from a line to a busbar. BH_CONN is the connection between the two lines of the diameter in the 1 1/2 breaker switchyard layout.
1MRK505183-UEN C
Section 12 Control
Function blocks
BH_LINE_A QA1_OP QA1CLREL QA1_CL QA1CLITL QB6_OP QB6REL QB6_CL QB6ITL QB1_OP QB1REL QB1_CL QB1ITL QC1_OP QC1REL QC1_CL QC1ITL QC2_OP QC2REL QC2_CL QC2ITL QC3_OP QC3REL QC3_CL QC3ITL QB9_OP QB9REL QB9_CL QB9ITL QC9_OP QC9REL QC9_CL QC9ITL CQA1_OP QB1OPTR CQA1_CL QB1CLTR CQB61_OP VPQB1TR CQB61_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL QC11_OP QC11_CL VOLT_OFF VOLT_ON EXDU_ES QB6_EX1 QB6_EX2 QB1_EX1 QB1_EX2 QB9_EX1 QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 QB9_EX6 QB9_EX7 IEC05000352-2-en.vsd
IEC05000352 V2 EN
12.4.8.2
Figure 320:
Section 12 Control
1MRK505183-UEN C
BH_LINE_B QA1_OP QA1CLREL QA1_CL QA1CLITL QB6_OP QB6REL QB6_CL QB6ITL QB2_OP QB2REL QB2_CL QB2ITL QC1_OP QC1REL QC1_CL QC1ITL QC2_OP QC2REL QC2_CL QC2ITL QC3_OP QC3REL QC3_CL QC3ITL QB9_OP QB9REL QB9_CL QB9ITL QC9_OP QC9REL QC9_CL QC9ITL CQA1_OP QB2OPTR CQA1_CL QB2CLTR CQB62_OP VPQB2TR CQB62_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL QC21_OP QC21_CL VOLT_OFF VOLT_ON EXDU_ES QB6_EX1 QB6_EX2 QB2_EX1 QB2_EX2 QB9_EX1 QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 QB9_EX6 QB9_EX7 IEC05000353-2-en.vsd
IEC05000353 V2 EN
Figure 321:
QA1_OP QA1_CL QB61_OP QB61_CL QB62_OP QB62_CL QC1_OP QC1_CL QC2_OP QC2_CL 1QC3_OP 1QC3_CL 2QC3_OP 2QC3_CL QB61_EX1 QB61_EX2 QB62_EX1 QB62_EX2
BH_CONN QA1CLREL QA1CLITL QB61REL QB61ITL QB62REL QB62ITL QC1REL QC1ITL QC2REL QC2ITL
IEC05000351-2-en.vsd
IEC05000351 V2 EN
Figure 322:
1MRK505183-UEN C
Section 12 Control
Logic diagrams
QA1_OP QA1_CL QB61_OP QB61_CL QB62_OP QB62_CL QC1_OP QC1_CL QC2_OP QC2_CL 1QC3_OP 1QC3_CL 2QC3_OP 2QC3_CL VPQB61 VPQB62 VPQA1 VPQC1 VPQC2 VP1QC3 QA1_OP QC1_OP QC2_OP 1QC3_OP QB61_EX1 VPQC1 VP1QC3 QC1_CL 1QC3_CL QB61_EX2 VPQA1 VPQC1 VPQC2 VP2QC3 QA1_OP QC1_OP QC2_OP 2QC3_OP QB62_EX1 VPQC2 VP2QC3 QC2_CL 2QC3_CL QB62_EX2 VPQB61 VPQB62 QB61_OP QB62_OP
IEC04000560 V1 EN
12.4.8.3
VPQA1 VPQB61 VPQB62 VPQC1 VPQC2 VP1QC3 VP2QC3 QA1CLREL QA1CLITL QB61REL QB61ITL
&
&
>1
1
QB62REL QB62ITL
&
&
1 1
Section 12 Control
1MRK505183-UEN C
QA1_OP QA1_CL QB1_OP QB1_CL QB6_OP QB6_CL QC9_OP QC9_CL QB9_OP QB9_CL QC1_OP QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL CQA1_OP CQA1_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL CQB61_OP CQB61_CL QC11_OP QC11_CL VOLT_OFF VOLT_ON VPQB1 VPQB6 VPQB9 VPQA1 VPQC1 VPQC2 VPQC3 QA1_OP QC1_OP QC2_OP QC3_OP QB6_EX1 VPQC2 VPQC3 QC2_CL QC3_CL QB6_EX2
IEC04000554 V1 EN
VPQA1 VPQB1 VPQB6 VPQC9 VPQB9 VPQC1 VPQC2 VPQC3 VPCQA1 VPCQC1 VPCQC2 VPCQB61 VPQC11 VPVOLT QA1CLREL QA1CLITL QB6REL QB6ITL
&
en04000554.vsd
1MRK505183-UEN C
Section 12 Control
VPQA1 VPQC1 VPQC2 VPQC11 QA1_OP QC1_OP QC2_OP QC11_OP EXDU_ES QB1_EX1 VPQC1 VPQC11 QC1_CL QC11_CL EXDU_ES QB1_EX2 VPQB1 VPQB6 QB1_OP QB6_OP VPQB6 VPQB9 VPCQB61 QB6_OP QB9_OP CQB61_OP VPQA1 VPQB6 VPQC9 VPQC1 VPQC2 VPQC3 VPCQA1 VPCQB61 VPCQC1 VPCQC2 QB9_EX1 QB6_OP QB9_EX2 QA1_OP QC1_OP QC2_OP QB9_EX3
&
>1
1
QB1REL QB1ITL
&
&
1 1
&
1
&
>1
QB9REL QB9ITL
>1 &
en04000555.vsd
IEC04000555 V1 EN
CQB61_OP QB9_EX4 CQA1_OP CQC1_OP CQC2_OP QB9_EX5 QC9_OP QC3_OP QB9_EX6 VPQC9 VPQC3 QC9_CL QC3_CL QB9_EX7 VPQB9 VPVOLT QB9_OP VOLT_OFF QB1_OP QB1_CL VPQB1
IEC04000556 V1 EN
>1 &
&
>1
&
&
Section 12 Control
1MRK505183-UEN C
QA1_OP QA1_CL QB2_OP QB2_CL QB6_OP QB6_CL QC9_OP QC9_CL QB9_OP QB9_CL QC1_OP QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL CQA1_OP CQA1_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL CQB62_OP CQB62_CL QC21_OP QC21_CL VOLT_OFF VOLT_ON VPQB2 VPQB6 VPQB9 VPQA1 VPQC1 VPQC2 VPQC3 QA1_OP QC1_OP QC2_OP QC3_OP QB6_EX1 VPQC2 VPQC3 QC2_CL QC3_CL QB6_EX2
IEC04000557 V1 EN
VPQA1 VPQB2 VPQB6 VPQC9 VPQB9 VPQC1 VPQC2 VPQC3 VPCQA1 VPCQC1 VPCQC2 VPCQB62 VPQC21 VPVOLT QA1CLREL QA1CLITL QB6REL QB6ITL
&
en04000557.vsd
1MRK505183-UEN C
Section 12 Control
VPQA1 VPQC1 VPQC2 VPQC21 QA1_OP QC1_OP QC2_OP QC21_OP EXDU_ES QB2_EX1 VPQC1 VPQC21 QC1_CL QC21_CL EXDU_ES QB2_EX2 VPQB2 VPQB6 QB2_OP QB6_OP VPQB6 VPQB9 VPCQB62 QB6_OP QB9_OP CQB62_OP VPQA1 VPQB6 VPQC9 VPQC1 VPQC2 VPQC3 VPCQA1 VPCQB62 VPCQC1 VPCQC2 QB9_EX1 QB6_OP QB9_EX2 QA1_OP QC1_OP QC2_OP QB9_EX3
&
>1
1
QB2REL QB2ITL
&
&
1 1
&
1
&
>1
QB9REL QB9ITL
>1 &
en04000558.vsd
IEC04000558 V1 EN
CQB62_OP QB9_EX4 CQA1_OP CQC1_OP CQC2_OP QB9_EX5 QC9_OP QC3_OP QB9_EX6 VPQC9 VPQC3 QC9_CL QC3_CL QB9_EX7 VPQB9 VPVOLT QB9_OP VOLT_OFF QB2_OP QB2_CL VPQB2
IEC04000559 V1 EN
>1 &
&
>1
&
&
Section 12 Control
12.4.8.4 Input and output signals
Table 336:
Name QA1_OP QA1_CL QB6_OP QB6_CL QB1_OP QB1_CL QC1_OP QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL QB9_OP QB9_CL QC9_OP QC9_CL CQA1_OP CQA1_CL CQB61_OP CQB61_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL QC11_OP QC11_CL VOLT_OFF VOLT_ON EXDU_ES QB6_EX1 QB6_EX2 QB1_EX1 QB1_EX2 QB9_EX1
1MRK505183-UEN C
1MRK505183-UEN C
Section 12 Control
Name QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 QB9_EX6 QB9_EX7 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 Description External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9
Table 337:
Name QA1CLREL QA1CLITL QB6REL QB6ITL QB1REL QB1ITL QC1REL QC1ITL QC2REL QC2ITL QC3REL QC3ITL QB9REL QB9ITL QC9REL QC9ITL QB1OPTR QB1CLTR VPQB1TR
Table 338:
Name QA1_OP QA1_CL QB6_OP QB6_CL QB2_OP QB2_CL QC1_OP
Section 12 Control
Name QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL QB9_OP QB9_CL QC9_OP QC9_CL CQA1_OP CQA1_CL CQB62_OP CQB62_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL QC21_OP QC21_CL VOLT_OFF VOLT_ON EXDU_ES QB6_EX1 QB6_EX2 QB2_EX1 QB2_EX2 QB9_EX1 QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 QB9_EX6 QB9_EX7 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Description QC1 is in closed position QC2 is in open position QC2 is in closed position QC3 is in open position QC3 is in closed position QB9 is in open position QB9 is in closed position QC9 is in open position QC9 is in closed position
1MRK505183-UEN C
QA1 in module BH_CONN is in open position QA1 in module BH_CONN is in closed position QB62 in module BH_CONN is in open position QB62 in module BH_CONN is in closed position QC1 in module BH_CONN is in open position QC1 in module BH_CONN is in closed position QC2 in module BH_CONN is in open position QC2 in module BH_CONN is in closed position Earthing switch QC21 on busbar WA2 is in open position Earthing switch QC21 on busbar WA2 is in closed position There is no voltage on line and not VT (fuse) failure There is voltage on the line or there is a VT (fuse) failure No transm error from bay containing earthing switch QC21 External condition for apparatus QB6 External condition for apparatus QB6 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9
1MRK505183-UEN C
Section 12 Control
Table 339:
Name QA1CLREL QA1CLITL QB6REL QB6ITL QB2REL QB2ITL QC1REL QC1ITL QC2REL QC2ITL QC3REL QC3ITL QB9REL QB9ITL QC9REL QC9ITL QB2OPTR QB2CLTR VPQB2TR
Table 340:
Name QA1_OP QA1_CL QB61_OP QB61_CL QB62_OP QB62_CL QC1_OP QC1_CL QC2_OP QC2_CL 1QC3_OP 1QC3_CL 2QC3_OP 2QC3_CL QB61_EX1
Section 12 Control
Name QB61_EX2 QB62_EX1 QB62_EX2 Type BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description
1MRK505183-UEN C
External condition for apparatus QB61 External condition for apparatus QB62 External condition for apparatus QB62
Table 341:
Name QA1CLREL QA1CLITL QB61REL QB61ITL QB62REL QB62ITL QC1REL QC1ITL QC2REL QC2ITL
12.4.9
12.4.9.1
1MRK505183-UEN C
Section 12 Control
WA1 (A) WA2 (B) QB1 QC1 QA1 DB_BUS_A QC2 QB61 QB62 QC3 QB9 QC9 QC5 QA2 DB_BUS_B QB2 QC4
DB_LINE
en04000518.vsd
IEC04000518 V1 EN
Figure 323:
Three types of interlocking modules per double circuit breaker bay are defined. DB_LINE is the connection from the line to the circuit breaker parts that are connected to the busbars. DB_BUS_A and DB_BUS_B are the connections from the line to the busbars.
12.4.9.2
Function block
IB01DB_BUS_A QA1_OP QA1CLREL QA1_CL QA1CLITL QB1_OP QB61REL QB1_CL QB61ITL QB61_OP QB1REL QB61_CL QB1ITL QC1_OP QC1REL QC1_CL QC1ITL QC2_OP QC2REL QC2_CL QC2ITL QC3_OP QB1OPTR QC3_CL QB1CLTR QC11_OP VPQB1TR QC11_CL EXDU_ES QB61_EX1 QB61_EX2 QB1_EX1 QB1_EX2 en05000354.vsd
IEC05000354 V1 EN
Figure 324:
IB function block
Section 12 Control
1MRK505183-UEN C
DB_LINE QA1_OP QA1_CL QA2_OP QA2_CL QB61_OP QB61_CL QC1_OP QC1_CL QC2_OP QC2_CL QB62_OP QB62_CL QC4_OP QC4_CL QC5_OP QC5_CL QB9_OP QB9_CL QC3_OP QC3_CL QC9_OP QC9_CL VOLT_OFF VOLT_ON QB9_EX1 QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 QB9REL QB9ITL QC3REL QC3ITL QC9REL QC9ITL
IEC05000356-2-en.vsd
IEC05000356 V2 EN
Figure 325:
DB_BUS_B QA2_OP QA2CLREL QA2_CL QA2CLITL QB2_OP QB62REL QB2_CL QB62ITL QB62_OP QB2REL QB62_CL QB2ITL QC4_OP QC4REL QC4_CL QC4ITL QC5_OP QC5REL QC5_CL QC5ITL QC3_OP QB2OPTR QC3_CL QB2CLTR QC21_OP VPQB2TR QC21_CL EXDU_ES QB62_EX1 QB62_EX2 QB2_EX1 QB2_EX2 IEC05000355-2-en.vsd
IEC05000355 V2 EN
Figure 326:
1MRK505183-UEN C
Section 12 Control
Logic diagrams
QA1_OP QA1_CL QB61_OP QB61_CL QB1_OP QB1_CL QC1_OP QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL QC11_OP QC11_CL VPQB61 VPQB1 VPQA1 VPQC1 VPQC2 VPQC3 QA1_OP QC1_OP QC2_OP QC3_OP QB61_EX1 VPQC2 VPQC3 QC2_CL QC3_CL QB61_EX2 VPQA1 VPQC1 VPQC2 VPQC11 QA1_OP QC1_OP QC2_OP QC11_OP EXDU_ES QB1_EX1 VPQC1 VPQC11 QC1_CL QC11_CL EXDU_ES QB1_EX2 DB_BUS_A =1 =1 =1 =1 =1 =1 =1 & & >1
1 1
12.4.9.3
VPQA1 VPQB61 VPQB1 VPQC1 VPQC2 VPQC3 VPQC11 QA1CLREL QA1CLITL QB61REL QB61ITL
&
&
>1
1
QB1REL QB1ITL
&
en04000547.vsd
IEC04000547 V1 EN
&
1 1
IEC04000548 V1 EN
Section 12 Control
1MRK505183-UEN C
QA2_OP QA2_CL QB62_OP QB62_CL QB2_OP QB2_CL QC4_OP QC4_CL QC5_OP QC5_CL QC3_OP QC3_CL QC21_OP QC21_CL VPQB62 VPQB2 VPQA2 VPQC4 VPQC5 VPQC3 QA2_OP QC4_OP QC5_OP QC3_OP QB62_EX1 VPQC5 VPQC3 QC5_CL QC3_CL QB62_EX2 VPQA2 VPQC4 VPQC5 VPQC21 QA2_OP QC4_OP QC5_OP QC21_OP EXDU_ES QB2_EX1 VPQC4 VPQC21 QC4_CL QC21_CL EXDU_ES QB2_EX2
VPQA2 VPQB62 VPQB2 VPQC4 VPQC5 VPQC3 VPQC21 QA2CLREL QA2CLITL QB62REL QB62ITL
&
&
>1
1
QB2REL QB2ITL
&
en04000552.vsd
IEC04000552 V1 EN
&
1 1
IEC04000553 V1 EN
1MRK505183-UEN C
Section 12 Control
QA1_OP QA1_CL QA2_OP QA2_CL QB61_OP QB61_CL QC1_OP QC1_CL QC2_OP QC2_CL QB62_OP QB62_CL QC4_OP QC4_CL QC5_OP QC5_CL QB9_OP QB9_CL QC3_OP QC3_CL QC9_OP QC9_CL VOLT_OFF VOLT_ON VPQA1 VPQA2 VPQC1 VPQC2 VPQC3 VPQC4 VPQC5 VPQC9 QA1_OP QA2_OP QC1_OP QC2_OP QC3_OP QC4_OP QC5_OP QC9_OP QB9_EX1
VPQA1 VPQA2 VPQB61 VPQC1 VPQC2 VPQB62 VPQC4 VPQC5 VPQB9 VPQC3 VPQC9 VPVOLT QB9REL QB9ITL
&
IEC04000549 V1 EN
en04000549.vsd
VPQA1 VPQC1 VPQC2 VPQC3 VPQC9 VPQB62 QA1_OP QC1_OP QC2_OP QC3_OP QC9_OP QB62_OP QB9_EX2 VPQA2 VPQB61 VPQC3 VPQC4 VPQC5 VPQC9 QA2_OP QB61_OP QC3_OP QC4_OP QC5_OP QC9_OP QB9_EX3 VPQC3 VPQC9 VPQB61 VPQB62 QC3_OP QC9_OP QB61_OP QB62_OP QB9_EX4 VPQC3 VPQC9 QC3_CL QC9_CL QB9_EX5
IEC04000550 V1 EN
&
>1
&
&
&
en04000550.vsd
Section 12 Control
1MRK505183-UEN C
VPQB61 VPQB62 VPQB9 QB61_OP QB62_OP QB9_OP VPQB9 VPVOLT QB9_OP VOLT_OFF
IEC04000551 V1 EN
&
1
QC3REL QC3ITL
&
1
QC9REL QC9ITL
en04000551.vsd
12.4.9.4
Table 343:
Name QA1CLREL QA1CLITL QB61REL QB61ITL QB1REL
1MRK505183-UEN C
Section 12 Control
Name QB1ITL QC1REL QC1ITL QC2REL QC2ITL QB1OPTR QB1CLTR VPQB1TR Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Switching of QB1 is forbidden Switching of QC1 is allowed Switching of QC1 is forbidden Switching of QC2 is allowed Switching of QC2 is forbidden QB1 is in open position QB1 is in closed position Switch status of QB1 is valid (open or closed)
Table 344:
Name QA1_OP QA1_CL QA2_OP QA2_CL QB61_OP QB61_CL QC1_OP QC1_CL QC2_OP QC2_CL QB62_OP QB62_CL QC4_OP QC4_CL QC5_OP QC5_CL QB9_OP QB9_CL QC3_OP QC3_CL QC9_OP QC9_CL VOLT_OFF VOLT_ON QB9_EX1 QB9_EX2
Section 12 Control
Name QB9_EX3 QB9_EX4 QB9_EX5 Type BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description
1MRK505183-UEN C
External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9
Table 345:
Name QB9REL QB9ITL QC3REL QC3ITL QC9REL QC9ITL
Table 346:
Name QA2_OP QA2_CL QB2_OP QB2_CL QB62_OP QB62_CL QC4_OP QC4_CL QC5_OP QC5_CL QC3_OP QC3_CL QC21_OP QC21_CL EXDU_ES QB62_EX1 QB62_EX2 QB2_EX1 QB2_EX2
1MRK505183-UEN C
Section 12 Control
Table 347:
Name QA2CLREL QA2CLITL QB62REL QB62ITL QB2REL QB2ITL QC4REL QC4ITL QC5REL QC5ITL QB2OPTR QB2CLTR VPQB2TR
12.4.10
12.4.10.1
en04000478.vsd
IEC04000478 V1 EN
Figure 327:
Section 12 Control
12.4.10.2 Function block
ABC_LINE QA1_OP QA1CLREL QA1_CL QA1CLITL QB9_OP QB9REL QB9_CL QB9ITL QB1_OP QB1REL QB1_CL QB1ITL QB2_OP QB2REL QB2_CL QB2ITL QB7_OP QB7REL QB7_CL QB7ITL QC1_OP QC1REL QC1_CL QC1ITL QC2_OP QC2REL QC2_CL QC2ITL QC9_OP QC9REL QC9_CL QC9ITL QC11_OP QB1OPTR QC11_CL QB1CLTR QC21_OP QB2OPTR QC21_CL QB2CLTR QC71_OP QB7OPTR QC71_CL QB7CLTR BB7_D_OP QB12OPTR BC_12_CL QB12CLTR BC_17_OP VPQB1TR BC_17_CL VPQB2TR BC_27_OP VPQB7TR BC_27_CL VPQB12TR VOLT_OFF VOLT_ON VP_BB7_D VP_BC_12 VP_BC_17 VP_BC_27 EXDU_ES EXDU_BPB EXDU_BC QB9_EX1 QB9_EX2 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 QB7_EX1 QB7_EX2 QB7_EX3 QB7_EX4 IEC05000357-2-en.vsd
IEC05000357 V2 EN
1MRK505183-UEN C
Figure 328:
1MRK505183-UEN C
Section 12 Control
Logic diagram
QA1_OP QA1_CL QB9_OP QB9_CL QB1_OP QB1_CL QB2_OP QB2_CL QB7_OP QB7_CL QC1_OP QC1_CL QC2_OP QC2_CL QC9_OP QC9_CL QC11_OP QC11_CL QC21_OP QC21_CL QC71_OP QC71_CL VOLT_OFF VOLT_ON VPQA1 VPQC1 VPQC2 VPQC9 QA1_OP QC1_OP QC2_OP QC9_OP QB9_EX1 VPQC2 VPQC9 QC2_CL QC9_CL QB9_EX2 ABC_LINE =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 & >1
1
12.4.10.3
VPQA1 VPQB9 VPQB1 VPQB2 VPQB7 VPQC1 VPQC2 VPQC9 VPQC11 VPQC21 VPQC71 VPVOLT QB9REL QB9ITL &
1
QA1CLREL QA1CLITL
&
en04000527.vsd
IEC04000527 V1 EN
Section 12 Control
1MRK505183-UEN C
VPQA1 VPQB2 VPQC1 VPQC2 VPQC11 QA1_OP QB2_OP QC1_OP QC2_OP QC11_OP EXDU_ES QB1_EX1
&
1
1
QB1REL QB1ITL
&
&
en04000528.vsd
IEC04000528 V1 EN
1MRK505183-UEN C
Section 12 Control
VPQA1 VPQB1 VPQC1 VPQC2 VPQC21 QA1_OP QB1_OP QC1_OP QC2_OP QC21_OP EXDU_ES
&
1
1
QB2REL QB2ITL
QB2_EX1
&
&
en04000529.vsd
IEC04000529 V1 EN
Section 12 Control
1MRK505183-UEN C
VPQC9 VPQC71 VP_BB7_D VP_BC_17 VP_BC_27 QC9_OP QC71_OP EXDU_ES BB7_D_OP EXDU_BPB BC_17_OP BC_27_OP EXDU_BC QB7_EX1 VPQA1 VPQB1 VPQC9 VPQB9 VPQC71 VP_BB7_D VP_BC_17 QA1_CL QB1_CL QC9_OP QB9_CL QC71_OP EXDU_ES BB7_D_OP EXDU_BPB BC_17_CL EXDU_BC QB7_EX2
&
>1
1
QB7REL QB7ITL
&
IEC04000530 V1 EN
1MRK505183-UEN C
Section 12 Control
VPQA1 VPQB2 VPQC9 VPQB9 VPQC71 VP_BB7_D VP_BC_27 QA1_CL QB2_CL QC9_OP QB9_CL QC71_OP EXDU_ES BB7_D_OP EXDU_BPB BC_27_CL EXDU_BC QB7_EX3 VPQC9 VPQC71 QC9_CL QC71_CL EXDU_ES QB7_EX4 VPQB1 VPQB2 VPQB9 QB1_OP QB2_OP QB9_OP VPQB7 VPQB9 VPVOLT QB7_OP QB9_OP VOLT_OFF
IEC04000531 V1 EN
&
>1
&
&
1 1
&
1
QC9REL QC9ITL
en04000531.vsd
Section 12 Control
1MRK505183-UEN C
QB1_OP QB1_CL VPQB1 QB2_OP QB2_CL VPQB2 QB7_OP QB7_CL VPQB7 QB1_OP QB2_OP VPQB1 VPQB2
IEC04000532 V1 EN
QB1OPTR QB1CLTR VPQB1TR QB2OPTR QB2CLTR VPQB2TR QB7OPTR QB7CLTR VPQB7TR >1 & QB12OPTR QB12CLTR VPQB12TR
en04000532.vsd
12.4.10.4
1MRK505183-UEN C
Section 12 Control
Name QC21_CL QC71_OP QC71_CL BB7_D_OP BC_12_CL BC_17_OP BC_17_CL BC_27_OP BC_27_CL VOLT_OFF VOLT_ON VP_BB7_D VP_BC_12 VP_BC_17 VP_BC_27 EXDU_ES EXDU_BPB EXDU_BC QB9_EX1 QB9_EX2 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 QB7_EX1 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Description Earthing switch QC21 on busbar WA2 is in closed position Earthing switch QC71 on busbar WA7 is in open position Earthing switch QC71 on busbar WA7 is in closed position Disconnectors on busbar WA7 except in the own bay are open A bus coupler connection exists between busbar WA1 and WA2 No bus coupler connection exists between busbar WA1 and WA7 A bus coupler connection exists between busbar WA1 and WA7 No bus coupler connection exists between busbar WA2 and WA7 A bus coupler connection exists between busbar WA2 and WA7 There is no voltage on the line and not VT (fuse) failure There is voltage on the line or there is a VT (fuse) failure Switch status of the disconnectors on busbar WA7 are valid Status of the bus coupler app. between WA1 and WA2 are valid Status of the bus coupler app. between WA1 and WA7 are valid Status of the bus coupler app. between WA2 and WA7 are valid No transm error from any bay containing earthing switches No transm error from any bay with disconnectors on WA7 No transmission error from any bus coupler bay External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB7
Section 12 Control
Name QB7_EX2 QB7_EX3 QB7_EX4 Type BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description
1MRK505183-UEN C
External condition for apparatus QB7 External condition for apparatus QB7 External condition for apparatus QB7
Table 349:
Name QA1CLREL QA1CLITL QB9REL QB9ITL QB1REL QB1ITL QB2REL QB2ITL QB7REL QB7ITL QC1REL QC1ITL QC2REL QC2ITL QC9REL QC9ITL QB1OPTR QB1CLTR QB2OPTR QB2CLTR QB7OPTR QB7CLTR QB12OPTR QB12CLTR VPQB1TR VPQB2TR VPQB7TR VPQB12TR
12.4.11
1MRK505183-UEN C
Section 12 Control
Introduction
The interlocking for transformer bay (AB_TRAFO) function is used for a transformer bay connected to a double busbar arrangement according to figure 329. The function is used when there is no disconnector between circuit breaker and transformer. Otherwise, the interlocking for line bay (ABC_LINE) function can be used. This function can also be used in single busbar arrangements.
WA1 (A) WA2 (B) QB1 QB2 QC1 QA1 AB_TRAFO QC2
12.4.11.1
en04000515.vsd
IEC04000515 V1 EN
Figure 329:
Section 12 Control
12.4.11.2 Function block
AB_TRAFO QA1_OP QA1CLREL QA1_CL QA1CLITL QB1_OP QB1REL QB1_CL QB1ITL QB2_OP QB2REL QB2_CL QB2ITL QC1_OP QC1REL QC1_CL QC1ITL QC2_OP QC2REL QC2_CL QC2ITL QB3_OP QB1OPTR QB3_CL QB1CLTR QB4_OP QB2OPTR QB4_CL QB2CLTR QC3_OP QB12OPTR QC3_CL QB12CLTR QC11_OP VPQB1TR QC11_CL VPQB2TR QC21_OP VPQB12TR QC21_CL BC_12_CL VP_BC_12 EXDU_ES EXDU_BC QA1_EX1 QA1_EX2 QA1_EX3 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 IEC05000358-2-en.vsd
IEC05000358 V2 EN
1MRK505183-UEN C
Figure 330:
1MRK505183-UEN C
Section 12 Control
Logic diagram
QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QC1_OP QC1_CL QC2_OP QC2_CL QB3_OP QB3_CL QB4_OP QB4_CL QC3_OP QC3_CL QC11_OP QC11_CL QC21_OP QC21_CL VPQB1 VPQB2 VPQC1 VPQC2 VPQB3 VPQB4 VPQC3 QA1_EX2 QC3_OP QA1_EX3 QC1_CL QC2_CL QC3_CL QA1_EX1 AB_TRAFO =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 &
1
12.4.11.3
VPQA1 VPQB1 VPQB2 VPQC1 VPQC2 VPQB3 VPQB4 VPQC3 VPQC11 VPQC21 QA1CLREL QA1CLITL
>1 &
en04000538.vsd
IEC04000538 V1 EN
VPQA1 VPQB2 VPQC1 VPQC2 VPQC3 VPQC11 QA1_OP QB2_OP QC1_OP QC2_OP QC3_OP QC11_OP EXDU_ES QB1_EX1 VPQB2 VPQC3 VP_BC_12 QB2_CL QC3_OP BC_12_CL EXDU_BC QB1_EX2 VPQC1 VPQC2 VPQC3 VPQC11 QC1_CL QC2_CL QC3_CL QC11_CL EXDU_ES QB1_EX3
&
>1
1
QB1REL QB1ITL
&
&
en04000539.vsd
IEC04000539 V1 EN
Section 12 Control
1MRK505183-UEN C
VPQA1 VPQB1 VPQC1 VPQC2 VPQC3 VPQC21 QA1_OP QB1_OP QC1_OP QC2_OP QC3_OP QC21_OP EXDU_ES QB2_EX1 VPQB1 VPQC3 VP_BC_12 QB1_CL QC3_OP BC_12_CL EXDU_BC QB2_EX2 VPQC1 VPQC2 VPQC3 VPQC21 QC1_CL QC2_CL QC3_CL QC21_CL EXDU_ES QB2_EX3
&
>1
1
QB2REL QB2ITL
&
&
en04000540.vsd
IEC04000540 V1 EN
VPQB1 VPQB2 VPQB3 VPQB4 QB1_OP QB2_OP QB3_OP QB4_OP QB1_OP QB1_CL VPQB1 QB2_OP QB2_CL VPQB2 QB1_OP QB2_OP VPQB1 VPQB2
IEC04000541 V1 EN
&
1 1
>1 &
12.4.11.4
1MRK505183-UEN C
Section 12 Control
Name QC2_OP QC2_CL QB3_OP QB3_CL QB4_OP QB4_CL QC3_OP QC3_CL QC11_OP QC11_CL QC21_OP QC21_CL BC_12_CL VP_BC_12 EXDU_ES EXDU_BC QA1_EX1 QA1_EX2 QA1_EX3 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Description QC2 is in open position QC2 is in closed position QB3 is in open position QB3 is in closed position QB4 is in open position QB4 is in closed position QC3 is in open position QC3 is in closed position QC11 on busbar WA1 is in open position QC11 on busbar WA1 is in closed position QC21 on busbar WA2 is in open position QC21 on busbar WA2 is in closed position A bus coupler connection exists between busbar WA1 and WA2 Status of the bus coupler app. between WA1 and WA2 are valid No transm error from any bay containing earthing switches No transmission error from any bus coupler bay External condition for apparatus QA1 External condition for apparatus QA1 External condition for apparatus QA1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB2
Table 351:
Name QA1CLREL QA1CLITL QB1REL QB1ITL QB2REL QB2ITL QC1REL QC1ITL QC2REL
Section 12 Control
Name QC2ITL QB1OPTR QB1CLTR QB2OPTR QB2CLTR QB12OPTR QB12CLTR VPQB1TR VPQB2TR VPQB12TR Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description
1MRK505183-UEN C
Switching of QC2 is forbidden QB1 is in open position QB1 is in closed position QB2 is in open position QB2 is in closed position QB1 or QB2 or both are in open position QB1 and QB2 are not in open position Switch status of QB1 is valid (open or closed) Switch status of QB2 is valid (open or closed) Switch status of QB1 and QB2 are valid (open or closed)
12.4.12
12.4.12.1
12.4.12.2
Logic diagram
Position including quality
POSITION POS_EVAL OPENPOS CLOSEPOS
IEC08000469-1-en.vsd
IEC08000469-1-EN V1 EN
Only the value, open/close, and status is used in this function. Time information is not used.
Input position (Value) 0 (Breaker intermediate) 1 (Breaker open) 2 (Breaker closed) 3 (Breaker faulty) Any Any Signal quality Good Good Good Good Invalid Oscillatory Output OPENPOS 0 1 0 0 0 0 Output CLOSEPOS 0 0 1 0 0 0
1MRK505183-UEN C
Section 12 Control
Function block
POSITION POS_EVAL OPENPOS CLOSEPOS IEC09000079_1_en.vsd
IEC09000079 V1 EN
12.4.12.3
Figure 331:
12.4.12.4
Table 353:
Name OPENPOS CLOSEPOS
12.5
Logic rotating switch for function selection and LHMI presentation SLGGIO
Function description Logic rotating switch for function selection and LHMI presentation IEC 61850 identification SLGGIO IEC 60617 identification ANSI/IEEE C37.2 device number -
12.5.1
Introduction
The logic rotating switch for function selection and LHMI presentation function (SLGGIO) (or the selector switch function block) is used to get a selector switch functionality similar with the one provided by a hardware selector switch. Hardware selector switches are used extensively by utilities, in order to have different functions operating on pre-set values. Hardware switches are however sources for maintenance issues, lower system reliability and extended purchase portfolio. The virtual selector switches eliminate all these problems.
12.5.2
Principle of operation
The logic rotating switch for function selection and LHMI presentation (SLGGIO) function has two operating inputs UP and DOWN. When a signal is received on the UP input, the block will activate the output next to the present activated output,
607
Section 12 Control
1MRK505183-UEN C
in ascending order (if the present activated output is 3 for example and one operates the UP input, then the output 4 will be activated). When a signal is received on the DOWN input, the block will activate the output next to the present activated output, in descending order (if the present activated output is 3 for example and one operates the DOWN input, then the output 2 will be activated). Depending on the output settings the output signals can be steady or pulsed. In case of steady signals, in case of UP or DOWN operation, the previously active output will be deactivated. Also, depending on the settings one can have a time delay between the UP or DOWN activation signal positive front and the output activation. Besides the inputs visible in the application configuration in the Application Configuration tool, there are other possibilities that will allow an user to set the desired position directly (without activating the intermediate positions), either locally or remotely, using a select before execute dialog. One can block the function operation, by activating the BLOCK input. In this case, the present position will be kept and further operation will be blocked. The operator place (local or remote) is specified through the PSTO input. If any operation is allowed the signal INTONE from the Fixed signal function block can be connected. SLGGIO function block has also an integer value output, that generates the actual position number. The positions and the block names are fully settable by the user. These names will appear in the menu, so the user can see the position names instead of a number.
1MRK505183-UEN C
Section 12 Control
Functionality and behaviour
Control Measurements Events Disturbance records Settings Diagnostics Test Reset Authorization Language Control Single Line Diagram Commands Ctrl/Com Single Command Selector Switch (GGIO)
12.5.2.1
1
../Ctrl/Com/Sel Sw SLGGIO1 SLGGIO2 .. .. SLGGIO15
2
../Com/Sel Sw/ SLGGIO3 Damage ctrl
3 4
P:Disc All OK
N: Disc Fe Cancel
4 5
../Com/Sel Sw/ DmgCtrl Damage ctrl:
E
Modify the position with arrows. The pos will not be modified (outputs will not be activated) until you press the E-button for O.K.
IEC06000420 V2 EN
The dialog window that appears shows the present position (P:) and the new position (N:), both in clear names, given by the user (max. 13 characters).
IEC06000420-2-en.vsd
Figure 332: Example 1 on handling the switch from the local HMI. From the local HMI:
1 SLGGIO instances in the ACT application configuration 2 Switch name given by the user (max 13 characters) 3 Position number, up to 32 positions 4 Change position 5 New position
12.5.2.2
Graphical display
There are two possibilities for SLGGIO
Section 12 Control
1MRK505183-UEN C
if it is used just for the monitoring, the switches will be listed with their actual position names, as defined by the user (max. 13 characters). if it is used for control, the switches will be listed with their actual positions, but only the first three letters of the name will be used.
In both cases, the switch full name will be shown, but the user has to redefine it when building the Graphical Display Editor, under the "Caption". If used for the control, the following sequence of commands will ensure:
Change to the "Switches" page of the SLD by left-right arrows. Select switch by up-down arrows
Control Measurements Events Disturbance records Settings Diagnostics Test Reset Authorization Language
../Control/SLD/Switch SMBRREC control WFM Pilot setup OFF Damage control DAL
O E
../Control/SLD/Switch SMBRREC control WFM Pilot setup OFF P: Disc OK N: Disc Fe Cancel
The pos will not be modified (outputs will not be activated) until you press the E-button for O.K.
../Control/SLD/Switch SMBRREC control WFM Pilot setup OFF Damage control DFW
IEC06000421-2-en.vsd
IEC06000421 V2 EN
Figure 333: Example 2 on handling the switch from the local HMI. From the single line diagram on local HMI.
1MRK505183-UEN C
12.5.3
Figure 334:
12.5.4
Table 355:
Name SWPOS01 SWPOS02 SWPOS03 SWPOS04 SWPOS05
Section 12 Control
Name SWPOS06 SWPOS07 SWPOS08 SWPOS09 SWPOS10 SWPOS11 SWPOS12 SWPOS13 SWPOS14 SWPOS15 SWPOS16 SWPOS17 SWPOS18 SWPOS19 SWPOS20 SWPOS21 SWPOS22 SWPOS23 SWPOS24 SWPOS25 SWPOS26 SWPOS27 SWPOS28 SWPOS29 SWPOS30 SWPOS31 SWPOS32 SWPOSN Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER Description Selector switch position 6 Selector switch position 7 Selector switch position 8 Selector switch position 9 Selector switch position 10 Selector switch position 11 Selector switch position 12 Selector switch position 13 Selector switch position 14 Selector switch position 15 Selector switch position 16 Selector switch position 17 Selector switch position 18 Selector switch position 19 Selector switch position 20 Selector switch position 21 Selector switch position 22 Selector switch position 23 Selector switch position 24 Selector switch position 25 Selector switch position 26 Selector switch position 27 Selector switch position 28 Selector switch position 29 Selector switch position 30 Selector switch position 31 Selector switch position 32 Switch position (integer)
1MRK505183-UEN C
12.5.5
Table 356:
Name Operation NrPos OutType
Setting parameters
SLGGIO Non group settings (basic)
Values (Range) Off On 2 - 32 Pulsed Steady Unit Step 1 Default Off 32 Steady Description Operation Off/On Number of positions in the switch Output type, steady or pulse
1MRK505183-UEN C
Section 12 Control
Values (Range) 0.000 - 60.000 0.000 - 60000.000 Disabled Enabled Unit s s Step 0.001 0.010 Default 0.200 0.000 Disabled Description Operate pulse duration, in [s] Time delay on the output, in [s] Stop when min or max position is reached
12.6
12.6.1
Introduction
Selector mini switch (VSGGIO) function block is a multipurpose function used in the configuration tool in PCM600 for a variety of applications, as a general purpose switch. VSGGIO can be controlled from the menu or from a symbol on the single line diagram (SLD) on the local HMI.
12.6.2
Principle of operation
Selector mini switch (VSGGIO) function can be used for double purpose, in the same way as switch controller (SCSWI) functions are used: for indication on the single line diagram (SLD). Position is received through the IPOS1 and IPOS2 inputs and distributed in the configuration through the POS1 and POS2 outputs, or to IEC 61850 through reporting, or GOOSE. for commands that are received via the local HMI or IEC 61850 and distributed in the configuration through outputs CMDPOS12 and CMDPOS21. The output CMDPOS12 is set when the function receives a CLOSE command from the local HMI when the SLD is displayed and the object is chosen. The output CMDPOS21 is set when the function receives an OPEN command from the local HMI when the SLD is displayed and the object is chosen. It is important for indication in the SLD that the a symbol is associated with a controllable object, otherwise the symbol won't be displayed on the screen. A symbol is created and configured in GDE tool in PCM600. The PSTO input is connected to the Local remote switch to have a selection of operators place , operation from local HMI (Local) or through IEC 61850
Section 12 Control
1MRK505183-UEN C
(Remote). An INTONE connection from Fixed signal function block (FXDSIGN) will allow operation from local HMI. As it can be seen, both indications and commands are done in double-bit representation, where a combination of signals on both inputs/outputs generate the desired result. The following table shows the relationship between IPOS1/IPOS2 inputs and the name of the string that is shown on the SLD. The value of the strings are set in PST.
IPOS1 0 1 0 1 IPOS2 0 0 1 1 Name of displayed string Default string value PosUndefined Position1 Position2 PosBadState P00 P01 P10 P11
12.6.3
Function block
VSGGIO BLOCK PSTO IPOS1 IPOS2 BLOCKED POSITION POS1 POS2 CMDPOS12 CMDPOS21 IEC06000508-2-en.vsd
IEC06000508 V3 EN
Figure 335:
12.6.4
Table 358:
Name BLOCKED POSITION POS1
1MRK505183-UEN C
Section 12 Control
Name POS2 CMDPOS12 CMDPOS21 Type BOOLEAN BOOLEAN BOOLEAN Description Position 2 indication, logical signal Execute command from position 1 to position 2 Execute command from position 2 to position 1
12.6.5
Table 359:
Name Operation CtlModel Mode tSelect tPulse
Setting parameters
VSGGIO Non group settings (basic)
Values (Range) Off On Dir Norm SBO Enh Steady Pulsed 0.000 - 60.000 0.000 - 60.000 Unit s s Step 0.001 0.001 Default Off Dir Norm Pulsed 30.000 0.200 Description Operation Off / On Specifies the type for control model according to IEC 61850 Operation mode Max time between select and execute signals Command pulse lenght
12.7
12.7.1
Introduction
The IEC 61850 generic communication I/O functions (DPGGIO) function block is used to send three logical signals to other systems or equipment in the substation. It is especially used in the interlocking and reservation station-wide logics.
12.7.2
Principle of operation
Upon receiving the input signals, the IEC 61850 generic communication I/O functions (DPGGIO) function block will send the signals over IEC 61850-8-1 to the equipment or system that requests these signals. To be able to get the signals, other tools must be used, as described in the application manual, to PCM600 must be used to define which function block in which equipment or system should receive this information.
1MRK505183-UEN C
IEC07000200-2-en.vsd
IEC07000200 V2 EN
Figure 336:
12.7.4
Table 361:
Name POSITION
12.7.5
Settings
The function does not have any parameters available in the local HMI or PCM600.
12.8
12.8.1
Introduction
The Single point generic control 8 signals (SPC8GGIO) function block is a collection of 8 single point commands, designed to bring in commands from REMOTE (SCADA) to those parts of the logic configuration that do not need complicated function blocks that have the capability to receive commands (for example, SCSWI). In this way, simple commands can be sent directly to the IED outputs, without confirmation. Confirmation (status) of the result of the commands
1MRK505183-UEN C
Section 12 Control
is supposed to be achieved by other means, such as binary inputs and SPGGIO function blocks.
12.8.2
Principle of operation
The PSTO input will determine which the allowed position for the operator (LOCAL, REMOTE, ALL) is. Upon sending a command from an allowed operator position, one of the 8 outputs will be activated. The settings Latchedx and tPulsex (where x is the respective output) will determine if the signal will be pulsed (and how long the pulse is) or latched (steady). BLOCK will block the operation of the function in case a command is sent, no output will be activated. PSTO is the universal operator place selector for all control functions. Even if PSTO can be configured to allow LOCAL or ALL operator positions, the only functional position usable with the SPC8GGIO function block is REMOTE.
12.8.3
Function block
SPC8GGIO BLOCK PSTO ^OUT1 ^OUT2 ^OUT3 ^OUT4 ^OUT5 ^OUT6 ^OUT7 ^OUT8 IEC07000143-2-en.vsd
IEC07000143 V2 EN
Figure 337:
12.8.4
Table 363:
Name OUT1 OUT2 OUT3 OUT4
Section 12 Control
Name OUT5 OUT6 OUT7 OUT8 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Output5 Output6 Output7 Output8
1MRK505183-UEN C
12.8.5
Table 364:
Name Operation Latched1 tPulse1 Latched2 tPulse2 Latched3 tPulse3 Latched4 tPulse4 Latched5 tPulse5 Latched6 tPulse6 Latched7 tPulse7 Latched8 tPulse8
Setting parameters
SPC8GGIO Non group settings (basic)
Values (Range) Off On Pulsed Latched 0.01 - 6000.00 Pulsed Latched 0.01 - 6000.00 Pulsed Latched 0.01 - 6000.00 Pulsed Latched 0.01 - 6000.00 Pulsed Latched 0.01 - 6000.00 Pulsed Latched 0.01 - 6000.00 Pulsed Latched 0.01 - 6000.00 Pulsed Latched 0.01 - 6000.00 Unit s s s s s s s s Step 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 Default Off Pulsed 0.10 Pulsed 0.10 Pulsed 0.10 Pulsed 0.10 Pulsed 0.10 Pulsed 0.10 Pulsed 0.10 Pulsed 0.10 Description Operation Off/On Setting for pulsed/latched mode for output 1 Output1 Pulse Time Setting for pulsed/latched mode for output 2 Output2 Pulse Time Setting for pulsed/latched mode for output 3 Output3 Pulse Time Setting for pulsed/latched mode for output 4 Output4 Pulse Time Setting for pulsed/latched mode for output 5 Output5 Pulse Time Setting for pulsed/latched mode for output 6 Output6 Pulse Time Setting for pulsed/latched mode for output 7 Output7 Pulse Time Setting for pulsed/latched mode for output 8 Output8 pulse time
12.9
1MRK505183-UEN C
Section 12 Control
Function description AutomationBits, command function for DNP3.0 IEC 61850 identification AUTOBITS IEC 60617 identification ANSI/IEEE C37.2 device number -
12.9.1
Introduction
AutomationBits function for DNP3 (AUTOBITS) is used within PCM600 to get into the configuration of the commands coming through the DNP3 protocol. The AUTOBITS function plays the same role as functions GOOSEBINRCV (for IEC 61850) and MULTICMDRCV (for LON).
12.9.2
Principle of operation
AutomationBits function (AUTOBITS) has 32 individual outputs which each can be mapped as a Binary Output point in DNP3. The output is operated by a "Object 12" in DNP3. This object contains parameters for control-code, count, on-time and off-time. To operate an AUTOBITS output point, send a control-code of latch-On, latch-Off, pulse-On, pulse-Off, Trip or Close. The remaining parameters will be regarded were appropriate. ex: pulse-On, on-time=100, off-time=300, count=5 would give 5 positive 100 ms pulses, 300 ms apart. There is a BLOCK input signal, which will disable the operation of the function, in the same way the setting Operation: On/Off does. That means that, upon activation of the BLOCK input, all 32 CMDBITxx outputs will be set to 0. The BLOCK acts like an overriding, the function still receives data from the DNP3 master. Upon deactivation of BLOCK, all the 32 CMDBITxx outputs will be set by the DNP3 master again, momentarily. For AUTOBITS , the PSTO input determines the operator place. The command can be written to the block while in Remote. If PSTO is in Local then no change is applied to the outputs.
1MRK505183-UEN C
Figure 338:
12.9.4
Table 366:
Name CMDBIT1 CMDBIT2 CMDBIT3 CMDBIT4 CMDBIT5 CMDBIT6 CMDBIT7 CMDBIT8
1MRK505183-UEN C
Section 12 Control
Name CMDBIT9 CMDBIT10 CMDBIT11 CMDBIT12 CMDBIT13 CMDBIT14 CMDBIT15 CMDBIT16 CMDBIT17 CMDBIT18 CMDBIT19 CMDBIT20 CMDBIT21 CMDBIT22 CMDBIT23 CMDBIT24 CMDBIT25 CMDBIT26 CMDBIT27 CMDBIT28 CMDBIT29 CMDBIT30 CMDBIT31 CMDBIT32 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Command out bit 9 Command out bit 10 Command out bit 11 Command out bit 12 Command out bit 13 Command out bit 14 Command out bit 15 Command out bit 16 Command out bit 17 Command out bit 18 Command out bit 19 Command out bit 20 Command out bit 21 Command out bit 22 Command out bit 23 Command out bit 24 Command out bit 25 Command out bit 26 Command out bit 27 Command out bit 28 Command out bit 29 Command out bit 30 Command out bit 31 Command out bit 32
12.9.5
Table 367:
Name Operation
Setting parameters
AUTOBITS Non group settings (basic)
Values (Range) Off On Unit Step Default Off Description Operation Off / On
Table 368:
Name Operation
Section 12 Control
1MRK505183-UEN C
Table 369:
Name Operation BaudRate
WireMode
Two-wire
Table 370:
Name DLinkConfirm
s s -
0.001 1 0.001 1 1 1 -
Data-link confirm timeout in s Data-link maximum retries Rx to Tx minimum delay in s Application layer maximum Rx fragment size Application layer maximum Tx fragment size Stop bits Parity
s s s s
RTS warm-up in s RTS warm-down in s RS485 back-off delay in s RS485 maximum back-off random delay in s
Table 371:
Name Operation
1 1 1 1
TCP/IP listen port UDP port to accept UDP datagrams from master UDP portfor initial NULL response UDP port to remote client/master
1MRK505183-UEN C
Section 12 Control
Table 372:
Name ApLayMaxRxSize ApLayMaxTxSize
Table 373:
Name Operation
1 1 1 1
TCP/IP listen port UDP port to accept UDP datagrams from master UDP port for initial NULL response UDP port to remote client/master
Table 374:
Name ApLayMaxRxSize ApLayMaxTxSize
Table 375:
Name Operation
1 1 1 1
TCP/IP listen port UDP port to accept UDP datagrams from master UDP port for initial NULL response UDP port to remote client/master
Table 376:
Name ApLayMaxRxSize ApLayMaxTxSize
Section 12 Control
1MRK505183-UEN C
Table 377:
Name Operation
1 1 1 1
TCP/IP listen port UDP port to accept UDP datagrams from master UDP port for initial NULL response UDP port to remote client/master
Table 378:
Name ApLayMaxRxSize ApLayMaxTxSize
Table 379:
Name Operation SlaveAddress MasterAddres Obj1DefVar Obj2DefVar
Obj4DefVar
3:DIChWithRelTim e
Obj10DefVar Obj20DefVar
2:BOStatus 5:BinCnt32WoutF
1MRK505183-UEN C
Section 12 Control
Values (Range) 1:BinCnt32EvWout T 2:BinCnt16EvWout T 5:BinCnt32EvWith T 6:BinCnt16EvWith T 1:AI32Int 2:AI16Int 3:AI32IntWithoutF 4:AI16IntWithoutF 5:AI32FltWithF 6:AI64FltWithF 1:AI32IntEvWoutF 2:AI16IntEvWoutF 3:AI32IntEvWithFT 4:AI16IntEvWithFT 5:AI32FltEvWithF 6:AI64FltEvWithF 7:AI32FltEvWithFT 8:AI64FltEvWithFT Unit Step Default 1:BinCnt32EvWou tT Description Object 22, default variation
Name Obj22DefVar
Obj30DefVar
3:AI32IntWithoutF
Obj32DefVar
1:AI32IntEvWoutF
Table 380:
Name ValMasterAddr AddrQueryEnbl tApplConfTout ApplMultFrgRes ConfMultFrag UREnable URSendOnline UREvClassMask
s s -
1 0.01 0.01 1
5 5.00 30.00 5
Unsolicited response retries before offline retry mode Unsolicited response retry delay in s Unsolicited response off-line retry delay in s Unsolicited response class 1 event count report treshold
Section 12 Control
Name tUREvBufTout1 UREvCntThold2 tUREvBufTout2 UREvCntThold3 tUREvBufTout3 DelOldBufFull tSynchTimeout TSyncReqAfTout DNPToSetTime Averag3TimeReq PairedPoint tSelectTimeout Values (Range) 0.00 - 60.00 1 - 100 0.00 - 60.00 1 - 100 0.00 - 60.00 No Yes 30 - 3600 No Yes No Yes No Yes No Yes 1.0 - 60.0 Unit s s s s s Step 0.01 1 0.01 1 0.01 1 0.1 Default 5.00 5 5.00 5 5.00 No 1800 No Yes No Yes 30.0 Description
1MRK505183-UEN C
Unsolicited response class 1 event buffer timeout Unsolicited response class 2 event count report treshold Unsolicited response class 2 event buffer timeout Unsolicited response class 3 event count report treshold Unsolicited response class 3 event buffer timeout Delete oldest event when buffer is full Time synch timeout before error status is generated Time synchronization request after timeout Allow DNP to set time in IED Use average of 3 time requests Enable paired point Select timeout
Table 381:
Name Operation SlaveAddress MasterAddres ValMasterAddr MasterIP-Addr MasterIPNetMsk Obj1DefVar Obj2DefVar
Obj4DefVar
3:DIChWithRelTim e
Obj10DefVar
2:BOStatus
1MRK505183-UEN C
Section 12 Control
Values (Range) 1:BinCnt32 2:BinCnt16 5:BinCnt32WoutF 6:BinCnt16WoutF 1:BinCnt32EvWout T 2:BinCnt16EvWout T 5:BinCnt32EvWith T 6:BinCnt16EvWith T 1:AI32Int 2:AI16Int 3:AI32IntWithoutF 4:AI16IntWithoutF 5:AI32FltWithF 6:AI64FltWithF 1:AI32IntEvWoutF 2:AI16IntEvWoutF 3:AI32IntEvWithFT 4:AI16IntEvWithFT 5:AI32FltEvWithF 6:AI64FltEvWithF 7:AI32FltEvWithFT 8:AI64FltEvWithFT Unit Step Default 5:BinCnt32WoutF Description Object 20, default variation
Name Obj20DefVar
Obj22DefVar
1:BinCnt32EvWou tT
Obj30DefVar
3:AI32IntWithoutF
Obj32DefVar
1:AI32IntEvWoutF
Table 382:
Name AddrQueryEnbl tApplConfTout ApplMultFrgRes ConfMultFrag UREnable URSendOnline UREvClassMask
s s
1 0.01 0.01
5 5.00 30.00
Unsolicited response retries before offline retry mode Unsolicited response retry delay in s Unsolicited response off-line retry delay in s
Section 12 Control
Name UREvCntThold1 tUREvBufTout1 UREvCntThold2 tUREvBufTout2 UREvCntThold3 tUREvBufTout3 DelOldBufFull tSynchTimeout TSyncReqAfTout DNPToSetTime Averag3TimeReq PairedPoint tSelectTimeout tBrokenConTout tKeepAliveT Values (Range) 1 - 100 0.00 - 60.00 1 - 100 0.00 - 60.00 1 - 100 0.00 - 60.00 No Yes 30 - 3600 No Yes No Yes No Yes No Yes 1.0 - 60.0 0 - 3600 0 - 3600 Unit s s s s s s s Step 1 0.01 1 0.01 1 0.01 1 0.1 1 1 Default 5 5.00 5 5.00 5 5.00 No 1800 No No No Yes 30.0 0 10 Description
1MRK505183-UEN C
Unsolicited response class 1 event count report treshold Unsolicited response class 1 event buffer timeout Unsolicited response class 2 event count report treshold Unsolicited response class 2 event buffer timeout Unsolicited response class 3 event count report treshold Unsolicited response class 3 event buffer timeout Delete oldest event when buffer is full Time synch timeout before error status is generated Time synchronization request after timeout Allow DNP to set time in IED Use average of 3 time requests Enable paired point Select timeout Broken connection timeout Keep-Alive timer
Table 383:
Name Operation SlaveAddress MasterAddres ValMasterAddr MasterIP-Addr MasterIPNetMsk Obj1DefVar Obj2DefVar
1MRK505183-UEN C
Section 12 Control
Values (Range) 1:DIChWithoutTim e 2:DIChWithTime 3:DIChWithRelTim e 1:BO 2:BOStatus 1:BinCnt32 2:BinCnt16 5:BinCnt32WoutF 6:BinCnt16WoutF 1:BinCnt32EvWout T 2:BinCnt16EvWout T 5:BinCnt32EvWith T 6:BinCnt16EvWith T 1:AI32Int 2:AI16Int 3:AI32IntWithoutF 4:AI16IntWithoutF 5:AI32FltWithF 6:AI64FltWithF 1:AI32IntEvWoutF 2:AI16IntEvWoutF 3:AI32IntEvWithFT 4:AI16IntEvWithFT 5:AI32FltEvWithF 6:AI64FltEvWithF 7:AI32FltEvWithFT 8:AI64FltEvWithFT Unit Step Default 3:DIChWithRelTim e Description Object 4, default variation
Name Obj4DefVar
Obj10DefVar Obj20DefVar
2:BOStatus 5:BinCnt32WoutF
Obj22DefVar
1:BinCnt32EvWou tT
Obj30DefVar
3:AI32IntWithoutF
Obj32DefVar
1:AI32IntEvWoutF
Table 384:
Name AddrQueryEnbl tApplConfTout ApplMultFrgRes ConfMultFrag UREnable URSendOnline
Section 12 Control
Name UREvClassMask Values (Range) Off Class 1 Class 2 Class 1 and 2 Class 3 Class 1 and 3 Class 2 and 3 Class 1, 2 and 3 0 - 10 0.00 - 60.00 0.00 - 60.00 1 - 100 0.00 - 60.00 1 - 100 0.00 - 60.00 1 - 100 0.00 - 60.00 No Yes 30 - 3600 No Yes No Yes No Yes No Yes 1.0 - 60.0 0 - 3600 0 - 3600 Unit Step Default Off Description
1MRK505183-UEN C
UROfflineRetry tURRetryDelay tUROfflRtryDel UREvCntThold1 tUREvBufTout1 UREvCntThold2 tUREvBufTout2 UREvCntThold3 tUREvBufTout3 DelOldBufFull tSynchTimeout TSyncReqAfTout DNPToSetTime Averag3TimeReq PairedPoint tSelectTimeout tBrokenConTout tKeepAliveT
s s s s s s s s s
Unsolicited response retries before offline retry mode Unsolicited response retry delay in s Unsolicited response off-line retry delay in s Unsolicited response class 1 event count report treshold Unsolicited response class 1 event buffer timeout Unsolicited response class 2 event count report treshold Unsolicited response class 2 event buffer timeout Unsolicited response class 3 event count report treshold Unsolicited response class 3 event buffer timeout Delete oldest event when buffer is full Time synch timeout before error status is generated Time synchronization request after timeout Allow DNP to set time in IED Use average of 3 time requests Enable paired point Select timeout Broken connection timeout Keep-Alive timer
Table 385:
Name Operation SlaveAddress MasterAddres
1MRK505183-UEN C
Section 12 Control
Values (Range) No Yes 0 - 18 0 - 18 1:BISingleBit 2:BIWithStatus 1:BIChWithoutTim e 2:BIChWithTime 3:BIChWithRelTim e 1:DIChWithoutTim e 2:DIChWithTime 3:DIChWithRelTim e 1:BO 2:BOStatus 1:BinCnt32 2:BinCnt16 5:BinCnt32WoutF 6:BinCnt16WoutF 1:BinCnt32EvWout T 2:BinCnt16EvWout T 5:BinCnt32EvWith T 6:BinCnt16EvWith T 1:AI32Int 2:AI16Int 3:AI32IntWithoutF 4:AI16IntWithoutF 5:AI32FltWithF 6:AI64FltWithF 1:AI32IntEvWoutF 2:AI16IntEvWoutF 3:AI32IntEvWithFT 4:AI16IntEvWithFT 5:AI32FltEvWithF 6:AI64FltEvWithF 7:AI32FltEvWithFT 8:AI64FltEvWithFT Unit Step 1 1 Default Yes 0.0.0.0 255.255.255.255 1:BISingleBit 3:BIChWithRelTim e Description Validate source (master) address Master IP-address Master IP net mask Object 1, default variation Object 2, default variation
Obj4DefVar
3:DIChWithRelTim e
Obj10DefVar Obj20DefVar
2:BOStatus 5:BinCnt32WoutF
Obj22DefVar
1:BinCnt32EvWou tT
Obj30DefVar
3:AI32IntWithoutF
Obj32DefVar
1:AI32IntEvWoutF
Table 386:
Name AddrQueryEnbl tApplConfTout ApplMultFrgRes
Section 12 Control
Name ConfMultFrag UREnable URSendOnline UREvClassMask Values (Range) No Yes No Yes No Yes Off Class 1 Class 2 Class 1 and 2 Class 3 Class 1 and 3 Class 2 and 3 Class 1, 2 and 3 0 - 10 0.00 - 60.00 0.00 - 60.00 1 - 100 0.00 - 60.00 1 - 100 0.00 - 60.00 1 - 100 0.00 - 60.00 No Yes 30 - 3600 No Yes No Yes No Yes No Yes 1.0 - 60.0 0 - 3600 0 - 3600 Unit Step Default Yes Yes No Off Description
1MRK505183-UEN C
Confirm each multiple fragment Unsolicited response enabled Unsolicited response sends when on-line Unsolicited response, event class mask
UROfflineRetry tURRetryDelay tUROfflRtryDel UREvCntThold1 tUREvBufTout1 UREvCntThold2 tUREvBufTout2 UREvCntThold3 tUREvBufTout3 DelOldBufFull tSynchTimeout TSyncReqAfTout DNPToSetTime Averag3TimeReq PairedPoint tSelectTimeout tBrokenConTout tKeepAliveT
s s s s s s s s s
Unsolicited response retries before offline retry mode Unsolicited response retry delay in s Unsolicited response off-line retry delay in s Unsolicited response class 1 event count report treshold Unsolicited response class 1 event buffer timeout Unsolicited response class 2 event count report treshold Unsolicited response class 2 event buffer timeout Unsolicited response class 3 event count report treshold Unsolicited response class 3 event buffer timeout Delete oldest event when buffer is full Time synch timeout before error status is generated Time synchronization request after timeout Allow DNP to set time in IED Use average of 3 time requests Enable paired point Select timeout Broken connection timeout Keep-Alive timer
1MRK505183-UEN C
Section 12 Control
Table 387:
Name Operation SlaveAddress MasterAddres ValMasterAddr MasterIP-Addr MasterIPNetMsk Obj1DefVar Obj2DefVar
Obj4DefVar
3:DIChWithRelTim e
Obj10DefVar Obj20DefVar
2:BOStatus 5:BinCnt32WoutF
Obj22DefVar
1:BinCnt32EvWou tT
Obj30DefVar
3:AI32IntWithoutF
Obj32DefVar
1:AI32IntEvWoutF
Section 12 Control
1MRK505183-UEN C
Table 388:
Name AddrQueryEnbl tApplConfTout ApplMultFrgRes ConfMultFrag UREnable URSendOnline UREvClassMask
UROfflineRetry tURRetryDelay tUROfflRtryDel UREvCntThold1 tUREvBufTout1 UREvCntThold2 tUREvBufTout2 UREvCntThold3 tUREvBufTout3 DelOldBufFull tSynchTimeout TSyncReqAfTout DNPToSetTime Averag3TimeReq PairedPoint
s s s s s s -
Unsolicited response retries before offline retry mode Unsolicited response retry delay in s Unsolicited response off-line retry delay in s Unsolicited response class 1 event count report treshold Unsolicited response class 1 event buffer timeout Unsolicited response class 2 event count report treshold Unsolicited response class 2 event buffer timeout Unsolicited response class 3 event count report treshold Unsolicited response class 3 event buffer timeout Delete oldest event when buffer is full Time synch timeout before error status is generated Time synchronization request after timeout Allow DNP to set time in IED Use average of 3 time requests Enable paired point
1MRK505183-UEN C
Section 12 Control
Values (Range) 1.0 - 60.0 0 - 3600 0 - 3600 Unit s s s Step 0.1 1 1 Default 30.0 0 10 Description Select timeout Broken connection timeout Keep-Alive timer
12.10
12.10.1
Introduction
The IEDs can receive commands either from a substation automation system or from the local HMI. The command function block has outputs that can be used, for example, to control high voltage apparatuses or for other user defined functionality.
12.10.2
Principle of operation
Single command, 16 signals (SINGLECMD) function has 16 binary output signals. The outputs can be individually controlled from a substation automation system or from the local HMI. Each output signal can be given a name with a maximum of 13 characters in PCM600. The output signals can be of the types Off, Steady, or Pulse. This configuration setting is done via the local HMI or PCM600 and is common for the whole function block. The length of the output pulses are 100 ms. In steady mode, SINGLECMD function has a memory to remember the output values at power interruption of the IED. Also a BLOCK input is available used to block the updating of the outputs. The output signals, OUT1 to OUT16, are available for configuration to built-in functions or via the configuration logic circuits to the binary outputs of the IED.
1MRK505183-UEN C
Figure 339:
12.10.4
Table 390:
Name OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 OUT15 OUT16
1MRK505183-UEN C
12.10.5
Table 391:
Name Mode
638
1MRK505183-UEN C
Section 13
Scheme communication
13.1
13.1.1
Introduction
To achieve instantaneous fault clearance for all line faults, a scheme communication logic is provided. All types of communication schemes for example, permissive underreaching, permissive overreaching, blocking, unblocking, intertrip are available. The built-in communication module (LDCM) can be used for scheme communication signaling when included. Phase segregated communication is also available for correct operation at simultaneous faults when three distance protection communication channels are available between the line ends.
1MRK505183-UEN C
Depending on whether a reverse or forward directed impedance zone is used to issue the send signal, the communication schemes are divided into Blocking and Permissive schemes, respectively. A permissive scheme is inherently faster and has better security against false tripping than a blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast trip, so its dependability is lower than that of a blocking scheme.
13.1.2.1
Blocking scheme
The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is received from the remote IED. The received signal, which shall be connected to CR, is used to not release the zone to be accelerated to clear the fault instantaneously (after time tCoord). The overreaching zone to be accelerated is connected to the input CACC, see figure 340. In case of external faults, the blocking signal (CR) must be received before the settable timer tCoord elapses, to prevent a false trip, see figure 340. The function can be totally blocked by activating the input BLOCK, block of trip by activating the input BLKTR, Block of signal send by activating the input BLKCS.
CACC CR tCoord
AND
TRIP
en05000512.vsd
IEC05000512 V1 EN
Figure 340:
13.1.2.2
1MRK505183-UEN C
CACC CR
tCoord
AND
TRIP
en05000513.vsd
IEC05000513 V1 EN
Figure 341:
The permissive underreaching scheme has the same blocking possibilities as mentioned for blocking scheme.
13.1.2.3
13.1.2.4
Unblocking scheme
In unblocking scheme, the lower dependability in permissive scheme is overcome by using the loss of guard signal from the communication equipment to locally create a receive signal. It is common or suitable to use the function when older, less reliable, power-line carrier (PLC) communication is used. The unblocking function uses a guard signal CRG, which must always be present, even when no CR signal is received. The absence of the CRG signal for a time longer than the setting tSecurity time is used as a CR signal, see figure 342. This also enables a permissive scheme to operate when the line fault blocks the signal transmission. The received signal created by the unblocking function is reset 150 ms after the security timer has elapsed. When that occurs an output signal LCG is activated for signalling purpose. The unblocking function is reset 200 ms after that the guard signal is present again.
1MRK505183-UEN C
en05000746.vsd
IEC05000746 V1 EN
Figure 342:
The unblocking function can be set in three operation modes (setting Unblock):
Off No restart
The unblocking function is out of operation Communication failure shorter than tSecurity will be ignored If CRG disappears a CRL signal will be transferred to the trip logic There will not be any information in case of communication failure (LCG)
Restart
Communication failure shorter than tSecurity will be ignored It sends a defined (150 ms) CRL after the disappearance of the CRG signal The function will activate LCG output in case of communication failure If the communication failure comes and goes (<200 ms) there will not be recurrent signalling
13.1.2.5
Intertrip scheme
In the direct intertrip scheme, the send signal CS is sent from an underreaching zone that is tripping the line. The received signal CR is directly transferred to a TRIP for tripping without local criteria. The signal is further processed in the tripping logic. In case of single-pole tripping in multi-phase systems, a phase selection is performed.
13.1.2.6
1MRK505183-UEN C
AND
OR
CRL CRL
1
200 ms t
t
150 ms
AND AND
LCG
OR
AND
OR
AND
OR
AND
AND
OR
CS
AND
CACC Schemetype = Permissive OR CSOR
tCoord
OR
25 ms t
TRIP
OR
AND
AND
tSendMin
OR AND
SchemeType = Blocking BLKCS
AND
IEC05000515-2-en.vsd
IEC05000515 V2 EN
Figure 343:
Scheme communication logic for distance or overcurrent protection, simplified logic diagram
1MRK505183-UEN C
IEC06000286-2-en.vsd
IEC06000286 V2 EN
Figure 344:
13.1.4
Table 393:
Name TRIP CS CRL LCG
1MRK505183-UEN C
13.1.5
Table 394:
Name Operation SchemeType
tCoord tSendMin
s s
0.001 0.001
0.035 0.100
Co-ordination time for blocking communication scheme Minimum duration of a carrier send signal
Table 395:
Name Unblock
tSecurity
0.001
0.035
13.1.6
Technical data
Table 396:
Function Scheme type
Co-ordination time for blocking communication scheme Minimum duration of a send signal Security timer for loss of guard signal detection Operation mode of unblocking logic
1MRK505183-UEN C
13.2
13.2.1
Introduction
Communication between line ends is used to achieve fault clearance for all faults on a power line. All possible types of communication schemes for example, permissive underreach, permissive overreach and blocking schemes are available. To manage problems with simultaneous faults on parallel power lines phase segregated communication is needed. This will then replace the standard Scheme communication logic for distance or Overcurrent protection (ZCPSCH) on important lines where three communication channels (in each subsystem) are available for the distance protection communication. The main purpose of the Phase segregated scheme communication logic for distance protection (ZC1PPSCH) function is to supplement the distance protection function such that: fast clearance of faults is also achieved at the line end for which the faults are on the part of the line not covered by its underreaching zone. correct phase selection can be maintained to support single-pole tripping for faults occurring anywhere on the entire length of a double circuit line.
To accomplish this, three separate communication channels, that is, one per phase, each capable of transmitting a signal in each direction is required. ZC1PPSCH can be completed with the current reversal and WEI logic for phase segregated communication, when found necessary in Blocking and Permissive overreaching schemes.
13.2.2
Principle of operation
Depending on whether a reverse or forward directed impedance zone is used to issue the send signal, the communication schemes are divided into Blocking and Permissive schemes, respectively. A permissive scheme is inherently faster and has better security against false tripping than a blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast trip, so its dependability is lower than that of a blocking scheme.
1MRK505183-UEN C
The Phase segregated scheme communication logic for distance protection (ZC1PPSCH) function is a logical function built-up from logical elements. It is a supplementary function to the distance protection, requiring for its operation inputs from the distance protection and the communication equipment. The type of communication-aided scheme to be used can be selected by way of the settings. The ability to select which distance protection zone is assigned to which input of ZC1PPSCH makes this logic able to support practically any scheme communication requirements regardless of their basic operating principle. The outputs to initiate tripping and sending of the teleprotection signal are given in accordance with the type of communication-aided scheme selected and the zone(s) and phase(s) of the distance protection which have operated. When power line carrier communication channels are used for permissive schemes communication, unblocking logic which uses the loss of guard signal as a receive criteria is provided. This logic compensates for the lack of dependability due to the transmission of the command signal over the faulted line.
13.2.2.1
Blocking scheme
The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is received from the remote IED. The received signal (sent by a reverse looking element in the remote IED), which shall be connected to CRLx, is used to not release the zone to be accelerated to clear the fault instantaneously (after time tCoord). The overreaching zone to be accelerated is connected to the input CACCLx, see figure 345. In case of external faults, the blocking signal (CRLx) must be received before the settable timer tCoord elapses, to prevent an unneccesary trip, see figure 345. ZC1PPSCH can be totally blocked by activating the input BLOCK, block of trip is achieved by activating the input BLKTRLx, Block of carrier send is done by activating the input BLKCSLx.
CACCLx CRLx
tCoord 25 ms
AND
TRLx
IEC06000310_2_en.vsd
IEC06000310 V2 EN
Figure 345:
13.2.2.2
1MRK505183-UEN C
overreaching zone (connected to CACCLx) to trip after the tCoord timer has elapsed. The tCoord is in permissive underreach schemes normally set to zero. The logic for trip carrier in permissive scheme is shown in figure 346. Three channels for communication in each direction must be available.
CACCLx CRLx tCoord t 25 ms t TRLx
AND
IEC07000088_2_en.vsd
IEC07000088 V2 EN
Figure 346:
Basic logic for trip carrier in one phase of a permissive underreach scheme
13.2.2.3
13.2.2.4
Unblocking scheme
In an unblocking scheme, the lower dependability in permissive scheme is overcome by using the loss of guard signal from the communication equipment to locally create a carrier receive signal. It is common or suitable to use the function when older, less reliable, power-line carrier (PLC) communication is used. As phase segregated communication schemes uses phases individually and the PLC is typically connected single-phase or phase-to-phase it is not possible to evaluate which of the phases to release and the unblocking scheme has thus not been supported.
13.2.2.5
Intertrip scheme
In the direct intertrip scheme, the carrier send signal CS is sent from an underreaching zone that is tripping the line. The received signal per phase is directly transferred to the trip function block for tripping without local criteria. The signal is not further processed in the phase segregated communication logic. In case of single-pole tripping the phase selection and logic for tripping the three phases is performed in the trip function block.
1MRK505183-UEN C
13.2.2.6
OR
AND
AND
OR
CSLx
OR
tCoord t
25 ms t
TRLx
CSMPH
IEC06000311_2_en.vsd
IEC06000311 V2 EN
Figure 347:
1MRK505183-UEN C
IEC06000427-2-en.vsd
IEC06000427 V2 EN
Figure 348:
13.2.4
1MRK505183-UEN C
Table 398:
Name TRIP TRL1 TRL2 TRL3 CSL1 CSL2 CSL3 CSMPH CRLL1 CRLL2 CRLL3
1MRK505183-UEN C
Setting parameters
ZC1PPSCH Group settings (basic)
Values (Range) Off On Off Intertrip Permissive UR Permissive OR Blocking 0.000 - 60.000 0.000 - 60.000 Unit Step Default Off Permissive UR Description Operation On / Off Scheme type
tCoord tSendMin
s s
0.001 0.001
0.000 0.100
13.2.6
Technical data
Table 400:
Function Scheme type
Co-ordination time for blocking communication scheme Minimum duration of a carrier send signal Security timer for loss of carrier guard detection Operation mode of unblocking logic
13.3
Current reversal and weak-end infeed logic for distance protection ZCRWPSCH
Function description Current reversal and weak-end infeed logic for distance protection IEC 61850 identification ZCRWPSCH IEC 60617 identification ANSI/IEEE C37.2 device number 85
13.3.1
Introduction
The current reversal function is used to prevent unwanted operations due to current reversal when using permissive overreach protection schemes in application with parallel lines when the overreach from the two ends overlap on the parallel line.
1MRK505183-UEN C
The weak-end infeed logic is used in cases where the apparent power behind the protection can be too low to activate the distance protection function. When activated, received carrier signal together with local under voltage criteria and no reverse zone operation gives an instantaneous trip. The received signal is also echoed back to accelerate the sending end. Three phase or phase segregated scheme logic is available.
13.3.2
13.3.2.1
Principle of operation
Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRV to recognize the fault on the parallel line in any of the phases. When the reverse zone has been activated for a certain settable time tPickUpRev it prevents sending of a communication signal and activation of trip signal for a predefined time tDelayRev. This makes it possible for the receive signal to reset before the trip signal is activated due to the current reversal by the forward directed zone, see figure 349.
IRV IRVBLK
en05000122_2_en.vsd
IEC05000122 V2 EN
Figure 349:
The preventing of sending the send signal CS and activating of the TRIP in the scheme communication block ZCPSCH is carried out by connecting the IRVL signal to input BLOCK in the ZCPSCH function. The function has an internal 10 ms drop-off timer which secure that the current reversal logic will be activated for short input signals even if the pick-up timer is set to zero.
13.3.2.2
1MRK505183-UEN C
No active signal present on the input BLOCK. The functional input CRL is active. This input is usually connected to the CRL output on the scheme communication logic ZCPSCH . The WEI function is not blocked by the active signal connected to the WEIBLK1 functional input or to the VTSZ functional input. The later is usually configured to the BLOCK functional output of the fuse-failure function. No active signal has been present for at least 200 ms on the WEIBLK2 functional input. An OR combination of all fault detection functions (not undervoltage) as present within the IED is usually used for this purpose.
IEC05000123 V1 EN
Figure 350:
When an echo function is used in both IEDs (should generally be avoided), a spurious signal can be looped round by the echo logics. To avoid a continuous lockup of the system, the duration of the echoed signal is limited to 200 ms. An undervoltage criteria is used as an additional tripping criteria, when the tripping of the local breaker is selected, setting WEI = Echo&Trip, together with the WEI function and ECHO signal has been issued by the echo logic, see figure 351.
IEC00000551-TIFF V1 EN
Figure 351:
1MRK505183-UEN C
13.3.3
IEC06000287-2-en.vsd
IEC06000287 V2 EN
Figure 352:
13.3.4
Table 402:
Name IRVL TRWEI TRWEIL1 TRWEIL2 TRWEIL3 ECHO
1MRK505183-UEN C
Setting parameters
ZCRWPSCH Group settings (basic)
Values (Range) Off On 0.000 - 60.000 0.000 - 60.000 Off Echo Echo & Trip 0.000 - 60.000 0.05 - 2000.00 10 - 90 10 - 90 Unit s s Step 0.001 0.001 Default Off 0.020 0.060 Off Description Operating mode of Current Reversal Logic Pickup time for current reversal logic Time Delay to prevent Carrier send and local trip Operating mode of WEI logic
s kV %UB %UB
0.001 0.05 1 1
0.010 400.00 70 70
Coordination time for the WEI logic Base setting for voltage level Phase to Phase voltage for detection of fault condition Phase to Neutral voltage for detection of fault condition
13.3.6
Technical data
Table 404:
Function Detection level phase-to-neutral voltage Detection level phase-to-phase voltage Reset ratio Operate time for current reversal logic Delay time for current reversal Coordination time for weak-end infeed logic
13.4
1MRK505183-UEN C
13.4.1
13.4.2
13.4.2.1
Principle of operation
Zone extension
The overreaching zone is connected to the input EXACC. For this reason, configure the ARREADY functional input to a READY functional output of a used autoreclosing function or via the selected binary input to an external autoreclosing device, see figure 353. This will allow the overreaching zone to trip instantaneously.
IEC05000157 V1 EN
Figure 353:
After the autorecloser initiates the close command and remains in the reclaim state, there will be no ARREADY signal, and the protection will trip normally with step distance time functions. In case of a fault on the adjacent line within the overreaching zone range, an unwanted autoreclosing cycle will occur. The step distance function at the reclosing attempt will prevent an unwanted retrip when the breaker is reclosed. On the other hand, at a persistent line fault on line section not covered by instantaneous zone (normally zone 1) only the first trip will be "instantaneous". The function will be blocked if the input BLOCK is activated (common with loss-ofload acceleration).
1MRK505183-UEN C
When the "acceleration" is controlled by a loss-of-load, the overreaching zone used for "acceleration" connected to input LLACC is not allowed to trip "instantaneously" during normal non-fault system conditions. When all three-phase currents have been above the set value MinCurr for more than setting tLowCurr, an overreaching zone will be allowed to trip "instantaneously" during a fault condition when one or two of the phase currents will become low due to a three-phase trip at the opposite IED, see figure 354. The current measurement is performed internally and the internal STILL signal becomes logical one under the described conditions. The load current in a healthy phase is in this way used to indicate the tripping at the opposite IED. Note that this function will not operate in case of three-phase faults, because none of the phase currents will be low when the opposite IED is tripped.
IEC05000158 V1 EN
Figure 354:
Breaker closing signals can if decided be connected to block the function during normal closing.
13.4.3
Function block
ZCLCPLAL I3P* BLOCK ARREADY NDST EXACC BC LLACC TRZE TRLL
IEC05000333-2-en.vsd
IEC05000333 V2 EN
Figure 355:
1MRK505183-UEN C
13.4.4
Table 406:
Name TRZE TRLL
13.4.5
Table 407:
Name Operation IBase LoadCurr LossOfLoad ZoneExtension MinCurr tLowCurr tLoadOn tLoadOff
Setting parameters
ZCLCPLAL Group settings (basic)
Values (Range) Off On 1 - 99999 1 - 100 Off On Off On 1 - 100 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit A %IB %IB s s s Step 1 1 1 0.001 0.001 0.001 Default Off 3000 10 Off Off 5 0.200 0.000 0.300 Description Operation Off / On Base setting for current values Load current before disturbance in % of IBase Enable/Disable operation of Loss of load. Enable/Disable operation of Zone extension Lev taken as curr loss due to remote CB trip in % of IBase Time delay on pick-up for MINCURR value Time delay on pick-up for load current release Time delay on drop off for load current release
1MRK505183-UEN C
13.5
13.5.1
13.5.1.1
Introduction
Introduction
To achieve fast fault clearance of earth faults on the part of the line not covered by the instantaneous step of the residual overcurrent protection, the directional residual overcurrent protection can be supported with a logic that uses communication channels. In the directional scheme, information of the fault current direction must be transmitted to the other line end. With directional comparison, a short operates time of the protection including a channel transmission time, can be achieved. This short operate time enables rapid autoreclosing function after the fault clearance. The communication logic module for directional residual current protection enables blocking as well as permissive under/overreaching schemes. The logic can also be supported by additional logic for weak-end infeed and current reversal, included in Current reversal and weak-end infeed logic for residual overcurrent protection Current reversal and weak-end infeed logic for residual overcurrent protection (ECRWPSCH) function.
13.5.2
Principle of operation
The four step directional residual overcurrent protection EF4PTOC is configured to give input information, that is directional fault detection signals, to the ECPSCH logic:
1MRK505183-UEN C
Input signal CACC is used for tripping of the communication scheme, normally the start signal of a forward overreaching step of STFW. Input signal CSBLK is used for sending block signal in the blocking communication scheme, normally the start signal of a reverse overreaching step of STRV. Input signal CSUR is used for sending permissive signal in the underreaching permissive communication scheme, normally the start signal of a forward underreaching step of STINn, where n corresponds to the underreaching step. Input signal CSOR is used for sending permissive signal in the overreaching permissive communication scheme, normally the start signal of a forward overreaching step of STINn, where n corresponds to the overreaching step.
In addition to this a signal from the autoreclosing function should be configured to the BLKCS input for blocking of the function at a single phase reclosing cycle.
13.5.2.1
Blocking scheme
In the blocking scheme a signal is sent to the other line end if the directional element detects an earth fault in the reverse direction. When the forward directional element operates, it trips after a short time delay if no blocking signal is received from the opposite line end. The time delay, normally 30 40 ms, depends on the communication transmission time and a chosen safety margin. One advantage of the blocking scheme is that only one channel (carrier frequency) is needed if the ratio of source impedances at both end is approximately equal for zero and positive sequence source impedances, the channel can be shared with the impedance measuring system, if that system also works in the blocking mode. The communication signal is transmitted on a healthy line and no signal attenuation will occur due to the fault. Blocking schemes are particular favorable for three-terminal applications if there is no zero-sequence outfeed from the tapping. The blocking scheme is immune to current reversals because the received signal is maintained long enough to avoid unwanted operation due to current reversal. There is never any need for weak-end infeed logic, because the strong end trips for an internal fault when no blocking signal is received from the weak end. The fault clearing time is however generally longer for a blocking scheme than for a permissive scheme. If the fault is on the line, the forward direction measuring element operates. If no blocking signal comes from the other line end via the CR binary input (received signal) the TRIP output is activated after the tCoord set time delay.
1MRK505183-UEN C
IEC05000448 V1 EN
Figure 356:
13.5.2.2
1MRK505183-UEN C
In the overreaching alternative, an overreaching directional residual overcurrent measurement element will be used as sending criterion of the permissive input signal CSOR. Also the underreaching input signal CSUR can initiate sending.
CRL
TRIP
OR
en05000280_2_en.vsd
IEC05000280 V2 EN
13.5.2.3
Unblocking scheme
In unblocking scheme, the lower dependability in permissive scheme is overcome by using the loss of guard signal from the communication equipment to locally create a receive signal. It is common or suitable to use the function when older, less reliable, power line carrier (PLC) communication is used. The unblocking function uses a guard signal CRG, which must always be present, even when no CR signal is received. The absence of the CRG signal for a time longer than the setting tSecurity time is used as a CR signal, see figure 357. This also enables a permissive scheme to operate when the line fault blocks the signal transmission. The received signal created by the unblocking function is reset 150 ms after the security timer has elapsed. When that occurs an output signal LCG is activated for signaling purpose. The unblocking function is reset 200 ms after that the guard signal is present again.
1MRK505183-UEN C
en05000746.vsd
IEC05000746 V1 EN
Figure 357:
The unblocking function can be set in three operation modes (setting Unblock):
Off: No restart: The unblocking function is out of operation Communication failure shorter than tSecurity will be ignored If CRG disappears, a CRL signal will be transferred to the trip logic There will not be any information in case of communication failure (LCG) Restart Communication failure shorter than tSecurity will be ignored It sends a defined (150 ms) CRL after the disappearance of the CRG signal The function will activate LCG output in case of communication failure If the communication failure comes and goes (<200 ms) there will not be recurrent signaling
13.5.3
Function block
ECPSCH BLOCK BLKTR BLKCS CSBLK CACC CSOR CSUR CR CRG TRIP CS CRL LCG
IEC06000288-2-en.vsd
IEC06000288 V2 EN
Figure 358:
1MRK505183-UEN C
13.5.4
Table 409:
Name TRIP CS CRL LCG
13.5.5
Table 410:
Name Operation SchemeType
Setting parameters
ECPSCH Group settings (basic)
Values (Range) Off On Off Intertrip Permissive UR Permissive OR Blocking 0.000 - 60.000 0.000 - 60.000 Unit Step Default Off Permissive UR Description Operation Off / On Scheme type, Mode of Operation
tCoord tSendMin
s s
0.001 0.001
0.035 0.100
1MRK505183-UEN C
Table 411:
Name Unblock
tSecurity
0.001
0.035
13.5.6
Technical data
Table 412:
Function Scheme type
0.5% 10 ms
13.6
Current reversal and weak-end infeed logic for residual overcurrent protection ECRWPSCH
Function description Current reversal and weak-end infeed logic for residual overcurrent protection IEC 61850 identification ECRWPSCH IEC 60617 identification ANSI/IEEE C37.2 device number 85
13.6.1
Introduction
The Current reversal and weak-end infeed logic for residual overcurrent protection ECRWPSCH is a supplement to Scheme communication logic for residual overcurrent protection ECPSCH. To achieve fast fault clearing for all earth faults on the line, the directional earthfault protection function can be supported with logic that uses communication channels. The 670 series IEDs have for this reason available additions to scheme communication logic. If parallel lines are connected to common busbars at both terminals, overreaching permissive communication schemes can trip unselectively due to fault current reversal. This unwanted tripping affects the healthy line when a fault is cleared on the other line. This lack of security can result in a total loss of interconnection between the two buses. To avoid this type of disturbance, a fault current reversal logic (transient blocking logic) can be used.
1MRK505183-UEN C
Permissive communication schemes for residual overcurrent protection can basically operate only when the protection in the remote IED can detect the fault. The detection requires a sufficient minimum residual fault current, out from this IED. The fault current can be too low due to an opened breaker or high-positive and/ or zero-sequence source impedance behind this IED. To overcome these conditions, weak-end infeed (WEI) echo logic is used.
13.6.2
13.6.2.1
Principle of operation
Directional comparison logic function
The directional comparison function contains logic for blocking overreaching and permissive overreaching schemes. The circuits for the permissive overreaching scheme contain logic for current reversal and weak-end infeed functions. These functions are not required for the blocking overreaching scheme. Use the independent or inverse time functions in the directional earth-fault protection module to get back-up tripping in case the communication equipment malfunctions and prevents operation of the directional comparison logic. Figure 359 and figure 360 show the logic circuits. Connect the necessary signal from the autorecloser for blocking of the directional comparison scheme, during a single-phase autoreclosing cycle, to the BLOCK input of the directional comparison module.
13.6.2.2
1MRK505183-UEN C
IRVL
IEC09000031-1-en.vsd
IEC09000031 V1 EN
Figure 359:
13.6.2.3
200 ms t
&
50 ms t
200 ms t
AND
ECHO
Figure 360:
With the Echo & Trip setting, the logic sends an echo according to above. Further, it activates the TRWEI signal to trip the breaker if the echo conditions are fulfilled and the neutral point voltage is above the set operate value for 3U0>. The voltage signal that is used to calculate the zero sequence voltage is set in the earth-fault function that is in operation.
1MRK505183-UEN C
ECHO
AND
AND
TRWEI
IEC09000020-1-en.vsd
IEC09000020 V1 EN
Figure 361:
The weak-end infeed echo sent to the strong line end has a maximum duration of 200 ms. When this time period has elapsed, the conditions that enable the echo signal to be sent are set to zero for a time period of 50 ms. This avoids ringing action if the weak-end echo is selected for both line ends.
13.6.3
Function block
ECRWPSCH U3P* BLOCK IRVBLK IRV WEIBLK1 WEIBLK2 VTSZ CBOPEN CRL IRVL TRWEI ECHO CR
IEC06000289-2-en.vsd
IEC06000289 V2 EN
Figure 362:
13.6.4
1MRK505183-UEN C
Table 414:
Name IRVL TRWEI ECHO CR
13.6.5
Table 415:
Name CurrRev tPickUpRev tDelayRev WEI
Setting parameters
ECRWPSCH Group settings (basic)
Values (Range) Off On 0.000 - 60.000 0.000 - 60.000 Off Echo Echo & Trip 0.000 - 60.000 0.05 - 2000.00 5 - 70 Unit s s Step 0.001 0.001 Default Off 0.020 0.060 Off Description Operating mode of Current Reversal Logic Pickup time for current reversal logic Time Delay to prevent Carrier send and local trip Operating mode of WEI logic
s kV %UB
0.001 0.05 1
0.000 400.00 25
Coordination time for the WEI logic Base setting for voltage level Neutral voltage setting for fault conditions measurement
13.6.6
Technical data
Table 416:
Function Operating mode of WEI logic
Operate voltage 3Uo for WEI trip Reset ratio Operate time for current reversal logic Delay time for current reversal Coordination time for weak-end infeed logic
1MRK505183-UEN C
13.7
Current reversal and weak-end infeed logic for phase segregated communication ZC1WPSCH
Function description Current reversal and weak-end infeed logic for phase segregated communication IEC 61850 identification ZC1WPSCH IEC 60617 identification ANSI/IEEE C37.2 device number 85
13.7.1
Introduction
Current reversal and weak-end infeed logic for phase segregated communication (ZC1WPSCH) function is used to prevent unwanted operations due to current reversal when using permissive overreach protection schemes in application with parallel lines when the overreach from the two ends overlaps on the parallel line. The weak-end infeed logic is used in cases where the apparent power behind the protection can be too low to activate the distance protection function. When activated, received carrier signal together with local under voltage criteria and no reverse zone operation gives an instantaneous trip. The received signal is also echoed back to accelerate the sending end.
13.7.2
13.7.2.1
Principle of operation
Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRVLx to recognize the fault on the parallel line in phase Lx. When the reverse zone has been activated for a certain settable time tPickUpRev it prevents sending of a communication signal and activation of trip signal for a predefined time tDelayRev. This makes it possible for the carrier receive signal to reset before the carrier aided trip signal is activated due to the current reversal by the forward directed zone, see figure 363.
IRVLn IRVBLKLn
tPickUpRev 10 ms t t
IEC06000474_2_en.vsd
IEC06000474 V2 EN
Figure 363:
The preventing of sending carrier send signal CSLn and activating of the TRIPLn in the Scheme communication logic for distance or Overcurrent protection
671 Technical reference manual
1MRK505183-UEN C
(ZCPSCH) is carried out by connecting the IRVOPLn signal to input BLOCKLn in ZCPSCH function. The Current reversal and weak-end infeed logic for phase segregated communication (ZC1WPSCH) function has an internal 10 ms drop-off timer which secure that the current reversal logic will be activated for short input signals even if the pick-up timer is set to zero. Weak-end infeed logic The WEI function sends back (echoes) the received carrier signal under the condition that no fault has been detected at the weak end by different fault detection elements (distance protection in forward and reverse direction).
VTSZ BLOCK CRLn >1 tWEI t 200 ms t 200 ms t
IEC07000085_2_en.vsd
IEC07000085 V2 EN
&
50 ms t
200 ms t &
WEIBLKL1
WEIBLKL2
Figure 364:
The WEI function returns the received carrier signal, see figure 364, when: The input CRLx is active. This input is usually connected to the CRLx output on the scheme communication logic for distance or Overcurrent protection (ZCPSCH). The WEI function is not blocked by the active signal connected to the WEIBLKLx input or to the VTSZ input. The later is usually configured to the STGEN output of the fuse-failure function. No active signal has been present for at least 200 ms on the WEIBLK2 input. An OR combination of all fault detection functions (not undervoltage) as present within the IED is usually used for this purpose.
When an echo function is used in both IEDs (should generally be avoided), a spurious signal can be looped round by the echo logics. To avoid a continuous lockup of the system, the duration of the echoed signal is limited to 200 ms. An undervoltage criteria is used as an additional tripping criteria, when the tripping of the local breaker is selected, setting WEI = Echo &Trip, together with the WEI function and ECHO signal has been issued by the echo logic, see figure 365.
1MRK505183-UEN C
ECHOLn - cont.
AND
100 ms t
OR 15 ms t
OR AND
TRWEI TRWEIL1
AND
15 ms t
TRWEIL2
AND
15 ms t
TRWEIL3
en00000551.vsd
IEC00000551-WMF V1 EN
Figure 365:
13.7.3
Function block
ZC1WPSCH U3P* TRPWEI BLOCK TRPWEIL1 BLKZ TRPWEIL2 CBOPEN TRPWEIL3 CRL1 IRVOP CRL2 IRVOPL1 CRL3 IRVOPL2 IRVL1 IRVOPL3 IRVL2 ECHO IRVL3 ECHOL1 IRVBLKL1 ECHOL2 IRVBLKL2 ECHOL3 IRVBLKL3 WEIBLK WEIBLKL1 WEIBLKL2 WEIBLKL3 WEIBLKOP WEIBLKO1 WEIBLKO2 WEIBLKO3 IEC06000477-2-en.vsd
IEC06000477 V2 EN
Figure 366:
1MRK505183-UEN C
Table 418:
Name TRPWEI TRPWEIL1 TRPWEIL2 TRPWEIL3 IRVOP IRVOPL1 IRVOPL2 IRVOPL3
1MRK505183-UEN C
13.7.5
Table 419:
Name UBase OperCurrRev tPickUpRev tDelayRev OperationWEI
Setting parameters
ZC1WPSCH Group settings (basic)
Values (Range) 0.05 - 2000.00 Off On 0.000 - 60.000 0.000 - 60.000 Off Echo Echo & Trip 10 - 90 10 - 90 0.000 - 60.000 Unit kV s s Step 0.05 0.001 0.001 Default 400.00 Off 0.020 0.060 Off Description Base setting for Voltage level Operating mode of Current Reversal Logic Pickup time for current reversal logic Time Delay to prevent Carrier send and local trip Operating mode of WEI logic
%UB %UB s
1 1 0.001
70 70 0.010
Phase to Earth voltage for detection of fault condition Phase to Phase voltage for detection of fault condition Coordination time for the WEI logic
13.7.6
Technical data
Table 420:
Function Detection level phase to neutral voltage Detection level phase to phase voltage Reset ratio Operate time for current reversal Delay time for current reversal Coordination time for weak-end infeed logic
676
1MRK505183-UEN C
Section 14 Logic
Section 14
Logic
14.1
I->O
SYMBOL-K V1 EN
14.1.1
Introduction
A function block for protection tripping is provided for each circuit breaker involved in the tripping of the fault. It provides the pulse prolongation to ensure a trip pulse of sufficient length, as well as all functionality necessary for correct cooperation with autoreclosing functions. The trip function block includes functionality for evolving faults and breaker lockout.
14.1.2
Principle of operation
The duration of a trip output signal from tripping logic SMPPTRC is settable (tTripMin). The pulse length should be long enough to secure the breaker opening. For three-phase tripping, SMPPTRC has a single input (TRIN) through which all trip output signals from the protection functions within the IED, or from external protection functions via one or more of the IEDs binary inputs, are routed. It has a single trip output (TRIP) for connection to one or more of the IEDs binary outputs, as well as to other functions within the IED requiring this signal.
Section 14 Logic
1MRK505183-UEN C
BLOCK TRIN
Operation Mode = On Program = 3Ph
tTripMin AND t
OR
TRIP
en05000789.vsd
IEC05000789 V1 EN
Figure 367:
SMPPTRC function for single-phase and two-phase tripping has additional phase segregated inputs for this, as well as inputs for faulted phase selection. The latter inputs enable single- phase and two-phase tripping for those functions which do not have their own phase selection capability, and therefore which have just a single trip output and not phase segregated trip outputs for routing through the phase segregated trip inputs of the expanded SMPPTRC function. Examples of such protection functions are the residual overcurrent protections. The expanded SMPPTRC function has two inputs for these functions, one for impedance tripping (for example, carrier-aided tripping commands from the scheme communication logic), and one for earth fault tripping (for example, tripping output from a residual overcurrent protection). The expanded SMPPTRC function has three trip outputs TRL1, TRL2, TRL3 (besides the trip output TRIP), one per phase, for connection to one or more of the IEDs binary outputs, as well as to other functions within the IED requiring these signals. There are also separate output signals indicating single-phase, two-phase or three-phase trip. These signals are important for cooperation with the autorecloser SMBRREC function. The expanded SMPPTRC function is equipped with logic which secures correct operation for evolving faults as well as for reclosing on to persistent faults. A special input is also provided which disables single- phase and two-phase tripping, forcing all tripping to be three-phase. In multi-breaker arrangements, one SMPPTRC function block is used for each breaker. This can be the case if single pole tripping and autoreclosing is used. The breaker close lockout function can be activated from an external trip signal from another protection function via input (SETLKOUT) or internally at a threephase trip, if desired. It is possible to lockout seal in the tripping output signals or use blocking of closing only the choice is by setting TripLockout. The TRPx function for single- and two-pole tripping has additional phase segregated inputs for this, as well as inputs for faulted phase selection. The latter inputs enable single- and two-pole tripping for those functions which do not have
1MRK505183-UEN C
Section 14 Logic
their own phase selection capability, and therefore which have just a single trip output and not phase segregated trip outputs for routing through the phase segregated trip inputs of the expanded TRPx function. Examples of such protection functions are the residual overcurrent protections. The expanded TRPx function has two inputs for these functions, one for impedance tripping (e.g. carrier-aided tripping commands from the scheme communication logic), and one for earth fault tripping (e.g. tripping output from a residual overcurrent protection). Additional logic secures a three-pole final trip command for these protection functions in the absence of the required phase selection signals. The expanded TRPx function has three trip outputs TRL1, TRL2, TRL3 (besides the trip output TRIP), one per phase, for connection to one or more of the IEDs binary outputs, as well as to other functions within the IED requiring these signals. There are also separate output signals indicating single pole, two pole or three pole trip. These signals are important for cooperation with the auto-reclosing function. The expanded TRPx function is equipped with logic which secures correct operation for evolving faults as well as for reclosing on to persistent faults. A special input is also provided which disables single- and two-pole tripping, forcing all tripping to be three-pole. In multi-breaker arrangements, one TRPx function block is used for each breaker. This can be the case if single pole tripping and auto-reclosing is used. The breaker close lockout function can be activated from an external trip signal from another protection function via input (SETLKOUT) or internally at a three pole trip, if desired. It is possible to lockout seal in the tripping output signals or use blocking of closing only the choice is by setting TripLockout.
14.1.2.1
Logic diagram
TRINL1 TRINL2 TRINL3 1PTRZ 1PTREF TRIN Program = 3ph
OR OR OR AND
RSTTRIP - cont.
en05000517.vsd
IEC05000517 V1 EN
Figure 368:
Section 14 Logic
1MRK505183-UEN C
AND
OR
L1TRIP
TRINL2 PSL2
AND
OR
L2TRIP
TRINL3 PSL3
AND OR
OR
L3TRIP
OR
-loop
OR
-loop
OR AND
1PTREF 1PTRZ
AND AND OR
50 ms t
AND
en05000518.vsd
IEC05000518-WMF V1 EN
Figure 369:
1MRK505183-UEN C
Section 14 Logic
L1TRIP
150 ms
t
2000 ms t
OR OR
RTRIP
OR
AND
L2TRIP
150 ms
t
2000 ms t
OR OR
STRIP
OR
AND
L3TRIP
150 ms
t
2000 ms t
OR OR
TTRIP
OR
AND
OR AND
P3PTR
OR OR
-loop
en05000519.vsd
IEC05000519-WMF V1 EN
Figure 370:
Section 14 Logic
1MRK505183-UEN C
L1TRIP - cont.
150 ms
t
2000 ms t
OR
OR
RTRIP
AND
L2TRIP
150 ms
t
2000 ms t
OR
OR
STRIP
AND AND
L3TRIP
150 ms
t
2000 ms t
OR
OR
TTRIP
AND
OR AND
TRIP
OR OR
-loop
en05000520.vsd
IEC05000520-WMF V1 EN
Figure 371:
1MRK505183-UEN C
Section 14 Logic
BLOCK RTRIP
OR
STRIP
AND
TRL1
OR
TTRIP
AND
TRL2
OR
RSTTRIP
AND OR
TRL3
TRIP
AND
OR
AND
-loop
TR3P
10 ms
AND
t 5 ms t
TR1P
TR2P
-loop
en05000521.vsd
IEC05000521-WMF V1 EN
Figure 372:
14.1.3
Function block
SMPPTRC BLOCK TRIP BLKLKOUT TRL1 TRIN TRL2 TRINL1 TRL3 TRINL2 TR1P TRINL3 TR2P PSL1 TR3P PSL2 CLLKOUT PSL3 1PTRZ 1PTREF P3PTR SETLKOUT RSTLKOUT IEC05000707-2-en.vsd
IEC05000707 V2 EN
Figure 373:
14.1.4
Section 14 Logic
Name TRINL1 TRINL2 TRINL3 PSL1 PSL2 PSL3 1PTRZ 1PTREF P3PTR SETLKOUT RSTLKOUT Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 Description Trip phase 1 Trip phase 2 Trip phase 3
1MRK505183-UEN C
Functional input for phase selection in phase L1 Functional input for phase selection in phase L2 Functional input for phase selection in phase L3 Zone Trip with a separate phase selection Single phase DEF Trip for separate phase selection Prepare all tripping to be three-phase Input for setting the circuit breaker lockout function Input for resetting the circuit breaker lockout function
Table 422:
Name TRIP TRL1 TRL2 TRL3 TR1P TR2P TR3P CLLKOUT
14.1.5
Table 423:
Name Operation Program
Setting parameters
SMPPTRC Group settings (basic)
Values (Range) Off On 3 phase 1ph/3ph 1ph/2ph/3ph 0.000 - 60.000 Unit Step Default On 1ph/3ph Description Operation Off / On Three ph; single or three ph; single, two or three ph trip Minimum duration of trip output signal
tTripMin
0.001
0.150
Table 424:
Name TripLockout AutoLock
1MRK505183-UEN C
14.1.6
14.2
14.2.1
Introduction
Trip matrix logic (TMAGGIO) function is used to route trip signals and/or other logical output signals to different output contacts on the IED. TMAGGIO output signals and the physical outputs are available in PCM600 and this allows the user to adapt the signals to the physical tripping outputs according to the specific application needs.
14.2.2
Principle of operation
Trip matrix logic (TMAGGIO) block is provided with 32 input signals and 3 output signals. The function block incorporates internal logic OR gates in order to provide the necessary grouping of connected input signals (for example, for tripping and alarming purposes) to the three output signals from the function block. Internal built-in OR logic is made in accordance with the following three rules: 1. 2. 3. when any one of first 16 inputs signals (INPUT1 to INPUT16) has logical value 1 (TRUE) the first output signal (OUTPUT1) will get logical value 1 (TRUE). when any one of second 16 inputs signals (INPUT17 to INPUT32) has logical value 1 (TRUE) the second output signal (OUTPUT2) will get logical value 1 (TRUE). when any one of all 32 input signals (INPUT1 to INPUT32) has logical value 1 (TRUE) the third output signal (OUTPUT3) will get logical value 1 (TRUE).
By use of the settings ModeOutput1, ModeOutput2, ModeOutput3, PulseTime, OnDelay and OffDelay the behavior of each output can be customized. The OnDelay is always active and will delay the input to output transition by the set
685 Technical reference manual
Section 14 Logic
1MRK505183-UEN C
time. The ModeOutput for respective output decides wether the output shall be steady with an drop-off delay as set by OffDelay or if it shall give a pulse with duration set by PulseTime. Note that for pulsed operation since the inputs are connected in an OR-function a new pulse will only be given on the output if all related inputs are reset and then one is activated again. And for steady operation the of delay will start when all related inputs have reset. Detailed logical diagram is shown in figure 374
PulseTime
t ModeOutput1
&
Input 1 1
Ondelay Offdelay
&
Output 1
Input 16
PulseTime
t ModeOutput2
&
Input 17
Ondelay
1
Input 32
Offdelay
&
Output 2
PulseTime
t ModeOutput3
Ondelay Offdelay
&
&
Output 3
IEC09000612_1_en.vsd
IEC09000612 V1 EN
Figure 374:
Output signals from TMAGGIO are typically connected to other logic blocks or directly to output contacts in the IED. When used for direct tripping of the circuit breaker(s) the pulse time delay shall be set to approximately 0.150 seconds in order to obtain satisfactory minimum duration of the trip pulse to the circuit breaker trip coils.
1MRK505183-UEN C
14.2.3
IEC09000830-1-en.vsd
IEC09000830 V1 EN
Figure 375:
14.2.4
Section 14 Logic
Name INPUT21 INPUT22 INPUT23 INPUT24 INPUT25 INPUT26 INPUT27 INPUT28 INPUT29 INPUT30 INPUT31 INPUT32 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 0 Description Binary input 21 Binary input 22 Binary input 23 Binary input 24 Binary input 25 Binary input 26 Binary input 27 Binary input 28 Binary input 29 Binary input 30 Binary input 31 Binary input 32
1MRK505183-UEN C
Table 427:
Name OUTPUT1 OUTPUT2 OUTPUT3
14.2.5
Table 428:
Name Operation PulseTime OnDelay OffDelay ModeOutput1 ModeOutput2 ModeOutput3
Setting parameters
TMAGGIO Group settings (basic)
Values (Range) Off On 0.050 - 60.000 0.000 - 60.000 0.000 - 60.000 Steady Pulsed Steady Pulsed Steady Pulsed Unit s s s Step 0.001 0.001 0.001 Default On 0.150 0.000 0.000 Steady Steady Steady Description Operation Off / On Output pulse time Output on delay time Output off delay time Mode for output ,1 steady or pulsed Mode for output 2, steady or pulsed Mode for output 3, steady or pulsed
1MRK505183-UEN C
Section 14 Logic
14.3
14.3.1
14.3.2
Figure 376:
Section 14 Logic
1MRK505183-UEN C
Table 429:
Name INPUT
Table 430:
Name OUT
14.3.3
OR function block OR
The OR function is used to form general combinatory expressions with boolean variables. The OR function block has six inputs and two outputs. One of the outputs is inverted.
OR INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 OUT NOUT
IEC04000405_2_en.vsd
IEC04000405 V2 EN
Figure 377:
Table 431:
Name INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6
OR function block
OR Input signals
Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 Description Input 1 to OR gate Input 2 to OR gate Input 3 to OR gate Input 4 to OR gate Input 5 to OR gate Input 6 to OR gate
Table 432:
Name OUT NOUT
OR Output signals
Type BOOLEAN BOOLEAN Description Output from OR gate Inverted output from OR gate
1MRK505183-UEN C
14.3.4
IEC04000406_2_en.vsd
IEC04000406 V2 EN
Figure 378:
Table 433:
Name INPUT1 INPUT2 INPUT3 INPUT4N
Table 434:
Name OUT NOUT
14.3.5
Figure 379:
Table 435:
Name INPUT
Section 14 Logic
1MRK505183-UEN C
Table 436:
Name ON OFF
Table 437:
Name T
14.3.6
IEC04000407-2-en.vsd
IEC04000407 V2 EN
Figure 380:
Table 438:
Name INPUT
Table 439:
Name OUT
Table 440:
Name T
14.3.7
1MRK505183-UEN C
Section 14 Logic
Figure 381:
Table 441:
Name INPUT1 INPUT2
Table 442:
Name OUT NOUT
14.3.8
Figure 382:
Table 443:
Name INPUT
Table 444:
Name OUT
14.3.9
Section 14 Logic
1MRK505183-UEN C
setting controls if the flip-flop after a power interruption will return the state it had before or if it will be reset.
Table 445:
SET 0 0 1 1 0 1 0 1
Figure 383:
Table 446:
Name SET RESET
Table 447:
Name OUT NOUT
Table 448:
Name Memory
14.3.10
Figure 384:
694
1MRK505183-UEN C
Section 14 Logic
Table 449:
Name INPUT
Table 450:
Name OUT
Table 451:
Name Operation
14.3.11
Figure 385:
Table 452:
Name INPUT
Table 453:
Name ON OFF
Table 454:
Name Operation t
1MRK505183-UEN C
14.4
The Fixed signals function (FXDSIGN) generates a number of pre-set (fixed) signals that can be used in the configuration of an IED, either for forcing the unused inputs in other function blocks to a certain level/value, or for creating certain logic.
14.4.1
Principle of operation
There are eight outputs from FXDSIGN function block: OFF is a boolean signal, fixed to OFF (boolean 0) value ON is a boolean signal, fixed to ON (boolean 1) value INTZERO is an integer number, fixed to integer value 0 INTONE is an integer number, fixed to integer value 1 REALZERO is a floating point real number, fixed to 0.0 value STRNULL is a string, fixed to an empty string (null) value ZEROSMPL is a channel index, fixed to 0 value GRP_OFF is a group signal, fixed to 0 value
1MRK505183-UEN C
14.4.2
Figure 386:
14.4.3
14.4.4
Setting parameters
The function does not have any parameters available in the local HMI or PCM600.
14.5
14.5.1
Introduction
Boolean 16 to integer conversion function (B16I) is used to transform a set of 16 binary (logical) signals into an integer.
1MRK505183-UEN C
Boolean 16 to integer conversion function (B16I) is used to transform a set of 16 binary (logical) signals into an integer. The BLOCK input will freeze the output at the last value.
14.5.3
Function block
B16I BLOCK IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN9 IN10 IN11 IN12 IN13 IN14 IN15 IN16 OUT
IEC07000128-2-en.vsd
IEC07000128 V2 EN
Figure 387:
14.5.4
1MRK505183-UEN C
Section 14 Logic
Table 458:
Name OUT
14.5.5
Setting parameters
The function does not have any parameters available in the local HMI or PCM600.
14.6
14.6.1
Introduction
Boolean 16 to integer conversion with logic node representation function (B16IGGIO) is used to transform a set of 16 binary (logical) signals into an integer. B16IGGIO can receive remote values via IEC 61850 depending on the operator position input (PSTO).
14.6.2
Principle of operation
Boolean 16 to integer conversion with logic node representation function (B16IGGIO) is used to transform a set of 16 binary (logical) signals into an integer. The BLOCK input will freeze the output at the last value.
1MRK505183-UEN C
IEC07000129-2-en.vsd
IEC07000129 V2 EN
Figure 388:
14.6.4
Table 460:
Name OUT
1MRK505183-UEN C
14.6.5
14.7
14.7.1
Introduction
Integer to boolean 16 conversion function (IB16) is used to transform an integer into a set of 16 binary (logical) signals.
14.7.2
Principle of operation
Integer to boolean 16 conversion function (IB16) is used to transform an integer into a set of 16 binary (logical) signals. IB16 function is designed for receiving the integer input locally. The BLOCK input will freeze the logical outputs at the last value.
14.7.3
Function block
IB16 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 OUT15 OUT16 IEC06000501-2-en.vsd
IEC06000501 V2 EN
Figure 389:
1MRK505183-UEN C
Table 462:
Name OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 OUT15 OUT16
14.7.5
Setting parameters
The function does not have any parameters available in the local HMI or PCM600.
14.8
1MRK505183-UEN C
14.8.1
14.8.2
Principle of operation
Integer to boolean conversion with logic node representation function (IB16GGIO) is used to transform an integer into a set of 16 binary (logical) signals. IB16GGIO function can receive an integer from a station computer for example, over IEC 61850. The BLOCK input will freeze the logical outputs at the last value. The operator position input (PSTO) determines the operator place. The integer number can be written to the block while in Remote. If PSTO is in Off or Local, then no change is applied to the outputs.
14.8.3
Function block
IB16GGIO BLOCK PSTO IN OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 OUT15 OUT16 IEC06000502-2-en.vsd
IEC06000502 V2 EN
Figure 390:
14.8.4
Section 14 Logic
1MRK505183-UEN C
Table 464:
Name OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 OUT15 OUT16
14.8.5
Setting parameters
This function does not have any setting parameters.
1MRK505183-UEN C
Section 15 Monitoring
Section 15
Monitoring
15.1
Measurements
Function description Measurements IEC 61850 identification CVMMXU
P, Q, S, I, U, f
SYMBOL-RR V1 EN
CMMXU
I
SYMBOL-SS V1 EN
VMMXU
U
SYMBOL-UU V1 EN
CMSQI
I1, I2, I0
SYMBOL-VV V1 EN
VMSQI
U1, U2, U0
SYMBOL-TT V1 EN
VNMMXU
U
SYMBOL-UU V1 EN
1MRK505183-UEN C
Measurement functions is used for power system measurement, supervision and reporting to the local HMI, monitoring tool within PCM600 or to station level for example, via IEC 61850. The possibility to continuously monitor measured values of active power, reactive power, currents, voltages, frequency, power factor etc. is vital for efficient production, transmission and distribution of electrical energy. It provides to the system operator fast and easy overview of the present status of the power system. Additionally, it can be used during testing and commissioning of protection and control IEDs in order to verify proper operation and connection of instrument transformers (CTs and VTs). During normal service by periodic comparison of the measured value from the IED with other independent meters the proper operation of the IED analog measurement chain can be verified. Finally, it can be used to verify proper direction orientation for distance or directional overcurrent protection function. The available measured values of an IED are depending on the actual hardware (TRM) and the logic configuration made in PCM600. All measured values can be supervised with four settable limits that is, low-low limit, low limit, high limit and high-high limit. A zero clamping reduction is also supported, that is, the measured value below a settable limit is forced to zero which reduces the impact of noise in the inputs. Dead-band supervision can be used to report measured signal value to station level when change in measured value is above set threshold limit or time integral of all changes since the last time value updating exceeds the threshold limit. Measure value can also be based on periodic reporting. The measurement function, CVMMXU, provides the following power system quantities: P, Q and S: three phase active, reactive and apparent power PF: power factor U: phase-to-phase voltage amplitude I: phase current amplitude F: power system frequency
The measuring functions CMMXU, VNMMXU and VMMXU provide physical quantities: I: phase currents (amplitude and angle) (CMMXU) U: voltages (phase-to-earth and phase-to-phase voltage, amplitude and angle) (VMMXU, VNMMXU)
It is possible to calibrate the measuring function above to get better then class 0.5 presentation. This is accomplished by angle and amplitude compensation at 5, 30 and 100% of rated current and at 100% of rated voltage.
706 Technical reference manual
1MRK505183-UEN C
Section 15 Monitoring
The power system quantities provided, depends on the actual hardware, (TRM) and the logic configuration made in PCM600. The measuring functions CMSQI and VMSQI provide sequential quantities: I: sequence currents (positive, zero, negative sequence, amplitude and angle) U: sequence voltages (positive, zero and negative sequence, amplitude and angle).
The CVMMXU function calculates three-phase power quantities by using fundamental frequency phasors (DFT values) of the measured current respectively voltage signals. The measured power quantities are available either, as instantaneously calculated quantities or, averaged values over a period of time (low pass filtered) depending on the selected settings.
15.1.2
15.1.2.1
Principle of operation
Measurement supervision
The protection, control, and monitoring IEDs have functionality to measure and further process information for currents and voltages obtained from the preprocessing blocks. The number of processed alternate measuring quantities depends on the type of IED and built-in options. The information on measured quantities is available for the user at different locations: Locally by means of the local HMI Remotely using the monitoring tool within PCM600 or over the station bus Internally by connecting the analogue output signals to the Disturbance Report function
All phase angles are presented in relation to a defined reference channel. The General setting parameter PhaseAngleRef defines the reference, see section "Analog inputs".
Measured value below zero point clamping limit is forced to zero. This allows the noise in the input signal to be ignored. The zero point clamping limit is a general setting (XZeroDb where X equals S, P, Q, PF, U, I, F, IL1-3, UL1-3, UL12-31, I1, I2, 3I0, U1, U2 or 3U0). Observe that this measurement supervision zero point clamping might be overridden by the zero point clamping used for the measurement values within CVMMXU.
Section 15 Monitoring
Continuous monitoring of the measured quantity
1MRK505183-UEN C
Users can continuously monitor the measured quantity available in each function block by means of four defined operating thresholds, see figure 391. The monitoring has two different modes of operating: Overfunction, when the measured current exceeds the High limit (XHiLim) or High-high limit (XHiHiLim) pre-set values Underfunction, when the measured current decreases under the Low limit (XLowLim) or Low-low limit (XLowLowLim) pre-set values.
Hysteresis
en05000657.vsd
IEC05000657 V1 EN
Figure 391:
Each analogue output has one corresponding supervision level output (X_RANGE). The output signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-high limit exceeded, 2: below Low limit and 4: below Low-low limit). The output may be connected to a measurement expander block (XP (RANGE_XP)) to get measurement supervision as binary signals. The logical value of the functional output signals changes according to figure 391. The user can set the hysteresis (XLimHyst), which determines the difference between the operating and reset value at each operating point, in wide range for each measuring channel separately. The hysteresis is common for all operating values within one channel.
The actual value of the measured quantity is available locally and remotely. The measurement is continuous for each measured quantity separately, but the reporting of the value to the higher levels depends on the selected reporting mode. The following basic reporting modes are available:
1MRK505183-UEN C
Section 15 Monitoring
Cyclic reporting (Cyclic) Amplitude dead-band supervision (Dead band) Integral dead-band supervision (Int deadband)
Cyclic reporting
The cyclic reporting of measured value is performed according to chosen setting (XRepTyp). The measuring channel reports the value independent of amplitude or integral dead-band reporting. In addition to the normal cyclic reporting the IED also report spontaneously when measured value passes any of the defined threshold limits.
Y Value Reported (1st) Value Reported Value Reported Value Reported
Y3 Y2 Y4
Value Reported
Y1
Y5
t (*)
t (*)
t (*)
t (*)
Value 1
Value 2
Value 3
Value 4
Value 5
en05000500.vsd
Figure 392:
Periodic reporting
If a measuring value is changed, compared to the last reported value, and the change is larger than the Y pre-defined limits that are set by user (XZeroDb), then the measuring channel reports the new value to a higher level, if this is detected by a new measured value. This limits the information flow to a minimum necessary. Figure 393 shows an example with the amplitude dead-band supervision. The picture is simplified: the process is not continuous but the values are evaluated with a time interval of one execution cycle from each other.
Section 15 Monitoring
1MRK505183-UEN C
Y1
t
99000529.vsd
IEC99000529 V1 EN
Figure 393:
After the new value is reported, the Y limits for dead-band are automatically set around it. The new value is reported only if the measured quantity changes more than defined by the Y set limits. Even if amplitude dead-band reporting is selected, there will be a 30 s "back-ground" cyclic reporting as well. The measured value is reported if the time integral of all changes exceeds the preset limit (XZeroDb), figure 394, where an example of reporting with integral deadband supervision is shown. The picture is simplified: the process is not continuous but the values are evaluated with a time interval of one execution cycle from each other. The last value reported, Y1 in figure 394 serves as a basic value for further measurement. A difference is calculated between the last reported and the newly measured value and is multiplied by the time increment (discrete integral). The absolute values of these integral values are added until the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a new base for the following measurements (as well as for the values Y3, Y4 and Y5). The integral dead-band supervision is particularly suitable for monitoring signals with small variations that can last for relatively long periods. Even if integral deadband reporting is selected, there will be a 30 s "back-ground" cyclic reporting as well.
1MRK505183-UEN C
Section 15 Monitoring
Value Reported
A7
Y5 Value Reported t
99000530.vsd
Y1
IEC99000530 V1 EN
Figure 394:
15.1.2.2
The measurement function must be connected to three-phase current and threephase voltage input in the configuration tool (group signals), but it is capable to measure and calculate above mentioned quantities in nine different ways depending on the available VT inputs connected to the IED. The end user can freely select by a parameter setting, which one of the nine available measuring modes shall be used within the function. Available options are summarized in the following table:
Set value for Formula used for complex, threeparameter phase power calculation Mode 1 L1, L2, L3
S = U L1 I L1 + U L 2 I L 2 + U L 3 I L 3
EQUATION1385 V1 EN
Comment
U = ( U L1 + U L 2 + U L 3 ) / 3 I = ( I L1 + I L 2 + I L 3 ) / 3
EQUATION1386 V1 EN
Used when three phaseto-earth voltages are available Used when three two phase-tophase voltages are available Used when only symmetrical three phase power shall be measured
Arone
S = U L1 L 2 I L1 - U L 2 L 3 I L 3
* *
EQUATION1387 V1 EN
U = ( U L1 L 2 + U L 2 L 3 ) / 2 I = ( I L1 + I L 3 ) / 2
EQUATION1388 V1 EN
(Equation 126)
(Equation 127)
PosSeq
S = 3 U PosSeq I PosSeq
*
EQUATION1389 V1 EN
U =
3 U PosSeq
(Equation 128)
I = I PosSeq
EQUATION1390 V1 EN
(Equation 129)
Section 15 Monitoring
Set value for Formula used for complex, threeparameter phase power calculation Mode 4 L1L2
1MRK505183-UEN C
Comment
S = U L1 L 2 ( I L1 - I L 2 )
* *
EQUATION1391 V1 EN
U = U L1 L 2 I = ( I L1 + I L 2 ) / 2
EQUATION1392 V1 EN
(Equation 130)
(Equation 131)
Used when only UL1L2 phase-tophase voltage is available Used when only UL2L3 phase-tophase voltage is available Used when only UL3L1 phase-tophase voltage is available Used when only UL1 phase-toearth voltage is available Used when only UL2 phase-toearth voltage is available Used when only UL3 phase-toearth voltage is available
L2L3
S = U L 2 L3 ( I L 2 - I L3 )
* *
EQUATION1393 V1 EN
U = U L2 L3 I = ( I L2 + I L3 ) / 2
EQUATION1394 V1 EN
(Equation 132)
(Equation 133)
L3L1
S = U L 3 L1 ( I L 3 - I L1 )
* *
EQUATION1395 V1 EN
U = U L 3 L1 I = ( I L 3 + I L1 ) / 2
EQUATION1396 V1 EN
(Equation 134)
(Equation 135)
L1
S = 3 U L1 I L1
*
EQUATION1397 V1 EN
U =
3 U L1
(Equation 136)
I = I L1
EQUATION1398 V1 EN
(Equation 137)
L2
S = 3 U L2 I L2
*
EQUATION1399 V1 EN
U =
3 U L2
(Equation 138)
I = IL2
EQUATION1400 V1 EN
(Equation 139)
L3
S = 3 U L3 I L3
*
EQUATION1401 V1 EN
U =
3 U L3
(Equation 140)
I = I L3
EQUATION1402 V1 EN
(Equation 141)
It shall be noted that only in the first two operating modes that is, 1 & 2 the measurement function calculates exact three-phase power. In other operating modes that is, from 3 to 9 it calculates the three-phase power under assumption that the power system is fully symmetrical. Once the complex apparent power is calculated then the P, Q, S, & PF are calculated in accordance with the following formulas:
P = Re( S )
EQUATION1403 V1 EN
(Equation 142)
1MRK505183-UEN C
Section 15 Monitoring
Q = Im( S )
EQUATION1404 V1 EN
(Equation 143)
S = S =
EQUATION1405 V1 EN
P +Q
2
(Equation 144)
PF = cosj = P S
EQUATION1406 V1 EN
(Equation 145)
Additionally to the power factor value the two binary output signals from the function are provided which indicates the angular relationship between current and voltage phasors. Binary output signal ILAG is set to one when current phasor is lagging behind voltage phasor. Binary output signal ILEAD is set to one when current phasor is leading the voltage phasor. Each analogue output has a corresponding supervision level output (X_RANGE). The output signal is an integer in the interval 0-4, see section "Measurement supervision".
Measured currents and voltages used in the CVMMXU function can be calibrated to get class 0.5 measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of rated current and voltage. The compensation below 5% and above 100% is constant and linear in between, see example in figure 395.
Section 15 Monitoring
1MRK505183-UEN C
IEC05000652 V2 EN
Figure 395:
Calibration curves
The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals.
In order to minimize the influence of the noise signal on the measurement it is possible to introduce the recursive, low pass filtering of the measured values for P, Q, S, U, I and power factor. This will make slower measurement response to the step changes in the measured quantity. Filtering is performed in accordance with the following recursive formula:
X = k X Old + (1 - k ) X Calculated
EQUATION1407 V1 EN
(Equation 146)
where: X XOld is a new measured value (that is P, Q, S, U, I or PF) to be given out from the function is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle k is settable parameter by the end user which influence the filter properties
1MRK505183-UEN C
Section 15 Monitoring
Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (that is, without any additional delay). When k is set to value bigger than 0, the filtering is enabled. Appropriate value of k shall be determined separately for every application. Some typical value for k =0.14.
In order to avoid erroneous measurements when either current or voltage signal is not present, it is possible for the end user to set the amplitudeIGenZeroDb level for current and voltage measurement UGenZeroDb is forced to zero. When either current or voltage measurement is forced to zero automatically the measured values for power (P, Q and S) and power factor are forced to zero as well. Since the measurement supervision functionality, included in CVMMXU, is using these values the zero clamping will influence the subsequent supervision (observe the possibility to do zero point clamping within measurement supervision, see section "Measurement supervision"). In order to compensate for small amplitude and angular errors in the complete measurement chain (CT error, VT error, IED input transformer errors and so on.) it is possible to perform on site calibration of the power measurement. This is achieved by setting the complex constant which is then internally used within the function to multiply the calculated complex apparent power S. This constant is set as amplitude (setting parameter PowAmpFact, default value 1.000) and angle (setting parameter PowAngComp, default value 0.0 degrees). Default values for these two parameters are done in such way that they do not influence internally calculated value (complex constant has default value 1). In this way calibration, for specific operating range (for example, around rated power) can be done at site. However, to perform this calibration it is necessary to have an external power meter with high accuracy class available.
Compensation facility
Directionality
If CT earthing parameter is set as described in section "Analog inputs", active and reactive power will be measured always towards the protected object. This is shown in the following figure 396.
Section 15 Monitoring
1MRK505183-UEN C
Busbar
IED
Protected Object
IEC09000038-1-en.vsd
IEC09000038-1-EN V1 EN
Figure 396:
Practically, it means that active and reactive power will have positive values when they flow from the busbar towards the protected object and they will have negative values when they flow from the protected object towards the busbar. In some application, for example, when power is measured on the secondary side of the power transformer it might be desirable, from the end client point of view, to have actually opposite directional convention for active and reactive power measurements. This can be easily achieved by setting parameter PowAngComp to value of 180.0 degrees. With such setting the active and reactive power will have positive values when they flow from the protected object towards the busbar.
Frequency
Frequency is actually not calculated within measurement block. It is simply obtained from the pre-processing block and then just given out from the measurement block as an output.
15.1.2.3
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Section 15 Monitoring
angle compensation at 5, 30 and 100% of rated current. The compensation below 5% and above 100% is constant and linear in between, see figure 395. Phase currents (amplitude and angle) are available on the outputs and each amplitude output has a corresponding supervision level output (ILx_RANG). The supervision output signal is an integer in the interval 0-4, see section "Measurement supervision".
15.1.2.4
15.1.2.5
15.1.3
Function block
The available function blocks of an IED are depending on the actual hardware (TRM) and the logic configuration made in PCM600.
Section 15 Monitoring
1MRK505183-UEN C
CVMMXU I3P* U3P* S S_RANGE P_INST P P_RANGE Q_INST Q Q_RANGE PF PF_RANGE ILAG ILEAD U U_RANGE I I_RANGE F F_RANGE IEC05000772-2-en.vsd
IEC05000772 V2 EN
Figure 397:
CMMXU I3P*
IL1 IL1RANG IL1ANGL IL2 IL2RANG IL2ANGL IL3 IL3RANG IL3ANGL IEC05000699-2-en.vsd
IEC05000699 V2 EN
Figure 398:
VNMMXU U3P* UL1 UL1RANG UL1ANGL UL2 UL2RANG UL2ANGL UL3 UL3RANG UL3ANGL IEC09000850-1-en.vsd
IEC09000850 V1 EN
Figure 399:
VMMXU U3P*
UL12 UL12RANG UL12ANGL UL23 UL23RANG UL23ANGL UL31 UL31RANG UL31ANGL IEC05000701-2-en.vsd
IEC05000701 V2 EN
Figure 400:
1MRK505183-UEN C
Section 15 Monitoring
CMSQI I3P* 3I0 3I0RANG 3I0ANGL I1 I1RANG I1ANGL I2 I2RANG I2ANGL IEC05000703-2-en.vsd
IEC05000703 V2 EN
Figure 401:
VMSQI U3P*
IEC05000704 V2 EN
Figure 402:
15.1.4
Table 466:
Name S S_RANGE P_INST P P_RANGE Q_INST Q Q_RANGE PF PF_RANGE ILAG
Section 15 Monitoring
Name ILEAD U U_RANGE I I_RANGE F F_RANGE Type BOOLEAN REAL INTEGER REAL INTEGER REAL INTEGER Description Current is leading voltage
1MRK505183-UEN C
Calculate voltage magnitude of deadband value Calcuate voltage range Calculated current magnitude of deadband value Calculated current range System frequency magnitude of deadband value System frequency range
Table 467:
Name I3P
Table 468:
Name IL1 IL1RANG IL1ANGL IL2 IL2RANG IL2ANGL IL3 IL3RANG IL3ANGL
Table 469:
Name U3P
Table 470:
Name UL1 UL1RANG UL1ANGL UL2 UL2RANG UL2ANGL
1MRK505183-UEN C
Section 15 Monitoring
Name UL3 UL3RANG UL3ANGL Type REAL INTEGER REAL Description UL3 Amplitude, magnitude of reported value UL3 Amplitude range UL3 Angle, magnitude of reported value
Table 471:
Name U3P
Table 472:
Name UL12 UL12RANG UL12ANGL UL23 UL23RANG UL23ANGL UL31 UL31RANG UL31ANGL
Table 473:
Name I3P
Table 474:
Name 3I0 3I0RANG 3I0ANGL I1 I1RANG I1ANGL I2 I2RANG I2ANGL
Section 15 Monitoring
1MRK505183-UEN C
Table 475:
Name U3P
Table 476:
Name 3U0 3U0RANG 3U0ANGL U1 U1RANG U1ANGL U2 U2RANG U2ANGL
15.1.5
Setting parameters
The available setting parameters of the measurement function (MMXU, MSQI) are depending on the actual hardware (TRM) and the logic configuration made in PCM600.
Table 477:
Name SLowLim SLowLowLim SMin SMax SRepTyp
W W -
0.001 0.001 -
QMin
VAr
0.001
-1000000000.000
Minimum value
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Section 15 Monitoring
Values (Range) Off On 1 - 99999 -10000000000.000 - 10000000000.000 Cyclic Dead band Int deadband 0.05 - 2000.00 L1, L2, L3 Arone Pos Seq L1L2 L2L3 L3L1 L1 L2 L3 0.000 - 6.000 -180.0 - 180.0 0.00 - 1.00 -1.000 - 0.000 0.000 - 1.000 Cyclic Dead band Int deadband -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 Cyclic Dead band Int deadband -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 Cyclic Dead band Int deadband -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 Cyclic Dead band Int deadband Unit A VAr Step 1 0.001 Default Off 3000 1000000000.000 Cyclic Description Operation Off / On Base setting for current level in A Maximum value Reporting type
UBase Mode
kV -
0.05 -
Base setting for voltage level in kV Selection of measured current and voltage
Deg -
Amplitude factor to scale power calculations Angle compensation for phase shift between measured I & U Low pass filter coefficient for power measurement, U and I Minimum value Maximum value Reporting type
V V -
0.001 0.001 -
A A -
0.001 0.001 -
Hz Hz -
0.001 0.001 -
Section 15 Monitoring
1MRK505183-UEN C
Table 478:
Name SDbRepInt SZeroDb SHiHiLim SHiLim SLimHyst PDbRepInt PZeroDb PHiHiLim PHiLim PLowLim PLowLowLim PLimHyst QDbRepInt QZeroDb QHiHiLim QHiLim QLowLim QLowLowLim QLimHyst PFDbRepInt PFZeroDb UGenZeroDb PFHiHiLim IGenZeroDb PFHiLim PFLowLim PFLowLowLim
1MRK505183-UEN C
Section 15 Monitoring
Values (Range) 0.000 - 100.000 1 - 300 0 - 100000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 0.000 - 100.000 1 - 300 0 - 100000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 0.000 - 100.000 1 - 300 0 - 100000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 0.000 - 100.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 Unit % Type m% V V V V % Type m% A A A A % Type m% Hz Hz Hz Hz % % % % Step 0.001 1 1 0.001 0.001 0.001 0.001 0.001 1 1 0.001 0.001 0.001 0.001 0.001 1 1 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 Default 5.000 10 0 460000.000 450000.000 380000.000 350000.000 5.000 10 0 900.000 800.000 -800.000 -900.000 5.000 10 0 65.000 63.000 47.000 45.000 5.000 0.000 0.000 0.000 Description Hysteresis value in % of range (common for all limits) Cycl: Report interval (s), Db: In % of range, Int Db: In %s Zero point clamping in 0,001% of range High High limit (physical value) High limit (physical value) Low limit (physical value) Low Low limit (physical value) Hysteresis value in % of range (common for all limits) Cycl: Report interval (s), Db: In % of range, Int Db: In %s Zero point clamping in 0,001% of range High High limit (physical value) High limit (physical value) Low limit (physical value) Low Low limit (physical value) Hysteresis value in % of range (common for all limits) Cycl: Report interval (s), Db: In % of range, Int Db: In %s Zero point clamping in 0,001% of range High High limit (physical value) High limit (physical value) Low limit (physical value) Low Low limit (physical value) Hysteresis value in % of range (common for all limits) Amplitude factor to calibrate voltage at 5% of Ur Amplitude factor to calibrate voltage at 30% of Ur Amplitude factor to calibrate voltage at 100% of Ur
Name PFLimHyst UDbRepInt UZeroDb UHiHiLim UHiLim ULowLim ULowLowLim ULimHyst IDbRepInt IZeroDb IHiHiLim IHiLim ILowLim ILowLowLim ILimHyst FrDbRepInt FrZeroDb FrHiHiLim FrHiLim FrLowLim FrLowLowLim FrLimHyst UAmpComp5 UAmpComp30 UAmpComp100
Section 15 Monitoring
Name IAmpComp5 IAmpComp30 IAmpComp100 IAngComp5 IAngComp30 IAngComp100 Values (Range) -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 Unit % % % Deg Deg Deg Step 0.001 0.001 0.001 0.001 0.001 0.001 Default 0.000 0.000 0.000 0.000 0.000 0.000 Description
1MRK505183-UEN C
Amplitude factor to calibrate current at 5% of Ir Amplitude factor to calibrate current at 30% of Ir Amplitude factor to calibrate current at 100% of Ir Angle calibration for current at 5% of Ir Angle calibration for current at 30% of Ir Angle calibration for current at 100% of Ir
Table 479:
Name IL1DbRepInt Operation IBase IL1Max IL1RepTyp
Type Type A -
1 1 0.001 -
10 10 1000.000 Cyclic
Cycl: Report interval (s), Db: In % of range, Int Db: In %s Cycl: Report interval (s), Db: In % of range, Int Db: In %s Maximum value Reporting type
Type Type A -
1 1 0.001 -
10 10 1000.000 Cyclic
Cycl: Report interval (s), Db: In % of range, Int Db: In %s Cycl: Report interval (s), Db: In % of range, Int Db: In %s Maximum value Reporting type
IL3AngDbRepInt
Type
10
1MRK505183-UEN C
Section 15 Monitoring
Table 480:
Name IL1ZeroDb IL1HiHiLim IL1HiLim IAmpComp5 IAmpComp30 IL1LowLim IL1LowLowLim IAmpComp100 IAngComp5 IL1Min IAngComp30 IAngComp100 IL1LimHys IL2ZeroDb IL2HiHiLim IL2HiLim IL2LowLim IL2LowLowLim IL2Min IL2LimHys IL3ZeroDb IL3HiHiLim IL3HiLim IL3LowLim
Section 15 Monitoring
Name IL3LowLowLim IL3Min IL3LimHys Values (Range) 0.000 10000000000.000 0.000 10000000000.000 0.000 - 100.000 Unit A A % Step 0.001 0.001 0.001 Default 0.000 0.000 5.000 Description
1MRK505183-UEN C
Low Low limit (physical value) Minimum value Hysteresis value in % of range and is common for all limits
Table 481:
Name UL1DbRepInt Operation UBase UL1Max UL1RepTyp
% Type Type V -
0.001 1 1 0.001 -
Hysteresis value in % of range and is common for all limits Cycl: Report interval (s), Db: In % of range, Int Db: In %s Cycl: Report interval (s), Db: In % of range, Int Db: In %s Maximum value Reporting type
% Type Type V -
0.001 1 1 0.001 -
Hysteresis value in % of range and is common for all limits Cycl: Report interval (s), Db: In % of range, Int Db: In %s Cycl: Report interval (s), Db: In % of range, Int Db: In %s Maximum value Reporting type
UL3LimHys UL3AnDbRepInt
% Type
0.001 1
5.000 10
Hysteresis value in % of range and is common for all limits Cycl: Report interval (s), Db: In % of range, Int Db: In %s
1MRK505183-UEN C
Section 15 Monitoring
Table 482:
Name UL1ZeroDb UL1HiHiLim UL1HiLim UL1LowLim UL1LowLowLim UAmpComp100 UL1Min UL2ZeroDb UL2HiHiLim UL2HiLim UL2LowLim UL2LowLowLim UL2Min UL3ZeroDb UL3HiHiLim UL3HiLim UL3LowLim UL3LowLowLim UL3Min
Table 483:
Name UL12DbRepInt Operation UBase UL12Max
Section 15 Monitoring
Name UL12RepTyp Values (Range) Cyclic Dead band Int deadband 1 - 300 1 - 300 0.000 10000000000.000 Cyclic Dead band Int deadband 1 - 300 1 - 300 0.000 10000000000.000 Cyclic Dead band Int deadband 1 - 300 Unit Step Default Cyclic Description Reporting type
1MRK505183-UEN C
Type Type V -
1 1 0.001 -
10 10 500000.000 Cyclic
Cycl: Report interval (s), Db: In % of range, Int Db: In %s Cycl: Report interval (s), Db: In % of range, Int Db: In %s Maximum value Reporting type
Type Type V -
1 1 0.001 -
10 10 500000.000 Cyclic
Cycl: Report interval (s), Db: In % of range, Int Db: In %s Cycl: Report interval (s), Db: In % of range, Int Db: In %s Maximum value Reporting type
UL31AnDbRepInt
Type
10
Table 484:
Name UL12ZeroDb UL12HiHiLim UL12HiLim UL12LowLim UL12LowLowLim UAmpComp100 UL12Min UL12LimHys UL23ZeroDb UL23HiHiLim UL23HiLim UL23LowLim
1MRK505183-UEN C
Section 15 Monitoring
Values (Range) 0.000 10000000000.000 0.000 10000000000.000 0.000 - 100.000 0 - 100000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0.000 - 100.000 Unit V V % m% V V V V V % Step 0.001 0.001 0.001 1 0.001 0.001 0.001 0.001 0.001 0.001 Default 350000.000 0.000 5.000 0 450000.000 420000.000 380000.000 350000.000 0.000 5.000 Description Low Low limit (physical value) Minimum value Hysteresis value in % of range and is common for all limits Zero point clamping in 0,001% of range High High limit (physical value) High limit (physical value) Low limit (physical value) Low Low limit (physical value) Minimum value Hysteresis value in % of range and is common for all limits
Name UL23LowLowLim UL23Min UL23LimHys UL31ZeroDb UL31HiHiLim UL31HiLim UL31LowLim UL31LowLowLim UL31Min UL31LimHys
Table 485:
Name 3I0DbRepInt 3I0Min 3I0Max 3I0RepTyp
Hysteresis value in % of range and is common for all limits Cycl: Report interval (s), Db: In % of range, Int Db: In %s Operation Mode On / Off Minimum value Maximum value Reporting type
I1DbRepInt I1Min
Type A
1 0.001
10 0.000
Cycl: Report interval (s), Db: In % of range, Int Db: In %s Minimum value
Section 15 Monitoring
Name I1Max I1RepTyp Values (Range) 0.000 10000000000.000 Cyclic Dead band Int deadband 1 - 300 -180.000 - 180.000 Cyclic Dead band Int deadband 1 - 300 0.000 10000000000.000 0.000 10000000000.000 Cyclic Dead band Int deadband 0.000 - 100.000 1 - 300 -180.000 - 180.000 Cyclic Dead band Int deadband Unit A Step 0.001 Default 1000.000 Cyclic Description Maximum value Reporting type
1MRK505183-UEN C
Type Deg -
1 0.001 -
10 180.000 Cyclic
Cycl: Report interval (s), Db: In % of range, Int Db: In %s Maximum value Reporting type
Type A A -
1 0.001 0.001 -
Cycl: Report interval (s), Db: In % of range, Int Db: In %s Minimum value Maximum value Reporting type
% Type Deg -
0.001 1 0.001 -
Hysteresis value in % of range and is common for all limits Cycl: Report interval (s), Db: In % of range, Int Db: In %s Minimum value Reporting type
Table 486:
Name 3I0ZeroDb 3I0HiHiLim 3I0HiLim 3I0LowLim 3I0LowLowLim 3I0AngZeroDb I1ZeroDb I1HiHiLim I1HiLim
1MRK505183-UEN C
Section 15 Monitoring
Values (Range) 0.000 10000000000.000 0.000 10000000000.000 0.000 - 100.000 0 - 100000 -180.000 - 180.000 0 - 100000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0 - 100000 -180.000 - 180.000 Unit A A % m% Deg m% A A A A m% Deg Step 0.001 0.001 0.001 1 0.001 1 0.001 0.001 0.001 0.001 1 0.001 Default 0.000 0.000 5.000 0 -180.000 0 900.000 800.000 0.000 0.000 0 180.000 Description Low limit (physical value) Low Low limit (physical value) Hysteresis value in % of range and is common for all limits Zero point clamping in 0,001% of range Minimum value Zero point clamping in 0,001% of range High High limit (physical value) High limit (physical value) Low limit (physical value) Low Low limit (physical value) Zero point clamping in 0,001% of range Maximum value
Name I1LowLim I1LowLowLim I1LimHys I1AngZeroDb I1AngMin I2ZeroDb I2HiHiLim I2HiLim I2LowLim I2LowLowLim I2AngZeroDb I2AngMax
Table 487:
Name 3U0DbRepInt 3U0Min 3U0Max 3U0RepTyp
Hysteresis value in % of range and is common for all limits Cycl: Report interval (s), Db: In % of range, Int Db: In %s Operation Mode On / Off Zero point clamping in 0,001% of range Minimum value Maximum value Reporting type
U1DbRepInt
Type
10
Section 15 Monitoring
Name U1Min U1Max U1RepTyp Values (Range) 0.000 10000000000.000 0.000 10000000000.000 Cyclic Dead band Int deadband 0.000 - 100.000 1 - 300 1 - 300 0.000 10000000000.000 0.000 10000000000.000 Cyclic Dead band Int deadband 0.000 - 100.000 1 - 300 -180.000 - 180.000 -180.000 - 180.000 Cyclic Dead band Int deadband -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 Unit V V Step 0.001 0.001 Default 0.000 300000.000 Cyclic Description Minimum value Maximum value Reporting type
1MRK505183-UEN C
% Type Type V V -
Hysteresis value in % of range and is common for all limits Cycl: Report interval (s), Db: In % of range, Int Db: In %s Cycl: Report interval (s), Db: In % of range, Int Db: In %s Minimum value Maximum value Reporting type
Hysteresis value in % of range and is common for all limits Cycl: Report interval (s), Db: In % of range, Int Db: In %s Minimum value Maximum value Reporting type
% % %
Amplitude factor to pre-calibrate voltage at 5% of Ir Amplitude factor to pre-calibrate voltage at 30% of Ir Amplitude factor to pre-calibrate voltage at 100% of Ir
Table 488:
Name 3U0ZeroDb 3U0HiHiLim 3U0HiLim 3U0LowLim 3U0LowLowLim
1MRK505183-UEN C
Section 15 Monitoring
Values (Range) 0 - 100000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0 - 100000 -180.000 - 180.000 -180.000 - 180.000 Cyclic Dead band Int deadband 0 - 100000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0.000 10000000000.000 0 - 100000 Unit m% V V V V m% Deg Deg Step 1 0.001 0.001 0.001 0.001 1 0.001 0.001 Default 0 260000.000 240000.000 220000.000 200000.000 0 -180.000 180.000 Cyclic Description Zero point clamping in 0,001% of range High High limit (physical value) High limit (physical value) Low limit (physical value) Low Low limit (physical value) Zero point clamping in 0,001% of range Minimum value Maximum value Reporting type
Name U1ZeroDb U1HiHiLim U1HiLim U1LowLim U1LowLowLim U1AngZeroDb U1AngMin U1AngMax U1AngRepTyp
m% V V V V m%
Zero point clamping in 0,001% of range High High limit (physical value) High limit (physical value) Low limit (physical value) Low Low limit (physical value) Zero point clamping in 0,001% of range
15.1.6
Technical data
Table 489:
Function Frequency Voltage Connected current Active power, P Reactive power, Q Apparent power, S Power factor, cos ()
Section 15 Monitoring
1MRK505183-UEN C
15.2
15.2.1
Introduction
Event counter (CNTGGIO) has six counters which are used for storing the number of times each counter input has been activated.
15.2.2
Principle of operation
Event counter (CNTGGIO) has six counter inputs. CNTGGIO stores how many times each of the inputs has been activated. The counter memory for each of the six inputs is updated, giving the total number of times the input has been activated, as soon as an input is activated. The maximum count up speed is 10 pulses per second. The maximum counter value is 10 000. For counts above 10 000 the counter will stop at 10 000 and no restart will take place. To not risk that the flash memory is worn out due to too many writings, a mechanism for limiting the number of writings per time period is included in the product. This however gives as a result that it can take long time, up to several minutes, before a new value is stored in the flash memory. And if a new CNTGGIO value is not stored before auxiliary power interruption, it will be lost. CNTGGIO stored values in flash memory will however not be lost at an auxiliary power interruption. The function block also has an input BLOCK. At activation of this input all six counters are blocked. The input can for example, be used for blocking the counters at testing.The function block has an input RESET. At activation of this input all six counters are set to 0. All inputs are configured via PCM600.
15.2.2.1
Reporting
The content of the counters can be read in the local HMI. Reset of counters can be performed in the local HMI and a binary input. Reading of content can also be performed remotely, for example from a IEC 61850 client. The value can also be presented as a measuring value on the local HMI graphical display.
1MRK505183-UEN C
Section 15 Monitoring
Design
The function block has six inputs for increasing the counter values for each of the six counters respectively. The content of the counters are stepped one step for each positive edge of the input respectively. The function block also has an input BLOCK. At activation of this input all six counters are blocked and are not updated. Valid number is held. The function block has an input RESET. At activation of this input all six counters are set to 0.
15.2.2.2
15.2.3
Function block
CNTGGIO BLOCK COUNTER1 COUNTER2 COUNTER3 COUNTER4 COUNTER5 COUNTER6 RESET VALUE1 VALUE2 VALUE3 VALUE4 VALUE5 VALUE6
IEC05000345-2-en.vsd
IEC05000345 V2 EN
Figure 403:
15.2.4
Input signals
Table 490:
Name BLOCK COUNTER1 COUNTER2 COUNTER3 COUNTER4 COUNTER5 COUNTER6 RESET
Table 491:
Name VALUE1 VALUE2 VALUE3
Section 15 Monitoring
Name VALUE4 VALUE5 VALUE6 Type INTEGER INTEGER INTEGER Description Output of counter4 Output of counter5 Output of counter6
1MRK505183-UEN C
15.2.5
Table 492:
Name Operation
Setting parameters
CNTGGIO Group settings (basic)
Values (Range) Off On Unit Step Default Off Description Operation Off / On
15.2.6
Technical data
Table 493:
Function Counter value Max. count up speed
15.3
15.3.1
Introduction
When using a Substation Automation system with LON or SPA communication, time-tagged events can be sent at change or cyclically from the IED to the station level. These events are created from any available signal in the IED that is connected to the Event function (EVENT). The event function block is used for LON and SPA communication. Analog and double indication values are also transferred through EVENT function.
15.3.2
Principle of operation
The main purpose of the event function (EVENT) is to generate events when the state or value of any of the connected input signals is in a state, or is undergoing a state transition, for which event generation is enabled.
1MRK505183-UEN C
Section 15 Monitoring
Each EVENT function has 16 inputs INPUT1 - INPUT16. Each input can be given a name from the Application Configuration tool. The inputs are normally used to create single events, but are also intended for double indication events. EVENT function also has an input BLOCK to block the generation of events. The events that are sent from the IED can originate from both internal logical signals and binary input channels. The internal signals are time-tagged in the main processing module, while the binary input channels are time-tagged directly on the input module. The time-tagging of the events that are originated from internal logical signals have a resolution corresponding to the execution cyclicity of EVENT function. The time-tagging of the events that are originated from binary input signals have a resolution of 1 ms. The outputs from EVENT function are formed by the reading of status, events and alarms by the station level on every single input. The user-defined name for each input is intended to be used by the station level. All events according to the event mask are stored in a buffer, which contains up to 1000 events. If new events appear before the oldest event in the buffer is read, the oldest event is overwritten and an overflow alarm appears. The events are produced according to the set-event masks. The event masks are treated commonly for both the LON and SPA communication. The EventMask can be set individually for each input channel. These settings are available: NoEvents OnSet OnReset OnChange AutoDetect
It is possible to define which part of EVENT function generates the events. This can be performed individually for the SPAChannelMask and LONChannelMask respectively. For each communication type these settings are available: Off Channel 1-8 Channel 9-16 Channel 1-16
For LON communication the events normally are sent to station level at change. It is possibly also to set a time for cyclic sending of the events individually for each input channel. To protect the SA system from signals with a high change rate that can easily saturate the event system or the communication subsystems behind it, a quota limiter is implemented. If an input creates events at a rate that completely consume the granted quota then further events from the channel will be blocked. This block will be removed when the input calms down and the accumulated quota reach 66%
739 Technical reference manual
Section 15 Monitoring
1MRK505183-UEN C
of the maximum burst quota. The maximum burst quota per input channel is 45 events per second.
15.3.3
Function block
EVENT BLOCK ^INPUT1 ^INPUT2 ^INPUT3 ^INPUT4 ^INPUT5 ^INPUT6 ^INPUT7 ^INPUT8 ^INPUT9 ^INPUT10 ^INPUT11 ^INPUT12 ^INPUT13 ^INPUT14 ^INPUT15 ^INPUT16 IEC05000697-2-en.vsd
IEC05000697 V2 EN
Figure 404:
15.3.4
1MRK505183-UEN C
Section 15 Monitoring
Name INPUT12 INPUT13 INPUT14 INPUT15 INPUT16 Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Default 0 0 0 0 0 Description Input 12 Input 13 Input 14 Input 15 Input 16
15.3.5
Table 495:
Name SPAChannelMask
Setting parameters
EVENT Non group settings (basic)
Values (Range) Off Channel 1-8 Channel 9-16 Channel 1-16 Off Channel 1-8 Channel 9-16 Channel 1-16 NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect Unit Step Default Off Description SPA channel mask
LONChannelMask
Off
EventMask1
AutoDetect
EventMask2
AutoDetect
EventMask3
AutoDetect
EventMask4
AutoDetect
EventMask5
AutoDetect
EventMask6
AutoDetect
Section 15 Monitoring
Name EventMask7 Values (Range) NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect NoEvents OnSet OnReset OnChange AutoDetect 0 - 3600 0 - 3600 0 - 3600 0 - 3600 0 - 3600 Unit Step Default AutoDetect Description
1MRK505183-UEN C
EventMask8
AutoDetect
EventMask9
AutoDetect
EventMask10
AutoDetect
EventMask11
AutoDetect
EventMask12
AutoDetect
EventMask13
AutoDetect
EventMask14
AutoDetect
EventMask15
AutoDetect
EventMask16
AutoDetect
s s s s s
1 1 1 1 1
2 2 2 2 2
Minimum reporting interval input 1 Minimum reporting interval input 2 Minimum reporting interval input 3 Minimum reporting interval input 4 Minimum reporting interval input 5
1MRK505183-UEN C
Section 15 Monitoring
Values (Range) 0 - 3600 0 - 3600 0 - 3600 0 - 3600 0 - 3600 0 - 3600 0 - 3600 0 - 3600 0 - 3600 0 - 3600 0 - 3600 Unit s s s s s s s s s s s Step 1 1 1 1 1 1 1 1 1 1 1 Default 2 2 2 2 2 2 2 2 2 2 2 Description Minimum reporting interval input 6 Minimum reporting interval input 7 Minimum reporting interval input 8 Minimum reporting interval input 9 Minimum reporting interval input 10 Minimum reporting interval input 11 Minimum reporting interval input 12 Minimum reporting interval input 13 Minimum reporting interval input 14 Minimum reporting interval input 15 Minimum reporting interval input 16
Name MinRepIntVal6 MinRepIntVal7 MinRepIntVal8 MinRepIntVal9 MinRepIntVal10 MinRepIntVal11 MinRepIntVal12 MinRepIntVal13 MinRepIntVal14 MinRepIntVal15 MinRepIntVal16
15.4
15.4.1
Introduction
The Logical signal status report (BINSTATREP) function makes it possible for a SPA master to poll signals from various other functions.
15.4.2
Principle of operation
The Logical signal status report (BINSTATREP) function has 16 inputs and 16 outputs. The output status follows the inputs and can be read from the local HMI or via SPA communication. When an input is set, the respective output is set for a user defined time. If the input signal remains set for a longer period, the output will remain set until the input signal resets.
Section 15 Monitoring
1MRK505183-UEN C
INPUTn OUTPUTn t t
IEC09000732-1-en.vsd
IEC09000732 V1 EN
Figure 405:
15.4.3
Function block
BINSTATREP BLOCK OUTPUT1 ^INPUT1 OUTPUT2 ^INPUT2 OUTPUT3 ^INPUT3 OUTPUT4 ^INPUT4 OUTPUT5 ^INPUT5 OUTPUT6 ^INPUT6 OUTPUT7 ^INPUT7 OUTPUT8 ^INPUT8 OUTPUT9 ^INPUT9 OUTPUT10 ^INPUT10 OUTPUT11 ^INPUT11 OUTPUT12 ^INPUT12 OUTPUT13 ^INPUT13 OUTPUT14 ^INPUT14 OUTPUT15 ^INPUT15 OUTPUT16 ^INPUT16 IEC09000730-1-en.vsd
IEC09000730 V1 EN
Figure 406:
15.4.4
1MRK505183-UEN C
Section 15 Monitoring
Name INPUT10 INPUT11 INPUT12 INPUT13 INPUT14 INPUT15 INPUT16 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 Description Single status report input 10 Single status report input 11 Single status report input 12 Single status report input 13 Single status report input 14 Single status report input 15 Single status report input 16
Table 497:
Name OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 OUTPUT5 OUTPUT6 OUTPUT7 OUTPUT8 OUTPUT9 OUTPUT10 OUTPUT11 OUTPUT12 OUTPUT13 OUTPUT14 OUTPUT15 OUTPUT16
15.4.5
Table 498:
Name t
Setting parameters
BINSTATREP Non group settings (basic)
Values (Range) 0.000 - 60000.000 Unit s Step 0.001 Default 10.000 Description Time delay of function
15.5
1MRK505183-UEN C
The accurate fault locator is an essential component to minimize the outages after a persistent fault and/or to pin-point a weak spot on the line. The fault locator is an impedance measuring function giving the distance to the fault in percent, km or miles. The main advantage is the high accuracy achieved by compensating for load current and for the mutual zero-sequence effect on double circuit lines. The compensation includes setting of the remote and local sources and calculation of the distribution of fault currents from each side. This distribution of fault current, together with recorded load (pre-fault) currents, is used to exactly calculate the fault position. The fault can be recalculated with new source data at the actual fault to further increase the accuracy. Especially on heavily loaded long lines (where the fault locator is most important) where the source voltage angles can be up to 35-40 degrees apart the accuracy can be still maintained with the advanced compensation included in fault locator.
15.5.2
Principle of operation
The Fault locator (LMBRFLO) in the IED is an essential complement to other monitoring functions, since it measures and indicates the distance to the fault with great accuracy. When calculating distance to fault, pre-fault and fault phasors of currents and voltages are selected from the Trip value recorder data, thus the analog signals used by the fault locator must be among those connected to the disturbance report function. The analog configuration (channel selection) is performed using the parameter setting tool within PCM600. The calculation algorithm considers the effect of load currents, double-end infeed and additional fault resistance.
R0L+jX0L R1L+jX1L R1A+jX1A Z0m=Z0m+jX0m R0L+jX0L R1L+jX1L
DRPRDRE LMBRFLO IEC05000045_2_en.vsd
IEC05000045 V2 EN
R1B+jX1B
Figure 407:
Simplified network configuration with network data, required for settings of the fault location-measuring function
1MRK505183-UEN C
Section 15 Monitoring
If source impedance in the near and far end of the protected line have changed in a significant manner relative to the set values at fault location calculation time (due to exceptional switching state in the immediate network, power generation out of order, and so on), new values can be entered via the local HMI and a recalculation of the distance to the fault can be ordered using the algorithm described below. Its also possible to change fault loop. In this way, a more accurate location of the fault can be achieved. The function indicates the distance to the fault as a percentage of the line length, in kilometers or miles as selected on the local HMI. The fault location is stored as a part of the disturbance report information (ER, DR, IND, TVR and FL) and managed via the local HMI or PCM600.
15.5.2.1
Measuring Principle
For transmission lines with voltage sources at both line ends, the effect of doubleend infeed and additional fault resistance must be considered when calculating the distance to the fault from the currents and voltages at one line end. If this is not done, the accuracy of the calculated figure will vary with the load flow and the amount of additional fault resistance. The calculation algorithm used in the fault locator in compensates for the effect of double-end infeed, additional fault resistance and load current.
15.5.2.2
Section 15 Monitoring
1MRK505183-UEN C
L F
ZA
A IA
pZL IF
IB
(1-p).ZL
ZB
UA
RF
xx01000171.vsd
IEC01000171 V1 EN
Figure 408:
(Equation 147)
Where: IA IF
p
is the line current after the fault, that is, pre-fault current plus current change due to the fault, is the fault current and is a relative distance to the fault
(Equation 148)
Where: IFA DA is the change in current at the point of measurement, IED A and is a fault current-distribution factor, that is, the ratio between the fault current at line end A and the total fault current.
(Equation 149)
1MRK505183-UEN C
Section 15 Monitoring
Thus, the general fault location equation for a single line is:
I FA U A = I A p Z L + ------- R F DA
EQUATION98 V1 EN
(Equation 150)
Table 499:
Fault type: L1-N
3 -- D ( I L1A I 0A ) 2
EQUATION110 V1 EN
L2-N
UL2A
IL2A + KN x INA
3 -- D ( I L2A I 0A ) 2
EQUATION111 V1 EN
L3-N
UL3A
IL3A + KN x INA
3 -- D ( I L3A I0A ) 2
EQUATION112 V1 EN
UL1A-UL2A UL2A-UL3A
DIL 1 L 2 A
EQUATION113 V1 EN
DIL2L3A
EQUATION114 V1 EN
L3-L1, L3-L1-N
UL3A-UL1A
IL3A - IL1A
DIL3L1A
EQUATION115 V1 EN
The KN complex quantity for zero-sequence compensation for the single line is equal to:
Z0L Z 1L K N = ----------------------3 Z1L
EQUATION99 V1 EN
(Equation 151)
DI is the change in current, that is the current after the fault minus the current before the fault. In the following, the positive sequence impedance for ZA, ZB and ZL is inserted into the equations, because this is the value used in the algorithm. For double lines, the fault equation is:
Section 15 Monitoring
1MRK505183-UEN C
I FA U A = I A p Z 1L + ------- RF + I 0P Z 0M DA
EQUATION100 V1 EN
(Equation 152)
Where: I0P Z0M DA is a zero sequence current of the parallel line, is a mutual zero sequence impedance and is the distribution factor of the parallel line, which is:
( 1 p ) ( ZA + ZA L + ZB ) + Z B DA = ---------------------------------------------------------------------------2 ZA + Z L + 2 Z B
EQUATION101 V1 EN
(Equation 153)
From these equations it can be seen, that, if Z0m = 0, then the general fault location equation for a single line is obtained. Only the distribution factor differs in these two cases. Because the DA distribution factor according to equation 150 or 152 is a function of p, the general equation 152 can be written in the form:
p p K1 + K2 K3 RF = 0
EQUATION103 V1 EN
(Equation 154)
Where:
UA ZB K 1 = --------------- + -------------------------- + 1 I A ZL Z L + ZA DD
EQUATION104 V1 EN
(Equation 155)
UA ZB K2 = -------------- -------------------------- + 1 IA Z L Z L + Z A DD
EQUATION105 V1 EN
(Equation 156)
IF A ZA + ZB K 3 = --------------- -------------------------- + 1 Z 1 + ZA DD IA ZL
EQUATION106 V1 EN
(Equation 157)
and:
750 Technical reference manual
1MRK505183-UEN C
Section 15 Monitoring
ZADD = ZA + ZB for parallel lines. IA, IFA and UA are given in the above table. KN is calculated automatically according to equation 153. ZA, ZB, ZL, Z0L and Z0M are setting parameters.
For a single line, Z0M = 0 and ZADD = 0. Thus, equation 154 applies to both single and parallel lines. Equation 154 can be divided into real and imaginary parts:
p p Re ( K 1 ) + Re ( K 2 ) R F Re ( K 3 ) = 0
EQUATION107 V1 EN
(Equation 158)
p Im ( K1 ) + Im ( K 2 ) R F Im ( K3 ) = 0
EQUATION108 V1 EN
(Equation 159)
If the imaginary part of K3 is not zero, RF can be solved according to equation 159, and then inserted to equation 158. According to equation 158, the relative distance to the fault is solved as the root of a quadratic equation. Equation 158 gives two different values for the relative distance to the fault as a solution. A simplified load compensated algorithm, which gives an unequivocal figure for the relative distance to the fault, is used to establish the value that should be selected. If the load compensated algorithms according to the above do not give a reliable solution, a less accurate, non-compensated impedance model is used to calculate the relative distance to the fault.
15.5.2.3
(Equation 160)
The accuracy of the distance-to-fault calculation, using the non-compensated impedance model, is influenced by the pre-fault load current. So, this method is only used if the load compensated models do not function.
Section 15 Monitoring
15.5.2.4 IEC 60870-5-103
1MRK505183-UEN C
The communication protocol IEC 60870-5-103 may be used to poll fault location information from the IED to a master (that is station HSI). There are two outputs that must be connected to appropriate inputs on the function block I103StatFltDis, FLTDISTX gives distance to fault (reactance, according the standard) and CALCMADE gives a pulse (100 ms) when a result is obtainable on FLTDISTX output.
15.5.3
Function block
LMBRFLO PHSELL1* FLTDISTX PHSELL2* CALCMADE PHSELL3* BCD_80 CALCDIST* BCD_40 BCD_20 BCD_10 BCD_8 BCD_4 BCD_2 BCD_1 IEC05000679-2-en.vsd
IEC05000679 V3 EN
Figure 409:
15.5.4
Table 501:
Name FLTDISTX CALCMADE BCD_80 BCD_40 BCD_20 BCD_10 BCD_8 BCD_4 BCD_2 BCD_1
1MRK505183-UEN C
15.5.5
Table 502:
Name R1A X1A R1B X1B R1L X1L R0L X0L R0M X0M LineLength
Table 503:
Name DrepChNoIL1 DrepChNoIL2 DrepChNoIL3 DrepChNoIN DrepChNoIP DrepChNoUL1 DrepChNoUL2 DrepChNoUL3
1MRK505183-UEN C
15.6
15.6.1
Introduction
The current and voltage measurements functions (CVMMXU, CMMXU, VMMXU and VNMMXU), current and voltage sequence measurement functions (CMSQI and VMSQI) and IEC 61850 generic communication I/O functions (MVGGIO) are provided with measurement supervision functionality. All measured values can be supervised with four settable limits that is low-low limit, low limit, high limit and high-high limit. The measure value expander block (RANGE_XP) has been introduced to be able to translate the integer output signal from the measuring functions to 5 binary signals that is below low-low limit, below low limit, normal, above high-high limit or above high limit. The output signals can be used as conditions in the configurable logic.
15.6.2
Principle of operation
The input signal must be connected to a range output of a measuring function block (CVMMXU, CMMXU, VMMXU, VNMMXU, CMSQI, VMSQ or MVGGIO). The function block converts the input integer value to five binary output signals according to table 505.
1MRK505183-UEN C
Section 15 Monitoring
Table 505:
Measured supervised value is: Output: LOWLOW LOW NORMAL HIGH HIGHHIGH
15.6.3
Function block
RANGE* RANGE_XP HIGHHIGH HIGH NORMAL LOW LOWLOW IEC05000346-2-en.vsd
IEC05000346 V2 EN
Figure 410:
15.6.4
Table 507:
Name HIGHHIGH HIGH NORMAL LOW LOWLOW
15.7
Section 15 Monitoring
Function description Analog input signals Disturbance report Disturbance report Disturbance report Disturbance report IEC 61850 identification A41RADR DRPRDRE A1RADR A4RADR B1RBDR IEC 60617 identification -
1MRK505183-UEN C
15.7.1
Introduction
Complete and reliable information about disturbances in the primary and/or in the secondary system together with continuous event-logging is accomplished by the disturbance report functionality. Disturbance report DRPRDRE, always included in the IED, acquires sampled data of all selected analog input and binary signals connected to the function block that is, maximum 40 analog and 96 binary signals. Disturbance report functionality is a common name for several functions: Event list Indications Event recorder Trip value recorder Disturbance recorder Fault locator
Disturbance report function is characterized by great flexibility regarding configuration, starting conditions, recording times and large storage capacity. A disturbance is defined as an activation of an input in the AxRADR or BxRBDR function blocks, which is set to trigger the disturbance recorder. All signals from start of pre-fault time to the end of post-fault time will be included in the recording. Every disturbance report recording is saved in the IED in the standard Comtrade format. The same applies to all events, which are continuously saved in a ringbuffer. The local HMI is used to get information about the recordings, but the disturbance report files may be uploaded to PCM600 and further analysis using the disturbance handling tool.
15.7.2
Principle of operation
Disturbance report DRPRDRE is a common name for several functions to supply the operator, analysis engineer, and so on, with sufficient information about events in the system. The functions included in the disturbance report are:
1MRK505183-UEN C
Section 15 Monitoring
Event list (EL) Indications (IND) Event recorder (ER) Trip value recorder(TVR) Disturbance recorder (DR)
Figure 411 shows the relations between Disturbance Report, included functions and function blocks. Event list (EL), Event recorder (ER) and Indications (IND) uses information from the binary input function blocks (BxRBDR). Trip value recorder (TVR) uses analog information from the analog input function blocks (AxRADR). Disturbance recorder DRPRDRE acquires information from both AxRADR and BxRBDR.
A1-4RADR Disturbance Report
FL
Fault locator
B1-6RBDR
Disturbance recorder
Binary signals
IEC09000336-2-en.vsd
IEC09000336 V2 EN
Figure 411:
The whole disturbance report can contain information for a number of recordings, each with the data coming from all the parts mentioned above. The event list function is working continuously, independent of disturbance triggering, recording time, and so on. All information in the disturbance report is stored in non-volatile flash memories. This implies that no information is lost in case of loss of auxiliary power. Each report will get an identification number in the interval from 0-999.
Section 15 Monitoring
1MRK505183-UEN C
Disturbance report
Record no. N
Indications
Trip values
Event recordings
Disturbance recording
Fault locator
Event list
en05000125.vsd
IEC05000125 V1 EN
Figure 412:
Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded when the memory is full, the oldest disturbance report is overwritten by the new one. The total recording capacity for the disturbance recorder is depending of sampling frequency, number of analog and binary channels and recording time. Figure 413 shows the number of recordings versus the total recording time tested for a typical configuration, that is, in a 50 Hz system it is possible to record 100 where the average recording time is 3.4 seconds. The memory limit does not affect the rest of the disturbance report (Event list (EL), Event recorder (ER), Indications (IND) and Trip value recorder (TVR)).
6,3 s 50 Hz
40
6,3 s 60 Hz
Figure 413:
Number of recordings
Disturbance information
Date and time of the disturbance, the indications, events, fault location and the trip values are available on the local HMI. To acquire a complete disturbance report the
758 Technical reference manual
1MRK505183-UEN C
Section 15 Monitoring
user must use a PC and - either the PCM600 Disturbance handling tool - or a FTP or MMS (over 61850) client. The PC can be connected to the IED front, rear or remotely via the station bus (Ethernet ports).
Indications (IND)
Indications is a list of signals that were activated during the total recording time of the disturbance (not time-tagged), see section "Indications" for more detailed information.
The event recorder may contain a list of up to 150 time-tagged events, which have occurred during the disturbance. The information is available via the local HMI or PCM600, see section "Event recorder" for more detailed information.
The event list may contain a list of totally 1000 time-tagged events. The list information is continuously updated when selected binary signals change state. The oldest data is overwritten. The logged signals may be presented via local HMI or PCM600, see section "Event list" for more detailed information.
The recorded trip values include phasors of selected analog signals before the fault and during the fault, see section "Trip value recorder" for more detailed information.
Disturbance recorder records analog and binary signal data before, during and after the fault, see section "Disturbance recorder" for more detailed information.
The fault location function calculates the distance to fault, see section "Fault locator LMBRFLO" for more detailed information.
Time tagging
The IED has a built-in real-time calendar and clock. This function is used for all time tagging within the disturbance report
Recording times
Disturbance report DRPRDRE records information about a disturbance during a settable time frame. The recording times are valid for the whole disturbance report. Disturbance recorder (DR), event recorder (ER) and indication function register disturbance data and events during tRecording, the total recording time. The total recording time, tRecording, of a recorded disturbance is:
tRecording =
PreFaultrecT + tFault + PostFaultrecT or PreFaultrecT + TimeLimit, depending on which criterion stops the current disturbance recording
Section 15 Monitoring
1MRK505183-UEN C
3
en05000487.vsd
IEC05000487 V1 EN
Figure 414:
PreFaultRecT, 1 tFault, 2
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all activated triggers are reset. Use the setting PostFaultRecT to set this time. TimeLimit Limit time. The maximum allowed recording time after the disturbance recording was triggered. The limit time is used to eliminate the consequences of a trigger that does not reset within a reasonable time interval. It limits the maximum recording time of a recording and prevents subsequent overwriting of already stored disturbances. Use the setting TimeLimit to set this time.
Up to 40 analog signals can be selected for recording by the Disturbance recorder and triggering of the Disturbance report function. Out of these 40, 30 are reserved for external analog signals from analog input modules (TRM) and line data communication module (LDCM) via preprocessing function blocks (SMAI) and summation block (3PHSUM). The last 10 channels may be connected to internally calculated analog signals available as function block output signals (mA input signals, phase differential currents, bias currents and so on).
Analog signals
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Section 15 Monitoring
SMAI External analogue signals Block ^GRP2L1 ^GRP2L2 ^GRP2L3 ^GRP2N Type AI3P AI1 AI2 AI3 AI4 AIN
A1RADR A2RADR INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 ... A4RADR INPUT31 INPUT32 INPUT33 INPUT34 INPUT35 INPUT36 ... INPUT40
IEC10000029-1-en.vsd
A3RADR
IEC10000029 V1 EN
Figure 415:
The external input signals will be acquired, filtered and skewed and (after configuration) available as an input signal on the AxRADR function block via the SMAI function block. The information is saved at the Disturbance report base sampling rate (1000 or 1200 Hz). Internally calculated signals are updated according to the cycle time of the specific function. If a function is running at lower speed than the base sampling rate, Disturbance recorder will use the latest updated sample until a new updated sample is available. If the IED is preconfigured the only tool needed for analog configuration of the Disturbance report is the Signal Matrix Tool (SMT, external signal configuration). In case of modification of a preconfigured IED or general internal configuration the Application Configuration tool within PCM600 is used. The preprocessor function block (SMAI) calculates the residual quantities in cases where only the three phases are connected (AI4-input not used).SMAI makes the information available as a group signal output, phase outputs and calculated residual output (AIN-output). In situations where AI4-input is used as an input signal the corresponding information is available on the non-calculated output (AI4) on the SMAI function block. Connect the signals to the AxRADR accordingly. For each of the analog signals, Operation = On means that it is recorded by the disturbance recorder. The trigger is independent of the setting of Operation, and triggers even if operation is set to Off. Both undervoltage and overvoltage can be used as trigger conditions. The same applies for the current signals.
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1MRK505183-UEN C
If Operation = Off, no waveform (samples) will be recorded and reported in graph. However, Trip value, pre-fault and fault value will be recorded and reported. The input channel can still be used to trig the disturbance recorder. If Operation = On, waveform (samples) will also be recorded and reported in graph. The analog signals are presented only in the disturbance recording, but they affect the entire disturbance report when being used as triggers.
Binary signals
Up to 96 binary signals can be selected to be handled by disturbance report. The signals can be selected from internal logical and binary input signals. A binary signal is selected to be recorded when: the corresponding function block is included in the configuration the signal is connected to the input of the function block
Each of the 96 signals can be selected as a trigger of the disturbance report (Operation = Off). A binary signal can be selected to activate the red LED on the local HMI (SetLED = On/Off). The selected signals are presented in the event recorder, event list and the disturbance recording. But they affect the whole disturbance report when they are used as triggers. The indications are also selected from these 96 signals with local HMI IndicationMask=Show/Hide.
Trigger signals
The trigger conditions affect the entire disturbance report, except the event list, which runs continuously. As soon as at least one trigger condition is fulfilled, a complete disturbance report is recorded. On the other hand, if no trigger condition is fulfilled, there is no disturbance report, no indications, and so on. This implies the importance of choosing the right signals as trigger conditions. A trigger can be of type: Manual trigger Binary-signal trigger Analog-signal trigger (over/under function)
Manual trigger
A disturbance report can be manually triggered from the local HMI, PCM600 or via station bus (IEC 61850). When the trigger is activated, the manual trigger signal is generated. This feature is especially useful for testing. Refer to the operator's manual for procedure.
Binary-signal trigger
Any binary signal state (logic one or a logic zero) can be selected to generate a trigger (Triglevel = Trig on 0/Trig on 1). When a binary signal is selected to
1MRK505183-UEN C
Section 15 Monitoring
generate a trigger from a logic zero, the selected signal will not be listed in the indications list of the disturbance report.
Analog-signal trigger
All analog signals are available for trigger purposes, no matter if they are recorded in the disturbance recorder or not. The settings are OverTrigOp, UnderTrigOp, OverTrigLe and UnderTrigLe. The check of the trigger condition is based on peak-to-peak values. When this is found, the absolute average value of these two peak values is calculated. If the average value is above the threshold level for an overvoltage or overcurrent trigger, this trigger is indicated with a greater than (>) sign with the user-defined name. If the average value is below the set threshold level for an undervoltage or undercurrent trigger, this trigger is indicated with a less than (<) sign with its name. The procedure is separately performed for each channel. This method of checking the analog start conditions gives a function which is insensitive to DC offset in the signal. The operate time for this start is typically in the range of one cycle, 20 ms for a 50 Hz network. All under/over trig signal information is available on the local HMI and PCM600.
Post Retrigger
Disturbance report function does not respond to any new trig condition, during a recording. Under certain circumstances the fault condition may reoccur during the post-fault recording, for instance by automatic reclosing to a still faulty power line. In order to capture the new disturbance it is possible to allow retriggering (PostRetrig = On) during the post-fault time. In this case a new, complete recording will start and, during a period, run in parallel with the initial recording. When the retrig parameter is disabled (PostRetrig = Off), a new recording will not start until the post-fault (PostFaultrecT or TimeLimit) period is terminated. If a new trig occurs during the post-fault period and lasts longer than the proceeding recording a new complete recording will be fetched. Disturbance report function can handle maximum 3 simultaneous disturbance recordings.
15.7.3
Function block
DRPRDRE DRPOFF RECSTART RECMADE CLEARED MEMUSED IEC05000406-3-en.vsd
IEC05000406 V3 EN
Figure 416:
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1MRK505183-UEN C
A1RADR ^INPUT1 ^INPUT2 ^INPUT3 ^INPUT4 ^INPUT5 ^INPUT6 ^INPUT7 ^INPUT8 ^INPUT9 ^INPUT10 IEC05000430-3-en.vsd
IEC05000430 V3 EN
Figure 417:
A4RADR ^INPUT31 ^INPUT32 ^INPUT33 ^INPUT34 ^INPUT35 ^INPUT36 ^INPUT37 ^INPUT38 ^INPUT39 ^INPUT40 IEC05000431-3-en.vsd
IEC05000431 V3 EN
Figure 418:
B1RBDR ^INPUT1 ^INPUT2 ^INPUT3 ^INPUT4 ^INPUT5 ^INPUT6 ^INPUT7 ^INPUT8 ^INPUT9 ^INPUT10 ^INPUT11 ^INPUT12 ^INPUT13 ^INPUT14 ^INPUT15 ^INPUT16 IEC05000432-3-en.vsd
IEC05000432 V3 EN
Figure 419:
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15.7.4
Table 509:
Name INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 INPUT7 INPUT8 INPUT9 INPUT10
Table 510:
Name INPUT31 INPUT32 INPUT33 INPUT34 INPUT35 INPUT36 INPUT37
Section 15 Monitoring
Name INPUT38 INPUT39 INPUT40 Type REAL REAL REAL Default 0 0 0 Description Analogue channel 38 Analogue channel 39 Analogue channel 40
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Table 511:
Name INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 INPUT7 INPUT8 INPUT9 INPUT10 INPUT11 INPUT12 INPUT13 INPUT14 INPUT15 INPUT16
15.7.5
Table 512:
Name Operation PreFaultRecT PostFaultRecT TimeLimit PostRetrig ZeroAngleRef OpModeTest
Setting parameters
RDRE Non group settings (basic)
Values (Range) Off On 0.05 - 1.00 0.1 - 10.0 0.5 - 10.0 Off On 1 - 30 Off On Unit s s s Ch Step 0.01 0.1 0.1 1 Default Off 0.10 0.5 1.0 Off 1 Off Description Operation Off/On Pre-fault recording time Post-fault recording time Fault recording time limit Post-fault retrig enabled (On) or not (Off) Trip value recorder, phasor reference channel Operation mode during test mode
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Table 513:
Name Operation01 NomValue01 UnderTrigOp01 UnderTrigLe01 OverTrigOp01 OverTrigLe01 Operation02 NomValue02 UnderTrigOp02 UnderTrigLe02 OverTrigOp02 OverTrigLe02 Operation03 NomValue03 UnderTrigOp03 UnderTrigLe03 OverTrigOp03 OverTrigLe03 Operation04 NomValue04 UnderTrigOp04 UnderTrigLe04 OverTrigOp04 OverTrigLe04 Operation05
Section 15 Monitoring
Name NomValue05 UnderTrigOp05 UnderTrigLe05 OverTrigOp05 OverTrigLe05 Operation06 NomValue06 UnderTrigOp06 UnderTrigLe06 OverTrigOp06 OverTrigLe06 Operation07 NomValue07 UnderTrigOp07 UnderTrigLe07 OverTrigOp07 OverTrigLe07 Operation08 NomValue08 UnderTrigOp08 UnderTrigLe08 OverTrigOp08 OverTrigLe08 Operation09 NomValue09 UnderTrigOp09 Values (Range) 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On Unit % % % % % % % % Step 0.1 1 1 0.1 1 1 0.1 1 1 0.1 1 1 0.1 Default 0.0 Off 50 Off 200 Off 0.0 Off 50 Off 200 Off 0.0 Off 50 Off 200 Off 0.0 Off 50 Off 200 Off 0.0 Off Description
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Nominal value for analogue channel 5 Use under level trig for analogue cha 5 (on) or not (off) Under trigger level for analogue cha 5 in % of signal Use over level trig for analogue cha 5 (on) or not (off) Over trigger level for analogue cha 5 in % of signal Operation On/Off Nominal value for analogue channel 6 Use under level trig for analogue cha 6 (on) or not (off) Under trigger level for analogue cha 6 in % of signal Use over level trig for analogue cha 6 (on) or not (off) Over trigger level for analogue cha 6 in % of signal Operation On/Off Nominal value for analogue channel 7 Use under level trig for analogue cha 7 (on) or not (off) Under trigger level for analogue cha 7 in % of signal Use over level trig for analogue cha 7 (on) or not (off) Over trigger level for analogue cha 7 in % of signal Operation On/Off Nominal value for analogue channel 8 Use under level trig for analogue cha 8 (on) or not (off) Under trigger level for analogue cha 8 in % of signal Use over level trig for analogue cha 8 (on) or not (off) Over trigger level for analogue cha 8 in % of signal Operation On/Off Nominal value for analogue channel 9 Use under level trig for analogue cha 9 (on) or not (off)
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Section 15 Monitoring
Values (Range) 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Unit % % % % Step 1 1 0.1 1 1 Default 50 Off 200 Off 0.0 Off 50 Off 200 Description Under trigger level for analogue cha 9 in % of signal Use over level trig for analogue cha 9 (on) or not (off) Over trigger level for analogue cha 9 in % of signal Operation On/Off Nominal value for analogue channel 10 Use under level trig for analogue cha 10 (on) or not (off) Under trigger level for analogue cha 10 in % of signal Use over level trig for analogue cha 10 (on) or not (off) Over trigger level for analogue cha 10 in % of signal
Name UnderTrigLe09 OverTrigOp09 OverTrigLe09 Operation10 NomValue10 UnderTrigOp10 UnderTrigLe10 OverTrigOp10 OverTrigLe10
Table 514:
Name Operation31 NomValue31 UnderTrigOp31 UnderTrigLe31 OverTrigOp31 OverTrigLe31 Operation32 NomValue32 UnderTrigOp32 UnderTrigLe32 OverTrigOp32 OverTrigLe32 Operation33 NomValue33 UnderTrigOp33
Section 15 Monitoring
Name UnderTrigLe33 OverTrigOp33 OverTrigLe33 Operation34 NomValue34 UnderTrigOp34 UnderTrigLe34 OverTrigOp34 OverTrigLe34 Operation35 NomValue35 UnderTrigOp35 UnderTrigLe35 OverTrigOp35 OverTrigLe35 Operation36 NomValue36 UnderTrigOp36 UnderTrigLe36 OverTrigOp36 OverTrigLe36 Operation37 NomValue37 UnderTrigOp37 UnderTrigLe37 OverTrigOp37 Values (Range) 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On Unit % % % % % % % % % Step 1 1 0.1 1 1 0.1 1 1 0.1 1 1 0.1 1 Default 50 Off 200 Off 0.0 Off 50 Off 200 Off 0.0 Off 50 Off 200 Off 0.0 Off 50 Off 200 Off 0.0 Off 50 Off Description
1MRK505183-UEN C
Under trigger level for analogue cha 33 in % of signal Use over level trig for analogue cha 33 (on) or not (off) Overtrigger level for analogue cha 33 in % of signal Operation On/off Nominal value for analogue channel 34 Use under level trig for analogue cha 34 (on) or not (off) Under trigger level for analogue cha 34 in % of signal Use over level trig for analogue cha 34 (on) or not (off) Over trigger level for analogue cha 34 in % of signal Operation On/off Nominal value for analogue channel 35 Use under level trig for analogue cha 35 (on) or not (off) Under trigger level for analogue cha 35 in % of signal Use over level trig for analogue cha 35 (on) or not (off) Over trigger level for analogue cha 35 in % of signal Operation On/off Nominal value for analogue channel 36 Use under level trig for analogue cha 36 (on) or not (off) Under trigger level for analogue cha 36 in % of signal Use over level trig for analogue cha 36 (on) or not (off) Over trigger level for analogue cha 36 in % of signal Operation On/off Nominal value for analogue channel 37 Use under level trig for analogue cha 37 (on) or not (off) Under trigger level for analogue cha 37 in % of signal Use over level trig for analogue cha 37 (on) or not (off)
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Section 15 Monitoring
Values (Range) 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Off On 0.0 - 999999.9 Off On 0 - 200 Off On 0 - 5000 Unit % % % % % % % Step 1 0.1 1 1 0.1 1 1 0.1 1 1 Default 200 Off 0.0 Off 50 Off 200 Off 0.0 Off 50 Off 200 Off 0.0 Off 50 Off 200 Description Over trigger level for analogue cha 37 in % of signal Operation On/off Nominal value for analogue channel 38 Use under level trig for analogue cha 38 (on) or not (off) Under trigger level for analogue cha 38 in % of signal Use over level trig for analogue cha 38 (on) or not (off) Over trigger level for analogue cha 38 in % of signal Operation On/off Nominal value for analogue channel 39 Use under level trig for analogue cha 39 (on) or not (off) Under trigger level for analogue cha 39 in % of signal Use over level trig for analogue cha 39 (on) or not (off) Over trigger level for analogue cha 39 in % of signal Operation On/off Nominal value for analogue channel 40 Use under level trig for analogue cha 40 (on) or not (off) Under trigger level for analogue cha 40 in % of signal Use over level trig for analogue cha 40 (on) or not (off) Over trigger level for analogue cha 40 in % of signal
Name OverTrigLe37 Operation38 NomValue38 UnderTrigOp38 UnderTrigLe38 OverTrigOp38 OverTrigLe38 Operation39 NomValue39 UnderTrigOp39 UnderTrigLe39 OverTrigOp39 OverTrigLe39 Operation40 NomValue40 UnderTrigOp40 UnderTrigLe40 OverTrigOp40 OverTrigLe40
Table 515:
Name Operation01 TrigLevel01 IndicationMa01 SetLED01
Section 15 Monitoring
Name Operation02 TrigLevel02 IndicationMa02 SetLED02 Operation03 TrigLevel03 IndicationMa03 SetLED03 Operation04 TrigLevel04 IndicationMa04 SetLED04 Operation05 TrigLevel05 IndicationMa05 SetLED05 Operation06 TrigLevel06 IndicationMa06 SetLED06 Operation07 TrigLevel07 IndicationMa07 SetLED07 Values (Range) Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Unit Step Default Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off Description
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Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 2 Indication mask for binary channel 2 Set red-LED on HMI for binary channel 2 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 3 Indication mask for binary channel 3 Set red-LED on HMI for binary channel 3 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 4 Indication mask for binary channel 4 Set red-LED on HMI for binary channel 4 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 5 Indication mask for binary channel 5 Set red-LED on HMI for binary channel 5 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 6 Indication mask for binary channel 6 Set red-LED on HMI for binary channel 6 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 7 Indication mask for binary channel 7 Set red-LED on HMI for binary channel 7
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Section 15 Monitoring
Values (Range) Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Unit Step Default Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off Description Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 8 Indication mask for binary channel 8 Set red-LED on HMI for binary channel 8 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 9 Indication mask for binary channel 9 Set red-LED on HMI for binary channel 9 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 10 Indication mask for binary channel 10 Set red-LED on HMI for binary channel 10 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 11 Indication mask for binary channel 11 Set red-LED on HMI for binary channel 11 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 12 Indication mask for binary channel 12 Set red-LED on HMI for binary input 12 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 13 Indication mask for binary channel 13 Set red-LED on HMI for binary channel 13
Name Operation08 TrigLevel08 IndicationMa08 SetLED08 Operation09 TrigLevel09 IndicationMa09 SetLED09 Operation10 TrigLevel10 IndicationMa10 SetLED10 Operation11 TrigLevel11 IndicationMa11 SetLED11 Operation12 TrigLevel12 IndicationMa12 SetLED12 Operation13 TrigLevel13 IndicationMa13 SetLED13
Section 15 Monitoring
Name Operation14 TrigLevel14 IndicationMa14 SetLED14 Operation15 TrigLevel15 IndicationMa15 SetLED15 Operation16 TrigLevel16 IndicationMa16 SetLED16 FUNT1 FUNT2 FUNT3 FUNT4 FUNT5 FUNT6 FUNT7 FUNT8 FUNT9 FUNT10 FUNT11 FUNT12 Values (Range) Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On Off On Trig on 0 Trig on 1 Hide Show Off On 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 Unit FunT FunT FunT FunT FunT FunT FunT FunT FunT FunT FunT FunT Step 1 1 1 1 1 1 1 1 1 1 1 1 Default Off Trig on 1 Hide Off Off Trig on 1 Hide Off Off Trig on 1 Hide Off 0 0 0 0 0 0 0 0 0 0 0 0 Description
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Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 14 Indication mask for binary channel 14 Set red-LED on HMI for binary channel 14 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 15 Indication mask for binary channel 15 Set red-LED on HMI for binary channel 15 Trigger operation On/Off Trig on positiv (1) or negative (0) slope for binary inp 16 Indication mask for binary channel 16 Set red-LED on HMI for binary channel 16 Function type for binary channel 1 (IEC -60870-5-103) Function type for binary channel 2 (IEC -60870-5-103) Function type for binary channel 3 (IEC -60870-5-103) Function type for binary channel 4 (IEC -60870-5-103) Function type for binary channel 5 (IEC -60870-5-103) Function type for binary channel 6 (IEC -60870-5-103) Function type for binary channel 7 (IEC -60870-5-103) Function type for binary channel 8 (IEC -60870-5-103) Function type for binary channel 9 (IEC -60870-5-103) Function type for binary channel 10 (IEC -60870-5-103) Function type for binary channel 11 (IEC -60870-5-103) Function type for binary channel 12 (IEC -60870-5-103)
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Section 15 Monitoring
Values (Range) 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 0 - 255 Unit FunT FunT FunT FunT InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo InfNo Step 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Description Function type for binary channel 13 (IEC -60870-5-103) Function type for binary channel 14 (IEC -60870-5-103) Function type for binary channel 15 (IEC -60870-5-103) Function type for binary channel 16 (IEC -60870-5-103) Information number for binary channel 1 (IEC -60870-5-103) Information number for binary channel 2 (IEC -60870-5-103) Information number for binary channel 3 (IEC -60870-5-103) Information number for binary channel 4 (IEC -60870-5-103) Information number for binary channel 5 (IEC -60870-5-103) Information number for binary channel 6 (IEC -60870-5-103) Information number for binary channel 7 (IEC -60870-5-103) Information number for binary channel 8 (IEC -60870-5-103) Information number for binary channel 9 (IEC -60870-5-103) Information number for binary channel 10 (IEC -60870-5-103) Information number for binary channel 11 (IEC -60870-5-103) Information number for binary channel 12 (IEC -60870-5-103) Information number for binary channel 13 (IEC -60870-5-103) Information number for binary channel 14 (IEC -60870-5-103) Information number for binary channel 15 (IEC -60870-5-103) Information number for binary channel 16 (IEC -60870-5-103)
Name FUNT13 FUNT14 FUNT15 FUNT16 INFNO1 INFNO2 INFNO3 INFNO4 INFNO5 INFNO6 INFNO7 INFNO8 INFNO9 INFNO10 INFNO11 INFNO12 INFNO13 INFNO14 INFNO15 INFNO16
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15.8
15.8.1
Event list
Introduction
Continuous event-logging is useful for monitoring of the system from an overview perspective and is a complement to specific disturbance recorder functions. The event list logs all binary input signals connected to the Disturbance report function. The list may contain of up to 1000 time-tagged events stored in a ring-buffer.
15.8.2
Principle of operation
When a binary signal, connected to the disturbance report function, changes status, the event list function stores input name, status and time in the event list in chronological order. The list can contain up to 1000 events from both internal logic signals and binary input channels. If the list is full, the oldest event is overwritten when a new event arrives.
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The list can be configured to show oldest or newest events first with a setting on the local HMI. The event list function runs continuously, in contrast to the event recorder function, which is only active during a disturbance. The name of the binary input signal that appears in the event recording is the userdefined name assigned when the IED is configured. The same name is used in the disturbance recorder function (DR), indications (IND)and the event recorder function (ER). The event list is stored and managed separate from the disturbance report information (ER, DR, IND, TVR and FL).
15.8.3
Function block
The Event list has no function block of its own. It is included in the DRPRDRE block and uses information from the BxRBDR block.
15.8.4
Input signals
The Event list logs the same binary input signals as configured for the Disturbance report function.
15.8.5
Technical data
Table 517:
Function Buffer capacity Resolution Accuracy Maximum number of events in the list
technical data
Value 1000 1 ms Depending on time synchronizing
15.9
15.9.1
Indications
Introduction
To get fast, condensed and reliable information about disturbances in the primary and/or in the secondary system it is important to know, for example binary signals that have changed status during a disturbance. This information is used in the short perspective to get information via the local HMI in a straightforward way. There are three LEDs on the local HMI (green, yellow and red), which will display status information about the IED and the Disturbance report function (trigged).
Section 15 Monitoring
1MRK505183-UEN C
The Indication list function shows all selected binary input signals connected to the Disturbance report function that have changed status during a disturbance.
15.9.2
Principle of operation
The LED indications display this information: Green LED:
Steady light Flashing light Dark In Service Internal fail No power supply
Yellow LED:
Steady light Flashing light A disturbance report is triggered The IED is in test mode or in configuration mode
Red LED:
Steady light Trigged on binary signal N with SetLEDN=On
Indication list: The possible indicated signals are the same as the ones chosen for the disturbance report function and disturbance recorder. The indication function tracks 0 to 1 changes of binary signals during the recording period of the collection window. This means that constant logic zero, constant logic one or state changes from logic one to logic zero will not be visible in the list of indications. Signals are not time tagged. In order to be recorded in the list of indications the: the signal must be connected to binary input(DRB1-6) the DRPparameter Operation must be set On the DRP must be trigged (binary or analog)
Indications are selected with the indication mask (IndicationMask) when configuring the binary inputs. The name of the binary input signal that appears in the Indication function is the userdefined name assigned at configuration of the IED. The same name is used in disturbance recorder function (DR), indications (IND) and event recorder function (ER).
1MRK505183-UEN C
15.9.3
15.9.4
Input signals
The Indications function may log the same binary input signals as the Disturbance report function.
15.9.5
Technical data
Table 518:
Function Buffer capacity Maximum number of indications presented for single disturbance Maximum number of recorded disturbances
technical data
Value 96 100
15.10
15.10.1
Event recorder
Introduction
Quick, complete and reliable information about disturbances in the primary and/or in the secondary system is vital, for example, time tagged events logged during disturbances. This information is used for different purposes in the short term (for example corrective actions) and in the long term (for example Functional Analysis). The event recorder logs all selected binary input signals connected to the Disturbance report function. Each recording can contain up to 150 time-tagged events. The event recorder information is available for the disturbances locally in the IED. The event recording information is an integrated part of the disturbance record (Comtrade file).
15.10.2
Principle of operation
When one of the trig conditions for the disturbance report is activated, the event recorder logs every status change in the 96 selected binary signals. The events can be generated by both internal logical signals and binary input channels. The internal signals are time-tagged in the main processor module, while the binary input channels are time-tagged directly in each I/O module. The events are collected during the total recording time (pre-, post-fault and limit time), and are stored in the disturbance report flash memory at the end of each recording.
Section 15 Monitoring
1MRK505183-UEN C
In case of overlapping recordings, due to PostRetrig = On and a new trig signal appears during post-fault time, events will be saved in both recording files. The name of the binary input signal that appears in the event recording is the userdefined name assigned when configuring the IED. The same name is used in the disturbance recorder function (DR), indications (IND) and event recorder function (ER). The event record is stored as a part of the disturbance report information (ER, DR, IND, TVR and FL) and managed via the local HMI or PCM600.
15.10.3
Function block
The Event recorder has no function block of its own. It is included in the DRPRDRE block and uses information from the BxRBDR block.
15.10.4
Input signals
The Event recorder function logs the same binary input signals as the Disturbance report function.
15.10.5
Technical data
Table 519:
Function Buffer capacity Maximum number of events in disturbance report Maximum number of disturbance reports Resolution Accuracy
technical data
Value 150 100 1 ms Depending on time synchronizing
15.11
15.11.1
1MRK505183-UEN C
Section 15 Monitoring
The trip value recorder information is an integrated part of the disturbance record (Comtrade file).
15.11.2
Principle of operation
Trip value recorder (TVR)calculates and presents both fault and pre-fault amplitudes as well as the phase angles of all the selected analog input signals. The parameter ZeroAngleRef points out which input signal is used as the angle reference. The calculated data is input information to the fault locator (FL). When the disturbance report function is triggered the sample for the fault interception is searched for, by checking the non-periodic changes in the analog input signals. The channel search order is consecutive, starting with the analog input with the lowest number. When a starting point is found, the Fourier estimation of the pre-fault values of the complex values of the analog signals starts 1.5 cycle before the fault sample. The estimation uses samples during one period. The post-fault values are calculated using the Recursive Least Squares (RLS) method. The calculation starts a few samples after the fault sample and uses samples during 1/2 - 2 cycles depending on the shape of the signals. If no starting point is found in the recording, the disturbance report trig sample is used as the start sample for the Fourier estimation. The estimation uses samples during one cycle before the trig sample. In this case the calculated values are used both as pre-fault and fault values. The name of the analog input signal that appears in the Trip value recorder function is the user-defined name assigned when the IED is configured. The same name is used in the Disturbance recorder function (DR). The trip value record is stored as a part of the disturbance report information (ER, DR, IND, TVR and fault locator) and managed in via the local HMI or PCM600.
15.11.3
Function block
The Trip value recorder has no function block of its own. It is included in the DRPRDRE block and uses information from the BxRBDR block.
15.11.4
Input signals
The trip value recorder function uses analog input signals connected to A1RADR to A3RADR (not A4RADR).
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technical data
Value 30 100
15.12
15.12.1
Disturbance recorder
Introduction
The Disturbance recorder function supplies fast, complete and reliable information about disturbances in the power system. It facilitates understanding system behavior and related primary and secondary equipment during and after a disturbance. Recorded information is used for different purposes in the short perspective (for example corrective actions) and long perspective (for example Functional Analysis). The Disturbance recorder acquires sampled data from all selected analog input and binary signals connected to the Disturbance report function (maximum 40 analog and 96 binary signals). The binary signals are the same signals as available under the event recorder function. The function is characterized by great flexibility and is not dependent on the operation of protection functions. It can record disturbances not detected by protection functions. The disturbance recorder information for the last 100 disturbances are saved in the IED and the local HMI is used to view the list of recordings.
15.12.2
Principle of operation
Disturbance recording (DR) is based on the acquisition of binary and analog signals. The binary signals can be either true binary input signals or internal logical signals generated by the functions in the IED. The analog signals to be recorded are input channels from the Transformer Input Module (TRM), Line Differential communication Module (LDCM) through the Signal Matrix Analog Input (SMAI) and possible summation (Sum3Ph) function blocks and some internally derived analog signals. For details, refer to section "Disturbance report DRPRDRE". Disturbance recorder collects analog values and binary signals continuously, in a cyclic buffer. The pre-fault buffer operates according to the FIFO principle; old data will continuously be overwritten as new data arrives when the buffer is full. The size of this buffer is determined by the set pre-fault recording time.
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Section 15 Monitoring
Upon detection of a fault condition (triggering), the disturbance is time tagged and the data storage continues in a post-fault buffer. The storage process continues as long as the fault condition prevails - plus a certain additional time. This is called the post-fault time and it can be set in the disturbance report. The above mentioned two parts form a disturbance recording. The whole memory, intended for disturbance recordings, acts as a cyclic buffer and when it is full, the oldest recording is overwritten. The last 100 recordings are stored in the IED. The time tagging refers to the activation of the trigger that starts the disturbance recording. A recording can be trigged by, manual start, binary input and/or from analog inputs (over-/underlevel trig). A user-defined name for each of the signals can be set. These names are common for all functions within the disturbance report functionality.
15.12.2.1
The recorded disturbance is now ready for retrieval and evaluation. The recording files comply with the Comtrade standard IEC 60255-24 and are divided into three files; a header file (HDR), a configuration file (CFG) and a data file (DAT). The header file (optional in the standard) contains basic information about the disturbance, that is, information from the Disturbance report sub-functions (ER, TVR and FL). The Disturbance handling tool use this information and present the recording in a user-friendly way. General: Station name, object name and unit name Date and time for the trig of the disturbance Record number Sampling rate Time synchronization source Recording times Activated trig signal Active setting group
Analog:
783 Technical reference manual
Section 15 Monitoring
1MRK505183-UEN C
Signal names for selected analog channels Information e.g. trig on analog inputs Primary and secondary instrument transformer rating Over- or Undertrig: level and operation Over- or Undertrig status at time of trig CT direction
The configuration file is a mandatory file containing information needed to interpret the data file. For example sampling rate, number of channels, system frequency, channel info etc. The data file, which also is mandatory, containing values for each input channel for each sample in the record (scaled value). The data file also contains a sequence number and time stamp for each set of samples.
15.12.2.2
IEC 60870-5-103
The communication protocol IEC 60870-5-103 may be used to poll disturbance recordings from the IED to a master (station HSI). The standard describes how to handle 8 disturbance recordings, 8 analog channels (4 currents and 4 voltages) using the public range and binary signals. The last 8 recordings, out of maximum 100, are available for transfer to the master. When the last one is transferred and acknowledged new recordings in the IED will appear, in the master points of view (even if they already where stored in the IED). To be able to report 40 analog channels from the IED using IEC 60870-5-103 the first 8 channels are placed in the public range and the next 32 are placed in the private range. To comply the standard the first 8 must be configured according to table 521.
Table 521:
Signal IL1 IL2 IL3 IN UL1 UL2 UL3 UN
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Section 15 Monitoring
The binary signals connected to BxRBDR are reported by polling. The function blocks include function type and information number.
15.12.3
Function block
The Disturbance recorder has no function block of its own. It is included in the DRPRDRE, AxRADR and BxRBDR block.
15.12.4
15.12.5
Setting parameters
For Setting parameters see section "Disturbance report DRPRDRE".
15.12.6
Technical data
Table 522:
Function Buffer capacity Maximum number of analog inputs Maximum number of binary inputs Maximum number of disturbance reports Maximum total recording time (3.4 s recording time and maximum number of channels, typical value)
technical data
Value 40 96 100 340 seconds (100 recordings) at 50 Hz 280 seconds (80 recordings) at 60 Hz
786
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Section 16 Metering
Section 16
Metering
16.1
S00947 V1 EN
16.1.1
Introduction
Pulse counter (PCGGIO) function counts externally generated binary pulses, for instance pulses coming from an external energy meter, for calculation of energy consumption values. The pulses are captured by the binary input module and then read by the pulse counter function. A scaled service value is available over the station bus. The special Binary input module with enhanced pulse counting capabilities must be ordered to achieve this functionality.
16.1.2
Principle of operation
The registration of pulses is done for positive transitions (0->1) on one of the 16 binary input channels located on the Binary Input Module (BIM). Pulse counter values are sent to the station HMI with predefined cyclicity without reset. The reporting time period can be set in the range from 1 second to 60 minutes and is synchronized with absolute system time. Interrogation of additional pulse counter values can be done with a command (intermediate reading) for a single counter. All active counters can also be read by the LON General Interrogation command (GI) or IEC 61850.
Section 16 Metering
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Pulse counter (PCGGIO) function in the IED supports unidirectional incremental counters. That means only positive values are possible. The counter uses a 32 bit format, that is, the reported value is a 32-bit, signed integer with a range 0...+2147483647. The counter is reset at initialization of the IED. The reported value to station HMI over the station bus contains Identity, Scaled Value (pulse count x scale), Time, and Pulse Counter Quality. The Pulse Counter Quality consists of: Invalid (board hardware error or configuration error) Wrapped around Blocked Adjusted
The transmission of the counter value by SPA can be done as a service value, that is, the value frozen in the last integration cycle is read by the station HMI from the database. PCGGIO updates the value in the database when an integration cycle is finished and activates the NEW_VAL signal in the function block. This signal can be connected to an Event function block, be time tagged, and transmitted to the station HMI. This time corresponds to the time when the value was frozen by the function. The pulse counter function requires a binary input card, BIMp, that is specially adapted to the pulse counter function. Figure 420 shows the pulse counter function block with connections of the inputs and outputs.
SingleCmdFunc OUTx SingleCmdFunc OUTx I/O-module Pulse INPUT OUT Pulse length >1s Reset counter PulseCounter BLOCK INVALID RESTART READ_VAL BLOCKED NEW_VAL BI_PULSE RS_CNT NAME SCAL_VAL EVENT INPUT1 INPUT2 INPUT3 INPUT4
IEC EVENT
SMS settings 1.Operation = Off/On 2.tReporting = 0s...60min 3.Event Mask = No Events/Report Events 4.Scale = 1-90000
IEC05000744 V1 EN
Figure 420:
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Section 16 Metering
The BLOCK and READ_VAL inputs can be connected to Single Command blocks, which are intended to be controlled either from the station HMI or/and the local HMI. As long as the BLOCK signal is set, the pulse counter is blocked. The signal connected to READ_VAL performs one additional reading per positive flank. The signal must be a pulse with a length >1 second. The BI_PULSE input is connected to the used input of the function block for the Binary Input Module (BIM). The NAME input is used for a user-defined name with up to 13 characters. The RS_CNT input is used for resetting the counter. Each pulse counter function block has four binary output signals that can be connected to an Event function block for event recording: INVALID, RESTART, BLOCKED and NEW_VAL. The SCAL_VAL signal can be connected to the IEC Event function block. The INVALID signal is a steady signal and is set if the Binary Input Module, where the pulse counter input is located, fails or has wrong configuration. The RESTART signal is a steady signal and is set when the reported value does not comprise a complete integration cycle. That is, in the first message after IED startup, in the first message after deblocking, and after the counter has wrapped around during last integration cycle. The BLOCKED signal is a steady signal and is set when the counter is blocked. There are two reasons why the counter is blocked: The BLOCK input is set, or The Binary Input Module, where the counter input is situated, is inoperative.
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was updated since last report. The SCAL_VAL signal consists of scaled value (according to parameter Scale), time and status information.
16.1.3
Function block
PCGGIO BLOCK READ_VAL BI_PULSE* RS_CNT INVALID RESTART BLOCKED NEW_VAL SCAL_VAL IEC05000709-2-en.vsd
IEC05000709 V3 EN
Figure 421:
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Table 524:
Name INVALID RESTART BLOCKED NEW_VAL SCAL_VAL
16.1.5
Table 525:
Name Operation EventMask CountCriteria
Setting parameters
PCGGIO Non group settings (basic)
Values (Range) Off On NoEvents ReportEvents Off RisingEdge Falling edge OnChange 1.000 - 90000.000 Count ActivePower ApparentPower ReactivePower ActiveEnergy ApparentEnergy ReactiveEnergy 0 - 3600 Unit Step Default Off NoEvents RisingEdge Description Operation Off/On Report mask for analog events from pulse counter Pulse counter criteria
Scale Quantity
0.001 -
1.000 Count
Scaling value for SCAL_VAL output to unit per counted value Measured quantity for SCAL_VAL output
tReporting
60
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16.1.6
16.2
16.2.1
Introduction
Outputs from Measurements (CVMMXU) function can be used to calculate energy. Active as well as reactive values are calculated in import and export direction. Values can be read or generated as pulses. Maximum demand power values are also calculated by the function.
16.2.2
Principle of operation
The instantaneous output values of active and reactive power from the Measurements (CVMMXU) function block are used and integrated over a selected time tEnergy to measure the integrated energy. The energy values (in MWh and MVarh) are available as output signals and also as pulsed output which can be connected to a pulse counter. Outputs are available for forward as well as reverse direction. The accumulated energy values can be reset from the local HMI reset menu or with input signal RSTACC. The maximum demand values for active and reactive power are calculated for the set time tEnergy and the maximum value is stored in a register available over communication and from outputs MAXPAFD, MAXPARD, MAXPRFD, MAXPRRD for the active and reactive power forward and reverse direction until reset with input signal RSTDMD or from the local HMI reset menu.
Section 16 Metering
1MRK505183-UEN C
CVMMXU
PINST QINST
P Q
ETPMMTR
IEC07000121-2-en.vsd
IEC07000121 V2 EN
Figure 422:
Connection of Energy calculation and demand handling function (ETPMMTR) to the Measurements function (CVMMXU)
16.2.3
Function block
ETPMMTR P Q STACC RSTACC RSTDMD ACCST EAFPULSE EARPULSE ERFPULSE ERRPULSE EAFALM EARALM ERFALM ERRALM EAFACC EARACC ERFACC ERRACC MAXPAFD MAXPARD MAXPRFD MAXPRRD IEC07000120-2-en.vsd
IEC07000120 V2 EN
Figure 423:
16.2.4
Table 528:
Name ACCST EAFPULSE EARPULSE
1MRK505183-UEN C
Section 16 Metering
Name ERFPULSE ERRPULSE EAFALM EARALM ERFALM ERRALM EAFACC EARACC ERFACC ERRACC MAXPAFD MAXPARD MAXPRFD MAXPRRD Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL REAL REAL REAL REAL REAL Description Accumulated forward reactive energy pulse Accumulated reverse reactive energy pulse Alarm for active forward energy exceed limit in set interval Alarm for active reverse energy exceed limit in set interval Alarm for reactive forward energy exceed limit in set interval Alarm for reactive reverse energy exceed limit in set interval Accumulated forward active energy value in Ws Accumulated reverse active energy value in Ws Accumulated forward reactive energy value in VArS Accumulated reverse reactive energy value in VArS Maximum forward active power demand value for set interval Maximum reverse active power demand value for set interval Maximum forward reactive power demand value for set interval Maximum reactive power demand value in reverse direction
16.2.5
Table 529:
Name Operation StartAcc tEnergy
Setting parameters
ETPMMTR Non group settings (basic)
Values (Range) Off On Off On 1 Minute 5 Minutes 10 Minutes 15 Minutes 30 Minutes 60 Minutes 180 Minutes 0.000 - 60.000 0.000 - 60.000 0.001 - 10000.000 Unit Step Default Off Off 1 Minute Description Operation Off/On Activate the accumulation of energy values Time interval for energy calculation
s s MWh
Energy accumulated pulse ON time in secs Energy accumulated pulse OFF time in secs Pulse quantity for active forward accumulated energy value
Section 16 Metering
Name EARAccPlsQty ERFAccPlsQty ERVAccPlsQty Values (Range) 0.001 - 10000.000 0.001 - 10000.000 0.001 - 10000.000 Unit MWh MVArh MVArh Step 0.001 0.001 0.001 Default 100.000 100.000 100.000 Description
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Pulse quantity for active reverse accumulated energy value Pulse quantity for reactive forward accumulated energy value Pulse quantity for reactive reverse accumulated energy value
Table 530:
Name EALim ERLim DirEnergyAct DirEnergyReac EnZeroClamp LevZeroClampP LevZeroClampQ EAFPrestVal EARPrestVal ERFPresetVal ERVPresetVal
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Section 17
Station communication
17.1
Overview
Each IED is provided with a communication interface, enabling it to connect to one or many substation level systems or equipment, either on the Substation Automation (SA) bus or Substation Monitoring (SM) bus. Following communication protocols are available: IEC 61850-8-1 communication protocol IEC 61850-9-2LE communication protocol LON communication protocol SPA or IEC 60870-5-103 communication protocol DNP3.0 communication protocol
17.2
17.2.1
17.2.2
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IEC61850 generic communication I/O functions (SPGGIO) is used to send one single logical signal to other systems or equipment in the substation.
17.2.2.2
Principle of operation
Upon receiving a signal at its input, IEC61850 generic communication I/O functions (SPGGIO) function sends the signal over IEC 61850-8-1 to the equipment or system that requests this signal. To get the signal, PCM600 must be used to define which function block in which equipment or system should receive this information.
17.2.2.3
Function block
SPGGIO BLOCK ^IN IEC07000124-2-en.vsd
IEC07000124 V2 EN
Figure 424:
SP16GGIO BLOCK ^IN1 ^IN2 ^IN3 ^IN4 ^IN5 ^IN6 ^IN7 ^IN8 ^IN9 ^IN10 ^IN11 ^IN12 ^IN13 ^IN14 ^IN15 ^IN16 IEC07000125-2-en.vsd
IEC07000125 V2 EN
Figure 425:
17.2.2.4
1MRK505183-UEN C
Table 532:
Name BLOCK IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN9 IN10 IN11 IN12 IN13 IN14 IN15 IN16
17.2.2.5
Setting parameters
The function does not have any parameters available in the local HMI or PCM600.
17.2.3
17.2.3.1
Principle of operation
Upon receiving an analog signal at its input, IEC61850 generic communication I/O functions (MVGGIO) will give the instantaneous value of the signal and the range, as output values. In the same time, it will send over IEC 61850-8-1 the value, to other IEC 61850 clients in the substation.
1MRK505183-UEN C
Figure 426:
17.2.3.3
Table 534:
Name VALUE RANGE
17.2.3.4
Table 535:
Name MV db MV zeroDb MV hhLim MV hLim MV lLim MV llLim MV min MV max MV dbType
Setting parameters
MVGGIO Non group settings (basic)
Values (Range) 1 - 300 0 - 100000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 -10000000000.000 - 10000000000.000 Cyclic Dead band Int deadband 0.000 - 100.000 Unit Type m% Step 1 1 0.001 0.001 0.001 0.001 0.001 0.001 Default 10 500 90.000 80.000 -80.000 -90.000 -100.000 100.000 Dead band Description Cycl: Report interval (s), Db: In % of range, Int Db: In %s Zero point clamping in 0,001% of range High High limit High limit Low limit Low Low limit Minimum value Maximum value Reporting type
MV limHys
0.001
5.000
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17.2.4
Table 536:
Name Operation GOOSE
17.2.5
Technical data
Table 537:
Function Protocol Communication speed for the IEDs
17.3
17.3.1
17.3.2
Principle of operation
The ABB merging units (MUs) are situated close to primary equipment, like circuit breakers, isolators, etc. The MUs have the capability to gather measured values from measuring transformers, non-conventional transducers or both. The gathered data are then transmitted to subscribers over the process bus, utilizing the IEC 61850-9-2LE protocol. ABB "physical MU" contains up to 3 logical MUs, each capable of sampling 4 currents and 4 voltages. The IED communicates with the MUs over the process bus via the OEM module port "CD". For the user, the MU appears in the IED as a normal analogue input module and is engineered in the very same way.
1MRK505183-UEN C
IED
Application
MU1
MU2
Splitter
Electrical-toOptical Converter
IEC61850-9-2LE
Ethernet Switch
IEC61850-9-2LE IEC61850-9-2LE
1PPS
1PPS
CT
Combi Sensor
CT
Combi Sensor
Conventional VT
en08000072-2.vsd
IEC08000072 V2 EN
Figure 427:
Example of signal path for sampled analogue values from MU and conventional CT/VT
1MRK505183-UEN C
MUDATA: Indicates when sample sequence needs to be realigned. that is the application soon needs to be restarted. The signal is raised to 2 s before the application is restarted. SYNCH: Indicates that the time quality of the hardware is out of the set value from parameter synchAccLevel (1 s, 4 s or unspecified) and the parameter AppSynch is set to Synch. In case of AppSynch is set to NoSynch the SYNCH output will never go high. SMPLLOST: Indicates that more than one sample has been lost/been marked invalid/ overflow/ been marked failed, and the sample has thereafter been substituted. When SMPLLOST is high, protection is blocked. MUSYNCH: Indicates that the MU connected is not synchronized. Received from quality flag in datastream. No IED setting affects this signal. TESTMODE: Indicates that the MU connected is in TestMode. Received from quality flag in datastream. No IED setting affects this signal.
Timeout TSYNCERR Indicates that there is some timeout on any configured time source or the time quality is worse than specified in SynchAccLevel. The timeout is individually specified per time source (PPS, IRIG-B, SNTP etc.) See section "Time synchronization" Blocking condition Blocking of protection functions is indicated by (SAMPLOST is high) or (MUSYNCH is high and AppSynch is set to Synch) or (SYNCH is high) Application synch is not required for differential protection based on ECHO mode. A missing PPS however will lead to a drift between MU and IED. Therefore protection functions in this case will be blocked.
17.3.3
Function block
The function blocks are not represented in the configuration tool. The signals appear only in the SMT tool when merging units (MU) are included in the configuration with the function selector tool. In the SMT tool they can be mapped to the desired virtual input (SMAI) of the IED and used internally in the configuration.
1MRK505183-UEN C
17.3.5
Table 539:
Name SVId SmplGrp CTStarPoint1 CTStarPoint2 CTStarPoint3 CTStarPoint4
Setting parameters
MU_4I_4U Non group settings (basic)
Values (Range) 0 - 40 0 - 65535 FromObject ToObject FromObject ToObject FromObject ToObject FromObject ToObject Unit Step 1 1 Default ABB_MU0101 0 ToObject ToObject ToObject ToObject Description MU identifier Sampling group ToObject= towards protected object, FromObject= the opposite ToObject= towards protected object, FromObject= the opposite ToObject= towards protected object, FromObject= the opposite ToObject= towards protected object, FromObject= the opposite
Table 540:
Name SynchMode
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17.3.6
17.4
17.4.1
17.4.2
Principle of operation
The speed of the network depends on the medium and transceiver design. With protection and control devices, fibre optic media is used, which enables the use of the maximum speed of 1.25 Mbits/s. The protocol is a peer-to-peer protocol where all the devices connected to the network can communicate with each other. The own subnet and node number are identifying the nodes (max. 255 subnets, 127 nodes per one subnet). The LON bus links the different parts of the protection and control system. The measured values, status information, and event information are spontaneously sent to the higher-level devices. The higher-level devices can read and write memorized values, setting values, and other parameter data when required. The LON bus also enables the bay level devices to communicate with each other to deliver, for example, interlocking information among the terminals without the need of a bus master.
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The LonTalk protocol supports two types of application layer objects: network variables and explicit messages. Network variables are used to deliver short messages, such as measuring values, status information, and interlocking/blocking signals. Explicit messages are used to transfer longer pieces of information, such as events and explicit read and write messages to access device data. The benefits achieved from using the LON bus in protection and control systems include direct communication among all terminals in the system and support for multi-master implementations. The LON bus also has an open concept, so that the terminals can communicate with external devices using the same standard of network variables.
For more information, refer to LON bus, LonWorks Network in Protection and Control, Users manual and Technical description.
LON protocol
Configuration of LON Lon Network Tool (LNT 505) is a multi-purpose tool for LonWorks network configuration. All the functions required for setting up and configuring a LonWorks network, is easily accessible on a single tool program. For more information, refer to the operator's manual. Activate LON Communication Activate LON communication in the Parameter Setting tool under Main menu/ Communication/ SLM configuration/ Rear optical LON port/ Horizontal communication, where Operation must be set to ON. Add LON Device Types LNT A new device is added to LON Network Tool from the Device menu or by installing the device from the ABB LON Device Types package for LNT 505, with the SLDT 670 series package version 1p2 r03. LON net address To establish a LON connection with the 670 series IEDs, the IED has to be given a unique net address. The net address consists of a subnet and node number. This is accomplished with the LON Network Tool by creating one device for each IED. Vertical communication Vertical communication describes communication between the monitoring devices and protection and control IEDs. This communication includes sending of changed process data to monitoring devices as events and transfer of commands, parameter data and disturbance recorder files. This communication is implemented using explicit messages. Events and indications Events sent to the monitoring devices are using explicit messages (message code 44H) with unacknowledged transport service of the LonTalk protocol. When a
1MRK505183-UEN C
signal is changed in the IED, one message with the value, quality and time is transmitted from terminal. Binary events Binary events are generated in event function blocks EVENT:1 to EVENT:20 in the 670 series IEDs. The event function blocks have predefined LON addresses. table 542 shows the LON addresses to the first input on the event function blocks. The addresses to the other inputs on the event function block are consecutive after the first input. For example, input 15 on event block EVENT:17 has the address 1280 + 14 (15-1) = 1294. For double indications only the first eight inputs 18 must be used. Inputs 916 can be used for other type of events at the same event block. As basic, three event function blocks EVENT:1 to EVENT:3 running with a fast loop time (3 ms) is available in the 670 series IEDs. The remaining event function blocks EVENT:4 to EVENT:9 runs with a loop time on 8 ms and EVENT:10 to EVENT:20 runs with a loop time on 100 ms. The event blocks are used to send binary signals, integers, real time values like analogue data from measuring functions and mA input modules as well as pulse counter signals. 16 pulse counter value function blocks PCGGIO:1 to PCGGIO:16 and 24 mA input service values function blocks SMMI1_In1 to 6 SMMI4_In1 to 6 are available in the 670 series IEDs. The first LON address in every event function block is found in table 542
Table 542:
Function block EVENT:1 EVENT:2 EVENT:3 EVENT:4 EVENT:5 EVENT:6 EVENT:7 EVENT:8 EVENT:9 EVENT:10 EVENT:11 EVENT:12 EVENT:13 EVENT:14 EVENT:15 EVENT:16
1MRK505183-UEN C
Event masks The event mask for each input can be set individually from Parameter Setting Tool (PST) under: Settings/ General Settings/ Monitoring / EventFunction as follows: No events OnSet, at pick-up of the signal OnReset, at drop-out of the signal OnChange, at both pick-up and drop-out of the signal AutoDetect, event system itself make the reporting decision, (reporting criteria for integers has no semantic, prefer to be set by the user)
The following type of signals from application functions can be connected to the event function block. Single indication Directly connected binary IO signal via binary input function block (SMBI) is always reported on change, no changed detection is done in the event function block. Other Boolean signals, for example a start or a trip signal from a protection function is event masked in the event function block. Double indications Double indications can only be reported via switch-control (SCSWI) functions, the event reporting is based on information from switch-control, no change detection is done in the event function block. Directly connected binary IO signal via binary input function block (SMBI) is not possible to handle as double indication. Double indications can only be reported for the first 8 inputs on an event function block. 00 generates an intermediate event with the read status 0 01 generates an open event with the read status 1 10 generates a close event with the read status 2 11 generates an undefined event with the read status 3
Analog value All analog values are reported cyclic, the reporting interval is taken from the connected function if there is a limit supervised signal, otherwise it is taken from the event function block. Command handling
1MRK505183-UEN C
Commands are transferred using transparent SPA-bus messages. The transparent SPA-bus message is an explicit LON message, which contains an ASCII character message following the coding rules of the SPA-bus protocol. The message is sent using explicit messages with message code 41H and using acknowledged transport service. Both the SPA-bus command messages (R or W) and the reply messages (D, A or N) are sent using the same message code. It is mandatory that one device sends out only one SPA-bus message at a time to one node and waits for the reply before sending the next message. For commands from the operator workplace to the IED for apparatus control, That is, the function blocks type SCSWI 1 to 32, SXCBR 1 to 18 and SXSWI 1 to 28; the SPA addresses are according to table 543.
Horizontal communication
Network variables are used for communication between 500 series and 670 series IEDs. The supported network variable type is SNVT_state (NV type 83). SNVT_state is used to communicate the state of a set of 1 to 16 Boolean values. Multiple command send function block (MULTICMDSND) is used to pack the information to one value. This value is transmitted to the receiving node and presented for the application by a multiple command function block (MULTICMDRCV). At horizontal communication the input BOUND on the event function block (MULTICMDSND) must be set to 1. There are 10 MULTICMDSND and 60 MULTICMDRCV function blocks available. The MULTICMDSND and MULTICMDRCV function blocks are connected using Lon Network Tool (LNT 505). This tool also defines the service and addressing on LON. This is an overview for configuring the network variables for 670 series IEDs. Configuration of LON network variables Configure the Network variables according to the specific application using the LON network Tool. For more information, refer to LNT 505 in Operation manual. The following is an example of how to configure network variables concerning, for example, interlocking between two IEDs.
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LON BAY E1
MULTICMDSND: 7
BAY E3
MULTICMDSND: 9
BAY E4
MULTICMDSND: 9
en05000718.vsd
IEC05000718 V2 EN
Figure 428:
Examples connections between MULTICMDSND and MULTICMDRCV function blocks in three IEDs
The network variable connections are done from the NV Connection window. From LNT window select Connections/ NVConnections/ New.
en05000719.vsd
IEC05000719 V1 EN
Figure 429:
There are two ways of downloading NV connections. Either the users can use the drag-and-drop method where they can select all nodes in the device window, drag them to the Download area in the bottom of the program window and drop them
1MRK505183-UEN C
there; or, they can perform it by selecting the traditional menu, Configuration/ Download.
en05000720.vsd
IEC05000720 V1 EN
Figure 430:
Communication ports
The serial communication module (SLM) is used for SPA or IEC60870-5-103 and LON communication. This module is a mezzanine module, and can be placed on the Main Processing Module (NUM). The serial communication module can have connectors for two plastic fibre cables (snap-in) or two glass fibre cables (ST, bayonet) or a combination of plastic and glass fibre. Three different types are available depending on type of fibre. The incoming optical fibre is connected to the RX receiver input, and the outgoing optical fibre to the TX transmitter output. When the fibre optic cables are laid out, pay special attention to the instructions concerning the handling and connection of the optical fibres. The module is identified with a number on the label on the module.
Table 543:
Name BL_CMD BL_CMD BL_CMD BL_CMD Table continues on next page
SPA addresses for commands from the operator workplace to the IED for apparatus control
Function block SCSWI01 SCSWI02 SCSWI02 SCSWI04 SPA address 1 I 5115 1 I 5139 1 I 5161 1 I 5186 Description SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command
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SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command SPA parameters for block command
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SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for cancel command SPA parameters for select (Open/ Close) command Note: Send select command before operate command
SPA parameters for select (Open/ Close) command SPA parameters for select (Open/ Close) command SPA parameters for select (Open/ Close) command SPA parameters for select (Open/ Close) command SPA parameters for select (Open/ Close) command SPA parameters for select (Open/ Close) command SPA parameters for select (Open/ Close) command SPA parameters for select (Open/ Close) command SPA parameters for select (Open/ Close) command
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SPA parameters for operate (Open/ Close) command Note: Send select command before operate command
SCSWI02 SCSWI02 SCSWI04 SCSWI05 SCSWI06 SCSWI07 SCSWI08 SCSWI09 SCSWI10 SCSWI11 SCSWI12 SCSWI13 SCSWI14 SCSWI15 SCSWI16 SCSWI17 SCSWI18 SCSWI19 SCSWI20 SCSWI21 SCSWI22
1 I 5130 1 I 5152 1 I 5177 1 I 5201 1 I 5225 1 I 5249 1 I 5274 1 I 5298 1 I 5322 1 I 5346 1 I 5370 1 I 5394 1 I 5418 1 I 5442 1 I 5466 1 I 5490 1 I 5514 1 I 5536 1 I 5562 1 I 5585 1 I 5610
SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command SPA parameters for operate (Open/ Close) command
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Sub Value Sub Value Sub Value Sub Value Sub Value Sub Value Sub Value Sub Value Sub Value Sub Value Sub Value Sub Value Sub Value Table continues on next page
SXCBR02 SXCBR03 SXCBR04 SXCBR05 SXCBR06 SXCBR07 SXCBR08 SXCBR09 SXCBR10 SXCBR11 SXCBR12 SXCBR13 SXCBR14
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SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted SPA parameter for position to be substituted
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Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Sub Enable Table continues on next page
SXCBR02 SXCBR03 SXCBR04 SXCBR05 SXCBR06 SXCBR07 SXCBR08 SXCBR09 SXCBR10 SXCBR11 SXCBR12 SXCBR13 SXCBR14 SXCBR15
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SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command SPA parameter for substitute enable command
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SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command SPA parameter for update block command
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17.4.3
Table 544:
Name Operation
Setting parameters
HORZCOMM Non group settings (basic)
Values (Range) Off On Unit Step Default Off Description Operation
Table 545:
Name Operation TimerClass
17.4.4
Technical data
Table 546:
Function Protocol Communication speed
17.5
17.5.1
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It is assumed that the reader is familiar with the SPA communication protocol in general.
17.5.2
Principle of operation
The SPA bus uses an asynchronous serial communications protocol (1 start bit, 7 data bits + even parity, 1 stop bit) with data transfer rate up to 38400 bit/s. For more information on recommended baud rate for each type of IED, refer to Technical reference manual. Messages on the bus consist of ASCII characters.
The basic construction of the protocol assumes that the slave has no self-initiated need to talk to the master but the master is aware of the data contained in the slaves and, consequently, can request required data. In addition, the master can send data to the slave. Requesting by the master can be performed either by sequenced polling (for example, for event information) or only on demand. The master requests slave information using request messages and sends information to the slave in write messages. Furthermore, the master can send all slaves in common a broadcast message containing time or other data. The inactive state of bus transmit and receive lines is a logical "1".
SPA protocol
The tables below specify the SPA addresses for reading data from and writing data to an IED with the SPA communication protocol implemented. The SPA addresses for the mA input service values (MIM3 to MIM16) are found in table 547.
Table 547:
Function block MIM3-CH1 MIM3-CH2 MIM3-CH3 MIM3-CH4 MIM3-CH5 MIM3-CH6 MIM4-CH1 MIM4-CH2 MIM4-CH3 MIM4-CH4 MIM4-CH5 MIM4-CH6 MIM5-CH1 MIM5-CH2 Table continues on next page
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The SPA addresses for the pulse counter values PCGGIO:1 to PCGGIO:16 are found in table 548.
Table 548:
Function block PCGGIO:1 PCGGIO:2 PCGGIO:3
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I/O modules To read binary inputs, the SPA-addresses for the outputs of the I/O-module function block are used, that is, the addresses for BI1 BI16. For SPA addresses, refer to section "Related documents". Single command, 16 signals The IEDs can be provided with a function to receive signals either from a substation automation system or from the local HMI. That receiving function block has 16 outputs that can be used, for example, to control high voltage apparatuses in switchyards. For local control functions, the local HMI can also be used. Single command, 16 signals function consists of three function blocks; SINGLECMD:1 to SINGLECMD:3 for 16 binary output signals each. The signals can be individually controlled from the operator station, remote-control gateway, or from the local HMI on the IED. For Single command, 16 signals function block, SINGLECMD:1 to SINGLECMD:3, the address is for the first output. The other outputs follow consecutively after the first one. For example, output 7 on the SINGLECMD:2 function block has the 5O533 address. The SPA addresses for Single command, 16 signals functions SINGLECMD:1 to SINGLECMD:3 are found in table 549.
Table 549:
Function block SINGLECMD1-Cmd1 SINGLECMD1-Cmd2 SINGLECMD1-Cmd3 SINGLECMD1-Cmd4 Table continues on next page 825 Technical reference manual
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SPA address CMD output 5-O-515 5-O-516 5-O-517 5-O-518 5-O-519 5-O-520 5-O-521 5-O-522 5-O-523 5-O-524 5-O-525 5-O-526 5-O-527 5-O-528 5-O-529 5-O-530 5-O-531 5-O-532 5-O-533 5-O-534 5-O-535 5-O-536 5-O-537 5-O-538 5-O-539 5-O-540 5-O-541 5-O-542 5-O-543 5-O-544 5-O-545 5-O-546 5-O-547 5-O-548 5-O-549 5-O-550 5-O-551 5-O-552 5-O-553
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Figure 431 shows an application example of how the user can, in a simplified way, connect the command function via the configuration logic circuit in a protection IED for control of a circuit breaker. A pulse via the binary outputs of the IED normally performs this type of command control. The SPA addresses to control the outputs OUT1 OUT16 in SINGLECMD: 1 are shown in table 549.
SINGLECMD BLOCK ^OUT1 ^OUT2 ^OUT3 ^OUT4 ^OUT5 ^OUT6 ^OUT7 ^OUT8 ^OUT9 ^OUT10 ^OUT11 ^OUT12 ^OUT13 ^OUT14 ^OUT15 ^OUT16 INPUT1 INPUT2 INPUT3 INPUT4N AND OUT NOUT INPUT #1.000 T PULSETIMER OUT To output board, OPEN INPUT #1.000 T PULSETIMER OUT To output board, CLOSE
SYNCH OK
IEC05000717-2-en.vsd
IEC05000717 V2 EN
Figure 431:
Application example showing a simplified logic diagram for control of a circuit breaker
The MODE input defines if the output signals from SINGLECMD:1 is off, steady or pulsed signals. This is set in Parameter Setting Tool (PST) under: Setting / General Settings / Control / Commands / Single Command. Event function Event function is intended to send time-tagged events to the station level (for example, operator workplace) over the station bus. The events are there presented in an event list. The events can be created from both internal logical signals and binary input channels. All the internal signals are time tagged in the main processing module, while the binary input channels are time tagged directly on each I/O module. The events are produced according to the set event masks. The event masks are treated commonly for both the LON and SPA channels. All events according to the event mask are stored in a buffer, which contains up to 1000 events. If new events appear before the oldest event in the buffer is read, the oldest event is overwritten and an overflow alarm appears.
827 Technical reference manual
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Two special signals for event registration purposes are available in the IED, Terminal Restarted (0E50) and Event buffer overflow (0E51). The input parameters can be set individually from the Parameter Setting Tool (PST) under: Setting / General Setting / Monitoring / Event Function as follows: No events OnSet, at pick-up of the signal OnReset, at drop-out of the signal OnChange, at both pick-up and drop-out of the signal AutoDetect, event system itself make the reporting decision, (reporting criteria for integers has no semantic, prefer to be set by the user)
The Status and event codes for the Event functions are found in table 550.
Table 550:
Event block EVENT:1 Input 1 Input 2 Input 3 Input 4 Input 5 Input 6 Input 7 Input 8 Input 9 Input 10 Input 11 Input 12 Input 13 Input 14 Input 15 Input 16 EVENT:2 EVENT:3 EVENT:20
22O1 22O2 22O3 22O4 22O5 22O6 22O7 22O8 22O9 22O10 22O11 22O12 22O13 22O14 22O15 22O16 230.. 240.. 410..
These values are only applicable if the Event mask is masked OFF. Connection of signals as events Signals coming from different protection and control functions and must be sent as events to the station level over the SPA-bus (or LON-bus) are connected to the Event function block according to figure 432.
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EVENT Block ILRANG PSTO UL12RANG UL23RANG UL31RANG 3I0RANG 3U0RANG FALSE BLOCK ^INPUT1 ^INPUT2 ^INPUT3 ^INPUT4 ^INPUT5 ^INPUT6 ^INPUT7 ^INPUT8 ^INPUT9 ^INPUT10 ^INPUT11 ^INPUT12 ^INPUT13 ^INPUT14 ^INPUT15 ^INPUT16
IEC07000065-2-en.vsd
IEC07000065 V2 EN
Figure 432:
17.5.2.1
Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and LON communication. This module is a mezzanine module, and can be placed on the Analog/Digital conversion module (ADM). The serial communication module can have connectors for two plastic fibre cables (snap-in) or two glass fibre cables (ST, bayonet) or a combination of plastic and glass fibre. Three different types are available depending on type of fibre. The incoming optical fibre is connected to the RX receiver input, and the outgoing optical fibre to the TX transmitter output. When the fibre optic cables are laid out, pay special attention to the instructions concerning the handling and connection of the optical fibres. The module is identified with a number on the label on the module. The procedure to set the transfer rate and slave number can be found in the Installation and commissioning manual for respective IEDs.
17.5.3
Design
When communicating locally with a computer (PC) in the station, using the rear SPA port, the only hardware needed for a station monitoring system is: Optical fibres Opto/electrical converter for the PC PC
When communicating remotely with a PC using the rear SPA port, the same hardware and telephone modems are needed. The software needed in the PC, either local or remote, is PCM600. When communicating between the local HMI and a PC, the only hardware required is a front-connection cable.
829 Technical reference manual
1MRK505183-UEN C
Setting parameters
SPA Non group settings (basic)
Values (Range) 1 - 899 300 Bd 1200 Bd 4800 Bd 9600 Bd 19200 Bd 38400 Bd Unit Step 1 Default 30 9600 Bd Description Slave address Baudrate on serial line
Table 552:
Name Operation SlaveAddress
17.5.5
Technical data
Table 553:
Function Protocol Communication speed Slave number
17.6
17.6.1
17.6.2
17.6.2.1
Principle of operation
General
IEC 60870-5-103 is an unbalanced (master-slave) protocol for coded-bit serial communication exchanging information with a control system, and with a data transfer rate up to 38400 bit/s. In IEC terminology, a primary station is a master and a secondary station is a slave. The communication is based on a point-to-point
1MRK505183-UEN C
principle. The master must have software that can interpret IEC 60870-5-103 communication messages.
IEC 60870-5-103 protocol functionality consists of the following functions: Event handling Report of analog service values (measurements) Fault location Command handling Autorecloser ON/OFF Teleprotection ON/OFF Protection ON/OFF LED reset Characteristics 1 - 4 (Setting groups)
For detailed information about IEC 60870-5-103, refer to the IEC 60870 standard part 5: Transmission protocols, and to the section 103: Companion standard for the informative interface of protection equipment.
IEC 60870-5-103
The tables in the following sections specify the information types supported by the IEDs with the communication protocol IEC 60870-5-103 implemented. To support the information, corresponding functions must be included in the protection and control IED. Commands in control direction Commands in control direction, I103IEDCMD Command block in control direction with defined output signals. Number of instances: 1 Command block use PARAMETER as FUNCTION TYPE. INFORMATION NUMBER is defined for each output signals.
Info. no 19 23 24 25 26 Message LED Reset Activate setting group 1 Activate setting group 2 Activate setting group 3 Activate setting group 4 Supported Yes Yes Yes Yes Yes
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Function command block in control direction with defined output signals. Number of instances: 1 FUNCTION TYPE parameter for each block. INFORMATION NUMBER is defined for each output signals.
Info. no. 16 17 18 Message Auto-recloser on/off Teleprotection on/off Protection on/off Supported Yes Yes Yes
Function commands in control direction, user-defined, I103UserCMD Function command blocks in control direction with user-defined output signals. Number of instances: 4 FUNCTION TYPE parameter for each block in private range. Default values are defined in private range 1 - 4. One for each instance. INFORMATION NUMBER is required for each output signal. Default values are 1 - 8.
Info. no. 1 2 3 4 5 6 7 8 Message Output signal 01 Output signal 02 Output signal 03 Output signal 04 Output signal 05 Output signal 06 Output signal 07 Output signal 08 Supported Yes Yes Yes Yes Yes Yes Yes Yes
Status Terminal status indications in monitor direction, I103IED Indication block for status in monitor direction with defined IED functions. Number of instances: 1 Indication block use PARAMETER as FUNCTION TYPE. INFORMATION NUMBER is defined for each input signals.
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Function status indications in monitor direction, user-defined, I103UserDef Function indication blocks in monitor direction with user-defined input signals. Number of instances: 20 FUNCTION TYPE parameter for each block in private range. Default values are defined in private range 5 - 24. One for each instance. INFORMATION NUMBER is required for each input signal. Default values are defined in range 1 - 8.
Info. no. 1 2 3 4 5 6 7 8 Message Input signal 01 Input signal 02 Input signal 03 Input signal 04 Input signal 05 Input signal 06 Input signal 07 Input signal 08 Supported Yes Yes Yes Yes Yes Yes Yes Yes
Supervision indications in monitor direction, I103Superv Indication block for supervision in monitor direction with defined functions. Number of instances: 1 FUNCTION TYPE parameter for each block. INFORMATION NUMBER is defined for output signals.
Info. no. 32 33 37 38 46 47 Message Measurand supervision I Measurand supervision U I>>back-up operation VT fuse failure Group warning Group alarm Supported Yes Yes Yes Yes Yes Yes
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Earth fault indications in monitor direction, I103EF Indication block for earth fault in monitor direction with defined functions. Number of instances: 1 FUNCTION TYPE parameter for each block. INFORMATION NUMBER is defined for each output signal.
Info. no. 51 52 Message Earth fault forward Earth fault reverse Supported Yes Yes
Fault indications in monitor direction, type 1, I103FltDis Fault indication block for faults in monitor direction with defined functions. The instance type is suitable for distance protection function. FUNCTION TYPE parameter for each block. INFORMATION NUMBER is defined for each input signal. Number of instances: 1
Info. no. 64 65 66 67 84 69 70 71 68 74 75 78 79 80 81 82 76 77 73 Message Start L1 Start L2 Start L3 Start IN General start Trip L1 Trip L2 Trip L3 General trip Fault forward/line Fault reverse/busbar Zone 1 Zone 2 Zone 3 Zone 4 Zone 5 Signal transmitted Signal received SCL, Fault location in ohm Supported Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
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Autorecloser indications in monitor direction, I103AR Indication block for autorecloser in monitor direction with defined functions. Number of instances: 1 FUNCTION TYPE parameter for each block. INFORMATION NUMBER is defined for each output signal.
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Measurands Function blocks in monitor direction for input measurands. Typically connected to monitoring function, for example to power measurement . Measurands in public range, I103Meas Number of instances: 1 The IED reports all valid measuring types depending on connected signals. Upper limit for measured currents, active/reactive-power is 2.4 times rated value. Upper limit for measured voltages and frequency is 1.2 times rated value.
Info. no. 148 144, 145, 148 148 147 148 148 148 145, 146 147 146, 148 146, 148 148 Message IL1 IL2 IL3 IN, Neutral current UL1 UL2 UL3 UL1-UL2 UN, Neutral voltage P, active power Q, reactive power f, frequency Supported Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
Measurands in private range, I103MeasUsr Number of instances: 3 FUNCTION TYPE parameter for each block in private range. Default values are defined in private range 25 27. One for each instance. INFORMATION NUMBER parameter for each block. Default value 1.
Info. no. Message Meas1 Meas2 Meas3 Supported Yes Yes Yes
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Disturbance recordings The following elements are used in the ASDUs (Application Service Data Units) defined in the standard. Analog signals, 40-channels: the channel number for each channel has to be specified. Channels used in the public range are 1 to 8 and with: IL1 connected to channel 1 on disturbance function block A1RADR IL2 connected to channel 2 on disturbance function block A1RADR IL3 connected to channel 3 on disturbance function block A1RADR IN connected to channel 4 on disturbance function block A1RADR VL1E connected to channel 5 on disturbance function block A1RADR VL2E connected to channel 6 on disturbance function block A1RADR VL3E connected to channel 7 on disturbance function block A1RADR VEN connected to channel 8 on disturbance function block A1RADR
Channel number used for the remaining 32 analog signals are numbers in the private range 64 to 95. Binary signals, 96-channels: for each channel the user can specify a FUNCTION TYPE and an INFORMATION NUMBER. Disturbance upload All analog and binary signals that are recorded with disturbance recorder can be reported to the master. The last eight disturbances that are recorded are available for transfer to the master. A successfully transferred disturbance (acknowledged by the master) will not be reported to the master again. When a new disturbance is recorded by the IED a list of available recorded disturbances will be sent to the master, an updated list of available disturbances can be sent whenever something has happened to disturbances in this list. For example, when a disturbance is deteceted (by other client, for example, SPA) or when a new disturbance has been recorded or when the master has uploaded a disturbance. Deviations from the standard
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Information sent in the disturbance upload is specified by the standard; however, some of the information are adapted to information available in disturbance recorder in 670 series. This section describes all data that is not exactly as specified in the standard. ASDU23 In list of recorded disturbances (ASDU23) an information element named SOF (status of fault) exists. This information element consists of 4 bits and indicates whether: Bit TP: the protection equipment has tripped during the fault Bit TM: the disturbance data are currently being transmitted Bit TEST: the disturbance data have been recorded during normal operation or test mode. Bit OTEV: the disturbance data recording has been initiated by another event than start
The only information that is easily available is test-mode status. The other information is always set (hard coded) to:
TP TM OTEV Recorded fault with trip. [1] Disturbance data waiting for transmission [0] Disturbance data initiated by other events [1]
Another information element in ASDU23 is the FAN (fault number). According to the standard this is a number that is incremented when a protection function takes action. In 670 series FAN is equal to disturbance number, which is incremented for each disturbance. ASDU26 When a disturbance has been selected by the master; (by sending ASDU24), the protection equipment answers by sending ASDU26, which contains an information element named NOF (number of grid faults). This number must indicate fault number in the power system,that is, a fault in the power system with several trip and auto-reclosing has the same NOF (while the FAN must be incremented). NOF is in 670 series, just as FAN, equal to disturbance number. To get INF and FUN for the recorded binary signals there are parameters on the disturbance recorder for each input. The user must set these parameters to whatever he connects to the corresponding input.
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Selection of standard ASDUs in control direction Table continues on next page 839 Technical reference manual
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Selection of basic application functions Test mode Blocking of monitoring direction Disturbance data Private data Generic services No Yes Yes Yes No
17.6.2.2
Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and LON communication. This module is a mezzanine module, and can be placed on the Analog/Digital conversion module (ADM). The serial communication module can have connectors for two plastic fibre cables (snap-in) or two glass fibre cables (ST, bayonet) or a combination of plastic and glass fibre. Three different types are available depending on type of fibre. The incoming optical fibre is connected to the RX receiver input, and the outgoing optical fibre to the TX transmitter output. When the fibre optic cables are laid out, pay special attention to the instructions concerning the handling and connection of the optical fibres. The module is identified with a number on the label on the module.
17.6.3
Function block
BLOCK FUNTYPE I103IEDCMD 19-LEDRS 23-GRP1 24-GRP2 25-GRP3 26-GRP4 IEC05000689-2-en.vsd
IEC05000689 V2 EN
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I103USRCMD BLOCK OUTPUT1 PULSEMOD OUTPUT2 T OUTPUT3 FUNTYPE OUTPUT4 INFNO_1 OUTPUT5 INFNO_2 OUTPUT6 INFNO_3 OUTPUT7 INFNO_4 OUTPUT8 INFNO_5 INFNO_6 INFNO_7 INFNO_8 IEC05000693-2-en.vsd
IEC05000693 V2 EN
I103IED BLOCK 19_LEDRS 23_GRP1 24_GRP2 25_GRP3 26_GRP4 21_TESTM FUNTYPE IEC05000688-2-en.vsd
IEC05000688 V2 EN
I103USRDEF BLOCK INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 INPUT7 INPUT8 FUNTYPE INFNO_1 INFNO_2 INFNO_3 INFNO_4 INFNO_5 INFNO_6 INFNO_7 INFNO_8 IEC05000694-2-en.vsd
IEC05000694 V2 EN
I103SUPERV BLOCK 32_MEASI 33_MEASU 37_IBKUP 38_VTFF 46_GRWA 47_GRAL FUNTYPE IEC05000692-2-en.vsd
IEC05000692 V2 EN
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I103FLTDIS BLOCK 64_STL1 65_STL2 66_STL3 67_STIN 84_STGEN 69_TRL1 70_TRL2 71_TRL3 68_TRGEN 74_FW 75_REV 78_ZONE1 79_ZONE2 80_ZONE3 81_ZONE4 82_ZONE5 76_TRANS 77_RECEV 73_SCL FLTLOC ARINPROG FUNTYPE IEC05000686-2-en.vsd
IEC05000686 V2 EN
I103FLTSTD BLOCK 64_STL1 65_STL2 66_STL3 67_STIN 84_STGEN 69_TRL1 70_TRL2 71_TRL3 68_TRGEN 74_FW 75_REV 85_BFP 86_MTRL1 87_MTRL2 88_MTRL3 89_MTRN 90_IOC 91_IOC 92_IEF 93_IEF ARINPROG FUNTYPE IEC05000687-2-en.vsd
IEC05000687 V2 EN
1MRK505183-UEN C
I103MEAS BLOCK IL1 IL2 IL3 IN UL1 UL2 UL3 UL1L2 UN P Q F FUNTYPE IEC05000690-2-en.vsd
IEC05000690 V2 EN
I103MEASUSR BLOCK INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 INPUT7 INPUT8 INPUT9 FUNTYPE INFNO IEC05000691-2-en.vsd
IEC05000691 V2 EN
17.6.4
Table 555:
Name 19-LEDRS 23-GRP1 24-GRP2 25-GRP3 26-GRP4
Table 556:
Name BLOCK
1MRK505183-UEN C
Table 557:
Name 16-AR 17-DIFF 18-PROT
Table 558:
Name BLOCK
Table 559:
Name OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 OUTPUT5 OUTPUT6 OUTPUT7 OUTPUT8
Table 560:
Name BLOCK 19_LEDRS 23_GRP1 24_GRP2 25_GRP3 26_GRP4 21_TESTM
Table 561:
Name BLOCK INPUT1 INPUT2 INPUT3
1MRK505183-UEN C
Table 562:
Name BLOCK 32_MEASI 33_MEASU 37_IBKUP 38_VTFF 46_GRWA 47_GRAL
Table 563:
Name BLOCK 51_EFFW 52_EFREV
Table 564:
Name BLOCK 64_STL1 65_STL2 66_STL3 67_STIN 84_STGEN 69_TRL1 70_TRL2 71_TRL3 68_TRGEN 74_FW 75_REV
1MRK505183-UEN C
Information number 78, zone 1 Information number 79, zone 2 Information number 79, zone 3 Information number 79, zone 4 Information number 79, zone 5 Information number 76, signal transmitted Information number 77, signal recevied Information number 73, fault location in ohm Faultlocator faultlocation valid (LMBRFLOCALCMADE) Autorecloser in progress (SMBRREC- INPROGR)
Table 565:
Name BLOCK 64_STL1 65_STL2 66_STL3 67_STIN 84_STGEN 69_TRL1 70_TRL2 71_TRL3 68_TRGEN 74_FW 75_REV 85_BFP 86_MTRL1 87_MTRL2 88_MTRL3 89_MTRN 90_IOC 91_IOC 92_IEF 93_IEF ARINPROG
1MRK505183-UEN C
Table 566:
Name BLOCK 16_ARACT 128_CBON 130_UNSU
Table 567:
Name BLOCK IL1 IL2 IL3 IN UL1 UL2 UL3 UL1L2 UN P Q F
Table 568:
Name BLOCK INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 INPUT7 INPUT8 INPUT9
1MRK505183-UEN C
Setting parameters
I103IEDCMD Non group settings (basic)
Values (Range) 1 - 255 Unit FunT Step 1 Default 255 Description Function type (1-255)
Table 570:
Name FUNTYPE
Table 571:
Name PULSEMOD T FUNTYPE INFNO_1 INFNO_2 INFNO_3 INFNO_4 INFNO_5 INFNO_6 INFNO_7 INFNO_8
Table 572:
Name FUNTYPE
Table 573:
Name FUNTYPE INFNO_1 INFNO_2 INFNO_3 INFNO_4
1MRK505183-UEN C
Table 574:
Name FUNTYPE
Table 575:
Name FUNTYPE
Table 576:
Name FUNTYPE
Table 577:
Name FUNTYPE
Table 578:
Name FUNTYPE
Table 579:
Name RatedIL1 RatedIL2 RatedIL3 RatedIN RatedUL1 RatedUL2 RatedUL3
1MRK505183-UEN C
Rated voltage for phase-phase L1-L2 Rated residual voltage UN Rated value for active power Rated value for reactive power Rated system frequency Function type (1-255)
Table 580:
Name FUNTYPE INFNO RatedMeasur1 RatedMeasur2 RatedMeasur3 RatedMeasur4 RatedMeasur5 RatedMeasur6 RatedMeasur7 RatedMeasur8 RatedMeasur9
17.6.6
Technical data
Table 581:
Function Protocol Communication speed
1MRK505183-UEN C
17.7
17.7.1
Figure 433:
17.7.2
1MRK505183-UEN C
Table 583:
Name RESREQ RESGRANT APP1_OP APP1_CL APP1VAL APP2_OP APP2_CL APP2VAL APP3_OP APP3_CL APP3VAL APP4_OP APP4_CL APP4VAL APP5_OP APP5_CL APP5VAL APP6_OP APP6_CL APP6VAL APP7_OP APP7_CL APP7VAL APP8_OP APP8_CL APP8VAL APP9_OP APP9_CL APP9VAL APP10_OP APP10_CL APP10VAL APP11_OP APP11_CL APP11VAL APP12_OP APP12_CL APP12VAL
1MRK505183-UEN C
17.7.3
Table 584:
Name Operation
Setting parameters
GOOSEINTLKRCV Non group settings (basic)
Values (Range) Off On Unit Step Default Off Description Operation Off/On
1MRK505183-UEN C
17.8
17.8.1
Figure 434:
17.8.2
Table 586:
Name OUT1 OUT1VAL OUT2 OUT2VAL OUT3 OUT3VAL
1MRK505183-UEN C
17.8.3
Table 587:
Name Operation
Setting parameters
GOOSEBINRCV Non group settings (basic)
Values (Range) Off On Unit Step Default Off Description Operation Off/On
17.9
1MRK505183-UEN C
17.9.1
Introduction
The IED can be provided with a function to send and receive signals to and from other IEDs via the interbay bus. The send and receive function blocks has 16 outputs/ inputs that can be used, together with the configuration logic circuits, for control purposes within the IED or via binary outputs. When it is used to communicate with other IEDs, these IEDs have a corresponding Multiple transmit function block with 16 outputs to send the information received by the command block.
17.9.2
Principle of operation
Two multiple transmit function blocks MULTICMDSND:1 and MULTICMDSND: 2 and 8 slow multiple transmit function blocks MULTICMDSND:3 to MULTICMDSND:10 are available in the IED. Sixteen signals can be connected and they will then be sent to the multiple command block in the other IED. The connections are set with the LON Network Tool (LNT). Twelve multiple command function blocks MULTICMDRCV:1 to MULTICMDRCV:12 with fast execution time and 48 multiple command function blocks MULTICMDRCV:13 to MULTICMDRCV:60 with slower execution time are available in the IED. Multiple command function block MULTICMDRCV has 16 outputs combined in one block, which can be controlled from other IEDs. The output signals, here OUTPUT1 to OUTPUT16, are then available for configuration to built-in functions or via the configuration logic circuits to the binary outputs of the IED. MULTICMDRCV also has a supervision function, which sets the output VALID to 0 if the block does not receive data within set maximum time.
17.9.3
17.9.3.1
Design
General
The output signals can be of the types Off, Steady, or Pulse. The setting is done on the MODE settings, common for the whole block, from PCM600.
1MRK505183-UEN C
0 = Off sets all outputs to 0, independent of the values sent from the station level, that is, the operator station or remote-control gateway. 1 = Steady sets the outputs to a steady signal 0 or 1, depending on the values sent from the station level. 2 = Pulse gives a pulse with one execution cycle duration, if a value sent from the station level is changed from 0 to 1. That means that the configured logic connected to the command function blocks may not have a cycle time longer than the execution cycle time for the command function block.
17.9.4
Function block
MULTICMDRCV BLOCK ERROR NEWDATA OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 OUTPUT5 OUTPUT6 OUTPUT7 OUTPUT8 OUTPUT9 OUTPUT10 OUTPUT11 OUTPUT12 OUTPUT13 OUTPUT14 OUTPUT15 OUTPUT16 VALID IEC06000007-2-en.vsd
IEC06000007 V2 EN
Figure 435:
MULTICMDSND BLOCK ERROR INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 INPUT7 INPUT8 INPUT9 INPUT10 INPUT11 INPUT12 INPUT13 INPUT14 INPUT15 INPUT16 IEC06000008-2-en.vsd
IEC06000008 V2 EN
Figure 436:
1MRK505183-UEN C
Table 589:
Name BLOCK INPUT1 INPUT2 INPUT3 INPUT4 INPUT5 INPUT6 INPUT7 INPUT8 INPUT9 INPUT10 INPUT11 INPUT12 INPUT13 INPUT14 INPUT15 INPUT16
Table 590:
Name ERROR NEWDATA OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 OUTPUT5 OUTPUT6 OUTPUT7 OUTPUT8 OUTPUT9
1MRK505183-UEN C
Table 591:
Name ERROR
17.9.6
Table 592:
Name tMaxCycleTime tMinCycleTime Mode tPulseTime
Setting parameters
MULTICMDRCV Non group settings (basic)
Values (Range) 0.050 - 200.000 0.000 - 200.000 Steady Pulsed 0.000 - 60.000 Unit s s s Step 0.001 0.001 0.001 Default 11.000 0.000 Steady 0.200 Description Maximum cycle time between receptions of input data Minimum cycle time between receptions of input data Mode for output signals Pulse length for multi command outputs
Table 593:
Name tMaxCycleTime tMinCycleTime
860
1MRK505183-UEN C
Section 18
Remote communication
18.1
18.1.1
Introduction
The remote end data communication is used either for the transmission of current values together with maximum 8 binary signals in the line differential protection, or for transmission of only binary signals, up to 192 signals, in the other 670 series IEDs. The binary signals are freely configurable and can, thus, be used for any purpose, for example, communication scheme related signals, transfer trip and/or other binary signals between IEDs. Communication between two IEDs requires that each IED is equipped with an LDCM (Line Data Communication Module). The LDCMs are then interfaces to a 64 kbit/s communication channel for duplex communication between the IEDs. The IED can be equipped with up to four short range, medium range or long range LDCM.
18.1.2
Principle of operation
The communication is made on standard ITU (CCITT) PCM digital 64 kbit/s channels. It is a two-way communication where telegrams are sent every 5 ms (same in 50 Hz and 60 Hz), exchanging information between two IEDs. The format used is C37.94 and one telegram consists of start and stop flags, address, data to be transmitted, Cyclic Redundancy Check (CRC) and Yellow bit (which is associated with C37.94).
1MRK505183-UEN C
Information n x 16 bits
CRC 16 bits
en01000134.vsd
IEC01000134 V1 EN
Figure 437:
The start and stop flags are the 0111 1110 sequence (7E hexadecimal), defined in the HDLC standard. The CRC is designed according to the standard CRC16 definition. The optional address field in the HDLC frame is not used instead a separate addressing is included in the data field. The address field is used for checking that the received message originates from the correct equipment. There is always a risk that multiplexers occasionally mix the messages up. Each terminal in the system is given a number. The terminal is then programmed to accept messages from a specific terminal number. If the CRC function detects a faulty message, the message is thrown away and not used in the evaluation. When the communication is used for line differential purpose, the transmitted data consists of three currents, clock information, trip-, block- and alarm-signals and eight binary signals which can be used for any purpose. The three currents are represented as sampled values. When the communication is used exclusively for binary signals, the full data capacity of the communication channel is used for the binary signal purpose which gives the capacity of 192 signals.
1MRK505183-UEN C
18.1.3
LDCMRecBinStat2 COMFAIL YBIT NOCARR NOMESS ADDRERR LNGTHERR CRCERROR TRDELERR SYNCERR REMCOMF REMGPSER SUBSTITU LOWLEVEL IEC07000044-2-en.vsd
IEC07000044 V2 EN
Figure 438:
LDCMRecBinStat3 COMFAIL YBIT NOCARR NOMESS ADDRERR LNGTHERR CRCERROR TRDELERR SYNCERR REMCOMF REMGPSER SUBSTITU LOWLEVEL IEC05000451-2-en.vsd
IEC05000451 V2 EN
Figure 439:
18.1.4
1MRK505183-UEN C
No start and stop flags identified for the incoming message Incoming message from a wrong terminal Wrong length of the incoming message Identified error by CRC check in incoming message Remote terminal indicates problem with received message Low signal level on the receive link
Table 595:
Name COMFAIL YBIT NOCARR NOMESS ADDRERR LNGTHERR CRCERROR TRDELERR SYNCERR REMCOMF REMGPSER SUBSTITU LOWLEVEL
Table 596:
Name COMFAIL YBIT NOCARR NOMESS ADDRERR LNGTHERR CRCERROR TRDELERR
1MRK505183-UEN C
18.1.5
Table 597:
Name ChannelMode
Setting parameters
LDCMRecBinStat1 Non group settings (basic)
Values (Range) Off On OutOfService 0 - 255 0 - 255 Slave Master LowPower HighPower 5 - 500 5 - 500 Off On Unit Step Default On Description Channel mode of LDCM, 0=OFF, 1=ON, 2=OutOfService Terminal number used for line differential communication Terminal number on remote terminal Com Synchronization mode of LDCM, 0=Slave, 1=Master Transmission power for LDCM, 0=Low, 1=High Time delay before communication error signal is activated Reset delay before communication error signal is reset Invert polarization for X21 communication
ms ms -
1 1 5 5 -
Table 598:
Name ChannelMode
1 1 -
1MRK505183-UEN C
ms ms ms ms ms ms -
5 5 5 5 0.01 1 -
Time delay before communication error signal is activated Reset delay before communication error signal is reset Time delay before switching in redundant channel Time delay before switching back from redundant channel Asymmetric delay when communication use echo synch. Max allowed transmission delay Compression range
us us -
1 1 -
Maximum time diff for ECHO back-up Deadband for t Diff Invert polarization for X21 communication
Table 599:
Name ChannelMode
1 1 -
ComFailAlrmDel
ms
100
1MRK505183-UEN C
us us -
1 1 -
Maximum time diff for ECHO back-up Deadband for t Diff Invert polarization for X21 communication
18.2
18.2.1
Figure 440:
The function blocks are not represented in the Application Configuration tool except for the LDCMTRN function block that is visible in ACT. The signals appear only in the Signal Matrix tool when a LDCM is included in the configuration with the function selector tool.
1MRK505183-UEN C
1MRK505183-UEN C
Section 19 Hardware
Section 19
Hardware
19.1
19.1.1
Overview
Variants of case and local HMI display size
xx04000458.eps
IEC04000458 V1 EN
Figure 441:
Section 19 Hardware
1MRK505183-UEN C
xx04000459.eps
IEC04000459 V1 EN
Figure 442:
IEC05000762 V1 EN
Figure 443:
xx05000763.eps
IEC05000763 V1 EN
Figure 444:
1MRK505183-UEN C
Section 19 Hardware
xx04000460.eps
IEC04000460 V1 EN
Figure 445:
xx04000461.eps
IEC04000461 V1 EN
Figure 446:
1MRK505183-UEN C
Module PSM BIM, BOM, SOM or IOM BIM, BOM, SOM, IOM or GSM SLM IRIG-B 1)
IEC08000471 BG V1 EN
Rear Positions X11 X31 and X32 etc. to X51 and X52 X51, X52 X301:A, B, C, D X302 X311:A, B, C, D X312 X313 X401
1) IRIG-B installation, when included in seat P30:2 2) LDCM installation sequence: P31:2 or P31:3 3) RS485 installation, when included in seat P31:2 Note! 1 One LDCM can be included depending of availability of IRIG-B respective RS485 modules.
1MRK505183-UEN C
Section 19 Hardware
Table 602:
Module PSM BIM, BOM, SOM, IOM or MIM BIM, BOM, SOM, IOM, MIM or GSM SLM IRIG-B or LDCM 1) 2)
IEC08000472 BG V1 EN
Rear Positions X11 X31 and X32 etc. to X101 and X102 X101, X102 X301:A, B, C, D X302 X303 X311:A, B, C, D X312 X313 X401
1) IRIG-B installation, when included in seat P30:2 2) LDCM installation sequence: P31:2, P31:3, P30:2 and P30:3 3) RS485 installation, when included in seat P31:2 or P31:3 4) OEM X311:A, B (IEC 61850-8-1). X311:C, D (IEC 61850-8-1 or IEC 61850-9-2 LE) Note! 2-4 LDCM can be included depending of availability of IRIG-B respective RS485 modules.
Section 19 Hardware
1MRK505183-UEN C
Table 603:
Module PSM BIM, BOM, SOM, IOM or MIM BIM, BOM, SOM, IOM, MIM or GSM SLM IRIG-B or LDCM 1,2)
IEC08000473 BG V1 EN
Rear Positions X11 X31 and X32 etc. to X71 and X72 X71, X72 X301:A, B, C, D X302 X303 X311:A, B, C, D X312 X313 X322 X323 X401 X411
1) IRIG-B installation, when included in seat P30:2 2) LDCM installation sequence: P31:2, P31:3, P32:2, P32:3, P30:2 and P30:3 3) RS485 installation, when included in seat P31:2, P31:3, P32:2 or P32:3 4) OEM X311:A, B (IEC 61850-8-1). (X311:C, D IEC 61850-8-1 or IEC 61850-9-2 LE) Note! 2-4 LDCM can be included depending of availability of IRIGB respective RS485 modules. When IRIG-B, RS485 and 4 pc of LDCM are in use, needs a second ADM.
1MRK505183-UEN C
Section 19 Hardware
Table 604:
Module PSM BIM, BOM, SOM, IOM or MIM BIM, BOM, SOM, IOM, MIM or GSM
IEC08000474 BG V1 EN
Rear Positions X11 X31 and X32 etc. to X161 and X162 X161 and X162
X301:A, B, C, D X302 X312, X313, X302 and X303 X311:A, B, C, D X312, X313 X401
Note! 1) 2-4 LDCM can be included. First LDCM always in position X313, second LDCM always in position X303. LDCM can also be in position X302 and X312 if IRIG-B respective RS485 modules are not included. 2) OEM X311:A, B (IEC 61850-8-1). OEM X311:C, D (IEC 61850-8-1)(IEC 61850-9-2LE)
Section 19 Hardware
1MRK505183-UEN C
Table 605:
Module PSM BIM, BOM, SOM, IOM or MIM BIM, BOM, SOM, IOM, MIM or GSM
IEC08000475 BG V1 EN
Rear Positions X11 X31 and X32 etc. to X131 and X132 X131, X132
SLM IRIG-B or LDCM 1,2) LDCM 2) OEM 4) RS485 or LDCM 2) 3) LDCM 2) LDCM 2) LDCM 2) TRM 1 TRM 2
X301:A, B, C, D X302 X303 X311:A, B, C, D X312 X313 X322 X323 X401 X411
1) IRIG-B installation, when included in seat P30:2 2) LDCM installation sequence: P31:2, P31:3, P32:2, P32:3, P30:2 and P30:3 3) RS485 installation, when included in seat P31:2, P31:3, P32:2 or P32:4 4) OEM X311:A, B (IEC 61850-8-1). OEM X311:C, D (IEC 61850-9-2 or IEC 61850-9-2 LE) Note! 2-4 LDCM can be included depending of availability of IRIG-B respective RS485 modules. When IRIG-B, RS485 and 4 pc of LDCM are in use, needs a second ADM.
1MRK505183-UEN C
Section 19 Hardware
19.2
19.2.1
Hardware modules
Overview
Table 606:
Module Combined backplane module (CBM)
Basic modules
Description A backplane PCB that carries all internal signals between modules in an IED. Only the TRM (when included) is not connected directly to this board. A backplane PCB that forms part of the IED backplane with connectors for TRM (when included), ADM etc. Including a regulated DC/DC converter that supplies auxiliary voltage to all static circuits. An internal fail alarm output is available.
Module for overall application control. All information is processed or passed through this module, such as configuration, settings and communication. The module consists of LED:s, an LCD, a push button keyboard and an ethernet connector used to connect a PC to the IED. Transformer module that galvanically separates the internal circuits from the VT and CT circuits. It has 12 analog inputs. Slot mounted PCB with A/D conversion.
Table 607:
Module
Binary input module (BIM) Binary output module (BOM) Binary I/O module (IOM) Line data communication modules (LDCM), short range, medium range, long range, X21 Serial SPA/LON/IEC 60870-5-103 communication modules (SLM) Optical ethernet module (OEM) mA input module (MIM) Table continues on next page
Section 19 Hardware
Module GPS time synchronization module (GSM) Static output module (SOM) IRIG-B Time synchronization module (IRIG-B) Description
1MRK505183-UEN C
Used to provide the IED with GPS time synchronization. Module with 6 fast static outputs and 6 change over output relays. Module with 2 inputs. One is used for handling both pulse-width modulated signals and amplitude modulated signals and one is used for optical input type ST for PPS time synchronization.
19.2.2
19.2.2.1
19.2.2.2
Functionality
The Compact PCI makes 3.3V or 5V signaling in the backplane possible. The CBM backplane and connected modules are 5V PCI-compatible. Some pins on the Compact PCI connector are connected to the CAN bus, to be able to communicate with CAN based modules. If a modules self test discovers an error it informs other modules using the Internal Fail signal IRF.
19.2.2.3
Design
There are two basic versions of the CBM: with 3 Compact PCI connectors and a number of euro connectors depending on the IED case size. One Compact PCI connector is used by NUM and two are used by other PCI modules, for example two ADMs in IEDs with two TRMs. See figure 448 with 2 Compact PCI connectors and a number of euro connectors depending on the IED case size. One Compact PCI connector is used by NUM and one is used by for example an ADM in IEDs with one TRM. See figure 447
Each PCI connector consists of 2 compact PCI receptacles. The euro connectors are connected to the CAN bus and used for I/O modules and power supply.
1MRK505183-UEN C
Section 19 Hardware
1
IEC05000516 V1 EN
2
en05000516.vsd
Figure 447:
Pos Description 1 2 CAN slots CPCI slots
2 en05000755.vsd
IEC05000755 V1 EN
Figure 448:
Pos Description 1 2 CAN slots CPCI slots
Section 19 Hardware
1MRK505183-UEN C
en05000756.vsd
IEC05000756 V1 EN
Figure 449:
Pos Description 1 CBM
19.2.3
19.2.3.1
19.2.3.2
Functionality
The Universal Backplane Module connects the CT and VT analog signals from the transformer input module to the analog digital converter module. The Numerical processing module (NUM) is also connected to the UBM. The ethernet contact on the front panel as well as the internal ethernet contacts are connected to the UBM which provides the signal path to the NUM board.
19.2.3.3
Design
It connects the Transformer input module (TRM) to the Analog digital conversion module (ADM) and the Numerical module (NUM). The UBM exists in 2 versions.
1MRK505183-UEN C
Section 19 Hardware
for IEDs with two TRM and two ADM. It has four 48 pin euro connectors and one 96 pin euro connector, see figure 451 for IEDs with one TRM and one ADM. It has two 48 pin euro connectors and one 96 pin euro connector, see figure 452.
The 96 pin euro connector is used to connect the NUM board to the backplane. The 48 pin connectors are used to connect the TRM and ADM.
TRM
ADM
NUM
AD Data
X1 X2 X4
X3
Front port
Ethernet
LHMI connection
Ethernet X5
en05000489.vsd
IEC05000489 V1 EN
Figure 450:
en05000757.vsd
IEC05000757 V1 EN
Figure 451:
Section 19 Hardware
1MRK505183-UEN C
en05000758.vsd
IEC05000758 V1 EN
Figure 452:
en05000759.vsd
IEC05000759 V1 EN
Figure 453:
Pos Description 1 UBM
19.2.4
19.2.4.1
1MRK505183-UEN C
Section 19 Hardware
For communication with high speed modules, e.g. analog input modules and high speed serial interfaces, the NUM is equipped with a Compact PCI bus. The NUM is the compact PCI system card i.e. it controls bus mastering, clock distribution and receives interrupts.
19.2.4.2
Functionality
The NUM, Numeric processing module is a high performance, standard off-theshelf compact-PCI CPU module. It is 6U high and occupies one slot. Contact with the backplane is via two compact PCI connectors and an euro connector. The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PC-MIP slots onto which mezzanine cards such as SLM or LDCM can be mounted. To reduce bus loading of the compact PCI bus in the backplane the NUM has one internal PCI bus for internal resources and the PMC/PC-MIP slots and external PCI accesses through the backplane are buffered in a PCI/PCI bridge. The application code and configuration data are stored in flash memory using a flash file system. The NUM is equipped with a real time clock. It uses a capacitor for power backup of the real time clock. No forced cooling is used on this standard module because of the low power dissipation.
Section 19 Hardware
19.2.4.3 Block diagram
1MRK505183-UEN C
Compact Flash
Logic
Memory
Ethernet
CPU
en04000473.vsd
IEC04000473 V1 EN
Figure 454:
19.2.5
19.2.5.1
19.2.5.2
Design
There are two types of the power supply module. They are designed for different DC input voltage ranges see table 608. The power supply module contains a built-
Backplane connector
UBM connector
1MRK505183-UEN C
Section 19 Hardware
in, self-regulated DC/DC converter that provides full isolation between the terminal and the external battery system.
Block diagram
Input connector
Filter
Power supply
Supervision
99000516.vsd
IEC99000516 V1 EN
Figure 455:
19.2.5.3
Technical data
Table 608:
Quantity Auxiliary dc voltage, EL (input) Power consumption Auxiliary DC power in-rush
19.2.6
19.2.7
Backplane connector
Section 19 Hardware
19.2.7.1 Introduction
1MRK505183-UEN C
The transformer input module is used to galvanically separate and transform the secondary currents and voltages generated by the measuring transformers. The module has twelve inputs in different combinations of currents and voltage inputs. Alternative connectors of Ring lug or Compression type can be ordered.
19.2.7.2
Design
The transformer module has 12 input transformers. There are several versions of the module, each with a different combination of voltage and current input transformers. Basic versions: 6 current channels and 6 voltage channels 7 current channels and 5 voltage channels 9 current channels and 3 voltage channels 12 current channels 6 current channels
The rated values of the current inputs are selected at order. The TRM is connected to the ADM and NUM via the UBM. For configuration of the input and output signals, refer to section "Signal matrix for analog inputs SMAI".
19.2.7.3
Technical data
Table 609:
Quantity Current Operative range Permissive overload Burden Ac voltage Operative range Permissive overload Burden Frequency
*)
TRM - Energizing quantities, rated values and limits for protection transformer modules
Rated value Ir = 1 or 5 A (0-100) x Ir 4 Ir cont. 100 Ir for 1 s *) < 150 mVA at Ir = 5 A < 20 mVA at Ir = 1 A Ur = 110 V (0340) V 420 V cont. 450 V 10 s < 20 mVA at 110 V fr = 50/60 Hz 5% 0.5288 V Nominal range (0.2-40) Ir
1MRK505183-UEN C
Section 19 Hardware Analog digital conversion module, with time synchronization (ADM)
Introduction
The Analog/Digital module has twelve analog inputs, 2 PC-MIP slots and 1 PMC slot. The PC-MIP slot is used for PC-MIP cards and the PMC slot for PMC cards according to table 610. The OEM card should always be mounted on the ADM board. The UBM connects the ADM to the transformer input module (TRM).
Table 610:
PC-MIP cards LDCM LR-LDCM MR-LDCM X21-LDCM IRIG-B RS485
19.2.8
19.2.8.1
19.2.8.2
Design
The Analog digital conversion module input signals are voltage and current from the transformer module. Shunts are used to adapt the current signals to the electronic voltage level. To gain dynamic range for the current inputs, two shunts with separate A\D channels are used for each input current. In this way a 20 bit dynamic range is obtained with a 16 bit A\D converter. Input signals are sampled with a sampling freqency of 5 kHz at 50 Hz system frequency and 6 kHz at 60 Hz system frequency. The A\D converted signals goes through a filter with a cut off frequency of 500 Hz and are reported to the numerical module (NUM) with 1 kHz at 50 Hz system frequency and 1,2 kHz at 60 Hz system frequency.
Section 19 Hardware
1MRK505183-UEN C
AD1 AD2
1.2v
AD3 AD4
Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 8 Channel 9 Channel 10 Channel 11 Channel 12
PMC
level shift
PC-MIP
2.5v
en05000474.vsd
IEC05000474 V1 EN
Figure 456:
1MRK505183-UEN C
19.2.9
19.2.9.1
19.2.9.2
Design
The Binary input module contains 16 optical isolated binary inputs. The voltage level of the binary input is selected at order. For configuration of the input signals, refer to section "Signal matrix for binary inputs SMBI". A signal discriminator detects and blocks oscillating signals. When blocked, a hysteresis function may be set to release the input at a chosen frequency, making it possible to use the input for pulse counting. The blocking frequency may also be set. Figure 457 shows the operating characteristics of the binary inputs of the four voltage levels. The standard version of binary inputs gives an improved capability to withstand disturbances and should generally be used when pulse counting is not required.
Section 19 Hardware
1MRK505183-UEN C
[V] 300
Figure 457:
IEC99000517-ABC V1 EN
This binary input module communicates with the Numerical module (NUM) via the CAN-bus on the backplane. The design of all binary inputs enables the burn off of the oxide of the relay contact connected to the input, despite the low, steady-state power consumption, which is shown in figure 458 and 459.
1MRK505183-UEN C
Section 19 Hardware
[mA] 30 / 50
1 35 70 [ms]
en07000104-2.vsd
IEC07000104 V2 EN
Figure 458:
Approximate binary input inrush current for the two standard versions of BIM.
[mA] 30
Figure 459:
Approximate binary input inrush current for the BIM version with enhanced pulse counting capabilities.
Section 19 Hardware
1MRK505183-UEN C
Process connector
Opto isolated input Opto isolated input Opto isolated input Opto isolated input Opto isolated input Opto isolated input Opto isolated input Opto isolated input Opto isolated input
Microcontroller
Opto isolated input Opto isolated input Opto isolated input Opto isolated input
99000503.vsd
IEC99000503 V1 EN
Figure 460:
Backplane connector
Process connector
Memory
1MRK505183-UEN C
Section 19 Hardware
Technical data
Table 611:
Quantity Binary inputs DC voltage, RL
19.2.9.3
Power consumption 24/30 V 48/60 V 110/125 V 220/250 V Counter input frequency Oscillating signal discriminator
Table 612:
Quantity Binary inputs DC voltage, RL
Power consumption 24/30 V 48/60 V 110/125 V 220/250 V Counter input frequency Balanced counter input frequency Oscillating signal discriminator
19.2.10
19.2.10.1
19.2.10.2
Design
The binary output module (BOM) has 24 software supervised output relays. Each pair of relays have a common power source input to the contacts, see figure 461.
Section 19 Hardware
1MRK505183-UEN C
This should be considered when connecting the wiring to the connection terminal on the back of the IED. The high closing and carrying current capability allows connection directly to breaker trip and closing coils. If breaking capability is required to manage fail of the breaker auxiliary contacts normally breaking the trip coil current, a parallel reinforcement is required. For configuration of the output signals, refer to section "Signal matrix for binary outputs SMBO".
Output module
3
xx00000299.vsd
IEC00000299 V1 EN
Figure 461:
1 Output connection from relay 1 2 Output signal power source connection 3 Output connection from relay 2
1MRK505183-UEN C
Section 19 Hardware
Relay
Relay
Relay
Relay
Process connector
Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay Relay
Relay
Trip and Signal relays 24 250 V AC, DC 1000 V rms 8A 10 A
Microcontroller
Memory
99000505.vsd
IEC99000505 V1 EN
Figure 462:
19.2.10.3
Technical data
Table 613:
Binary outputs Max system voltage Test voltage across open contact, 1 min Current carrying capacity Continuous 1s Table continues on next page
BOM - Binary output module contact data (reference standard: IEC 61810-2)
Function or quantity
Backplane connector
Process connector
CAN
Section 19 Hardware
Function or quantity Making capacity at inductive load with L/R>10 ms 0.2 s 1.0 s Breaking capacity for AC, cos j>0.4 Breaking capacity for DC with L/R < 40 ms
1MRK505183-UEN C
Trip and Signal relays 30 A 10 A 250 V/8.0 A 48 V/1 A 110 V/0.4 A 125 V/0.35 A 220 V/0.2 A 250 V/0.15 A
19.2.11
19.2.11.1
19.2.11.2
Design
The Static output module (SOM) have 6 normally open (NO) static outputs and 6 electromechanical relay outputs with change over contacts. The SOM consists mainly of: An MCU A CAN-driver 6 static relays outputs 6 electromechanical relay outputs A DC/DC converter Connectors interfacing CAN-bus to backplane CBM IO-connectors to binary outputs (2 pcs.)
The following parts are supervised: Interruption in relay coil Short circuit of relay coil Driver failure
1MRK505183-UEN C
Section 19 Hardware
Process connector
Drive & Read back Drive & Read back Drive & Read back Drive & Read back
Codeflash
MCU
CANdriver
Process connector
DC/DC
Drive & Read back
Reset
Drive & Read back
en07000115.vsd
IEC07000115 V1 EN
Figure 463:
Backplane connector
Section 19 Hardware
1MRK505183-UEN C
IEC09000974-1-en.vsd
IEC09000974 V1 EN
Figure 464:
IEC09000975 V1 EN
Figure 465:
19.2.11.3
Technical data
Table 614:
Rated voltage Number of outputs Impedance open state Test voltage across open contact, 1 min Current carrying capacity: Table continues on next page
SOM - Static Output Module (reference standard: IEC 61810-2): Static binary outputs
Static binary output trip 48 - 60 VDC 6 ~300 k No galvanic separation 110 - 250 VDC 6 ~810 k No galvanic separation
Function of quantity
1MRK505183-UEN C
Section 19 Hardware
Function of quantity Continuous 1.0s Making capacity at capacitive load with the maximum capacitance of 0.2 F : 0.2s 1.0s Breaking capacity for DC with L/R 40ms 30A 10A 48V / 1A 60V / 0,75A 30A 10A 110V / 0.4A 125V / 0.35A 220V / 0.2A 250V / 0.15A Operating time <1ms <1ms Static binary output trip 5A 10A 5A 10A
Table 615:
SOM - Static Output module data (reference standard: IEC 61810-2): Electromechanical relay outputs
Trip and signal relays 250V AC/DC 6 1000V rms
Function of quantity Max system voltage Number of outputs Test voltage across open contact, 1 min Current carrying capacity: Continuous 1.0s Making capacity at capacitive load with the maximum capacitance of 0.2 F: 0.2s 1.0s Breaking capacity for DC with L/R 40ms
8A 10A
30A 10A 48V / 1A 110V / 0.4A 125V / 0,35A 220V / 0,2A 250V / 0.15A
19.2.12
19.2.12.1
Section 19 Hardware
19.2.12.2 Design
1MRK505183-UEN C
The binary input/output module is available in two basic versions, one with unprotected contacts and one with MOV (Metal Oxide Varistor) protected contacts. Inputs are designed to allow oxide burn-off from connected contacts, and increase the disturbance immunity during normal protection operate times. This is achieved with a high peak inrush current while having a low steady-state current, see figure 458. Inputs are debounced by software. Well defined input high and input low voltages ensures normal operation at battery supply earth faults, see figure 457. The voltage level of the inputs is selected when ordering. I/O events are time stamped locally on each module for minimum time deviance and stored by the event recorder if present. The binary I/O module, IOM, has eight optically isolated inputs and ten output relays. One of the outputs has a change-over contact. The nine remaining output contacts are connected in two groups. One group has five contacts with a common and the other group has four contacts with a common, to be used as single-output channels, see figure 466. The binary I/O module also has two high speed output channels where a reed relay is connected in parallel to the standard output relay. For configuration of the input and output signals, refer to sections "Signal matrix for binary inputs SMBI" and "Signal matrix for binary outputs SMBO". The making capacity of the reed relays are limited.
1MRK505183-UEN C
Section 19 Hardware
IEC1MRK002801-AA11-UTAN-RAM V1 EN
Figure 466:
Binary in/out module (IOM), input contacts named XA corresponds to rear position X31, X41, and so on, and output contacts named XB to rear position X32, X42, and so on
The binary input/output module version with MOV protected contacts can for example be used in applications where breaking high inductive load would cause excessive wear of the contacts. The test voltage across open contact is lower for this version of the binary input/output module.
Section 19 Hardware
1MRK505183-UEN C
xx04000069.vsd
IEC04000069 V1 EN
Figure 467:
19.2.12.3
Technical data
Table 616:
Quantity Binary inputs DC voltage, RL
Table 617:
IOM - Binary input/output module contact data (reference standard: IEC 61810-2)
Trip and signal relays 10 250 V AC, DC 1000 V rms Fast signal relays (parallel reed relay) 2 250 V AC, DC 800 V DC
Function or quantity Binary outputs Max system voltage Test voltage across open contact, 1 min Current carrying capacity Continuous 1s Making capacity at inductive load with L/R>10 ms 0.2 s 1.0 s Breaking capacity for AC, cos > 0.4 Breaking capacity for DC with L/R < 40 ms
8A 10 A
8A 10 A
30 A 10 A 250 V/8.0 A 48 V/1 A 110 V/0.4 A 125 V/0.35 A 220 V/0.2 A 250 V/0.15 A -
0.4 A 0.4 A 250 V/8.0 A 48 V/1 A 110 V/0.4 A 125 V/0.35 A 220 V/0.2 A 250 V/0.15 A 10 nF
1MRK505183-UEN C
Section 19 Hardware
Table 618:
Function or quantity Binary outputs Max system voltage Test voltage across open contact, 1 min Current carrying capacity Continuous 1s Making capacity at inductive loadwith L/R>10 ms 0.2 s 1.0 s Breaking capacity for AC, cos j>0.4 Breaking capacity for DC with L/ R < 40 ms
8A 10 A
8A 10 A
0.4 A 0.4 A 250 V/8.0 A 48 V/1 A 110 V/0.4 A 220 V/0.2 A 250 V/0.15 A 10 nF
19.2.13
19.2.13.1
19.2.13.2
Design
The Milliampere Input Module has six independent analog channels with separated protection, filtering, reference, A/D-conversion and optical isolation for each input making them galvanically isolated from each other and from the rest of the module. For configuration of the input signals, refer to section "Signal matrix for mA inputs SMMI". The analog inputs measure DC current in the range of +/- 20 mA. The A/D converter has a digital filter with selectable filter frequency. All inputs are calibrated separately The filter parameters and the calibration factors are stored in a non-volatile memory on the module. The calibration circuitry monitors the module temperature and starts an automatical calibration procedure if the temperature drift is outside the allowed range. The module communicates, like the other I/O-modules on the serial CAN-bus.
Section 19 Hardware
1MRK505183-UEN C
Process connector
Optoisolation DC/DC
Optoisolation DC/DC
Optoisolation DC/DC
Memory
Microcontroller
99000504.vsd
IEC99000504 V1 EN
Figure 468:
19.2.13.3
Technical data
Table 619:
Quantity: Input resistance Input range Power consumption each mA-board each mA input
Backplane connector
CAN
1MRK505183-UEN C
19.2.14
19.2.14.1
19.2.14.2
Design
The SLM is a PMC card and it is factory mounted as a mezzanine card on the NUM module. Three variants of the SLM is available with different combinations of optical fiber connectors, see figure 469. The plastic fiber connectors are of snapin type and the glass fiber connectors are of ST type.
IEC05000760 V1 EN
Figure 469:
A B 1 2
Section 19 Hardware
1MRK505183-UEN C
IEC05000761 V1 EN
Figure 470:
1 2 3 4
Observe that when the SLM is mounted on the NUM module, then contact 4 above will be in the uppermost and contact 1 in the lowest position.
19.2.14.3
Technical data
Table 620:
Quantity Optical connector Fibre, optical budget Fibre diameter
1MRK505183-UEN C
Section 19 Hardware
Table 621:
Quantity Optical connector
19.2.15
19.2.15.1
19.2.15.2
Design
The RS485 is a PMC card and it is factory mounted as a mezzanine card on the NUM module. The internal structure of the RS485 can be seen in figure 471:
FPGA Wishbone interconnect switch 32 MHz PCI-con Internal bus PCI-bus PCIController PCI-con Local bus to wishbone Status Register ID-chip Control Register 6-pole-connector 2-pole connector Isolation UART Isolation RS485 tranceiver Rx Tx
Isolation
Termination
IEC06000516 V1 EN
Figure 471:
The arrangement for the pins in the RS485 connector (figure 472) are presented in table 622:
907 Technical reference manual
Section 19 Hardware
1MRK505183-UEN C
Table 622:
Pin 1 2 3 4 5 6
Angle bracket
Screw terminal X3
Screw terminal X1
1 2 1 2 3 4 5 6
RS485 PWB
Backplane
IEC06000517 V1 EN
Figure 472:
RS485 connector
2-wire: Connect pin 1 to pin 6 and pin 2 to pin 5 Termination (2-wire): Connect pin 1 to pin 3 Termination (4-wire): Connect pin 1 to pin 3 and pin 4 to pin 6
A second 2-pole screw connector is used for the connection of IO-ground. It can be used in two combinations like: Unconnected: No ground of the IO-part . Soft grounded: The IO is connected to the GND with an RC net parallel with a MOV
1MRK505183-UEN C
Section 19 Hardware
Technical data
Table 623:
Quantity Communication speed External connectors
19.2.15.3
19.2.16
19.2.16.1
19.2.16.2
Functionality
The Optical Ethernet module (OEM) is used when communication systems according to IEC6185081 have been implemented.
19.2.16.3
Design
The Optical Ethernet module (OEM) is a PMC card and mounted as a mezzanine card on the ADM. The OEM is a 100base Fx module and available as a single channel or double channel unit.
PCI - bus Connector EEPROM Ethernet Controller 100Base-FX Receiver PCI - PCI Bridge 100Base-FX Transmitter
en04000472.vsd
IEC04000472 V1 EN
Figure 473:
Section 19 Hardware
1MRK505183-UEN C
ID chip
LED
25MHz oscillator
Ethernet cont.
Transmitter
Receiver
Ethernet cont.
Transmitter
25MHz oscillator
en05000472.vsd
IEC05000472 V1 EN
Figure 474:
19.2.16.4
Technical data
Table 624:
Quantity Number of channels Standard Type of fiber Wave length Optical connector Communication speed
19.2.17
19.2.17.1
Each module has one optical port, one for each remote end to which the IED communicates.
910 Technical reference manual
PCI bus
LED
IO bus
Receiver
1MRK505183-UEN C
Section 19 Hardware
Alternative cards for Long range (1550 nm single mode), Medium range (1310 nm single mode) and Short range (850 nm multi mode) are available. Class 1 laser product. Take adequate measures to protect the eyes. Never look into the laser beam.
19.2.17.2
Design
The LDCM is a PCMIP type II single width format module. The LDCM can be mounted on: the ADM the NUM
ID
ST
IO-connector
ST
32,768 MHz
16.000 MHz
en07000087.vsd
IEC07000087 V1 EN
Figure 475:
The SR-LDCM layout. PCMIP type II single width format with two PCI connectors and one I/O ST type connector
Section 19 Hardware
1MRK505183-UEN C
X1
ADN 2841 2.5V ID
DS 3904
DS 3904
PCI9054 TQ176
MAX 3645
3 2
en06000393.vsd
IEC06000393 V1 EN
Figure 476:
The MR-LDCM and LR-LDCM layout. PCMIP type II single width format with two PCI connectors and one I/O FC/PC type connector
19.2.17.3
Technical data
Table 625:
Characteristic Type of LDCM Type of fibre
Wave length Optical budget Graded-index multimode 62.5/125 mm, Graded-index multimode 50/125 mm
Optical connector Protocol Data transmission Transmission rate / Data rate Clock source
Type ST C37.94 Synchronous 2 Mb/s / 64 kbit/s Internal or derived from received signal
Type FC/PC C37.94 implementation **) Synchronous 2 Mb/s / 64 kbit/s Internal or derived from received signal
Type FC/PC C37.94 implementation **) Synchronous 2 Mb/s / 64 kbit/s Internal or derived from received signal
*) depending on optical budget calculation **) C37.94 originally defined just for multimode; using same header, configuration and data format as C37.94
1MRK505183-UEN C
19.2.18
19.2.18.1
19.2.18.2
Design
The galvanic X.21 line data communication module uses a ABB specific PC*MIP Type II format.
en07000196.vsd
IEC07000196 V1 EN
Figure 477:
C
913
Section 19 Hardware
1MRK505183-UEN C
1
1
4
8
15
3
IEC07000239 V1 EN
en07000239.wmf
Figure 478:
1. 2. 3. 4.
Ground selection connector for IO, screw terminals, 2-pole Ground pin Soft ground pin, see figure 479 X.21 Micro D-sub 15 pole male connector according to the V11 (X:27) balanced version
I/O
100kW
100nF
Soft ground
en07000242.vsd
IEC07000242 V1 EN
Figure 479:
Grounding At special problems with ground loops, the soft ground connection for the IOground can be tested. Three different kinds of grounding principles can be set (used for fault tracing): 1. 2. 3. Direct ground - The normal grounding is direct ground, connect terminal 2 direct to the chassi. No ground - Leave the connector without any connection. Soft ground - Connect soft ground pin (3), see figure 478
1MRK505183-UEN C
Section 19 Hardware
X.21 connector
Table 626:
Pin number 1 2 3 4 6 8 9 10 11 13 5,7,12,14,15
19.2.18.3
Functionality
The data format is HDLC. The speed for the transmission of the messages used is 64 kbit/s. A maximum of 100 meter of cable is allowed to ensure the quality of the data (deviation from X.21 standard cable length). Synchronization The X.21 LDCM works like a DTE (Data Terminal Equipment) and is normally expecting synchronization from the DCE (Data Circuit Equipment). The transmission is normally synchronized to the Signal Element Timing signal when a device is a DTE. When the signal is high it will read the data at the receiver and when the signal is low it will write data to the transmitter. This behaviour can be inverted in the control register. Normally an external multiplexer is used and it should act like the master. When two X.21 LDCM is directly communicating with each other one must be set as a master generating the synchronization for the other (the slave). The DTE Signal Element Timing is created from the internal 64 kHz clock. The Byte Timing signal is not used in ABB devices.
Section 19 Hardware
19.2.18.4 Technical data
Table 627:
Quantity Connector, X.21 Connector, ground selection Standard Communication speed Insulation Maximum cable length
1MRK505183-UEN C
19.2.19
19.2.19.1
19.2.19.2
Design
The GPS time synchronization module is 6U high and occupies one slot. The slot closest to the NUM shall always be used. The GSM consists of CAN carrier module (CCM) GPS clock module (GCM) GPS receiver unit
The CCM is a carrier board for the GCM mezzanine PMC card and GPS unit, see figure 481. There is a cable between the external antenna input on the back of the GCM and the GPS-receiver. This is a galvanic connection vulnerable to electromagnetic interference. The connector is shielded and directly attached to a grounded plate to reduce the risk. The second cable is a flat cable that connects the GPS and the GCM. It is used for communication between the GCM and the GPSreceiver. All communication between the GCM and the NUM is via the CAN-bus. The CMPPS signal is sent from the GCM to the rest of the time system to provide 1s accuracy at sampling level.
1MRK505183-UEN C
Section 19 Hardware
CAN controller
CAN
en05000675.vsd
IEC05000675 V1 EN
Figure 480:
Section 19 Hardware
1MRK505183-UEN C
en07000086.vsd
IEC07000086 V1 EN
Figure 481:
1 GPS receiver
2 GPS Clock module (GCM) 3 CAN carrier module (CCM) 4 Antenna connector
19.2.19.3
Technical data
Table 628:
Function Receiver Time to reliable time reference with antenna in new position or after power loss longer than 1 month Time to reliable time reference after a power loss longer than 48 hours Time to reliable time reference after a power loss shorter than 48 hours
1MRK505183-UEN C
19.2.20
19.2.20.1
19.2.20.2
Design
The antenna with a console for mounting on a horizontal or vertical flat surface or on an antenna mast. See figure 482
1 6
2 3
xx04000155.vsd
IEC04000155 V1 EN
Figure 482:
where: 1 2 3 4 5 6 7
GPS antenna TNC connector Console, 78x150 mm Mounting holes 5.5 mm Tab for securing of antenna cable Vertical mounting position Horizontal mounting position
Always position the antenna and its console so that a continuous clear line-of-sight visibility to all directions is obtained, preferably more than 75%. A minimum of 50% clear line-of-sight visibility is required for un-interrupted operation.
919 Technical reference manual
Section 19 Hardware
1MRK505183-UEN C
99001046.vsd
IEC99001046 V1 EN
Figure 483:
Antenna line-of-sight
Antenna cable Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a male SMA connector in the receiver end to connect the antenna to GSM. Choose cable type and length so that the total attenuation is max. 26 dB at 1.6 GHz. Make sure that the antenna cable is not charged when connected to the antenna or to the receiver. Short-circuit the end of the antenna cable with some metal device, when first connected to the antenna. When the antenna is connected to the cable, connect the cable to the receiver. REx670 must be switched off when the antenna cable is connected.
19.2.20.3
Technical data
Table 629:
Function Max antenna cable attenuation Antenna cable impedance Lightning protection Antenna cable connector
1MRK505183-UEN C
19.2.21
19.2.21.1
19.2.21.2
Design
The IRIG-B module have two inputs. One input is for the IRIG-B that can handle both a pulse-width modulated signal (also called unmodulated) and an amplitude modulated signal (also called sine wave modulated). The other is an optical input type ST for PPS to synchronize the time between several protections.
32 MHz FPGA OPTO_INPUT PCI-bus PCI-Controller
Registers
PCI-con
4 mm barrier
ZXING
IO-con
en06000303.vsd
IEC06000303 V1 EN
Figure 484:
BNCconnector
IRIGDecoder
IRIG_INPUT
STconnector
PCI-con
921
Section 19 Hardware
1MRK505183-UEN C
A1
C C
Y2
3 2
en06000304.vsd
IEC06000304 V1 EN
Figure 485:
IRIG-B PC-MIP board with top left ST connector for PPS 820 nm multimode fibre optic signal input and lower left BNC connector for IRIG-B signal input
19.2.21.3
Technical data
Table 630:
Quantity Number of channels IRIG-B Number of channels PPS Electrical connector IRIG-B Optical connector PPS and IRIG-B Type of fibre
IRIG-B
Rated value 1 1 BNC Type ST 62.5/125 m multimode fibre
C
O O
ST
DC//DC
A1
1MRK505183-UEN C
Section 19 Hardware
19.3
19.3.1
Dimensions
Case without rear cover
A D
B
IEC08000164 V1 EN
C
xx08000164.vsd
Figure 486:
Section 19 Hardware
1MRK505183-UEN C
K F
G H
J
xx08000166.vsd
IEC08000166 V1 EN
Figure 487:
Case size (mm) A 6U, 1/2 x 19 6U, 3/4 x 19 6U, 1/1 x 19 265.9 265.9 265.9 B 223.7 336.0 448.3 C 201.1 201.1 201.1 D 252.9 252.9 252.9
1MRK505183-UEN C
19.3.2
C
xx08000163.vsd
IEC08000163 V1 EN
Figure 488:
Section 19 Hardware
1MRK505183-UEN C
K F
G H
J
xx08000165.vsd
IEC08000165 V1 EN
Figure 489:
xx05000503.vsd
IEC05000503 V1 EN
Figure 490:
Case size (mm) A 6U, 1/2 x 19 6U, 3/4 x 19 6U, 1/1 x 19 265.9 265.9 265.9 B 223.7 336.0 448.3 C 242.1 242.1 242.1 D 255.8 255.8 255.8
1MRK505183-UEN C
19.3.3
A B
E D
xx08000162.vsd
IEC08000162 V1 EN
Figure 491:
Flush mounting
Cut-out dimensions (mm) A +/-1 210.1 322.4 434.7 B +/-1 254.3 254.3 254.3 C 4.0-10.0 4.0-10.0 4.0-10.0 D 12.5 12.5 12.5
Case size Tolerance 6U, 1/2 x 19" 6U, 3/4 x 19" 6U, 1/1 x 19"
E = 188.6 mm without rear protection cover, 229.6 mm with rear protection cover
1MRK505183-UEN C
xx06000182.vsd
IEC06000182 V1 EN
Figure 492:
A
G
C
xx05000505.vsd
IEC05000505 V1 EN
Figure 493:
1MRK505183-UEN C
19.3.5
A B E
en04000471.vsd
IEC04000471 V1 EN
Figure 494:
Wall mounting
19.3.6
Section 19 Hardware
1MRK505183-UEN C
[6.97]
[4.02]
[1.48]
[0.33]
[18.31] [18.98]
[0.79]
[7.68]
Dimension mm [inches]
IEC06000232 V1 EN
xx06000232.eps
Figure 495:
[1.50]
[10.47]
[7.50]
[0.33]
[18.31] [18.98]
[0.79]
[7.68]
[inches]
IEC06000234 V1 EN
en06000234.eps
Figure 496:
19.4
19.4.1
19.4.1.1
Mounting alternatives
Flush mounting
Overview
The flush mounting kit are utilized for case sizes: 1/2 x 19 3/4 x 19 1/1 x 19 1/4 x 19 (RHGS6 6U)
1MRK505183-UEN C
Section 19 Hardware
Only a single case can be mounted in each cut-out on the cubicle panel, for class IP54 protection. Flush mounting cannot be used for side-by-side mounted IEDs when IP54 class must be fulfilled. Only IP20 class can be obtained when mounting two cases side-by-side in one (1) cut-out.
To obtain IP54 class protection, an additional factory mounted sealing must be ordered when ordering the IED.
Section 19 Hardware
19.4.1.2 Mounting procedure for flush mounting
1MRK505183-UEN C
5 2
6 3
xx08000161.vsd
IEC08000161 V1 EN
Figure 497:
PosNo Description 1 2 3 4 5 6 Sealing strip, used to obtain IP54 class. The sealing strip is factory mounted between the case and front plate. Fastener Groove Screw, self tapping Joining point of sealing strip Panel
1MRK505183-UEN C
19.4.2
19.4.2.1
When mounting the mounting angles, be sure to use screws that follows the recommended dimensions. Using screws with other dimensions than the original may damage the PCBs inside the IED.
Section 19 Hardware
19.4.2.2 Mounting procedure for 19 panel rack mounting
2 1a
1MRK505183-UEN C
1b
xx08000160.vsd
IEC08000160 V1 EN
Figure 498:
Pos 1a, 1b 2
Description Mounting angels, which can be mounted, either to the left or right side of the case. Screw
19.4.3
19.4.3.1
Wall mounting
Overview
All case sizes, 1/2 x 19, 3/4 x 19 and 1/1 x 19, can be wall mounted. It is also possible to mount the IED on a panel or in a cubicle.
1MRK505183-UEN C
Section 19 Hardware
When mounting the side plates, be sure to use screws that follows the recommended dimensions. Using screws with other dimensions than the original may damage the PCBs inside the IED.
If fiber cables are bent too much, the signal can be weakened. Wall mounting is therefore not recommended for communication modules with fiber connection; Serial SPA/IEC 60870-5-103 and LON communication module (SLM), Optical Ethernet module (OEM) and Line data communication module (LDCM).
19.4.3.2
5 6
DOCUMENT127716-IMG2265 V1 EN
xx04000453.vs d
Figure 499:
PosNo 1 2 3
Section 19 Hardware
1MRK505183-UEN C
4 5 6
2 6 2
M5x8 -
19.4.3.3
80 mm
en06000135.vsd
IEC06000135 V1 EN
Figure 500:
PosNo 1 2 3
19.4.4
19.4.4.1
1MRK505183-UEN C
Section 19 Hardware
When mounting the plates and the angles on the IED, be sure to use screws that follows the recommended dimensions. Using screws with other dimensions than the original may damage the PCBs inside the IED.
19.4.4.2
xx04000456.vsd
IEC04000456 V1 EN
Figure 501:
PosNo 1 2, 3 4
19.4.4.3
Section 19 Hardware
1MRK505183-UEN C
xx06000180.vsd
IEC06000180 V1 EN
Figure 502:
IED in the 670 series (1/2 x 19) mounted with a RHGS6 case containing a test switch module equipped with only a test switch and a RX2 terminal base
19.4.5
19.4.5.1
When mounting the plates and the angles on the IED, be sure to use screws that follows the recommended dimensions. Using screws with other dimensions than the original may damage the PCBs inside the IED.
1MRK505183-UEN C
Section 19 Hardware
Please contact factory for special add on plates for mounting FT switches on the side (for 1/2 19" case) or bottom of the relay.
19.4.5.2
3 4
xx06000181.vsd
IEC06000181 V1 EN
Figure 503:
PosNo 1 2, 3 4
19.5
19.5.1
Technical data
Enclosure
Table 631:
Material Front plate Surface treatment Finish
Case
Steel sheet Steel sheet profile with cut-out for HMI Aluzink preplated steel Light grey (RAL 7035)
Section 19 Hardware
1MRK505183-UEN C
Table 632:
Front
Table 633:
Case size 6U, 1/2 x 19 6U, 3/4 x 19 6U, 1/1 x 19
Weight
Weight 10 kg 15 kg 18 kg
19.5.2
Connection system
Table 634:
Connector type Screw compression type Terminal blocks suitable for ring lug terminals
Table 635:
Connector type
Screw compression type Terminal blocks suitable for ring lug terminals
Because of limitations of space, when ring lug terminal is ordered for Binary I/O connections, one blank slot is necessary between two adjacent IO cards. Please refer to the ordering particulars for details.
19.5.3
Influencing factors
Table 636:
Parameter Ambient temperature, operate value Relative humidity Operative range Storage temperature
1MRK505183-UEN C
Section 19 Hardware
Table 637:
Dependence on
Ripple, in DC auxiliary voltage Operative range Auxiliary voltage dependence, operate value Interrupted auxiliary DC voltage Interruption interval 050 ms 0 s
Restart time
Table 638:
Dependence on
Frequency dependence, operate value Harmonic frequency dependence (20% content) Harmonic frequency dependence for distance protection (10% content) Harmonic frequency dependence for high impedance differential protection (10% content)
6.0%
5.0%
19.5.4
Electromagnetic compatibility
Type test values 2.5 kV 2-4 kV 2.5 kV, oscillatory 4.0 kV, fast transient 15 kV air discharge 8 kV contact discharge 8 kV contact discharge 15 kV air discharge 8 kV contact discharge 8 kV contact discharge 4 kV Reference standards IEC 60255-22-1, Class III IEC 61000-4-12, Class III IEEE/ANSI C37.90.1 IEC 60255-22-2, Class IV IEC 61000-4-2, Class IV IEEE/ANSI C37.90.1
Section 19 Hardware
Test Surge immunity test Power frequency immunity test Conducted common mode immunity test Power frequency magnetic field test Damped oscillatory magnetic field test Radiated electromagnetic field disturbance Radiated electromagnetic field disturbance Radiated electromagnetic field disturbance Conducted electromagnetic field disturbance Radiated emission Conducted emission Type test values 1-2 kV, 1.2/50 ms high energy 150-300 V, 50 Hz 15 Hz-150 kHz 1000 A/m, 3 s 100 A/m 20 V/m, 80-1000 MHz 20 V/m, 80-2500 MHz 35 V/m 26-1000 MHz 10 V, 0.15-80 MHz 30-1000 MHz 0.15-30 MHz
1MRK505183-UEN C
Reference standards IEC 60255-22-5 IEC 60255-22-7, Class A IEC 61000-4-16, Class IV IEC 61000-4-8, Class V IEC 61000-4-10, Class V IEC 60255-22-3 EN 61000-4-3 IEEE/ANSI C37.90.2 IEC 60255-22-6 IEC 60255-25 IEC 60255-25
Table 640:
Test Dielectric test
Insulation
Type test values 2.0 kV AC, 1 min. 5 kV, 1.2/50 ms, 0.5 J >100 MW at 500 VDC Reference standard IEC 60255-5
Table 641:
Test Cold test Storage test Dry heat test
Environmental tests
Type test value Test Ad for 16 h at -25C Test Ad for 16 h at -40C Test Bd for 16 h at +70C Test Ca for 4 days at +40 C and humidity 93% Test Db for 6 cycles at +25 to +55 C and humidity 93 to 95% (1 cycle = 24 hours) Reference standard IEC 60068-2-1 IEC 60068-2-1 IEC 60068-2-2 IEC 60068-2-78 IEC 60068-2-30
Table 642:
Test Immunity Emissivity
CE compliance
According to EN 50263 EN 50263 EN 50178
1MRK505183-UEN C
Section 19 Hardware
Table 643:
Test
Mechanical tests
Type test values Class II Class I Class II Class I Class I Class II Reference standards IEC 60255-21-1 IEC 60255-21-1 IEC 60255-21-2 IEC 60255-21-2 IEC 60255-21-2 IEC 60255-21-3
Vibration response test Vibration endurance test Shock response test Shock withstand test Bump test Seismic test
944
1MRK505183-UEN C
Section 20 Labels
Section 20
Labels
20.1
Different labels
1 2 3 4 5 6 6 7
xx06000574.eps
IEC06000574 V1 EN
Section 20 Labels
1MRK505183-UEN C
1 2 3 4 5 6
Product type, description and serial number Order number, dc supply voltage and rated frequency Optional, customer specific information Manufacturer Transformer input module, rated currents and voltages Transformer designations
IEC06000577-CUSTOMER-SPECIFIC V1 EN
7
IEC06000576-POS-NO V1 EN
1MRK505183-UEN C
Section 20 Labels
1 2 3
4
en06000573.eps
IEC06000573 V1 EN
1 2 3
IEC06000575 V1 EN
Warning label
948
1MRK505183-UEN C
Section 21
Connection diagrams
This chapter includes diagrams of the IED with all slot, terminal block and optical connector designations. It is a necessary guide when making electrical and optical connections to the IED.
1MRK505183-UEN C
IEC08000470 V1 EN
1MRK505183-UEN C
IEC08000471 V1 EN
1MRK505183-UEN C
IEC08000472 V1 EN
1MRK505183-UEN C
IEC08000473 V1 EN
1MRK505183-UEN C
IEC08000474 V1 EN
1MRK505183-UEN C
IEC08000475 V1 EN
1MRK505183-UEN C
IEC08000476 V1 EN
1MRK505183-UEN C
IEC08000477 V1 EN
1MRK505183-UEN C
IEC08000478 V1 EN
1MRK505183-UEN C
IEC08000479 V1 EN
1MRK505183-UEN C
IEC08000480 V1 EN
1MRK505183-UEN C
IEC08000481 V1 EN
1MRK505183-UEN C
IEC08000482 V1 EN
1MRK505183-UEN C
IEC08000483 V1 EN
1MRK505183-UEN C
IEC08000484 V1 EN
1MRK505183-UEN C
Section 22
22.1
Application
In order to assure time selectivity between different overcurrent protections at different points in the network different time delays for the different protections are normally used. The simplest way to do this is to use definite time-lag. In more sophisticated applications current dependent time characteristics are used. Both alternatives are shown in a simple application with three overcurrent protections operating in series.
I>
IEC05000129 V1 EN
I>
I>
xx05000129.vsd
Figure 504:
Stage 1
Stage 1
Stage 1
en05000130.vsd
IEC05000130 V1 EN
Figure 505:
1MRK505183-UEN C
Time
Figure 506:
The inverse time characteristic makes it possible to minimize the fault clearance time and still assure the selectivity between protections. To assure selectivity between protections there must be a time margin between the operation time of the protections. This required time margin is dependent of following factors, in a simple case with two protections in series: Difference between pickup time of the protections to be co-ordinated Opening time of the breaker closest to the studied fault Reset times of the protections Margin dependent of the time delay inaccuracy of the protections
1MRK505183-UEN C
A1
B1
Feeder
I>
I>
Time axis
t=0
t=t1
t=t2
t=t3
en05000132.vsd
IEC05000132 V1 EN
Figure 507:
where: t=0 t=t1 t=t2 t=t3
In the case protection B1 shall operate without any intentional delay (instantaneous). When the fault occurs the protections start to detect the fault current. After the time t1 the protection B1 send a trip signal to the circuit breaker. The protection A1 starts its delay timer at the same time, with some deviation in time due to differences between the two protections. There is a possibility that A1 will start before the trip is sent to the B1 circuit breaker. At the time t2 the circuit breaker B1 has opened its primary contacts and thus the fault current is interrupted. The breaker time (t2 - t1) can differ between different faults. The maximum opening time can be given from manuals and test protocols. Still at t2 the timer of protection A1 is active. At time t3 the protection A1 is reset, that is the timer is stopped. In most applications it is required that the times shall reset as fast as possible when the current fed to the protection drops below the set current level, the reset time shall be minimized. In some applications it is however beneficial to have some type of delayed reset time of the overcurrent function. This can be the case in the following applications:
1MRK505183-UEN C
If there is a risk of intermittent faults. If the current IED, close to the faults, starts and resets there is a risk of unselective trip from other protections in the system. Delayed resetting could give accelerated fault clearance in case of automatic reclosing to a permanent fault. Overcurrent protection functions are sometimes used as release criterion for other protection functions. It can often be valuable to have a reset delay to assure the release function.
22.2
22.2.1
Principle of operation
Mode of operation
The function can operate in a definite time-lag mode or in a current definite inverse time mode. For the inverse time characteristic both ANSI and IEC based standard curves are available. Also programmable curve types are supported via the component inputs: p, A, B, C pr, tr, and cr. Different characteristics for reset delay can also be chosen. If current in any phase exceeds the set start current value (here internal signal startValue), a timer, according to the selected operating mode, is started. The component always uses the maximum of the three phase current values as the current level used in timing calculations. In case of definite time-lag mode the timer will run constantly until the time is reached or until the current drops below the reset value (start value minus the hysteresis) and the reset time has elapsed. For definite time delay curve ANSI/IEEE Definite time or IEC Definite time are chosen. The general expression for inverse time curves is according to equation 161.
A t[ s ] = + Bk i p -C in >
EQUATION1189 V1 EN
(Equation 161)
where: p, A, B, C in> k i 968 Technical reference manual are constants defined for each curve type, is the set start current for step n, is set time multiplier for step n and is the measured current.
1MRK505183-UEN C
For inverse time characteristics a time will be initiated when the current reaches the set start level. From the general expression of the characteristic the following can be seen:
i p (top - B k ) - C = Ak in >
EQUATION1190 V1 EN
(Equation 162)
The time elapsed to the moment of trip is reached when the integral fulfils according to equation 163, in addition to the constant time delay:
i p in > - C dt A k 0
t
EQUATION1191 V1 EN
(Equation 163)
For the numerical protection the sum below must fulfil the equation for trip.
Dt
EQUATION1192 V1 EN
i( j ) p - C A k j =1 in >
n
(Equation 164)
where: j=1 is the first protection execution cycle when a fault has been detected, that is, when
i in >
Dt n i (j)
>1
EQUATION1193 V1 EN
is the time interval between two consecutive executions of the protection algorithm, is the number of the execution of the algorithm when the trip time equation is fulfilled, that is, when a trip is given and is the fault current at time j
For inverse time operation, the inverse time characteristic is selectable. Both the IEC and ANSI/IEEE standardized inverse time characteristics are supported. For the IEC curves there is also a setting of the minimum time-lag of operation, see figure 508.
1MRK505183-UEN C
Operate time
tMin
IMin
IEC05000133 V2 EN
Current
IEC05000133-3-en.vsd
Figure 508:
In order to fully comply with IEC curves definition setting parameter tMin shall be set to the value which is equal to the operating time of the selected IEC inverse time curve for measured current of twenty times the set current pickup value. Note that the operating time value is dependent on the selected setting value for time multiplier k. In addition to the ANSI and IEC standardized characteristics, there are also two additional inverse curves available; the RI curve and the RD curve. The RI inverse time curve emulates the characteristic of the electromechanical ASEA relay RI. The curve is described by equation 166:
(Equation 166)
where: in> k i is the set start current for step n is set time multiplier for step n is the measured current
1MRK505183-UEN C
The RD inverse curve gives a logarithmic delay, as used in the Combiflex protection RXIDG. The curve enables a high degree of selectivity required for sensitive residual earth-fault current protection, with ability to detect high-resistive earth faults. The curve is described by equation 167:
t[ s ] = 5.8 - 1.35 ln
EQUATION1195 V1 EN
i k in >
(Equation 167)
where: in> k i is the set start current for step n, is set time multiplier for step n and is the measured current
If the curve type programmable is chosen, the user can make a tailor made inverse time curve according to the general equation 168.
A t[ s ] = + Bk i p -C in >
EQUATION1196 V1 EN
(Equation 168)
Also the reset time of the delayed function can be controlled. There is the possibility to choose between three different reset time-lags. Instantaneous Reset IEC Reset ANSI Reset.
If instantaneous reset is chosen the timer will be reset directly when the current drops below the set start current level minus the hysteresis. If IEC reset is chosen the timer will be reset after a set constant time when the current drops below the set start current level minus the hysteresis. If ANSI reset time is chosen the reset time will be dependent of the current after fault clearance (when the current drops below the start current level minus the hysteresis). The timer will reset according to equation 169.
1MRK505183-UEN C
tr k t [s] = 2 i -1 in >
EQUATION1197 V2 EN
(Equation 169)
where: The set value tr is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the choice of time delay characteristic. For the definite time delay characteristics the possible reset time settings are instantaneous and IEC constant time reset. For ANSI inverse time delay characteristics all three types of reset time characteristics are available; instantaneous, IEC constant time reset and ANSI current dependent reset time. For IEC inverse time delay characteristics the possible delay time settings are instantaneous and IEC set constant time reset). For the programmable inverse time delay characteristics all three types of reset time characteristics are available; instantaneous, IEC constant time reset and ANSI current dependent reset time. If the current dependent type is used settings pr, tr and cr must be given, see equation 170:
tr k t [s] = pr i - cr in >
EQUATION1198 V2 EN
(Equation 170)
For RI and RD inverse time delay characteristics the possible delay time settings are instantaneous and IEC constant time reset.
1MRK505183-UEN C
22.3
Inverse characteristics
Table 644:
Function Operating characteristic:
t =
A P ( I - 1)
+ B k
EQUATION1249-SMALL V1 EN
Reset characteristic:
t = tr
2
(I
-1
EQUATION1250-SMALL V1 EN
I = Imeasured/Iset ANSI Extremely Inverse ANSI Very inverse ANSI Normal Inverse ANSI Moderately Inverse ANSI Long Time Extremely Inverse ANSI Long Time Very Inverse ANSI Long Time Inverse A=28.2, B=0.1217, P=2.0 , tr=29.1 A=19.61, B=0.491, P=2.0 , tr=21.6 A=0.0086, B=0.0185, P=0.02, tr=0.46 A=0.0515, B=0.1140, P=0.02, tr=4.85 A=64.07, B=0.250, P=2.0, tr=30 A=28.55, B=0.712, P=2.0, tr=13.46 k=(0.05-999) in steps of 0.01 A=0.086, B=0.185, P=0.02, tr=4.6 ANSI/IEEE C37.112, class 5 + 30 ms
1MRK505183-UEN C
Table 645:
Function
Operating characteristic:
t =
A P k ( I - 1)
EQUATION1251-SMALL V1 EN
I = Imeasured/Iset Time delay to reset, IEC inverse time IEC Normal Inverse IEC Very inverse IEC Inverse IEC Extremely inverse IEC Short time inverse IEC Long time inverse Programmable characteristic Operate characteristic: (0.000-60.000) s A=0.14, P=0.02 A=13.5, P=1.0 A=0.14, P=0.02 A=80.0, P=2.0 A=0.05, P=0.04 A=120, P=1.0 k = (0.05-999) in steps of 0.01 A=(0.005-200.000) in steps of 0.001 B=(0.00-20.00) in steps of 0.01 C=(0.1-10.0) in steps of 0.1 P=(0.005-3.000) in steps of 0.001 TR=(0.005-100.000) in steps of 0.001 CR=(0.1-10.0) in steps of 0.1 PR=(0.005-3.000) in steps of 0.001 IEC 60255, class 5 + 40 ms 0.5% of set time 10 ms IEC 60255-3, class 5 + 40 ms
t =
A P (I - C )
+ B k
EQUATION1370-SMALL V1 EN
Reset characteristic:
t = TR
PR
(I
- CR
EQUATION1253-SMALL V1 EN
I = Imeasured/Iset
Table 646:
Function
0.339 -
0.236 I
EQUATION1137-SMALL V1 EN
I k
I = Imeasured/Iset
1MRK505183-UEN C
Table 647:
Function Type A curve:
t =
U -U > U>
EQUATION1436-SMALL V1 EN
k 480
- 0.035
EQUATION1437-SMALL V1 EN
Type C curve:
t =
k 480
- 0.035
EQUATION1438-SMALL V1 EN
Programmable curve:
t = kA +D
B U - U > U >
-C
EQUATION1439-SMALL V1 EN
k = (0.05-1.10) in steps of 0.01 unless otherwise stated A = (0.005-200.000) in steps of 0.001 B = (0.50-100.00) in steps of 0.01 C = (0.0-1.0) in steps of 0.1 D = (0.000-60.000) in steps of 0.001 P = (0.000-3.000) in steps of 0.001
1MRK505183-UEN C
Table 648:
Function Type A curve:
t =
U < -U
U<
EQUATION1431-SMALL V1 EN
U< = Uset U = UVmeasured Type B curve: k = (0.05-1.10) in steps of 0.01 unless otherwise stated
t =
k 480
2.0
+ 0.055
EQUATION1432-SMALL V1 EN
U< = Uset U = Umeasured Programmable curve: k = (0.05-1.10) in steps of 0.01 unless otherwise stated A = (0.005-200.000) in steps of 0.001 B = (0.50-100.00) in steps of 0.01 C = (0.0-1.0) in steps of 0.1 D = (0.000-60.000) in steps of 0.001 P = (0.000-3.000) in steps of 0.001
kA +D t = P U < -U -C B U <
EQUATION1433-SMALL V1 EN
1MRK505183-UEN C
Table 649:
Function Type A curve:
t =
U -U > U>
EQUATION1436-SMALL V1 EN
- 0.035
EQUATION1437-SMALL V1 EN
Type C curve:
t =
- 0.035
EQUATION1438-SMALL V1 EN
Programmable curve:
t =
kA
B U - U > U >
-C
+D
EQUATION1439-SMALL V1 EN
k = (0.05-1.10) in steps of 0.01 A = (0.005-200.000) in steps of 0.001 B = (0.50-100.00) in steps of 0.01 C = (0.0-1.0) in steps of 0.1 D = (0.000-60.000) in steps of 0.001 P = (0.000-3.000) in steps of 0.001
1MRK505183-UEN C
A070750 V2 EN
Figure 509:
1MRK505183-UEN C
A070751 V2 EN
Figure 510:
1MRK505183-UEN C
A070752 V2 EN
Figure 511:
1MRK505183-UEN C
A070753 V2 EN
Figure 512:
1MRK505183-UEN C
A070817 V2 EN
Figure 513:
1MRK505183-UEN C
A070818 V2 EN
Figure 514:
1MRK505183-UEN C
A070819 V2 EN
Figure 515:
1MRK505183-UEN C
A070820 V2 EN
Figure 516:
1MRK505183-UEN C
A070821 V2 EN
Figure 517:
1MRK505183-UEN C
A070822 V2 EN
Figure 518:
1MRK505183-UEN C
A070823 V2 EN
Figure 519:
1MRK505183-UEN C
A070824 V2 EN
Figure 520:
1MRK505183-UEN C
A070825 V2 EN
Figure 521:
1MRK505183-UEN C
A070826 V2 EN
Figure 522:
1MRK505183-UEN C
A070827 V2 EN
Figure 523:
1MRK505183-UEN C
GUID-ACF4044C-052E-4CBD-8247-C6ABE3796FA6 V1 EN
Figure 524:
1MRK505183-UEN C
GUID-F5E0E1C2-48C8-4DC7-A84B-174544C09142 V1 EN
Figure 525:
1MRK505183-UEN C
GUID-A9898DB7-90A3-47F2-AEF9-45FF148CB679 V1 EN
Figure 526:
1MRK505183-UEN C
GUID-35F40C3B-B483-40E6-9767-69C1536E3CBC V1 EN
Figure 527:
1MRK505183-UEN C
GUID-B55D0F5F-9265-4D9A-A7C0-E274AA3A6BB1 V1 EN
Figure 528:
998
1MRK505183-UEN C
Section 23 Glossary
Section 23
Glossary
Section 23 Glossary
1MRK505183-UEN C
CCITT
Consultative Committee for International Telegraph and Telephony. A United Nations sponsored standards body within the International Telecommunications Union. CAN carrier module Capacitive Coupled Voltage Transformer Protection Current Transformer class as per IEEE/ ANSI Combined mega pulses per second Close-open cycle Way of transmitting G.703 over a balanced line. Involves two twisted pairs making it possible to transmit information in both directions Standard format according to IEC 60255-24
COMTRADE
Contra-directional Way of transmitting G.703 over a balanced line. Involves four twisted pairs of with two are used for transmitting data in both directions, and two pairs for transmitting clock signals CPU CR CRC CS CT CVT DAR DARPA DBDL DBLL DC DFT DIP-switch DLLB DNP DR DRAM DRH DSP DTT
1000 Technical reference manual
Central processor unit Carrier receive Cyclic redundancy check Carrier send Current transformer Capacitive voltage transformer Delayed auto-reclosing Defense Advanced Research Projects Agency (The US developer of the TCP/IP protocol etc.) Dead bus dead line Dead bus live line Direct current Discrete Fourier transform Small switch mounted on a printed circuit board Dead line live bus Distributed Network Protocol as per IEEE/ANSI Std. 1379-2000 Disturbance recorder Dynamic random access memory Disturbance report handler Digital signal processor Direct transfer trip scheme
1MRK505183-UEN C
Section 23 Glossary
EHV network EIA EMC EMF EMI EnFP ESD FOX 20 FOX 512/515 FOX 6Plus G.703
Extra high voltage network Electronic Industries Association Electro magnetic compatibility Electro motive force Electro magnetic interference End fault protection Electrostatic discharge Modular 20 channel telecommunication system for speech, data and protection signals Access multiplexer Compact, time-division multiplexer for the transmission of up to seven duplex channels of digital data over optical fibers Electrical and functional description for digital lines used by local telephone companies. Can be transported over balanced and unbalanced lines Communication interface module with carrier of GPS receiver module Graphical display editor within PCM600 General interrogation command Gas insulated switchgear Generic object oriented substation event Global positioning system GPS time synchronization module High level data link control, protocol based on the HDLC standard Plastic fiber connector Human machine interface High speed auto reclosing High voltage High voltage direct current Integrating dead band supervision International Electrical Committee IEC Standard, Instrument transformers Part 6: Requirements for protective current transformers for transient performance
GCM GDE GI GIS GOOSE GPS GSM HDLC protocol HFBR connector type HMI HSAR HV HVDC IDBS IEC IEC 60044-6
Section 23 Glossary
1MRK505183-UEN C
Communication standard for protective equipment. A serial master/slave protocol for point-to-point communication Substation Automation communication standard Institute of Electrical and Electronics Engineers A network technology standard that provides 100 Mbits/s on twisted-pair or optical fiber cable PCI Mezzanine card (PMC) standard for local bus modules. References the CMC (IEEE P1386, also known as Common mezzanine card) standard for the mechanics and the PCI specifications from the PCI SIG (Special Interest Group) for the electrical EMF Electro Motive Force. Intelligent electronic device Intelligent gas insulated switchgear Binary input/output module When several occurrences of the same function are available in the IED they are referred to as instances of that function. One instance of a function is identical to another of the same kind but will have a different number in the IED user interfaces. The word instance is sometimes defined as an item of information that is representative of a type. In the same way an instance of a function in the IED is representative of a type of function. 1. Internet protocol. The network layer for the TCP/IP protocol suite widely used on Ethernet networks. IP is a connectionless, best-effort packet switching protocol. It provides packet routing, fragmentation and re-assembly through the data link layer. 2. Ingression protection according to IEC standard Ingression protection, according to IEC standard, level 20 Ingression protection, according to IEC standard, level 40 Ingression protection, according to IEC standard, level 54 Internal fail signal InterRange Instrumentation Group Time code format B, standard 200 International Telecommunications Union Local area network High voltage software module Liquid crystal display Line differential communication module Local detection device
IP
1MRK505183-UEN C
Section 23 Glossary
LED LNT LON MCB MCM MIM MPM MVB NCC NUM OCO cycle OCP OEM OLTC OV Overreach
Light emitting diode LON network tool Local operating network Miniature circuit breaker Mezzanine carrier module Milli-ampere module Main processing module Multifunction vehicle bus. Standardized serial bus originally developed for use in trains. National Control Centre Numerical module Open-close-open cycle Overcurrent protection Optical ethernet module On load tap changer Over voltage A term used to describe how the relay behaves during a fault condition. For example a distance relay is over-reaching when the impedance presented to it is smaller than the apparent impedance to the fault applied to the balance point, i.e. the set reach. The relay sees the fault but perhaps it should not have seen it. Peripheral component interconnect, a local data bus Pulse code modulation Protection and control IED manager Mezzanine card standard Process interface for sensors & actuators PCI Mezzanine card Permissive overreach transfer trip Bus or LAN used at the process level, that is, in near proximity to the measured and/or controlled components Power supply module Parameter setting tool within PCM600 Potential transformer or voltage transformer ratio Permissive underreach transfer trip Synchrocheck relay, COMBIFLEX
1003
PCI PCM PCM600 PC-MIP PISA PMC POTT Process bus PSM PST PT ratio PUTT RASC
Section 23 Glossary
1MRK505183-UEN C
RCA REVAL RFPP RFPE RISC RMS value RS422 RS485 RTC RTU SA SC SCS SCT SLM SMA connector SMT SMS SNTP
Relay characteristic angle Evaluation software Resistance for phase-to-phase faults Resistance for phase-to-earth faults Reduced instruction set computer Root mean square value A balanced serial interface for the transmission of digital data in point-to-point connections Serial link according to EIA standard RS485 Real time clock Remote terminal unit Substation Automation Switch or push-button to close Station control system System configuration tool according to standard IEC 61850 Serial communication module. Used for SPA/LON/IEC communication. Subminiature version A, A threaded connector with constant impedance. Signal matrix tool within PCM600 Station monitoring system Simple network time protocol is used to synchronize computer clocks on local area networks. This reduces the requirement to have accurate hardware clocks in every embedded system in a network. Each embedded node can instead synchronize with a remote clock, providing the required accuracy. Strmberg protection acquisition, a serial master/slave protocol for point-to-point communication Switch for CB ready condition Switch or push-button to trip Neutral point of transformer or generator Static VAr compensation Trip coil Trip circuit supervision Transmission control protocol. The most common transport layer protocol used on Ethernet and the Internet.
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Section 23 Glossary
TCP/IP
Transmission control protocol over Internet Protocol. The de facto standard Ethernet protocols incorporated into 4.2BSD Unix. TCP/IP was developed by DARPA for internet working and encompasses both network layer and transport layer protocols. While TCP and IP specify two protocols at specific protocol layers, TCP/IP is often used to refer to the entire US Department of Defense protocol suite based upon these, including Telnet, FTP, UDP and RDP. Time delayed earth-fault protection function Threaded Neill Concelman, A threaded constant impedance version of a BNC connector Current transformer class according to IEC A term used to describe how the relay behaves during a fault condition. For example a distance relay is under-reaching when the impedance presented to it is greater than the apparent impedance to the fault applied to the balance point, i.e. the set reach. The relay does not see the fault but perhaps it should have seen it. See also Overreach. Process interface components that deliver measured voltage and current values Coordinated universal time. A coordinated time scale, maintained by the Bureau International des Poids et Mesures (BIPM), which forms the basis of a coordinated dissemination of standard frequencies and time signals. UTC is derived from International Atomic Time (TAI) by the addition of a whole number of "leap seconds" to synchronize it with Universal Time 1 (UT1), thus allowing for the eccentricity of the Earth"s orbit, the rotational axis tilt (23.5 degrees), but still showing the Earth"s irregular rotation, on which UT1 is based. The Coordinated Universal Time is expressed using a 24-hour clock and uses the Gregorian calendar. It is used for aeroplane and ship navigation, where it also sometimes known by the military name, "Zulu time". "Zulu" in the phonetic alphabet stands for "Z" which stands for longitude zero. Undervoltage Weak end infeed logic Voltage transformer A digital signalling interface primarily used for telecom equipment Three times zero-sequence current. Often referred to as the residual or the earth-fault current
U/I-PISA UTC
Section 23 Glossary
1MRK505183-UEN C
3UO
Three times the zero sequence voltage. Often referred to as the residual voltage or the neutral point voltage
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