8051 Microcontroller –

Architecture, Intro to Assembly

Programming

EE4380 Fall 2002

Class 2

Pari vallal Kannan

Center for Integrated Circuits and Systems
University of Texas at Dallas
Class –2: Objective
l 8051 internal architecture
l Register Set
l Instruction Set
l Memory Map
l Intro to Stack, SFRs
l Assembly language programming

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8051 Architecture
l Programmer’s View
– Register Set
– Instruction Set
– Memory map
l Hardware Designer’s View
– Pinout
– Timing characteristics
– Current / Voltage requirements

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Programmer’s View – Register Set
l Registers
– A, B, R0 to R7 : 8 bit registers
– DPTR : [DPH:DPL] 16 bit register
– PC : Program Counter (Instruction Ptr) 16bits
– 4 sets of register bank R0-R7
– Stack pointer SP
– PSW : Program Status Word (a.k.a Flags)
– SFR : Special Function Registers
l Control the on-board peripherals

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Assembly – Absolute Basics
l Intel Assembly format
Operation destination source ; comment
l Values are to be preceded by a # sign
– #55, #32 etc
l Hex values are to be followed by H
– #55H, #32H
l If the first figure in a hex quantity is a letter (A-
F) then a 0 must precede it
– #0FFH, #0C1H, #0D2H

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Register Set – Accumulator A, ACC
l Commonly used for moving data around, logic
and arithmetic operations on 8bit data
l Examples
mov A, R0 ;copy contents of R0 to A
push ACC ;store A onto stack
mov A, #10 ;A ß 10
mov B, A ;B ß A
mov A, 10 ;A ß mem(10)
mov A, 0xFF ;A ß 0xFF
mov A, 0FFH ;same as above

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Register Set – B Register
l Commonly used as a temporary register, much
like a 9th R register
l Used by two opcodes
– mul AB, div AB
l B register holds the second operand and will
hold part of the result
– Upper 8bits of the multiplication result
– Remainder in case of division

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Register Set – R0 to R7
l Set of 8 registers R0, R1, … R7, each 8 bit wide
l Widely used as temporary registers
l Available in 4 banks (effectively 4x8 registers)
l Bank is chosen by setting RS1:RS0 bits in PSW
l Default bank (at power up) is the bank0
l Examples
mov R0, A ;R0 ß A
mov A, R0 ;A ß R0
mov R1, #45 ;R1 ß 45

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Registers - DPTR
l 16 bit register, called Data Pointer
l Used by commands that access external
memory
l Also used for storing 16bit values
mov DPTR, #data16 ; setup DPTR with 16bit ext address
movx A, @DPTR ; copy mem[DPTR] to A
l DPTR is useful for string operations, look up
table (LUT) operations

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Registers - PC
l PC is the program counter
l Referred to as the Instruction Pointer (IP) in
other microprocessors
l PC points to the next program instruction
always
l After fetching an instruction (1 or multi byte),
PC is automatically incremented to point to the
next instruction

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Registers - SP
l SP is the stack pointer
l SP points to the last used location of the stack
– push will first increment SP and then copy data
– pop will first copy data and then decrement SP
l In 8051, stack grows upwards (from low mem to high
mem) and can be in the internal RAM only
l On power-up, SP is at 07H
l Register banks 2,3,4 (08H to 1FH) is the default stack
area
l Stack can be relocated by setting SP to the upper
memory area in 30H to 7FH
– mov SP, #32H

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Registers - PSW
l Program Status Word is a “bit addressable” 8bit
register that has all the flags
l CY - Carry Flag
– Set whenever there is a carry in an arithmetic operation
l AC - Aux. Carry Flag
– Carry from D3 to D4. Used for BCD operation
l P - Parity Flag
– P=1 if A has odd number of 1s
– Even parity
l OV - Overflow Flag
– Set if any arithmetic operation causes an overflow

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Flags - Illustration
l Addition example
– mov A, #38
– add A, #2F
38 0011 1000
+ 2F 0010 1111
--------- ---------------
67 0110 0111
--------- ---------------
CY = 0
AC = 1
P =1

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Registers - SFRs
l Control the operation
of on-board
peripherals
l Special Function
Registers at direct
addresses 80H to FFH
l 8051 Clones may have
additional SFRs
l All registers have an
address

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8051 Memory map
l Separate Code and Data memory
l Code Memory
– Upto 64K long (some maybe onboard) (0x0000 to 0xFFFF)
– PSEN is the controlling signal
– Can store Program only (Read only)
l Data Memory
– Upto 64K long (0x0000 to 0xFFFF)
– RD/WR are the controlling signals
– Can store data only (Read and Write)
l Internal RAM
– 128 bytes 0x00 to 0x7F (includes register banks)
– SFRs 0x80 to 0xFF (not all available)

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8051 - Memory Map
Memory Start End Signal Instruction
Type
IRAM 0x00 0x7F mov A, xxH
mov @Ri
Data 0x0000 0xFFFF RD, WR movx A, @DPTR

Code 0x0000 0xFFFF PSEN movc A,@A+DPTR

SFRs 0x80 0xFF mov A, xxH

l Internal ROM is vendor dependant

l On power-up PC starts at 0000H in
ROM space
l Clones may have internal memory
that may be used as both
Code+Data
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8051 – Instruction Set
l Data Transfer
– Move/Copy data from one location to another
– mov, movc, movx, push, pop, xch, xchd
l Logical
– Perform logic operations on data
– anl, orl, xrl, clr, cpl, rl, rlc, rr, rrc, swap
l Arithmetic
– Perform arithmetic operations on data
– add, addc, subb, inc, dec, mul, div
l Program control
– Control the program flow (jumps, subroutine calls)
– jmp, ajmp, ljmp, sjmp, jc, jnc, jb, jnb, jbc, jz, jnz, acall, lcall,
cjne, djnz, ret, reti
l NOP
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8051 – Instruction Set (contd.)
l Read through the instruction set
– Don’t have to remember all the instructions
– Don’t have to remember all possible cases
l Remember the types of instructions
l When writing code
– Write down the operation needed in simple English
– Lookup the instruction set to see which (combo) of
instructions will do the job

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Assembly à Opcode
l Every assembly instruction translates to a unique
binary Opcode
– Can be 1, 2 or 3 bytes long
– 8051 Family Programmers Guide has a list
l Example1: mov A, #data
– 2 bytes, 1 cycles
– 0111 0100 data8
– mov A, 0xAA è 0111 0100 1010 10101 è 74 AA
l Example2: acall address11
– a10 a9 a8 1 0001 a7 a6 a5 a4 a3 a2 a1 a0
– acall 0x557 è 101 1 0001 0101 0111 è B1 57

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Assembler Directives
l Assembly statement structure
[label:] opcode [operands] [;comment]
start: mov A, #D0H ;code starts here
l Assembler directives Instruct assembler to do a special
task
– ORG xxxxH : origin, start assembling at xxxxH
– EQU : define a constant
l count EQU 25
– DB : define byte, defines allocation of storage
l DATA1: DB 28
l DATA2: DB “hello world”
– END : end of assembly file

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Assembly Design Flow
l Create the assembly source file test.asm
l Assemble the asm file
C:\> as51 test.asm
– Assembler produces error and code list in test.lst
– If no errors, assembler produces .obj file

l Link the .obj files to produce an .abs file

l Create hex file from the .abs file
l Most assemblers directly produce the .hex file
l Download the .hex file onto the board or burn it into an
EPROM.

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Assembly Example #1
l Program to fill up the first 4 registers in the
l Target 8051 dev system register bank with some numbers and find their
sum
– Std 8051 device
– 2K on-chip ROM running ORG 0x30 ;skip the IVT area
a monitor program Start: mov R0, #10
mov R1, #0A5H
– 32K external RAM at mov R2, #1
address 0x0000 to mov R3, #0x20
0x7FFF clearA: mov A, #0 ;now A = 0
– This RAM is both code Addup: add A, R0 ;now A = A + R0
and data add A, R1
add A, R2
– First 0x30 locations in
add A, R3
external RAM is
mov R4, A ;store sum in R4
dedicated for the Interrupt mov DPTR, #7FFF
Vector Table (IVT) movx @DPTR, A ;store in ext. mem
Done: sjmp done ;loop here forever
END

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Class –2 Review
l What are the different views/models of a uP ?
l What are the registers available in the 8051 ?
l What are the functions of the 8051 registers ?
l What is stack, PC, SFR, PSW/Flags ?
l What is an instruction set ?
l What is a memory map ? Why is it needed ?
l What is an assembly language program ? How
does it look ?

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