k01 000 01

31007523 8/2010
ProWORX 32
Ladder Logic Block Library
8/2010
31007523.01
www.schneider-electric.com
The information provided in this documentation contains general descriptions and/or technical characteristics of the performance of the products contained herein. This documentation is not intended as a substitute for and is not to be used for determining suitability or reliability of these products for specific user applications. It is the duty of any such user or integrator to perform the appropriate and complete risk analysis, evaluation and testing of the products with respect to the relevant specific application or use thereof. Neither Schneider Electric nor any of its affiliates or subsidiaries shall be responsible or liable for misuse of the information contained herein. If you have any suggestions for improvements or amendments or have found errors in this publication, please notify us. No part of this document may be reproduced in any form or by any means, electronic or mechanical, including photocopying, without express written permission of Schneider Electric. All pertinent state, regional, and local safety regulations must be observed when installing and using this product. For reasons of safety and to help ensure compliance with documented system data, only the manufacturer should perform repairs to components. When devices are used for applications with technical safety requirements, the relevant instructions must be followed. Failure to use Schneider Electric software or approved software with our hardware products may result in injury, harm, or improper operating results. Failure to observe this information can result in injury or equipment damage. 2010 Schneider Electric. All rights reserved.
31007523 8/2010
Table of Contents
Safety Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . About the Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23 25
Part I General Information . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 1 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parameter Assignment of Instuctions . . . . . . . . . . . . . . . . . . . . . . . . . . . .
27
29
29
Chapter 2 Instruction Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Instruction Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ASCII Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Counters and Timers Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast I/O Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Loadable DX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Math Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Matrix Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Move Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Skips/Specials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Special Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Coils, Contacts, and Interconnects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
32 32 33 34 35 36 38 39 40 41 41 42
Chapter 3 Closed Loop Control / Analog Values . . . . . . . . . . . . . .

Closed Loop Control / Analog Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . PCFL Subfunctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A PID Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PID2 Level Control Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
43
44 45 49 53
Chapter 4 Formatting Messages for ASCII READ/WRIT Operations

Formatting Messages for ASCII READ/WRIT Operations . . . . . . . . . . . . Format Specifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Special Set-up Considerations for Control/Monitor Signals Format . . . . .
57
58 59 62
Chapter 5 Coils, Contacts, and Interconnects. . . . . . . . . . . . . . . . .

Coils . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interconnects (Shorts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
65
66 68 70
Chapter 6 Interrupt Handling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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71
3
Chapter 7 Subroutine Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Subroutine Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
73
73
Chapter 8 Installation of DX Loadables. . . . . . . . . . . . . . . . . . . . . . .

Installation of DX Loadables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
75
Part II Instruction Descriptions (A to D) . . . . . . . . . . . . . . .

Chapter 9 1X3X - Input Simulation. . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
77
79
80 80
Chapter 10 AD16: Ad 16 Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

81
82 82
Chapter 11 ADD: Addition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

83
84 84
Chapter 12 AND: Logical And . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
85
86 87 89
Chapter 13 BCD: Binary to Binary Code . . . . . . . . . . . . . . . . . . . . . . .

91
92 92
Chapter 14 BLKM: Block Move . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

93
94 95
Chapter 15 BLKT: Block to Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

97
98 99 100
Chapter 16 BMDI: Block Move with Interrupts Disabled . . . . . . . . . .

101
102 102
Chapter 17 BROT: Bit Rotate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

103
104 105 106
Chapter 18 CALL: Activate Immediate or Deferred DX Function . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
107
108 109 112
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Chapter 19 CANT - Interpret Coils, Contacts, Timers, Counters, and the SUB Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
115
116 117 118
Chapter 20 CCPF - Configure Cam Profile with Variable Instruments

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
121
122 123
Chapter 21 CCPV - Configure Cam Profile with Variable Increments

125
126 127
Chapter 22 CFGC - Configure Coordinated Set. . . . . . . . . . . . . . . . .

129
130 131
Chapter 23 CFGF - Configure Follower Set . . . . . . . . . . . . . . . . . . . .

133
134 135
Chapter 24 CFGI Configure Imaginary Axis . . . . . . . . . . . . . . . . . .

137
138 139
Chapter 25 CFGR Configure Remote Axis . . . . . . . . . . . . . . . . . . .

141
142 143
Chapter 26 CFGS Configure SERCOS Axis . . . . . . . . . . . . . . . . . .

145
146 147
Chapter 27 CHS: Configure Hot Standby. . . . . . . . . . . . . . . . . . . . . .

149
150 151 152
Chapter 28 CKSM: Check Sum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

155
156 157 158
Chapter 29 CMPR: Compare Register . . . . . . . . . . . . . . . . . . . . . . . .

159
160 161 162
Chapter 30 Coils . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General Usage Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
163
164 165
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Chapter 31 COMM - ASCII Communications Function . . . . . . . . . . .

167
168 169
Chapter 32 COMP: Complement a Matrix . . . . . . . . . . . . . . . . . . . . . .

171
172 173 175
Chapter 33 Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
177
178 179
Chapter 34 CONV - Convert Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

181
182 183
Chapter 35 CTIF - Counter, Timer, and Interrupt Function . . . . . . . .

185
186 187 188
Chapter 36 DCTR: Down Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . .

193
194 195
Chapter 37 DIOH: Distributed I/O Health . . . . . . . . . . . . . . . . . . . . . . .

197
198 199 200
Chapter 38 DISA - Disabled Discrete Monitor . . . . . . . . . . . . . . . . . .

201
202 203
Chapter 39 DIV: Divide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
205
206 207 209
Chapter 40 DLOG: Data Logging for PCMCIA Read/Write Support .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Run Time Error Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
211
212 213 214 216
Chapter 41 DMTH - Double Precision Math. . . . . . . . . . . . . . . . . . . . .

217
218 219
Chapter 42 DRUM: DRUM Sequencer . . . . . . . . . . . . . . . . . . . . . . . . .

6
225
226 227 229
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Chapter 43 DV16: Divide 16 Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
231
232 233 235
Part III Instruction Descriptions (E) . . . . . . . . . . . . . . . . . . .

Chapter 44 EARS - Event/Alarm Recording System . . . . . . . . . . . . .
237
239
240 241 243
Chapter 45 EMTH: Extended Math . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Floating Point EMTH Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
247
248 249 250 252
Chapter 46 EMTH-ADDDP: Double Precision Addition . . . . . . . . . .

253
254 255 257
Chapter 47 EMTH-ADDFP: Floating Point Addition . . . . . . . . . . . . .

259
260 261 262
Chapter 48 EMTH-ADDIF: Integer + Floating Point Addition . . . . . .

263
264 265 266
Chapter 49 EMTH-ANLOG: Base 10 Antilogarithm . . . . . . . . . . . . . .

267
268 269 270
Chapter 50 EMTH-ARCOS: Floating Point Arc Cosine of an Angle (in Radians) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

271
272 273 275
Chapter 51 EMTH-ARSIN: Floating Point Arcsine of an Angle (in Radians). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

277
278 279 280
31007523 8/2010
Chapter 52 EMTH-ARTAN: Floating Point Arc Tangent of an Angle (in Radians) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

281
282 283 285
Chapter 53 EMTH-CHSIN: Changing the Sign of a Floating Point Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

287
288 289 291
Chapter 54 EMTH-CMPFP: Floating Point Comparison. . . . . . . . . . .

293
294 295 297
Chapter 55 EMTH-CMPIF: Integer-Floating Point Comparison . . . . .

299
300 301 303
Chapter 56 EMTH-CNVDR: Floating Point Conversion of Degrees to Radians . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

305
306 307 309
Chapter 57 EMTH-CNVFI: Floating Point to Integer Conversion . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Runtime Error Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
311
312 313 315 315
Chapter 58 EMTH-CNVIF: Integer to Floating Point Conversion . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Runtime Error Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
317
318 319 321 321
Chapter 59 EMTH-CNVRD: Floating Point Conversion of Radians to Degrees. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

323
324 325 327
Chapter 60 EMTH-COS: Floating Point Cosine of an Angle (in Radians) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8
329
330 331 332
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Chapter 61 EMTH-DIVDP: Double Precision Division. . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Runtime Error Handling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
333
334 335 337 337
Chapter 62 EMTH-DIVFI: Floating Point Divided by Integer . . . . . . .

339
340 341 342
Chapter 63 EMTH-DIVFP: Floating Point Division. . . . . . . . . . . . . . .

343
344 345 346
Chapter 64 EMTH-DIVIF: Integer Divided by Floating Point. . . . . . .

347
348 349 350
Chapter 65 EMTH-ERLOG: Floating Point Error Report Log . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: EMTH - ERLOG - Floating Point Math - Error Report Log Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
351
352 353 355
Chapter 66 EMTH-EXP: Floating Point Exponential Function . . . . .

357
358 359 361
Chapter 67 EMTH-LNFP: Floating Point Natural Logarithm . . . . . . .

363
364 365 367
Chapter 68 EMTH-LOG: Base 10 Logarithm . . . . . . . . . . . . . . . . . . .

369
370 371 373
Chapter 69 EMTH-LOGFP: Floating Point Common Logarithm. . . .

375
376 377 379
Chapter 70 EMTH-MULDP: Double Precision Multiplication . . . . . .

381
382 383 385
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Chapter 71 EMTH-MULFP: Floating Point Multiplication. . . . . . . . . .

387
388 389 390
Chapter 72 EMTH-MULIF: Integer x Floating Point Multiplication . .

391
392 393 395
Chapter 73 EMTH-PI: Load the Floating Point Value of "Pi" . . . . . . .

397
398 399 401
Chapter 74 EMTH-POW: Raising a Floating Point Number to an Integer Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: EMTH - POW - Raising a Floating Point Number to an Integer Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
403
404 405 406
Chapter 75 EMTH-SINE: Floating Point Sine of an Angle (in Radians) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: EMTH - SINE - Floating Point Math - Sine of an Angle (in Radians) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
407
408 409 411
Chapter 76 EMTH-SQRFP: Floating Point Square Root. . . . . . . . . . .

413
414 415 417
Chapter 77 EMTH-SQRT: Floating Point Square Root . . . . . . . . . . . .

419
420 421 423
Chapter 78 EMTH-SQRTP: Process Square Root. . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
425
426 427 429 430
Chapter 79 EMTH-SUBDP: Double Precision Subtraction . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: EMTH - SUBDP - Double Precision Math - Subtraction Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
431
432 433 435
10
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Chapter 80 EMTH-SUBFI: Floating Point - Integer Subtraction . . . .

437
438 439 441
Chapter 81 EMTH-SUBFP: Floating Point Subtraction . . . . . . . . . . .

443
444 445 447
Chapter 82 EMTH-SUBIF: Integer - Floating Point Subtraction . . . .

449
450 451 452
Chapter 83 EMTH-TAN: Floating Point Tangent of an Angle (in Radians). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

453
454 455 456
Chapter 84 ESI: Support of the ESI Module. . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . READ ASCII Message (Subfunction 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . WRITE ASCII Message (Subfunction 2) . . . . . . . . . . . . . . . . . . . . . . . . . . GET DATA (Subfunction 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PUT DATA (Subfunction 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ABORT (Middle Input ON). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Run Time Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
457
458 459 460 463 467 468 469 473 474
Chapter 85 EUCA: Engineering Unit Conversion and Alarms . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Examples. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
475
476 477 478 480
Part IV Instruction Descriptions (F to N) . . . . . . . . . . . . . . .

Chapter 86 FIN: First In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
487
489
490 491 492
Chapter 87 FOUT: First Out. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

493
494 495 497
31007523 8/2010
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Chapter 88 FTOI: Floating Point to Integer . . . . . . . . . . . . . . . . . . . . .

499
500 501
Chapter 89 GD92 - Gas Flow Function Block . . . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description - Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description - Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description - Optional Outputs . . . . . . . . . . . . . . . . . . . . . . . .
503
504 505 507 513 514
Chapter 90 GFNX AGA#3 85 and NX19 68 Gas Flow Function Block

515
516 517 519 526 527
Chapter 91 GG92 AGA #3 1992 Gross Method Gas Flow Function Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
529
530 531 533 538 539
Chapter 92 GM92 AGA #3 and #8 1992 Detail Method Gas Flow Function Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
541
542 543 545 551 552
Chapter 93 G392 AGA #3 1992 Gas Flow Function Block . . . . . . . . .

553
554 555 557 562 563
Chapter 94 HLTH: History and Status Matrices . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description Top Node (History Matrix) . . . . . . . . . . . . . . . . . . Parameter Description Middle Node (Status Matrix) . . . . . . . . . . . . . . . . Parameter Description Bottom Node (Length). . . . . . . . . . . . . . . . . . . . .
565
566 567 568 569 574 578
12
31007523 8/2010
Chapter 95 HSBY - Hot Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: HSBY - Hot Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description Top Node . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description Middle Node: HSBY - Hot Standby. . . . . . . . . . . .
579
580 581 583 584
Chapter 96 IBKR: Indirect Block Read . . . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: IBKR - Indirect Block Read . . . . . . . . . . . . . . . . . . . . . . .
585
586 587
Chapter 97 IBKW: Indirect Block Write . . . . . . . . . . . . . . . . . . . . . . .

589
590 591
Chapter 98 ICMP: Input Compare . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: ICMP - Input Compare . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cascaded DRUM/ICMP Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
593
594 595 596 598
Chapter 99 ID: Interrupt Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

599
600 601 602
Chapter 100 IE: Interrupt Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

603
604 605 606
Chapter 101 IMIO: Immediate I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Run Time Error Handling: IMIO - Immediate I/O . . . . . . . . . . . . . . . . . . . .
607
608 609 610 612
Chapter 102 IMOD: Interrupt Module Instruction . . . . . . . . . . . . . . . .

613
614 615 617
Chapter 103 INDX Immediate Incremental Move . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameters Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
621
622 623
Chapter 104 ITMR: Interrupt Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . .

625
626 627 629
Chapter 105 ITOF: Integer to Floating Point . . . . . . . . . . . . . . . . . . . .

31007523 8/2010
631
632 633
13
Chapter 106 JOGS JOG Move . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

635
636 637
Chapter 107 JSR: Jump to Subroutine . . . . . . . . . . . . . . . . . . . . . . . . .

639
640 641
Chapter 108 LAB: Label for a Subroutine . . . . . . . . . . . . . . . . . . . . . . .

643
644 645 646
Chapter 109 LOAD: Load Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

647
648 649 650
Chapter 110 MAP3: MAP Transaction . . . . . . . . . . . . . . . . . . . . . . . . . .

651
652 653 654
Chapter 111 MATH - Integer Operations . . . . . . . . . . . . . . . . . . . . . . . .

659
660 661
Chapter 112 MBIT: Modify Bit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

667
668 669 670
Chapter 113 MBUS: MBUS Transaction . . . . . . . . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The MBUS Get Statistics Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
671
672 673 674 676
Chapter 114 MMFB Modicon Motion Framework Bits Block . . . . . .

681
682 683
Chapter 115 MMFE Modicon Motion Framework Extended Parameters Subroutine . . . . . . . . . . . . . . . . . . . . . . . . . . .

685
686 687
Chapter 116 MMFI Modicon Motion Framework Initialize Block . . .

689
690 691
Chapter 117 MMFS Modicon Motion Framework Subroutine Block

14
695
696 697
31007523 8/2010
Chapter 118 MOVE Absolute Move . . . . . . . . . . . . . . . . . . . . . . . . . .

699
700 701
Chapter 119 MRTM: Multi-Register Transfer Module . . . . . . . . . . . . .

703
704 705 706
Chapter 120 MSPX (Seriplex) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

709
710 711
Chapter 121 MSTR: Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write MSTR Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . READ MSTR Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Get Local Statistics MSTR Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clear Local Statistics MSTR Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . Write Global Data MSTR Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Global Data MSTR Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Get Remote Statistics MSTR Operation . . . . . . . . . . . . . . . . . . . . . . . . . . Clear Remote Statistics MSTR Operation. . . . . . . . . . . . . . . . . . . . . . . . . Peer Cop Health MSTR Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reset Option Module MSTR Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . Read CTE (Config Extension Table) MSTR Operation . . . . . . . . . . . . . . . Write CTE (Config Extension Table) MSTR Operation . . . . . . . . . . . . . . . Modbus Plus Network Statistics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TCP/IP Ethernet Statistics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Run Time Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Modbus Plus and SY/MAX Ethernet Error Codes . . . . . . . . . . . . . . . . . . . SY/MAX-specific Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TCP/IP Ethernet Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CTE Error Codes for SY/MAX and TCP/IP Ethernet. . . . . . . . . . . . . . . . .
713
714 715 718 722 724 726 728 730 731 732 734 736 738 740 742 744 749 750 751 753 755 758
Chapter 122 MU16: Multiply 16 Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . .

759
760 761
Chapter 123 MUL: Multiply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

763
764 765 766
Chapter 124 NBIT: Bit Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

767
768 769
31007523 8/2010
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Chapter 125 NCBT: Normally Closed Bit. . . . . . . . . . . . . . . . . . . . . . . .

771
772 773
Chapter 126 NOBT: Normally Open Bit . . . . . . . . . . . . . . . . . . . . . . . . .

775
776 777
Chapter 127 NOL: Network Option Module for Lonworks . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Detailed Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
779
780 781 782
Part V Instruction Descriptions (O to Q) . . . . . . . . . . . . . . .

Chapter 128 OR: Logical OR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
785
787
788 789 791
Chapter 129 PCFL: Process Control Function Library . . . . . . . . . . . .

793
794 795 796
Chapter 130 PCFL-AIN: Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . .

799
800 801 802
Chapter 131 PCFL-ALARM: Central Alarm Handler . . . . . . . . . . . . . . .

805
806 807 808
Chapter 132 PCFL-AOUT: Analog Output . . . . . . . . . . . . . . . . . . . . . . .

811
812 813 814
Chapter 133 PCFL-AVER: Average Weighted Inputs Calculate . . . . .

815
816 817 818
Chapter 134 PCFL-CALC: Calculated Preset Formula. . . . . . . . . . . . .

821
822 823 824
Chapter 135 PCFL-DELAY: Time Delay Queue. . . . . . . . . . . . . . . . . . .

16
827
828 829 830
31007523 8/2010
Chapter 136 PCFL-EQN: Formatted Equation Calculator. . . . . . . . . .

831
832 833 834
Chapter 137 PCFL-INTEG: Integrate Input at Specified Interval . . . .

837
838 839 840
Chapter 138 PCFL-KPID: Comprehensive ISA Non Interacting PID .

841
842 843 844
Chapter 139 PCFL-LIMIT: Limiter for the Pv . . . . . . . . . . . . . . . . . . . .

847
848 849 850
Chapter 140 PCFL-LIMV: Velocity Limiter for Changes in the Pv . . .

851
852 853 854
Chapter 141 PCFL-LKUP: Look-up Table. . . . . . . . . . . . . . . . . . . . . . .

855
856 857 858
Chapter 142 PCFL-LLAG: First-order Lead/Lag Filter . . . . . . . . . . . .

861
862 863 864
Chapter 143 PCFL-MODE: Put Input in Auto or Manual Mode . . . . . .

865
866 867 868
Chapter 144 PCFL-ONOFF: ON/OFF Values for Deadband . . . . . . . .

869
870 871 872
Chapter 145 PCFL-PI: ISA Non Interacting PI . . . . . . . . . . . . . . . . . . .

873
874 875 876
31007523 8/2010
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Chapter 146 PCFL-PID: PID Algorithms . . . . . . . . . . . . . . . . . . . . . . . .

879
880 881 882
Chapter 147 PCFL-RAMP: Ramp to Set Point at a Constant Rate . . .

885
886 887 888
Chapter 148 PCFL-RATE: Derivative Rate Calculation over a Specified Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

889
890 891 892
Chapter 149 PCFL-RATIO: Four Station Ratio Controller . . . . . . . . . .

893
894 895 896
Chapter 150 PCFL-RMPLN: Logarithmic Ramp to Set Point . . . . . . . .

897
898 899 900
Chapter 151 PCFL-SEL: Input Selection . . . . . . . . . . . . . . . . . . . . . . . .

901
902 903 904
Chapter 152 PCFL-TOTAL: Totalizer for Metering Flow . . . . . . . . . . .

907
908 909 910
Chapter 153 PEER: PEER Transaction . . . . . . . . . . . . . . . . . . . . . . . . .

913
914 915 916
Chapter 154 PID2: Proportional Integral Derivative . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Detailed Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Run Time Errors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
917
918 919 920 923 927
18
31007523 8/2010
Part VI Instruction Descriptions (R to Z) . . . . . . . . . . . . . . .

Chapter 155 R --> T: Register to Table . . . . . . . . . . . . . . . . . . . . . . . . .
929
931
932 933 934
Chapter 156 RBIT: Reset Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

935
936 937
Chapter 157 READ: Read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

939
940 941 942
Chapter 158 RET: Return from a Subroutine. . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: RET - Return to Scheduled Logic . . . . . . . . . . . . . . . . . .
945
946 947
Chapter 159 RTTI - Register to Input Table . . . . . . . . . . . . . . . . . . . . .

949
950 951
Chapter 160 RTTO - Register to Output Table. . . . . . . . . . . . . . . . . . .

953
954 955
Chapter 161 RTU - Remote Terminal Unit . . . . . . . . . . . . . . . . . . . . . .

957
958 959
Chapter 162 SAVE: Save Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

963
964 965 966
Chapter 163 SBIT: Set Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

967
968 969
Chapter 164 SCIF: Sequential Control Interfaces . . . . . . . . . . . . . . . .

971
972 973 974
Chapter 165 SENS: Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

975
976 977 978
Chapter 166 Shorts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

979
980 981
31007523 8/2010
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Chapter 167 SKP - Skipping Networks . . . . . . . . . . . . . . . . . . . . . . . . .

983
984 985
Chapter 168 SRCH: Search. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

987
988 989 991
Chapter 169 STAT: Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description of the Status Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Controller Status Words 1 - 11 for Quantum and Momentum . . . . . . . . . I/O Module Health Status Words 12 - 20 for Momentum . . . . . . . . . . . . . I/O Module Health Status Words 12 - 171 for Quantum . . . . . . . . . . . . . Communication Status Words 172 - 277 for Quantum . . . . . . . . . . . . . . Controller Status Words 1 - 11 for TSX Compact and Atrium . . . . . . . . . I/O Module Health Status Words 12 - 15 for TSX Compact. . . . . . . . . . . Global Health and Communications Retry Status Words 182 ... 184 for TSX Compact. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
993
994 995 996 997 1001 1006 1008 1010 1015 1018 1019
Chapter 170 SU16: Subtract 16 Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1021
1022 1023
Chapter 171 SUB: Subtraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1025
1026 1027
Chapter 172 SWAP - VME Bit Swap . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1029
1030 1031
Chapter 173 TTR - Table to Register . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation: TTR - Table to Register . . . . . . . . . . . . . . . . . . . . . . . . .
1037
1038 1039
Chapter 174 T --> R Table to Register . . . . . . . . . . . . . . . . . . . . . . . . . .

1033
1034 1035 1036
Chapter 175 T --> T: Table to Table . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1041
1042 1043 1045
Chapter 176 T.01 Timer: One Hundredth of a Second Timer . . . . . . .

20
1047
1048 1049
31007523 8/2010
Chapter 177 T0.1 Timer: One Tenth Second Timer . . . . . . . . . . . . . . .

1051
1052 1053
Chapter 178 T1.0 Timer: One Second Timer . . . . . . . . . . . . . . . . . . . .

1055
1056 1057
Chapter 179 T1MS Timer: One Millisecond Timer. . . . . . . . . . . . . . . .

1059
1060 1061 1062
Chapter 180 TBLK: Table to Block . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1065
1066 1067 1069
Chapter 181 TEST: Test of 2 Values . . . . . . . . . . . . . . . . . . . . . . . . . . .

1073
1074 1075
Chapter 182 UCTR: Up Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1077
1078 1079
Chapter 183 VMER - VME Read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1081
1082 1083 1084
Chapter 184 VMEW - VME Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1085
1086 1087 1088
Chapter 185 WRIT: Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1089
1090 1091 1092
Chapter 186 XMIT - Transmit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XMIT Modbus Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1095
1096 1097
Chapter 187 XMIT Communication Block . . . . . . . . . . . . . . . . . . . . . .

Short Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1103
1104 1105 1107 1111 1113
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Chapter 188 XMIT Port Status Block . . . . . . . . . . . . . . . . . . . . . . . . . . .

1115
1116 1117 1119
Chapter 189 XMIT Conversion Block. . . . . . . . . . . . . . . . . . . . . . . . . . .

1123
1124 1125 1127
Chapter 190 XMRD: Extended Memory Read . . . . . . . . . . . . . . . . . . . .

1131
1132 1133 1134
Chapter 191 XMWT: Extended Memory Write. . . . . . . . . . . . . . . . . . . .

1137
1138 1139 1140
Chapter 192 XOR: Exclusive OR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1143
1144 1145 1147
Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1149 1177
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Safety Information
Important Information
NOTICE Read these instructions carefully, and look at the equipment to become familiar with the device before trying to install, operate, or maintain it. The following special messages may appear throughout this documentation or on the equipment to warn of potential hazards or to call attention to information that clarifies or simplifies a procedure.
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PLEASE NOTE Electrical equipment should be installed, operated, serviced, and maintained only by qualified personnel. No responsibility is assumed by Schneider Electric for any consequences arising out of the use of this material. A qualified person is one who has skills and knowledge related to the construction and operation of electrical equipment and the installation, and has received safety training to recognize and avoid the hazards involved.
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About the Book
At a Glance
Document Scope This documentation will help you configure the ladder logic instructions from ProWORX 32. Validity Note This documentation is valid for ProWORX 32 under Microsoft Windows 98, Microsoft Windows 2000, and Microsoft Windows NT 4.x. NOTE: For additional up-to-date notes, please refer to the Read Me file in ProWORX 32. Related Documents
Title of Documentation XMIT Function Block User Guide Quantum Hot Standby Planning and Installation Guide Modbus Plus Network Planning and Installation Guide Quantum 140 ESI 062 10 ASCII Interface Module User Guide Modicon S980 MAP 3.0 Network Interface Controller User Guide Reference Number 840 USE 113 840 USE 106 890 USE 100 840 USE 108 GM-MAP3-001
You can download these technical publications and other technical information from our website at www.schneider-electric.com. User Comments We welcome your comments about this document. You can reach us by e-mail at techcomm@schneider-electric.com.
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26
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General Information 31007523 8/2010
General Information
I
At a Glance In this part you will find general information about the instruction groups and the use of instructions. What's in this Part? This part contains the following chapters:
Chapter 1 2 3 4 5 6 7 8 Instructions Instruction Groups Closed Loop Control / Analog Values Formatting Messages for ASCII READ/WRIT Operations Coils, Contacts, and Interconnects Interrupt Handling Subroutine Handling Installation of DX Loadables Chapter Name Page 29 31 43 57 65 71 73 75
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General Information
28
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Instructions 31007523 8/2010
Instructions
1
Parameter Assignment of Instuctions
General Programming for electrical controls involves a user who implements Operational Coded instructions in the form of visual objects organized in a recognizable ladder form. The program objects designed, at the user level, is converted to computer usable OP codes during the download process. the Op codes are decoded in the CPU and acted upon by the controllers firmware functions to implement the desired control. Each instruction is composed of an operation, nodes required for the operation and in- and outputs. Parameter Assignment Parameter assignment with the instruction DV16 as an example:
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Instructions
Operation The operation determines which functionality is to be executed by the instruction, e.g. shift register, conversion operations. Nodes, In- and Outputs The nodes and in- and outputs determines what the operation will be executed with.
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Instruction Groups 31007523 8/2010
Instruction Groups
2
Introduction In this chapter you will find an overview of the instruction groups. What's in this Chapter? This chapter contains the following topics:
Topic Instruction Groups ASCII Functions Counters and Timers Instructions Fast I/O Instructions Loadable DX Math Instructions Matrix Instructions Miscellaneous Move Instructions Skips/Specials Special Instructions Coils, Contacts, and Interconnects Page 32 32 33 34 35 36 38 39 40 41 41 42
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Instruction Groups
Instruction Groups
General All instructions are attached to one of the following groups. ASCII Functions (see page 32) Counters/Timers (see page 33) Fast I/O Instructions (see page 34) Loadable DX (see page 35) Math (see page 36) Matrix (see page 38) Miscellaneous (see page 39) Move (see page 40) Skips/Specials (see page 41) Special (see page 41) Coils, Contacts and Interconnects (see page 42)
ASCII Functions
ASCII Functions This group provides the following instructions.
Instruction Meaning Available at PLC family Quantum READ WRIT Read ASCII messages Write ASCII messages yes yes Compact no no Momentum no no Atrium no no
PLCs that support ASCII messaging use instructions called READ and WRIT to handle the sending of messages to display devices and the receiving of messages from input devices. These instructions provide the routines necessary for communication between the ASCII message table in the PLCs system memory and an interface module at the remote I/O drops. For further information, see Formatting Messages for ASCII READ/WRIT Operations, page 57.
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Instruction Groups
Counters and Timers Instructions

Counters and Timers Instructions The table shows the counters and timers instructions.
Instruction Meaning Available at PLC family Quantum UCTR DCTR T1.0 T0.1 T.01 T1MS Counts up from 0 to a preset value Counts down from a preset value to 0 Timer that increments in seconds Timer that increments in tenths of a second Timer that increments in hundredths of a second Timer that increments in one millisecond yes yes yes yes yes Compact yes yes yes yes yes Momentum yes yes yes yes yes yes Atrium yes yes yes yes yes yes
yes yes (See note.)
NOTE: The T1MS instruction is available only on the B984-102, the Micro 311, 411, 512, and 612, and the Quantum 424 02.
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Instruction Groups
Fast I/O Instructions

Fast I/O Instructions The following instructions are designed for a variety of functions known generally as fast I/O updating.
Instruction Meaning Available at PLC family Quantum BMDI ID IE IMIO IMOD ITMR Block move with interrupts yes disabled Disable interrupt Enable interrupt Immediate I/O instruction Interrupt module instruction Interval timer interrupt yes yes yes yes no Compact yes yes yes yes no yes Momentum no no no no no no Atrium yes yes yes yes yes yes
For more information, see Interrupt Handling, page 71. NOTE: The fast I/O instructions are only available after configuring a CPU without extension.
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Instruction Groups
Loadable DX
Loadable DX This group provides the following instructions.
Instruction Meaning Available at PLC family Quantum CHS DRUM ESI EUCA HLTH ICMP MAP3 MBUS MRTM NOL PEER XMIT Hot standby (Quantum) DRUM sequenzer yes yes Compact no yes no yes yes yes no no yes no no yes Momentum no no no no no no no no no no no yes Atrium no yes no yes yes yes no no yes no no no
Support of the ESI module yes 140 ESI 062 10 Engineering unit conversion and alarms History and status matrices Input comparison MAP 3 Transaction MBUS Transaction Multi-register transfer module Transfer to/from the NOL Module PEER Transaction RS 232 Master Mode yes yes yes no no yes yes no yes
For more information, see Installation of DX Loadables, page 75.
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Instruction Groups
Math Instructions
Math Instructions Two groups of instructions that support basic math operations are available. The first group comprises four integer-based instructions: ADD, SUB, MUL and DIV. The second group contains five comparable instructions, AD16, SU16, TEST, MU16 and DV16, that support signed and unsigned 16-bit math calculations and comparisons. Three additional instructions, ITOF, FTOI and BCD, are provided to convert the formats of numerical values (from integer to floating point, floating point to integer, binary to BCD and BCD to binary). Conversion operations are usful in expanded math. Integer Based Instructions This part of the group provides the following instructions.
Instruction Meaning Available at PLC family Quantum ADD DIV MUL SUB Addition Division Multiplication Subtraction yes yes yes yes Compact yes yes yes yes Momentum yes yes yes yes Atrium yes yes yes yes
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Instruction Groups
Comparable Instructions This part of the group provides the following instructions.
Instruction Meaning Available at PLC family Quantum AD16 DV16 MU16 SU16 TEST Add 16 bit Divide 16 bit Multiply 16 bit Subtract 16 bit Test of 2 values yes yes yes yes yes Compact yes yes yes yes yes Momentum yes yes yes yes yes Atrium yes yes yes yes yes
Format Conversion This part of the group provides the following instructions.
Instruction Meaning Available at PLC family Quantum BCD Conversion from binary to yes binary code or binary code to binary Conversion from floating point to integer yes Compact yes Momentum yes Atrium yes
FTOI ITOF
yes yes
yes yes
yes yes
Conversion from integer to yes floating point
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Instruction Groups
Matrix Instructions
Matrix Instructions A matrix is a sequence of data bits formed by consecutive 16-bit words or registers derived from tables. DX matrix functions operate on bit patterns within tables. Just as with move instructions, the minimum table length is 1 and the maximum table length depends on the type of instruction you use and on the size of the CPU (24bit) in your PLC. Groups of 16 discretes can also be placed in tables. The reference number used is the first discrete in the group, and the other 15 are implied. The number of the first discrete must be of the first of 16 type 000001, 100001, 000017, 100017, 000033, 100033, ... , etc.. This group provides the following instructions.
Instruction Meaning Available at PLC family Quantum AND BROT CMPR COMP MBIT NBIT NCBT NOBT OR RBIT SBIT SENS XOR Logical AND Bit rotate Compare register Complement a matrix Modify bit Bit control Normally open bit Normally closed bit Logical OR Reset bit Set bit Sense Exclusive OR yes yes yes yes yes yes yes yes yes yes yes yes yes Compact yes yes yes yes yes yes yes yes yes yes yes yes yes Momentum yes yes yes yes yes no no no yes no no yes yes Atrium yes yes yes yes yes yes yes yes yes yes yes yes yes
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Instruction Groups
Miscellaneous
Miscellaneous This group provides the following instructions.
Instruction Meaning Available at PLC family Quantum CKSM DLOG EMTH LOAD Check sum yes Compact yes yes yes yes Momentum yes no yes yes (CCC 960 x0/980 x0 only) yes yes (CCC 960 x0/980 x0 only) no no no Atrium yes no yes no
Data Logging for PCMCIA no Read/Write Support Extended Math Functions Load flash yes yes (CPU 434 12/53 4 14 only) yes yes (CPU 434 12/53 4 14 only) yes yes yes
MSTR SAVE
Master Save flash
yes yes
yes no
SCIF XMRD XMWT
Sequential control interfaces Extended memory read Extended memory write
yes no no
yes yes yes
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Instruction Groups
Move Instructions
Move Instructions This group provides the following instructions.
Instruction Meaning Available at PLC family Quantum BLKM BLKT FIN FOUT IBKR IBKW RT SRCH TR TT TBLK Block move Table to block move First in First out Indirect block read Indirect block write Register to tabel move Search table Table to register move Table to table move Table to block move yes yes yes yes yes yes yes yes yes yes yes Compact yes yes yes yes yes yes yes yes yes yes yes Momentum yes yes yes yes no no yes yes yes yes yes Atrium yes yes yes yes yes yes yes yes yes yes yes
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Instruction Groups
Skips/Specials
Skips/Specials
DANGER
UNINTENTIONAL I/O SKIPPING Take precaution when using the SKP instruction. If inputs and outputs that normally effect control are unintentionally skipped (or not skipped), the result can create hazardous conditions for personnel and application equipment. Failure to follow these instructions will result in death or serious injury. This group provides the following instructions.
Instruction Meaning Available at PLC family Quantum JSR LAB RET SKPC SKPR Jump to subroutine Label for a subroutine Return from a subroutine Skip (constant) Skip (register) yes yes yes yes yes Compact yes yes yes yes yes Momentum yes yes yes yes yes Atrium yes yes yes yes yes
The SKP instruction is a standard instruction in all PLCs. It should be used with caution.
Special Instructions
Special Instructions These instructions are used in special situations to measure statistical events on the overall logic system or create special loop control situations. This group provides the following instructions.
Instruction Meaning Available at PLC family Quantum DIOH PCFL PID2 STAT Distributed I/O health Process control function library Proportional integral derivative Status yes yes yes yes Compact no yes yes yes Momentum no no yes yes Atrium yes yes yes yes
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Instruction Groups
Coils, Contacts, and Interconnects

Coils, Contacts, and Interconnects Coils, contacts, and interconnects are available at all PLC families. normal coil memory-retentive, or latched, coil normally open (N.O.) contact normally closed (N.C.) contact positive transitional (P.T.) contact negative transitional (N.T.) contact horizontal short vertical short
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Closed Loop Control / Analog Values 31007523 8/2010
Closed Loop Control / Analog Values
Introduction This chapter provides general information about configuring closed loop control and using analog values. What's in this Chapter? This chapter contains the following topics:
Topic Closed Loop Control / Analog Values PCFL Subfunctions A PID Example PID2 Level Control Example Page 44 45 49 53
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General An analog closed loop control system is one in which the deviation from an ideal process condition is measured, analyzed and adjusted in an attempt to obtain and maintain zero error in the process condition. Provided with the Enhanced Instruction Set is a proportional-integral-derivative function block called PID2, which allows you to establish closed loop (or negative feedback) control in ladder logic. Definition of Set Point and Process Variable The desired (zero error) control point, which you will define in the PID2 block, is called the set point (SP). The conditional measurement taken against SP is called the process variable (PV). The difference between the SP and the PV is the deviation or error (E). E is fed into a control calculation that produces a manipulated variable (Mv) used to adjust the process so that PV = SP (and, therefore, E = 0).
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PCFL Subfunctions
General The PCFL instruction gives you access to a library of process control functions utilizing analog values. PCFL operations fall into three major categories. advanced calculations signal processing regulatory control Advanced Calculations Advanced calculations are used for general mathematical purposes and are not limited to process control applications. With advanced calculations, you can create custom signal processing algorithms, derive states of the controlled process, derive statistical measures of the process, etc. Simple math routines have already been offered in the EMTH instruction. The calculation capability included in PCFL is a textual equation calculator for writing custom equations instead of programming a series of math operations one by one. Signal Processing Signal processing functions are used to manipulate process and derived process signals. They can do this in a variety of ways; they linearize, filter, delay and otherwise modify a signal. This category would include functions such as an analog input/output, limiters, lead/lag and ramp generators. Regulatory Control Regulatory functions perform closed loop control in a variety of applications. Typically, this is a PID (proportional integral derivative) negative feedback control loop. The PID functions in PCFL offer varying degrees of functionality. Function PID has the same general functionality as the PID2 instruction but uses floating point math and represents some options differently. PID is beneficial in cases where PID2 is not suitable because of numerical concerns such as round-off.
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Explanation of Formula Elements Meaning of formula elements in the following formulas:

Formula Elements Y YP YI YD Bias BT SP KP Dt TI TD TD1 XD XD_1 X X_1 Meaning Manipulated variable output Proportional part of the calculation Integral part of the calculation Derivative part of the calculation Constant added to input Bumpless transfer register Set point Proportional gain Time since last solve Integral time constant Derivative time constant Derivative time lag Error term, deviation Previous error term Process input Previous process input
General Equations The following general equations are valid.

Equation Condition/Requirement Integral bit ON Integral bit OFF High/low limits with
Gain reduction Gain reduction zone not used
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Proportional Calculations The following equations are valid.

Equation Condition/Requirement Proportional bit ON
Integral Calculation The following equations are valid.

Equation Condition/Requirement Integral bit ON
Derivative Calculation The following equations are valid.

Equation Condition/Requirement Base derivative or PV
Derivative bit ON
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Structure Diagram
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A PID Example
Description This example illustrates how a typical PID loop could be configured using PCFL function PID. The calculation begins with the AIN function, which takes raw input simulated to cause the output to run between approximately 20 and 22 when the engineering unit scale is set to 0 ... 100. 984LL Diagram
The process variable over time should look something like this.
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Main PID Ladder Logic The AIN output is block moved to the LKUP function, which is used to scale the input signal. We do this because the input sensor is not likely to produce highly linear readings; the result is an ideal linear signal.
The look-up table output is block moved to the PID function. RAMP is used to control the rise (or fall) of the set point for the PID controller with regard to the rate of ramp and the solution interval. In this example, the set point is established in another logic section to simulate a remote setting. The MODE function is placed after the RAMP so that we can switch between the RAMP-generated set point or a manual value.
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Simulated Process The PID function is actually controlling the process simulated by this logic [value in 400100: 878(Dec)].
The process simulator is comprised of two LLAG functions that act as a filter and input to a DELAY queue that is also a PCFL function block. This arrangement is the equivalent of a second-order process with dead time. The solution intervals for the LLAG filters do not affect the process dynamics and were chosen to give fast updates. The solution interval for the DELAY queue is set at 1000 ms with a delay of 5 intervals,i.e. 5 s. The LLAG filters each have lead terms of 4 s and lag terms of 10 s. The gain for each is 1.0. In process control terms the transfer function can be expressed as:
The AOUT function is used only to convert the simulated process output control value into a range of 0 ... 4 095, which simulates a field device. This integer signal is used as the process input in the first network.
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PID Parameters The PID controller is tuned to control this process at 20.0, using the Ziegler-Nichols tuning method. The resulting controller gain is 2.16, equivalent to a proportional band of 46.3%. The integral time is set at 12.5 s/repeat (4.8 repeats/ min). The derivative time is initially 3 s, then reduced to 0.3 s to de-emphasize the derivative effect. An AOUT function is used after the PID. It conditions the PID control output by scaling the signal back to an integer for use as the control value. The entire control loop is preceded by a 0.1 s timer. The target solution interval for the entire loop is 1 s, and the full solve is 1 s. However, the nontime-dependent functions that are used (AIN, LKUP, MODE, and AOUT) do not need to be solved every scan. To reduce the scan time impact, these functions are scheduled to solve less frequently. The example has a loop solve every 3 s, reducing the average scan time dramatically. NOTE: It is still important to be aware of the maximum scan impact. When programming other loops, you will not want all of the loops to solve on the same scan.
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PID2 Level Control Example

Description Here is a simplified P&I diagram for an inlet separator in a gas processing plant. There is a 2-phase inlet stream: liquid and gas.
LT-1 4 ... 20 mA level transmitter I/P-1 4 ... 20 mA current to pneumatic converter LV-1 control valve, fail CLOSED LSH-1 high level switch, normally closed LSL-1 low level switch, normally open LC-1 level controller I/P-1 Mv to control the flow into tank T-1
The liquid is dumped from the tank to maintain a constant level. The control objective is to maintain a constant level in the separator. The phases must be separated before processing; separation is the role of the inlet separator, PV-1. If the level controller, LC-1, fails to perform its job, the inlet separator could fill, causing liquids to get into the gas stream; this could severely damage devices such as gas compressors.
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Ladder Logic Diagram The level is controlled by device LC-1, a Quantum controller connected to an analog input module; I/P-1 is connected to an analog output module. We can implement the control loop with the following 984LL.
The first SUB block is used to move the analog input from LT-1 to the PID2 analog input register, 40113. The second SUB block is used to move the PID2 output Mv to the I/O mapped output I/P-1. Coil 00101 is used to change the loop from auto to manual mode, if desired. For auto mode, it should be on. Register Content Specify the set point in mm for input scaling (E.U.). The full input range will be 0 ... 4000 mm (for 0 ... 4095 raw analog). Specify the register content of the top node in the PID2 block as follows.
Register 400100 400101 400102 400103 400104 2000 0000 3500 1000 Content Numeric Content Meaning Scaled PV (mm) Scaled SP (mm) Loop output (0 ... 4095 Alarm High Set Point (mm) Alarm Low Set Point (mm) Comments PID2 writes this Set to 2000 mm (half full) initially PID2 writes this; keep it set to 0 to be safe If the level rises above 3500 mm, coil 000102 goes ON If the level drops below 1000 mm, coil 000103 goes ON
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Closed Loop Control / Analog Values Register 400105 400106 400107 400108 400109 400110 400111 Content Numeric 0100 0500 0000 0000 4095 0000 4000 Content Meaning PB (%) Integral constant (5.00 repeats/min) Rate time constant (per min) Bias (0 ... 4095) High windup limit (0 ... 4095) Low windup limit (0 ... 4095) Comments The actual value depends on the process dynamics The actual value depends on the process dynamics Setting this to 0 turns off the derivative mode This is set to 0, since we have an integral term Normally set to the maximum Normally set to the minimum
High engineering range (mm) The scaled value of the process variable when the raw input is at 4095 Low engineering range (mm) Raw analog measure (0 ... 4095) The scaled value of the process variable when the raw input is at 0 A copy of the input from the analog input module register (300001) copied by the first SUB
400112 400113
0000
400114 400115 400116
0000 0000 0102
Offset to loop counter register Zero disables this feature. Normally, this is not used Max loops solved per scan Pointer to reset feedback See register 400114 If you leave this as zero, the PID2 function automatically supplies a pointer to the loop output register. If the actual output (400500) could be changed from the value supplied by PID2, then this register should be set to 500 (400500) to calculate the integral properly
400117 400118 400119
4095 0000 0015
Output clamp high (0 ... 4095) Normally set to maximum Output clamp low (0 ... 4095) Normally set to minimum Rate Gain Limit Constant (2 ... 30) Normally set to about 15. The actual value depends on how noisy the input signal is. Since we are not using derivative mode, this has no effect on PID2 Used only if the PRELOAD feature is used. If the PRELOAD is not used, this is normally zero
400120
0000
Pointer to track input
The values in the registers in the 400200 destination block are all set by the PID2 block.
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Formatting Messages for ASCII READ/WRIT Operations 31007523 8/2010
Formatting Messages for ASCII READ/WRIT Operations
Introduction This chapter provides general information about formatting messages for ASCII READ/WRIT operations. What's in this Chapter? This chapter contains the following topics:
Topic Formatting Messages for ASCII READ/WRIT Operations Format Specifiers Special Set-up Considerations for Control/Monitor Signals Format Page 58 59 62
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General The ASCII messages used in the READ and WRIT instructions can be created via your panel software using the format specifiers described below. Format specifiers are character symbols that indicate: The ASCII characters used in the message Register content displayed in ASCII character format Register content displayed in hexadecimal format Register content displayed in integer format Subroutine calls to execute other message formats Overview Format Specifiers The following format specifiers can be used.
Specifier / " " X () I L A O B H Meaning ASCII return (CR) and linefeed (LF) Enclosure for octal control code Enclosure for ASCII text characters Space indicator Repeat contents of the parentheses Integer Leading zeros Alphanumeric Octal Binary Hexadecimal
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Format Specifiers
Format Specifier / ASCII return (CR) and linefeed (LF)
Field width Prefix Input format Output format None (defaults to 1) None (defaults to 1) Outputs CR, LF; no ASCII characters accepted Outputs CR, LF
Format Specifier " " Enclosure for octal control code

Field width Prefix Input format Output format Three digits enclosed in double quotes None Accepts three octal control characters Outputs three octal control characters
Format Specifier Enclosure for ASCII text characters

Field width Prefix Input format Output format 1 ... 128 characters None (defaults to 1) Inputs number of upper and/or lower case printable characters specified by the field width Outputs number of upper and/or lower case printable characters specified by the field width
Format Specifier X Space indicator, e.g., 14X indicates 14 spaces left open from the point where the specifier occurs.
Field width Prefix Input format Output format None (defaults to 1) 1 ... 99 spaces Inputs specified number of spaces Outputs specified number of spaces
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Format Specifier ( ) Repeat contents of the parentheses, e.g., 2 (4X, I5) says repeat 4X, I5 two times
Field width Prefix Input format Output format None 1 ... 255 Repeat format specifiers in parentheses the number of times specified by the prefix Repeat format specifiers in parentheses the number of times specified by the prefix
Format Specifier I Integer, e.g., I5 specifies five integer characters

Field width Prefix Input format Output format 1 ... 8 characters 1 ... 99 Accepts ASCII characters 0 ... 9. If the field width is not satisfied, the most significant characters in the field are padded with zeros Outputs ASCII characters 0 ... 9. If the field width is not satisfied, the most significant characters in the field are padded with zeros. The overflow field consists of asterisks.
Format Specifier L Leading zeros, e.g., L5 specifies five leading zeros

Field width Prefix Input format Output format 1 ... 8 characters 1 ... 99 Accepts ASCII characters 0 ... 9. If the field width is not satisfied, the most significant characters in the field are padded with zeros Outputs ASCII characters 0 ... 9. If the field width is not satisfied, the most significant characters in the field are padded with zeros. The overflow field consists of asterisks.
Format Specifier A Alphanumeric, e.g., A27 specifies 27 alphanumeric characters, no suffix allowed
Field width Prefix Input format Output format 60 None (defaults to 1) 1 ... 99 Accepts any 8-bit character except reserved delimiters such as CR, LF, ESC, BKSPC, DEL. Outputs any 8-bit character
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Format Specifier O Octal, e.g., O2 specifies two octal characters

Field width Prefix Input format Output format 1 ... 6 characters 1 ... 99 Accepts ASCII characters 0 ... 7. If the field width is not satisfied, the most significant characters are padded with zeros. Outputs ASCII characters 0 ... 7. If the field width is not satisfied, the most significant characters are padded with zeros. No overflow indicators.
Format Specifier B Binary, e.g., B4 specifies four binary characters

Field width Prefix Input format Output format 1 ... 16 characters 1 ... 99 Accepts ASCII characters 0 and 1. If the field width is not satisfied, the most significant characters are padded with zeros. Outputs ASCII characters 0 and 1. If the field width is not satisfied, the most significant characters are padded with zeros. No overflow indicators.
Format Specifier H Hexadecimal, e.g., H2 specifies two hex characters

Field width Prefix Input format Output format 1 ... 4 characters 1 ... 99 Accepts ASCII characters 0 ... 9 and A ... F. If the field width is not satisfied, the most significant characters are padded with zeros. Outputs ASCII characters 0 ... 9 and A ... F. If the field width is not satisfied, the most significant characters are padded with zeros. No overflow indicators.
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Special Set-up Considerations for Control/Monitor Signals Format

General To control and monitor the signals used in the messaging communication, specify code 1002 in the first register of the control block (the register displayed in the top node). Via this format, you can control the RTS and CTS lines on the port used for messaging. NOTE: In this format, only the local port can be used for messaging, i.e., a parent PLC cannot monitor or control the signals on a child port. Therefore, the port number specified in the fifth implied node of the control block must always be 1. The first three registers in the data block (the displayed register and the first and second implied registers in the middle node) have predetermined content.
Register Displayed First implied Second implied Content Stores the control mask word Stores the control data word Stores the status word
These three data block registers are required for this format, and therefore the allowable range for the length value (specified in the bottom node) is 3 ... 255. Control Mask Word Usage of word:
Bit 1 2 - 15 16
Function 1 = port can be taken 0 = port cannot be taken Not used 1 = control RTS 0 = do not control RTS
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Control Data Word Usage of word:
Bit 1 2 - 15 16
Function 1 = take port 0 = return port Not used 1 = activate RTS 0 = deactivate RTS
Status Word Usage of word:
Bit 1 2 3 - 13 14 15 16
Function 1 = port taken 1 = port ACTIVE as Modbus slave Not used 1 = DSR ON 1 = CTS ON 1 = RTS ON
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Coils, Contacts, and Interconnects 31007523 8/2010
Introduction This chapter provides information about coils, contacts, and interconnects, also called shorts. Details of all the elements in the ladder logic instruction set appear in an alphabetical listing. What's in this Chapter? This chapter contains the following topics:
Topic Coils Contacts Interconnects (Shorts) Page 66 68 70
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Coils
Definition of Coils A coil is a discrete output that is turned ON and OFF by power flow in the logic program. A single coil is tied to a 0x reference in the PLCs state RAM. Because output values are updated in state RAM by the PLC, a coil may be used internally in the logic program or externally via the I/O map to a discrete output unit in the control system. When a coil is ON, it either passes power to a discrete output circuit or changes the state of an internal relay contact in state RAM. There are two types of coils. A normal coil A memory-retentive, or latched, coil Normal Coil
WARNING
Forcing of Coils When a discrete input (1x) is disabled, signals from its associated input field device have no control over its ON/OFF state. When a discrete output (0x) is disabled, the PLCs logic scan has no control over the ON/OFF state of the output. When a discrete input or output has been disabled, you can change its current ON/OFF state with the Force command. There is an important exception when you disable coils. Data move and data matrix instructions that use coils in their destination node recognize the current ON/OFF state of all coils in that node, whether they are disabled or not. If you are expecting a disabled coil to remain disabled in such an instruction, you may cause unexpected or undesirable effects in your application. When a coil or relay contact has been disabled, you can change its state using the Force ON or Force OFF command. If a coil or relay is enabled, it cannot be forced. Failure to follow these instructions can result in death, serious injury, or equipment damage.
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A normal coil is a discrete output shown as a 0x reference. A normal coil is ON or OFF, depending on power flow in the program. A ladder logic network can contain up to seven coils, no more than one per row. When a coil is placed in a row, no other logic elements or instruction nodes can appear to the right of the coils logic-solve position in the row. Coils are the only ladder logic elements that can be inserted in column 11 of a network. To define a discrete reference for the coil, select it in the editor and click to open a dialog box called Coil. Symbol
Retentive Coil If a retentive (latched) coil is energized when the PLC loses power, the coil will come back up in the same state for one scan when the PLCs power is restored. To define a discrete reference for the coil, select it in the editor and click to open a dialog box called Retentative coil (latch). Symbol
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Contacts
Definition of Contacts Contacts are used to pass or inhibit power flow in a ladder logic program. They are discrete, i.e., each consumes one I/O point in ladder logic. A single contact can be tied to a 0x or 1x reference number in the PLCs state RAM, in which case each contact consumes one node in a ladder network. Four kinds of contacts are available. normally open (N.O.) contacts normally closed (N.C.) contacts positive transitional (P.T.) contacts negative transitional (N.T.) contacts Contact Normally Open A normally open (NO) contact passes power when it is ON. To define a discrete reference for the NO contact, select it in the editor and click to open a dialog called Normally open contact. Symbol
Contact Normally Closed A normally closed (NC) contact passes power when it is OFF. To define a discrete reference for the NC contact, double ckick on it in the ladder node to open a dialog called Normally closed contact. Symbol
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Contact Pos Trans A positive transitional (PT) contact passes power for only one scan as it transitions from OFF to ON. To define a discrete reference for the PT contact, select it in the editor and click to open a dialog called Positive transition contact. Symbol
Contact Neg Trans A negative transitional (NT) contact passes power for only one scan as it transitions from ON to OFF. To define a discrete reference for the NT contact, select it in the editor and click to open a dialog called Contact negative transition . Symbol
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Interconnects (Shorts)
Definition of Interconnects (Shorts) Shorts are simply straight-line connections between contacts and/or instructions in a ladder logic network. Shorts may be inserted horizontally or vertically in a network. Two kinds of shorts are available. horizontal short vertical short Horizontal Short A short is a straight-line connection between contacts and/or nodes in an instruction through which power flow can be controlled. A horizontal short is used to extend logic out across a row in a network without breaking the power flow. Each horizontal short consumes one node in the network, and uses a word of memory in the PLC. Symbol
Vertical Short A vertical short connects contacts or nodes in an instruction positioned one above the other in a column. Vertical shorts can also connect inputs or outputs in an instruction to create either-or conditions. When two contacts are connected by a vertical short, power is passed when one or both contacts receive power. The vertical short is unique in two ways. It can coexist in a network node with another element or nodal value. It does not consume any PLC memory. Symbol
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Interrupt Handling 31007523 8/2010
Interrupt Handling
6
Interrupt Handling
Interrupt-related Performance The interrupt-related instructions operate with minimum processing overhead. The performance of interrupt-related instructions is especially critical. Using a interval timer interrupt (ITMR) instruction adds about 6% to the scan time of the scheduled ladder logic, this increase does not include the time required to execute the interrupt handler subroutine associated with the interrupt. Interrupt Latency Time The following table shows the minimum and maximum interrupt latency times you can expect.
ITMR overhead Response time No work to do Minimum Maximum during logic solve and Modbus command reception Total overhead (not counting normal logic solve time) 60 ms/ms 98 ms 400 ms 155 ms
These latency times assume only one interrupt at a time. Interrupt Priorities The PLC uses the following rules to choose which interrupt handler to execute in the event that multiple interrupts are received simultaneously. An interrupt generated by an interrupt module has a higher priority than an interrupt generated by a timer. Interrupts from modules in lower slots of the local backplane have priority over interrupts from modules in the higher slots. If the PLC is executing an interrupt handler subroutine when a higher priority interrupt is received, the current interrupt handler is completed before the new interrupt handler is begun.
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Interrupt Handling
Instructions that Cannot Be Used in an Interrupt Handler The following (nonreenterant) ladder logic instructions cannot be used inside an interrupt handler subroutine. MSTR READ / WRIT PCFL / EMTH T1.0, T0.1, T.01, and T1MS timers (will not set error bit 2, timer results invalid) equation networks user loadables (will not set error bit 2) If any of these instructions are placed in an interrupt handler, the subroutine will be aborted, the error output on the ITMR or IMOD instruction that generated the interrupt will go ON, and bit 2 in the status register will be set. Interrupt with BMDI/ID/IE Three interrupt mask/unmask control instructions are available to help protect data in both the normal (scheduled) ladder logic and the (unscheduled) interrupt handling subroutine logic. These are the Interrupt Disable (ID) instruction, the Interrupt Enable (IE) instruction, and the Block Move with Interrupts Disabled (BMDI) instruction. An interrupt that is executed in the timeframe after an ID instruction has been solved and before the next IE instruction has been solved is buffered. The execution of a buffered interrupt takes place at the time the IE instruction is solved. If two or more interrupts of the same type occur between the ID ... IE solve, the mask interrupt overrun error bit is set, and the subroutine initiated by the interrupts is executed only one time The BMDI instruction can be used to mask both a timer-generated and local I/Ogenerated interrupts, perform a single block data move, then unmask the interrupts. It allows for the exchange of a block of data either within the subroutine or at one or more places in the scheduled logic program. BMDI instructions can be used to reduce the time between the disable and enable of interrupts. For example, BMDI instructions can be used to protect the data used by the interrupt handler when the data is updated or read by Modbus, Modbus Plus, Peer Cop or Distributed I/O (DIO).
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Subroutine Handling 31007523 8/2010
Subroutine Handling
7
Subroutine Handling
JSR / LAB Method The example below shows a series of three user logic networks, the last of which is used for an up-counting subroutine. Segment 32 has been removed from the orderof-solve table in the segment scheduler.
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Subroutine Handling
When input 100001 to the JSR block in network 2 of segment 1 transitions from OFF to ON, the logic scan jumps to subroutine #1 in network 1 of segment 32. The subroutine will internally loop on itself ten times, counted by the ADD block. The first nine loops end with the JSR block in the subroutine (network 1 of segment 32) sending the scan back to the LAB block. Upon completion of the tenth loop, the RET block sends the logic scan back to the scheduled logic at the JSR node in network 2 of segment 1.
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Installation of DX Loadables 31007523 8/2010
Installation of DX Loadables
8
How to install the DX Loadables The DX loadable instructions are only available if you have installed them. With the installation of the Concept software, DX loadables are located on your hard disk. Now you have to unpack and install the loadables you want to use as follows.
Step 1 2 3 Action With the menu command Project Configurator you open the configurator. With Configure Loadables... you open the dialog box Loadables. Press the command button Unpack... to open the standard Windows dialog box Unpack Loadable File where the multifile loadables (DX loadables) can be selected. Select the loadable file you need, click the button OK and it is inserted into the list box Available:. Now press the command button Install=> to install the loadable selected in the list box Available:. The installed loadable will be displayed in the list box Installed:. Press the command button Edit... to open the dialog box Loadable Instruction Configuration. Change the opcode if necessary or accept the default. You can assign an opcode to the loadable in the list box Opcode in order to enable user program access through this code. An opcode that is already assigned to a loadable, will be identified by a *. Click the button OK. Click the button OK in the dialog box Loadables. Configuration loadables count is adjusted. The installed loadable is available for programming at the menu Objects List Instructions DX Loadable.
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Instruction Descriptions (A to D) 31007523 8/2010
Instruction Descriptions (A to D)
II
Introduction In this part instruction descriptions are arranged alphabetically from A to D. What's in this Part? This part contains the following chapters:
Chapter 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 1X3X - Input Simulation AD16: Ad 16 Bit ADD: Addition AND: Logical And BCD: Binary to Binary Code BLKM: Block Move BLKT: Block to Table BMDI: Block Move with Interrupts Disabled BROT: Bit Rotate CALL: Activate Immediate or Deferred DX Function CANT - Interpret Coils, Contacts, Timers, Counters, and the SUB Block CCPF - Configure Cam Profile with Variable Instruments CCPV - Configure Cam Profile with Variable Increments CFGC - Configure Coordinated Set CFGF - Configure Follower Set CFGI Configure Imaginary Axis CFGR Configure Remote Axis CFGS Configure SERCOS Axis CHS: Configure Hot Standby CKSM: Check Sum CMPR: Compare Register Chapter Name Page 79 81 83 85 91 93 97 101 103 107 115 121 125 129 133 137 141 145 149 155 159 77
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Instruction Descriptions (A to D)
Chapter 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Coils
Chapter Name
Page 163 167 171 177 181 185 193 197 201 205 211 217 225 231
COMM - ASCII Communications Function COMP: Complement a Matrix Contacts CONV - Convert Data CTIF - Counter, Timer, and Interrupt Function DCTR: Down Counter DIOH: Distributed I/O Health DISA - Disabled Discrete Monitor DIV: Divide DLOG: Data Logging for PCMCIA Read/Write Support DMTH - Double Precision Math DRUM: DRUM Sequencer DV16: Divide 16 Bit
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1X3X - Input Simulation 31007523 8/2010
1X3X - Input Simulation
9
Introduction This chapter describes the instruction 1X3X. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Page 80 80
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1X3X - Input Simulation
Short Description
Function Description The Input Simulation instruction provides a simple method to simulate 1xxxx and 3xxx input data values. This block is similar to a Block Move, the BLKM instruction. When the control input receives power, the source table is copied to the destination (input) table.
Representation
Symbol Representation of the instruction
Parameter Description Description of the instructions parameters

Parameters Top input destination table (top node) source table (middle node) length (bottom node) Top output 0x State RAM Reference 0x, 1x 1x, 3x 4x Data Type None INT INT INT None Contains source to be moved to destination (Length: NNN if 3X) Length: 16* if 4x Passes power when top input receives power. Meaning
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AD16: Ad 16 Bit 31007523 8/2010
AD16: Ad 16 Bit
10
Introduction This chapter describes the instruction AD16. What's in this Chapter? This chapter contains the following topics:
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AD16: Ad 16 Bit
Short Description
Function Description The AD16 instruction performs signed or unsigned 16-bit addition on value 1 (its top node) and value 2 (its middle node), then posts the sum in a 4x holding register in the bottom node.
Representation

Parameters Top input Bottom input value 1 (top node) State RAM Reference 0x, 1x 0x, 1x 3x, 4x Data Type None None INT, UINT INT, UINT INT, UINT None None Meaning ON = add value 1 and value 2 ON = signed operation OFF = unsigned operation Addend, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register Addend, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register Sum of 16 bit addition ON = successful completion of the operation ON = overflow in the sum
value 2 (middle node) 3x, 4x sum (bottom node) Top output Bottom output 4x 0x 0x
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ADD: Addition 31007523 8/2010
ADD: Addition
11
Introduction This chapter describes the instruction ADD. What's in this Chapter? This chapter contains the following topics:
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ADD: Addition
Short Description
Function Description The ADD instruction adds unsigned value 1 (its top node) to unsigned value 2 (its middle node) and stores the sum in a holding register in the bottom node.
Representation

Parameters Top input value 1 (top node) State RAM Reference Data Type Meaning 0x, 1x 3x, 4x None INT, UINT ON = add value 1 and value 2 sum > 999 - 16 bit PLC sum > 9999 - 24 bit PLC 65535 - 785L PLC sum > 999 - 16 bit PLC sum > 9999 - 24 bit PLC 65535 - 785L PLC Sum ON = overflow in the sum sum > 999 in 16 bit PLC sum > 9999 in 24 bit PLC 65535 in 785L PLC
value 2 (middle node)
3x, 4x
INT, UINT
sum (bottom node) Top output
4x 0x
INT, UINT None
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AND: Logical And 31007523 8/2010
AND: Logical And
12
Introduction This chapter describes the instruction AND. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Page 86 87 89
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AND: Logical And
Short Description
Function Description
WARNING
DISABLED COILS Before using the AND instruction, check for disabled coils. AND will override any disabled coils within the destination matrix without enabling them.This can cause personal injury if a coil has disabled an operation for maintenance or repair because the coils state can be changed by the AND operation. Failure to follow these instructions can result in death, serious injury, or equipment damage. The AND instruction performs a Boolean AND operation on the bit patterns in the source and destination matrices. The ANDed bit pattern is then posted in the destination matrix, overwriting its previous contents.
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AND: Logical And
Representation

Parameters Top input source matrix (top node) destination matrix (middle node) length (bottom node) Top output 0x State RAM Reference 0x, 1x 0x, 1x, 3x, 4x 0x, 4x Data Type None BOOL, WORD BOOL, WORD INT, UINT None Meaning Initiates AND First reference in the source matrix First reference in the destination matrix
Matrix length; range 1 ... 100. Echoes state of the top input
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AND: Logical And
An AND Example When contact 10001 passes power, the source matrix formed by the bit pattern in registers 40600 and 40601 is ANDed with the destination matrix formed by the bit pattern in registers 40604 and 40605. The ANDed bits are then copied into registers 40604 and 40605, overwriting the previous bit pattern in the destination matrix.
NOTE: If you want to retain the original destination bit pattern of registers 40604 and 40605, copy the information into another table using the BLKM instruction before performing the AND operation.
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AND: Logical And
Parameter Description
Matrix Length (Bottom Node) The integer entered in the bottom node specifies the matrix length, i.e. the number of registers or 16-bit words in the two matrices. The matrix length can be in the range 1 ... 100. A length of 2 indicates that 32 bits in each matrix will be ANDed.
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AND: Logical And
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BCD: Binary to Binary Code 31007523 8/2010
BCD: Binary to Binary Code
13
Introduction This chapter describes the instruction BCD. What's in this Chapter? This chapter contains the following topics:
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BCD: Binary to Binary Code
Short Description
Function Description The BCD instruction can be used to convert a binary value to a binary coded decimal (BCD) value or a BCD value to a binary value. The type of conversion to be performed is controlled by the state of the bottom input.
Representation

Parameters Top input Bottom input source register (top node) destination register (middle node) #1 bottom node) Top output Bottom output 92 0x 0x State RAM Reference 0x, 1x 0x, 1x 3x, 4x 4x Data Type None None INT, UINT INT, UINT INT, UINT None None Meaning ON = enable conversion ON = BCD binary conversion OFF = binary BCD conversion Source register where the numerical value to be converted is stored Destination register where the converted numerical value is posted Constant value, can not be changed Echoes the state of the top input ON = error in the conversion operation
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BLKM: Block Move 31007523 8/2010
BLKM: Block Move
14
Introduction This chapter describes the instruction BLKM. What's in this Chapter? This chapter contains the following topics:
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BLKM: Block Move
Short Description
WARNING
DISABLED COILS Before using the BLKM instruction, check for disabled coils. BLKM will override any disabled coils within a destination table without enabling them. This can cause injury if a coil has been disabled for repair or maintenance because the coils state can change as a result of the BLKM instruction. Failure to follow these instructions can result in death, serious injury, or equipment damage. The BLKM (block move) instruction copies the entire contents of a source table to a destination table in one scan.
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BLKM: Block Move
Representation

Parameters Top input source table (top node) destination table (middle node) table length (bottom node) State RAM Reference 0x, 1x 0x, 1x, 3x, 4x 0x, 4x Data Type None ANY_BIT ANY_BIT Meaning ON = initiates block move Source table that will have its contents copied in the block move Destination table where the contents of the source table will be copied in the block move Table size (number of registers or 16-bit words) for both the source and destination tables; they are of equal length. Range: 1 ... 100 Echoes the state of the top input
INT, UINT
Top output
0x
None
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BLKM: Block Move
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BLKT: Block to Table 31007523 8/2010
BLKT: Block to Table
15
Introduction This chapter describes the instruction BLKT. What's in this Chapter? This chapter contains the following topics:
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Short Description
WARNING
4x REGISTER CORRUPTION Use external logic in conjunction with the middle or bottom input to confine the value in the pointer to a safe range. BLKT is a powerful instruction that can corrupt all the 4x registers in your PLC with data copied from the source block. Failure to follow these instructions can result in death, serious injury, or equipment damage. The BLKT (block-to-table) instruction combines the functions of RT and BLKM in a single instruction. In one scan, it can copy data from a source block to a destination block in a table. The source block is of a fixed length. The block within the table is of the same length, but the overall length of the table is limited only by the number of registers in your system configuration.
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Representation

Parameters Top input middle input bottom input source block (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 4x Data Type None None None Meaning ON = initiates the DX move ON = hold pointer ON = reset pointer to zero
BYTE, WORD First holding register in the block of contiguous registers whose content will be copied to a block of registers in the destination table BYTE, WORD Pointer to the destination table INT, UINT Block length (number of 4x registers) of the source block and of the destination block Range: 1 ... 100 ON = operation successful ON = error / move not possible
pointer (middle node) block length (bottom node)
4x
Top output Middle output
0x 0x
None None
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Middle and Bottom Input The middle and bottom input can be used to control the pointer so that source data is not copied into registers that are needed for other purposes in the logic program. When the middle input is ON, the value in the pointer register is frozen while the BLKT operation continues. This causes new data being copied to the destination to overwrite the block data copied on the previous scan. When the bottom input is ON, the value in the pointer register is reset to zero. This causes the BLKT operation to copy source data into the first block of registers in the destination table. Pointer (Middle Node) The 4x register entered in the middle node is the pointer to the destination table. The first register in the destination table is the next contiguous register after the pointer, e.g. if the pointer register is 400107, then the first register in the destination table is 400108. NOTE: The destination table is segmented into a series of register blocks, each of which is the same length as the source block. Therefore, the size of the destination table is a multiple of the length of the source block, but its overall size is not specifically defined in the instruction. If left uncontrolled, the destination table could consume all the 4x registers available in the PLC configuration. The value stored in the pointer register indicates where in the destination table the source data will begin to be copied. This value specifies the block number within the destination table.
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BMDI: Block Move with Interrupts Disabled 31007523 8/2010
BMDI: Block Move with Interrupts Disabled
16
Introduction This chapter describes the instruction BMDI. What's in this Chapter? This chapter contains the following topics:
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BMDI: Block Move with Interrupts Disabled
Short Description
Function Description The BMDI instruction masks the interrupt, initiates a block move (BLKM) operation, then unmasks the interrupts.
Representation

Parameters Top input source table (top node) destination table (middle node) table length (bottom node) State RAM Reference 0x, 1x Data Type Meaning None ON = masks interrupt, initiates a block move, then unmasks the interrupts
0x, 1x, 3x, 4x INT, UINT, Source table that will have its contents copied WORD in the block move 0x, 4x INT, UINT, Destination table where the contents of the WORD source table will be copied in the block move INT, UINT Integer value, specifies the table size, i.e. the number of registers, in the source and destination tables (they are of equal length) Range: 1 ... 100 Echoes the state of the top input
Top output
0x
None
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BROT: Bit Rotate 31007523 8/2010
BROT: Bit Rotate
17
Introduction This chapter describes the instruction BROT. What's in this Chapter? This chapter contains the following topics:
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BROT: Bit Rotate
Short Description
WARNING
DISABLED COILS Before using the BROT instruction, check for disabled coils. BROT will override any disabled coils within a destination matrix without enabling them. This can cause injury if a coil has been disabled for repair or maintenance if BROT unexpectedly changes the coils state. Failure to follow these instructions can result in death, serious injury, or equipment damage. The BROT (bit rotate) instruction shifts the bit pattern in a source matrix, then posts the shifted bit pattern in a destination matrix. The bit pattern shifts left or right by one position per scan.
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BROT: Bit Rotate
Representation

Parameters Top input Middle input Bottom input State RAM Reference 0x, 1x 0x, 1x 0x, 1x Data Type None None None Meaning ON = shifts bit pattern in source matrix by one ON= shift left OFF = shift right OFF = exit bit falls out of the destination matrix ON = exit bit wraps to start of the destination matrix First reference in the source matrix, i.e. in the matrix that will have its bit pattern shifted First reference in the destination matrix, i.e. in the matrix that shows the shifted bit pattern
source matrix (top node) destination matrix (middle node) length (bottom node) Top output Middle output
0x, 1x, 3x, 4x 0x, 4x
ANY_BIT ANY_BIT
0x 0x 0x
INT, UINT Matrix length; range: 1 ... 100 None None Echoes state of the top input OFF = exit bit is 0 ON = exit bit is 1 105
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BROT: Bit Rotate
Matrix Length (Bottom Node) The integer value entered in the bottom node specifies the matrix length, i.e. the number of registers or 16-bit words in each of the two matrices. The source matrix and destination matrix have the same length. The matrix length can range from 1 ... 100, e.g. a matrix length of 100 indicates 1600 bit locations. Result of the Shift (Middle Output) The middle output indicates the sense of the bit that exits the source matrix (the leftmost or rightmost bit) as a result of the shift.
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CALL: Activate DX Function 31007523 8/2010
CALL: Activate Immediate or Deferred DX Function
18
Introduction This chapter describes the instruction CALL. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Representation Page 108 109 112
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CALL: Activate DX Function
Short Description
Function Description A CALL instruction activates an immediate or deferred DX function from a library of functions defined by function codes. The Copro copies the data and function code into its local memory, processes the data, and copies the results back to controller memory. Function Codes: 0-499: User Immediate/Deferred DXs 500-9999: System Immediate/Deferred DXs The two MSBs of the top register are the Copro# in a multiple Copro system.
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Representation
Overview The content in this section applies specifically to the Immediate DX function of the CALL instruction. Symbol Representation of the instruction for an Immediate DX CALL
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Parameter Description Description of the instructions parameters for an Immediate DX CALL

Parameters Top input Bottom input State RAM Reference 0x, 1x 0x, 1x Data Type None None Meaning ON initiates the CALL. The input to the bottom node is used with an immediate DX function to keep scanning the instruction regardless of the state of the top input. A list of the codes, their names, and their function is detailed in the table below named Immediate DX Functions. The top node is used to specify the function code to be executed. It may be entered explicitly as a constant or as a value in a 4xxxx holding register. The codes fall into two ranges: 0 through 499 are for user-definable DXs 500 through 9999 are for system DXs Both User-definable and System-definable codes apply to both immediate and deferred. Both User-definable and System-definable are provided by Schneider Electric. register (middle node) length (bottom node) Top output Bottom output 0x 0x 4x INT, UINT The 4xxxx register in the middle node is the first in a block of registers to be passed to the Copro for processing. The number of registers in the block is defined in the bottom node. ON when the function completes successfully. The output from the bottom node will go ON if an error is detected in the function.
value (top node)
0x, 3x
INT, UINT
INT, UINT None None
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Immediate DX Functions This table lists the Immediate DX functions

Name f_config f_2md_fl f_fl_2md f_4md_fl f_fl_4md f_1md_fl f_fl_1m f_exp f_log f_log10 f_pow f_sqrt f_cos f_sin f_tan f_atan f_atan2 f_asin f_acos f_add f_sub f_mult f_div f_deg_rad f_rad_deg f_swap f_comp f_dbwrite f_dbread Code 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 Function Obtain Copro configuration data Convert a two-register long integer to 64-bit floating point Convert floating point to two-register long integer Convert a four-register long integer to floating point Convert floating point to four-register long integer Convert a one-register long integer to floating point Convert floating point to one-register long integer Exponential function Natural logarithm Base 10 logarithm Raise to a power Square root Cosine Sine Tangent Arc tangent x Arc tangent y/x Arc sine Arc cosine Add Subtract Multiply Divide Convert degrees to radians Convert radians to degrees Swap byte positions within a register Floating point compare Write Copro register database from PLC Read Copro register database from PLC
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Representation
Overview The content in this section applies specifically to the Deferred DX function of the CALL instruction. Symbol Representation of the instruction for a Deferred DX CALL
Parameter Description Description of the instructions parameters for a Deferred DX CALL

Parameters Top input Middle input State RAM Data Reference Type 0x, 1x 0x, 1x None None Meaning ON initiates the CALL. The instruction calls a deferred DX when the input to the middle node is enabled. A list of the codes, their names, and their function is detailed in the table below named Deferred DX functions.
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CALL: Activate DX Function Parameters value (top node) State RAM Data Reference Type 0x, 3x INT, UINT Meaning The top node is used to specify the function code to be executed. It may be entered explicitly as a constant or as a value in a 4xxxx holding register. The codes fall into two ranges: 0 through 499 are for user-definable DXs 500 through 9999 are for system DXs Both User-definable and System-definable codes apply to both immediate and deferred. Both Userdefinable and System-definable are provided by Schneider Electric. register (middle node) length (bottom node) Top output Middle output 0x 0x 4x INT, UINT INT, UINT None None The 4xxxx register in the middle node is the first in a block of registers to be passed to the Copro for processing. The number of registers in the block is defined in the bottom node. ON when the function completes successfully. The output from the middle node, which is used only with deferred DX functions, goes ON to indicate that the function s in process. The output from the bottom node will go ON if an error is detected in the function.
Bottom output
0x
None
Deferred DX Functions This table lists the Deferred DX Functions

Name f_config f_d_dbwr f_d_dbrd f_dgets f_dputs f_sprintf f_sscanf f_egets f_eputs f_ectl Code 500 501 502 515 516 518 519 520 521 522 Function Obtain Copro configuration data Write Copro register database from PLC Read Copro register database from PLC Issue dgets() on comm line Issue dputs() on comm line Generate a character string Interpret a character string IEEE-488 gets() function IEEE-488 puts() function IEEE-488 error control function
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113
114
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CANT - Interpret Coils, Contacts, Timers, Counters, and the SUB Block 31007523 8/2010
CANT - Interpret Coils, Contacts, Timers, Counters, and the SUB Block
19
Introduction This chapter describes the instruction CANT. What's in this Chapter? This chapter contains the following topics:
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115
Short Description
Function Description This DX Loadable function block, upon initializing a triggering contact, analyzes your ladder logic to extract the specific column and the corresponding contact IDs where power flow has stopped. The CANT block contains 20 registers. A MSTR block is used to export data from the CANT's 20 registers to a PC running the Action Monitor program. The CANT block is specifically used to interpret coils, contacts, timers, counters, and the SUB block. You may not use any other types of ladder logic instructions in a network. Otherwise, you receive incorrect results. If, however, you must use one of the other ladder logic instructions you may place them in a separate network linked to a coil that is referenced to the network containing the CANT block. NOTE: Only 24-bit logic Quantum and 984 PLCs support the DX Loadable function block. 16-bit controllers will not work with this particular block.
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CANT - Interpret Coils, Contacts, Timers, Counters, and the SUB
Representation

Parameters Top input Middle input State RAM Data Meaning Reference Type 0x, 1x 0x, 1x None Action contact 3 Please see the Note below. None Action contact 2 Please see the Note below. None Action contact 1 Please see the Note below. INT, Each CANT block contains a block of 10 setup registers, UINT which will automatically fill these 10 registers with internal data. INT, This node is the start of the 4x output data registers. UINT (For expanded and detailed information please see page 118.) INT, A delay timer value with 10ms increments. The value 1 is UINT assigned to OFF.
Bottom input 0x, 1x register # top node 4x
data register 4x middle node delay bottom node
NOTE: When any of the above inputs are activated, the CANT function block begins to solve the routine. The bottom node specifies a delay time in 10ms increments that the block uses to delay the start of the solve routine.
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117
Output Data Registers Table (Middle Node)
Output Data Register Description (Purpose) 4x Contains the address of the "CANT in use flag" coil number Coil must be programmed with NO POWER CONNECTED FROM THE LEFT in the last network of your ladder logic CANT version number in hexadecimal format (for example, 0105 for v1.05) Hi Byte = Internal operational flags Lo Byte = MB+ address of a PLC Output coil number (a variable that is dependent on the block's state) The Id of the trigger contact or coil Bit 15 0 - if a coil; 1 - if a contact Bit 14-00 coil or contact number (1 based) Hi 12 bits = network number where logic fails (1 based) Lo 4 bits = column number where logic fails (1 based) Rung #1: Hi Byte = node state Lo Byte = node type (opcode from node database) Rung #1: Contact number (1 based) Rung #2: Refer to 4x + 06 Rung #2: Refer to 4x + 07 Rung #3: Refer to 4x + 06 Rung #3: Refer to 4x + 07 Rung #4: Refer to 4x + 06 Rung #4: Refer to 4x + 07 Rung #5: Refer to 4x + 06 Rung #5 Refer to 4x + 07 Rung #6: Refer to 4x + 06 Rung #6: Refer to 4x + 07 Rung #7: Refer to 4x + 06 Rung #7: Refer to 4x + 07
4x + 01 4x + 02 4x + 03 4x + 04
4x + 05 4x + 06
4x + 07 4x + 08 4x + 09 4x + 10 4x + 11 4x + 12 4x + 13 4x + 14 4x + 15 4x + 16 4x + 17 4x + 18 4x + 19
118
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CANT - Interpret Coils, Contacts, Timers, Counters, and the SUB
Programming Each network can only contain one COIL and one CANT block, which must be located in column 10, row 5. Column 9 of the bottom rung contains the power input for the triggers (action contacts) to the CANT block, which will provide more space for your ladder logic programming. NOTE: This is not at the top of the block as it usually is with DX blocks. In any of the available row positions 5, 6, or 7, you may have up to 3 triggers that must be a transitional type of either [P] or [N]. The CANT block node number will default to 22 (hexadecimal) and not be changed. Ladder Node Setup
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119
MSTR Write Data Setup The purpose of the MSTR block is to send the 20 4x CANT registers to a PC-based Action Monitor program. This transmittal of registers is done using either Modbus Plus or an Ethernet TCP/IP Modbus. Example: MSTR statistics control registers
Register 400121 400122 400123 400124 400125 400126 400127 400128 400129 Value 1 ? 20 40001 22 1 0 0 0 Description Write data function MSTR error register # of data registers to send Start of data registers Destination MB+ address MB+ routing MB+ routing MB+ routing MB+ routing
NOTE: It is necessary to program a MSTR block for each receiving (PC) address if you want to transmit data to more than one PC running Action Monitor. MSTR Setup
120
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CCPF 31007523 8/2010
CCPF - Configure Cam Profile with Variable Instruments
20
Introduction This chapter describes the CCPF instruction. What's in this Chapter? This chapter contains the following topics:
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CCPF
Short Description
Function Description The CCPF function block configures a Cam Profile with fixed master increments. A CamProfile relates the position of a follower axis for a given position of a master axis. The CamProfile is a table of master and follower position coordinates. Position points that are not explicitly listed in the table are derived by interpolating between the given points. Linear and cubic interpolations are supported. CamProfile Type The CamProfile type is used to execute electronic cams in the motion controller. electronic cams simplify programming of complex moves. They can be applied in winding applications, flying cutoff applications, thermoforming machines, press feeds, and many other complex control situations. NOTE: A CamProfile configuration block can be re-executed to change the profile. A CMD_NOT_ALLOWED error will be generated if a FollowerSet is already using the CamProfile and following is turned on. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for more detailed information on using motion loadables.
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CCPF
Representation
Symbol The following diagram shows a representation of the instruction.
Parameter Description The following table describes the instructions parameters.

Parameters Top input Top node State RAM Data Reference Type 0x 4x None INT, UINT Meaning ON initiates the configuration function. When this input goes off, the function is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments and returns for a generic subrouting call. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 18. Turned on when the cam configuration call is complete without error. Turned on when the cam configuration call is complete and an error code is generated in register 4xxx15. Turned on when the register length is not set at 18. 123
Middle node
4x
INT, UINT INT
Bottom Node
4x
Top Output Middle Output
0x 0x
None None None
Bottom Output 0x
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CCPF
Registers The following table shows the registers.

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx4 4xxxx6 4xxxx8 4xxx10 4xxx12 4xxx14 4xxx15 4xxx16 4xxx17 Data Type Short Short Unsigned Unsigned Float Float Unsigned Float Register Block Short Short Short Description The CamProfile ID to be configured The number of points in the Cam Table Interpolation Type: Linear = 1 or Cubic = 2 Position units of the master (Rev, Deg, etc.) First Master Position Fixed master position increment Position units of the follower (Inch, Rev, etc.) Pointer to first register of follower cam table Pointer to address of cam configuration block Error code generated by configuration block Current operating state number Current state entry count
124
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CCPV 31007523 8/2010
CCPV - Configure Cam Profile with Variable Increments
21
Introduction This chapter describes the CCPV instruction. What's in this Chapter? This chapter contains the following topics:
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CCPV
Short Description
Function Description The CCPV function block configures a CamProfile with variable master increments. A CamProfile relates the position of a follower axis for a given position of a master axis. The CamProfile is a table of master and follower position coordinates. Position points that are not explicitly listed in the table are derived by interpolating between the given points. Linear and cubic interpolation are supported. See CamProfile Type, page 122 for more information on a CamProfile type. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for more detailed information on using motion loadables.
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CCPV
Representation
Symbol The following diagram shows a representation of the CCPV instruction.

Parameters Top input State RAM Reference 0x Data Type None Meaning ON initiates the configuration function. When this input goes off, the function is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments and returns for a generic subrouting call. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 16.
Top node
4x
INT, UINT
Middle node
4x
INT, UINT
Bottom node
4x
INT
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CCPV
Parameters Top output Middle output
State RAM Reference 0x 0x
Data Type None None
Meaning Turned on when the cam configuration call is complete without error. Turned on when the cam configuration call is complete and an error code is generated in register 4xxx13. Turned on when the register length is not set at 16.
Bottom output
0x
None
Registers The following table describes the instructions registers.

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx4 4xxxx6 4xxxx8 4xxx10 4xxx12 4xxx13 4xxx14 4xxx15 Data Type Short Short Unsigned Unsigned Float Unsigned Float Register Block Short Short Short Description The CamProfile ID to be configured The number of points in the Cam Table Interpolation Type: Linear = 1 or Cubic = 2 Position units of the master (Rev, Deg, etc.) Pointer to first register of the master cam table Position units of the follower (Inch, Rev, etc.) Pointer to first register of follower cam table Pointer to first register of cam configuration block Error code generated by configuration block Current operating state number Current state entry count
128
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CFGC 31007523 8/2010
CFGC - Configure Coordinated Set
22
Introduction This chapter describes the CFGC instruction. What's in this Chapter? This chapter contains the following topics:
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CFGC
Short Description
Function Description The CFGC function block configures a Coordinated Set. Each motion axis object has a set of motion parameters that must be configured before the motion axis object may be used. The configure function provides the default value for these parameters. The default values are placed into a block of holding registers in a specified order. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for more detailed information on using motion loadables.
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CFGC
Representation
Symbol The following diagram shows a representation of the CFGC instruction.

Parameters Top input State RAM Reference 0x Data Type None Meaning ON initiates the configuration function. When this input goes off, the function is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments and returns for a generic subrouting call. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 13.
Top node
4x
INT, UINT
Middle node
4x
INT, UINT
Bottom node
4x
INT
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CFGC
Parameters Top output Middle output
Data Type None None
Meaning Turned on when the cam configuration call is complete without error. Turned on when the cam configuration call is complete and an error code is generated in register 4xxx10. Turned on when the register length is not set at 13.
Bottom output
0x
None

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx3 4xxxx4 4xxxx5 4xxxx6 4xxxx7 4xxxx8 4xxxx9 4xxx10 4xxx11 4xxx12 Data Type Short Short Short Short Short Short Short Short Short Register Block Short Short Short Description Axis id of the Coordinated Set to be configured Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Pointer to register address of configuration block Error code generated by configuration block Current operating state number Current state entry count
132
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CFGF 31007523 8/2010
CFGF - Configure Follower Set
23
Introduction This chapter describes the CFGF instruction. What's in this Chapter? This chapter contains the following topics:
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CFGF
Short Description
Function Description The CFGF function block configures a Follower Set. Each motion axis object has a set of motion parameters that must be configured before the motion axis object may be used. The configure function provides the default value for these parameters. The default values are placed into a block of holding registers in a specified order. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for more detailed information on using motion loadables.
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CFGF
Representation
Symbol The following diagram shows a representation of the CFGF instruction.

Parameters Top input State RAM Reference 0x Data Type None Meaning ON initiates the configuration function. When tthis input goes off, the function is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments for the configuration. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 14.
Top node
4x
INT, UINT
Middle node
4x
INT, UINT INT
Bottom node
4x
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CFGF
Parameters Top output Middle output Bottom output
State RAM Reference 0x 0x 4x
Data Type None None None
Meaning Turned on when the cam configuration call is complete without error. Turned on when the subroutine call is complete and an error code is generated in register 4xxx11. Turned on when the register length is not set at 14.

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx3 4xxxx4 4xxxx5 4xxxx6 4xxxx7 4xxxx8 4xxxx9 4xxx10 4xxx11 4xxx12 4xxx13 Data Type Short Short Short Short Short Short Short Short Short Short Register Block Short Short Short Description Axis id of the Follower Set to be configured Axis id of Master Axis of the Follower Set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Axis id of axis member to be included in the set Pointer to register address of configuration block Error code generated by configuration block Current operating state number Current state entry count
136
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CFGI 31007523 8/2010
CFGI Configure Imaginary Axis
24
Introduction This chapter describes the CFGI instruction. What's in this Chapter? This chapter contains the following topics:
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CFGI
Short Description
Function Description The CFGI function block configures an ImaginaryAxis. Each motion axis object has a set of motion parameters that must be configured before the motion axis object may be used. The configure function provides the default value for these parameters. The default values are placed into a block of holding registers in a specified order. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for more detailed information on using motion loadables.
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CFGI
Representation
Symbol The following diagram shows a CFGI instruction.
Parameter Descriptions The following table describes the instructions parameters.

Parameters Top input State RAM Reference 0x Data Type None Meaning ON initiates the configuration function. When this input goes off, the function is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments for the configuration. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 20. Turned on when the cam configuration call is complete without error. 139
Top node
4x
INT, UINT
Middle node
4x
INT, UINT INT
Bottom node
4x
Top output
0x
None
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CFGI
Parameters Middle output Bottom output
Data Type None None
Meaning Turned on when the subroutine call is complete and an error code is generated in register 4xxx17. Turned on when the register length is not set at 20.

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx4 4xxxx6 4xxxx8 4xxx10 4xxx12 4xxx14 4xxx16 4xxx17 4xxx18 4xxx19
1
Data Type Short Unsigned Float Float Float Float Float Float Float Register Block Short Short Short
Description Axis id for Imaginary Axis to be configured Velocity units for the axis Numerator of the gear ratio Denominator of the gear ratio1 Positive position limit (optional) Negative position limit (optional) Velocity limit (optional) Default acceleration (optional) Default deceleration (optional) Pointer to register of axis configuration block Error code generated by configuration block Current operating state number Current state entry count
The units associated with this value are revolutions of the feedback device. Typically the feedback device is directly coupled to the shaft of the motor, and, therefore, this parameter specifies the number of motor revolutions required to produce the physical travel specified by the numerator.
140
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CFGR 31007523 8/2010
CFGR Configure Remote Axis
25
Introduction This chapter describes the CFGR instruction. What's in this Chapter? This chapter contains the following topics:
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CFGR
Short Description
Function Description The CFGR function block configures a Remote Axis. Each motion axis object has a set of motion parameters that must be configured before the motion axis object may be used. The configure function provides the default value for these parameters. The default values are placed into a block of holding registers in a specified order. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for more detailed information on using motion loadables.
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CFGR
Representation
Symbol The following diagram shows a representation of the CFGR instruction.

Top node
4x
INT, UINT
Middle node
4x
INT, UINT INT
Bottom node
4x
Top output
0x
None
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CFGR
Parameters Middle output
State RAM Reference 0x
Data Type None
Bottom output
4x
None

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx4 4xxxx6 4xxxx7 4xxxx9 4xxx10 4xxx11 4xxx12 Data Type Short Short Short Short Short Short Short Short Short Short Description Axis id of the Remote Axis to be configured Velocity units for the axis Number of position units per Number of motor revolutions Axis id of the SERCOS Axis with secondary feedback basis SERCOS identification number of secondary feedback devicedefault is 53 Pointer to register of axis configuration block Error code generated by configuration block Current operating state number Current state entry count
144
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CFGS 31007523 8/2010
CFGS Configure SERCOS Axis
26
Introduction This chapter describes the CFGS instruction. What's in this Chapter? This chapter contains the following topics:
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CFGS
Short Description
Function Description The CFGS function block configures a Sercos Axis. Each motion axis object has a set of motion parameters that must be configured before the motion axis object may be used. The configure function provides the default value for these parameters. The default values are placed into a block of holding registers in a specified order. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for more detailed information on using motion loadables.
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CFGS
Representation
Symbol The following diagram shows a representation of the CFGS instruction.
Parameters Description The following table describes the instructions parameters.

Top node
4x
INT, UINT
Middle node
4x
INT, UINT INT
Bottom node
4x
Top output
0x
None
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CFGS
Parameters Middle output Bottom output
Data Type None None

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx4 4xxxx6 4xxxx8 4xxx10 4xxx12 4xxx14 4xxx16 4xxx17 4xxx18 4xxx19
1
Data Type Short Unsigned Float Float Float Float Float Float Float Register Block Short Short Short
Description Axis id for SERCOS Axis to be configured Velocity units for the axis Numerator of the gear ratio Denominator of the gear ratio1 Positive position limit (optional) Negative position limit (optional) Velocity limit (optional) Default acceleration (optional) Default deceleration (optional) Pointer to register of axis configuration block Error code generated by configuration block Current operating state number Current state entry count
The units associated with this value are revolutions of the feedback device. Typically the feedback device is directly coupled to the shaft of the motor, and, therefore, this parameter specifies the number of motor revolutions required to produce the physical travel specified by the numerator.
148
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CHS: Configure Hot Standby 31007523 8/2010
CHS: Configure Hot Standby
27
Introduction This chapter describes the instruction CHS. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see "Installation of DX Loadables, page 75." The logic in the CHS loadable is the engine that drives the Hot Standby capability in a Quantum PLC system. Unlike the HSBY instruction, the use of the CHS instruction in the ladder logic program is optional. However, the loadable software itself must be installed in the Quantum PLC in order for a Hot Standby system to be implemented.
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Representation

Parameters Top input Middle input Bottom input State RAM Reference 0x, 1x 0x, 1x 0x, 1x Data Type None None None Meaning
command register (top node)
4x
4x nontransfer area (middle node) length (bottom node) Top output 0x Middle output 0x Bottom output 0x
Execute Hot Standby (unconditionally) ON = Enable command register ON = Enable non transfer area OFF = non transfer area will not be used and the Hot Standby status register will not exist Hot Standby command register INT, UINT, (For expanded and detailed information please see WORD Parameter Description Command Register (Top Node), page 153).) First register in the nontransfer area of state RAM INT, UINT, (For expanded and detailed information please see WORD Parameter Description Nontransfer Area (Middle Node), page 154.) INT, Number of registers of the Hot Standby nontransfer UINT area in state RAM; range 4 ... 8000 None Echoes the state of the top input None ON = System detects interface error None ON = System configuration set by configuration extension 151
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Hot Standby System Configuration via the CHS Instruction Program the CHS instruction in network 1, segment 1 of your ladder logic program and unconditionally connect the top input to the power rail via a horizontal short (as the HSBY instruction is programmed in a 984 Hot Standby system). This method is particularly useful if you are porting Hot Standby code from a 984 application to a Quantum application. The structure of the CHS instruction is almost exactly the same as the HSBY instruction. You simply remove the HSBY instruction from the 984LL and replace it with a CHS instruction in the Quantum logic. If you are using the CHS instruction in ladder logic, the only difference between it and the HSBY instruction is the use of the bottom output. This output senses whether or not method 2 has been used. If the Hot Standby configuration extension screens have been used to define the Hot Standby configuration, the configuration parameters in the screens will override any different parameters defined by the CHS instruction at system startup. For a detailed discussion of the issues related to the configuration extension capabilities of a Quantum Hot Standby system, refer to the Modicon Quantum Hot Standby System Planning and Installation Guide. Parameter Description Execute Hot Standby (Top Input)
WARNING
ERRATIC BEHAVIOR IN THE HOT STANDBY SYSTEM Do not enable or disable the non-transfer area while the Hot Standby system is running. Although it is legal to do so, we strongly discourage this practice because it can lead to erratic behavior in the Hot Standby system. Failure to follow these instructions can result in death, serious injury, or equipment damage. When the CHS instruction is inserted in ladder logic to control the Hot Standby configuration parameters, its top input must be connected directly to the power rail by a horizontal short. No control logic, such as contacts, should be placed between the rail and the input to the top node.
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Parameter Description Command Register (Top Node) The 4x register entered in the top node is the Hot Standby command register; 8 bits in this register are used to configure and control Hot Standby system parameters: Usage of command word:
Bit 1-5 6 7 8 9 - 11 12 13 14 15 16
Function Not used 0 = swap Modbus port 3 address during switchover 1 = no swap 0 = swap Modbus port 2 address during switchover 1 = no swap 0 = swap Modbus port 1 address during switchover 1 = no swap Not used 0 = allow exec upgrade only after application stops 1 = allow the upgrade without stopping the application 0 = force standby offline if there is a logic mismatch 1 = do not force 0 = controller B is in OFFLINE mode 1 = controller B is in RUN 0 = controller A is in OFFLINE mode 1 = controller A is in RUN 0 = disable keyswitch override 1 = enable the override
NOTE: The Hot Standby command register must be outside of the nontransfer area of state RAM.
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Parameter Description Nontransfer Area (Middle Node) The 4x register entered in the middle node is the first register in the non-transfer area of state RAM. The non-transfer area must contain at least 4 registers, the first 3 of which have a predefined usage:
Register Displayed and first implied Second implied Content Reverse transfer registers for passing information from the standby to the primary PLC CHS status register
The content of the remaining registers is application-specific; the length is defined in the parameter length (bottom node). The 4x registers in the non-transfer area are never transferred from the primary to the standby PLC during the logic scans. One reason for scheduling additional registers in the non-transfer area is to reduce the impact of state RAM transfer on the total system scan time. CHS Status Register Usage of status word:
Bit 1 2 3 - 10 11 12 13 - 14
Function 1 = the top output is ON (indicating Hot Standby system is active) 1 = the middle output is ON (indicating an error condition) Not used 0 = PLC switch is set to A 1 = PLC switch is set to B 0 = PLC logic is matched 1 = there is a logic mismatch The 2 bit value is: 0 1 if the other PLC is in OFFLINE mode 1 0 if other PLC is running in primary mode 1 1 if other PLC is running in standby mode The 2 bit value is: 0 1 if this PLC is in OFFLINE mode 1 0 if this PLC is running in primary mode 1 1 if this PLC is running in standby mode
15 - 16
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CKSM: Check Sum 31007523 8/2010
CKSM: Check Sum
28
Introduction This chapter describes the instruction CKSM. What's in this Chapter? This chapter contains the following topics:
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CKSM: Check Sum
Short Description
Function Description Several PLCs that do not support Modbus Plus come with a standard checksum (CKSM) instruction. CKSM has the same opcode as the MSTR instruction and is not provided in executive firmware for PLCs that support Modbus Plus.
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CKSM: Check Sum
Representation

Parameters Top input State RAM Data Reference Type 0x, 1x None Meaning Initiates checksum calculation of source table (For expanded and detailed information please see Parameter Description: Inputs, page 158.) CKSM select 1 (For expanded and detailed information please see Parameter Description: Inputs, page 158.) CKSM select 2 (For expanded and detailed information please see Parameter Description: Inputs, page 158.) First holding register in the source table. The checksum calculation is performed on the registers in this table. First of two contiguous registers (For expanded and detailed information please see Result / Count (Middle Node), page 158.) Number of 4x registers in the source table; range: 1 ... 255 ON = Checksum calculation successful ON = implied register count > length or implied register count =0 157
Middle input
0x,1x
None
Bottom input
0x, 1x
None
source (top node)
4x
INT, UINT INT, UINT INT
result/count 4x (middle node) length (bottom node) Top output Middle output 0x 0x
None None
31007523 8/2010
CKSM: Check Sum
Inputs The states of the inputs indicate the type of checksum calculation to be performed:
CKSM Calculation Straight Check Binary Addition Check CRC-16 LRC Top Input ON ON ON ON Middle Input OFF ON ON OFF Bottom Input ON ON OFF OFF
Result / Count (Middle Node) The 4x register entered in the middle node is the first of two contiguous 4x registers:
Register Displayed First implied Content Stores the result of the checksum calculation Posts a value that specifies the number of registers selected from the source table as input to the calculation. The value posted in the implied register must be length of source table.
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CMPR: Compare Register 31007523 8/2010
CMPR: Compare Register
29
Introduction This chapter describes the instruction CMPR. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The CMPR instruction compares the bit pattern in matrix a against the bit pattern in matrix b for miscompares. In a single scan, the two matrices are compared bit position by bit position until a miscompare is found or the end of the matrices is reached (without miscompares).
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Representation

Parameters Top input Middle input matrix a (top node) pointer register (middle node) length (bottom node) Top output Middle output Bottom output 0x 0x 0x State RAM Reference 0x, 1x 0x, 1x 0x, 1x, 3x, 4x 4x Data Type None None ANY_BIT WORD Meaning ON = initiates compare operation OFF = restart at last miscompare ON = restart at the beginning First reference in matrix a, one of the two matrices to be compared Pointer to matrix b: the first register in matrix b is the next contiguous 4x register following the pointer register Matrix length; range: 1 ... 100 Echoes state of the top input ON = miscompare detected ON = miscompared bit in matrix a is 1 OFF = miscompared bit in matrix a is 0
INT, UINT None None None
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Pointer Register (Middle Node) The pointer register entered in the middle node must be a 4x holding register. It is the pointer to matrix b, the other matrix to be compared. The first register in matrix b is the next contiguous 4x register following the pointer register. The value stored inside the pointer register increments with each bit position in the two matrices that is being compared. As bit position 1 in matrix a and matrix b is compared, the pointer register contains a value of 1; as bit position 2 in the matrices are compared, the pointer value increments to 2; etc. When the outputs signal a miscompare, you can check the accumulated count in the pointer register to determine the bit position in the matrices of the miscompare. Matrix Length (Bottom Node) The integer value entered in the bottom node specifies a length of the two matrices, i.e. the number of registers or 16-bit words in each matrix. (Matrix a and matrix b have the same length.) The matrix length can range from 1 ... 100, i.e. a length of 2 indicates that matrix a and matrix b contain 32 bits.
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Coils 31007523 8/2010
Coils
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Introduction This chapter describes the instruction element Coils. What's in this Chapter? This chapter contains the following topics:
Topic Short Description General Usage Guidelines Page 164 165
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Coils
Short Description
Function Description A coil is a discrete output that is turned ON and OFF by power flow in the logic program. A single coil is tied to a 0xxxx reference in the PLCs state RAM. Because output values are updated in state RAM by the PLC, a coil may be used internally in the logic program or externally via the I/O map to a discrete output unit in the control system. When a coil is ON, it either passes power to a discrete output circuit or changes the state of an internal relay contact in state RAM. Coil Types There are two types of coils: Normal coil -( )A normal or non-retentive or normal coil looses state when power to controller is lost. When power is removed from a PLC, a normal coil will be turned OFF. Once power is restored, the coil will always be in the OFF state on the first logic scan. Memory-retentive or latched coil -(M)- or -(L)A memory-retentive or latched coil does NOT loose state when power to controller is lost. If a memory-retentive (or latched) coil is ON at the time a PLC loses power, the coil will come back up in an ON state when power is restored. The coil will maintain that ON state for the first logic scan, and then the logic program will take control. Coils are referenced as 0xxxx. They may be disabled and forced ON or OFF. Disabling a coil stops the user programmed logic from changing the state of the coil. NOTE: Disabled Coils used as destinations in DX function blocks may have their state overwritten by the function.
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Coils
General Usage Guidelines

Overview Once a 0x reference number has been assigned to a coil, it cannot be assigned to any other coils in the logic program. An 0x reference number can be referenced to any number of relay contacts, which can then be controlled via the state of the coil with same reference number. Most panel software packages have a feature called tracing with which you can locate the positions in ladder logic of the contacts controlled by a coil. Refer to your software user manual for more details. Enable/Disable Capabilities for Discrete Values Via panel software, you may disable a logic coil or a discrete input in your logic program. A disable condition will cause the following: Input field device to have no control over its assigned 1x logic Logic to have no control over the disable 9x value Memory protection in the PLC must be OFF before you disable or enable a coil or a discrete input. NOTE: There is an important exception that you need to be aware of when disabling coils: Data transfer functions allow coils in their destination nodes to recognize the current ON/OFF state of ALL coils, whether those coils are disabled or not, and this recognition causes the logic to respond accordinglymaybe producing unexpected and undesirable effects. If you are expecting a disabled coil to remain disabled in the DX function, your application may experience unexpected and undesirable effects. Forcing Discretes ON and OFF Most panel software also provides FORCE ON and FORCE OFF capabilities. When a coil or discrete input is disabled, you can change its state from OFF to ON with FORCE ON, and from ON to OFF with FORCE OFF. When a coil or discrete input is enabled, it cannot be forced ON or OFF.
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Coils
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COMM - ASCII Communications Function 31007523 8/2010
COMM ASCII Communications Function
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Introduction This chapter describes the COMM instruction. What's in this Chapter? This chapter contains the following topics:
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COMM - ASCII Communications Function
Short Description
Function Description The ASCII Communications Function (COMM) block is used to transmit/receive ASCII data (in the form of a single ASCII character, 1 to 4 integers or 1 to 4 hexadecimal numbers) to or from the simple ASCII port. The COMM instruction gives you the ability to read and write canned messages to/from ASCII character input/output devices via one of the built-in communication ports on a Micro PLC or, if the PLC is a parent, via a comm port on one of the child PLCs on the expansion link. NOTE: Available only on the Micro 311, 411, 512, and 612 controllers.
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Representation

Parameters Top input Bottom input control block (top node) State RAM Reference 0x, 1x 0x, 1x 4x Data Type None None INT, UINT Meaning ON starts the COMM operation ON aborts the operation and sets the middle out. The 4xxxx register entered in the top node is the first of 10 contiguous holding registers in the control block. (For the register usage please see the Register Usage Table below. The middle node contains the first 4xxxx register of the data block - a table where variable message data is placed. In a read operation, the data block is a destination table. In a write operation the data block is a source table. The integer value entered in the bottom node specifies the length, which is the number of registers in the data block. The length can range from 3 through 255. 169
data block (middle node)
4x
INT, UINT
length (bottom node)
INT, UINT
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Parameters (Top output) Middle output Bottom output
State RAM Reference 0x 0x 0x
Data Type None None None
Meaning Echoes the state of the top input. ON = error detected (for one scan). ON = operation complete (for one scan).
Register Usage Table This table details the register usage for the top node.
Register 4xxxx + 0 4xxxx + 1 4xxxx + 2 4xxxx + 3 4xxxx + 4 4xxxx + 5 4xxxx + 6 4xxxx + 7 4xxxx + 8 4xxxx + 9 Usage Operation Code Error Status Number of data fields provided/expected Number of data fields processed Reserved Port Number (1 for local, 2 for child #1, 3 for child #2, etc. Reserved Reserved Reserved Active Status Timer
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COMP: Complement a Matrix 31007523 8/2010
COMP: Complement a Matrix
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Introduction This chapter describes the instruction COMP. What's in this Chapter? This chapter contains the following topics:
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Short Description
WARNING
DISABLED COILS Before using the COMP instruction, check for disabled coils. COMP will override any disabled coils in the destination matrix without enabling them. This can cause injury if a coil has been disabled for repair or maintenance because the coils state can be changed by the COMP operation. Failure to follow these instructions can result in death, serious injury, or equipment damage. The COMP instruction complements the bit pattern, i.e. changes all 0s to 1s and all 1s to 0s, of a source matrix, then copies the complemented bit pattern into a destination matrix. The entire COMP operation is accomplished in one scan.
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Representation

Parameters Top input source (top node) destination (middle node) length (bottom node) Top output 0x State RAM Reference 0x, 1x 0x, 1x, 3x, 4x Data Type None ANY_BIT Meaning ON = initiates the complement operation First reference in the source matrix, which contains the original bit pattern before the complement operation First reference in the destination matrix where the complemented bit pattern will be posted Matrix length; range: 1 ... 100. Echoes state of the top input
0x, 4x
ANY_BIT
INT, UINT None
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A COMP Example When contact 10001 passes power, the bit pattern in the source matrix (registers 40600 and 40601) is complemented, then the complemented bit pattern is posted in the destination matrix (registers 40602 and 40603). The original bit pattern is maintained in the source matrix.
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Matrix Length (Bottom Node) The integer value entered in the bottom node specifies a matrix length, i.e. the number of registers or 16-bit words in the matrices. Matrix length can range from 1 ... 100. A length of 2 indicates that 32 bits in each matrix will be complemented.
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Contacts 31007523 8/2010
Contacts
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Introduction This chapter describes the instruction element Contacts. What's in this Chapter? This chapter contains the following topics:
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Contacts
Short Description
Function Description Contacts are used to pass or inhibit power flow in a ladder logic program.
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Contacts
Representation
Function Description They are discrete, which means each consumes one I/O point in ladder logic. A single contact can be tied to a 0x or 1x reference number in the PLCs state RAM, in which case each contact consumes one node in a ladder network. Four kinds of contacts are available: normally open (N.O.) contacts normally closed (N.C.) contacts positive transitional (P.T.) contacts negative transitional (N.T.) contacts Referencing Normally Open/Normally Closed Contacts Normally open -| |- and normally closed -|\|- contacts may be referenced by inputs (1xxxx) or coils (0xxxx).
Field Device state vs. Programmed Contact Flow Field Device -| |Programmed Contact -| |-|\|-|\|-| |Passes Power Field Contact Closed Passes Power Passes Power Passes Power Field Contact Open
Referencing Transitional Contacts Transitional contacts positive -| |- and negative -| |- contacts may be referenced by inputs (1xxxx) or coils (0xxxx).
State Table Transition -||-||Off to On On to Off Power Flow at Transition On Off 1 Scan Power Flow Pulse
NOTE: A transitional contact will pass power continuously if the referenced coil is skipped by a SKP instruction or by the segment scheduler. A transitional contact may not pass power if it is referenced to an input that has been scheduled to read from the I/O drop more than once per scan via the segment scheduler.
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Contacts
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CONV - Convert Data 31007523 8/2010
CONV - Convert Data
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Introduction This chapter describes the instruction CONV. What's in this Chapter? This chapter contains the following topics:
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CONV - Convert Data
Short Description
Function Description The Convert block is a 484-replacement instruction, and it is one of four replacement instructions. The CONV block is used to convert: discrete data to a holding register holding-register data to discrete data The conversion can be either: binary to binary BCD to binary (discrete to register) binary to BCD (register to discrete) This block uses 12 bits in 12 bits out, but if the conversion is straight binary to binary, bits 11 and 12 are forced off. In converting discretes to a holding register, the source is specified as a constant which implies a 1xxxx and the destination is specified as a constant which implies a 4xxxx (for example, 00049 implies 40049). In converting a register to output discretes, the source is specified as a holding register (4xxxx) and the destination is specified as a constant which implies a 0xxxx. For example 00032 implies 12 coils with 00032. NOTE: Take precaution when converting register data to discretes as coils may inadvertently be activated. NOTE: Available only on the 984-351 and 984-455 PLCs.
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CONV - Convert Data
Representation

Parameters Top input Bottom input source (top node) register (bottom node) Top output State RAM Reference 0x, 1x 0x, 1x 4x 3x 0x Data Type None None INT, UINT INT, UINT None Operation successful Meaning ON initiates specified operation ON = Binary OFF = BCD Converts content of register
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CONV - Convert Data
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CTIF - Counter, Timer, and Interrupt Function 31007523 8/2010
CTIF - Counter, Timer, and Interrupt Function
35
Introduction This chapter describes the CTIF instruction. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The CTIF block is used by a parent PLC to access child functions over an I/O expansion bus. The parent function block will complete in the same scan. If multiple blocks exist, the last one executed will be used. The CTIF instruction is used with the Micro PLCs to set up the inputs for hard-wired interrupt and/or hard-wired counter/timer operations. This instruction always starts and finishes in the same scan. The CTIF instruction is a configuration/operation tool for Modicon Micro PLCs that contain hardware interrupts (all models except the 110CPU311 models). The actual counter/timer and interrupts are in the PLC hardware, and the CTIF instruction is used to set up this hardware. NOTE: The counter, timer, interrupt function (CTIF) is only available on Micro 311, 411, 512, and 612 controllers.
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Representation

Parameters Top input register # (top node) State RAM Reference 0x, 1x 4x Data Type None INT Meaning ON initiates specified operation The 4xxxx register entered in the top node is the first of four contiguous holding registers in the CTIF parameter block. (For expanded and detailed information about the four registers please see the section named Parameter Description, page 188.) The integer value entered in the bottom node indicates the drop number where the operation will be performed. The drop number is in the range of 1 through 5. Echoes state of the top input Error
drop number (bottom node)
INT
Top output Bottom output
0x 0x
None None
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Overview The top node holds four contiguous registers, 4x through 4x+3. This topic describes how those registers are used and configured in the top node. First Register (4x) Usage The first register, 4x, gives you information either about the type of error generated or about the type of operation being performed. When you configure the register you need to consider both how the bits will be used, Bit Usage, and the results of ON/OFF Combinations. Here is a graphic demonstrating the Bit Usage for the first register (4x),
and the following table describes the Bit Usage for the first register (4x).
Bit 1-4 5-8 9 - 14 15 16 Usage Reserved Error/Operation type messages Reserved Set Mode Get Mode
The following table describes the ON/OFF Combinations for bits 5 through 8 and the error/operation type message generated by the first register (4x).
Bit 5 0 0 0 0 0 0 0 0 1 1 1 6 0 0 0 0 1 1 1 1 0 0 0 7 0 0 1 1 0 0 1 1 0 0 1 8 0 1 0 1 0 1 0 1 0 1 0 Description No error detected Unsupported operation type specified Interrupt 2 not supported in this model Interrupt 3 not supported while counter is selected Counter value of 0 specified Counter value too big (counter value > 16,383) Operation type supported only on local drop Specified drop not in I/O map No subroutine for enabled interrupt Remote drop is unhealthy Function not supported remotely
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The following table describes Bit Usage and the ON/OFF Combinations for bits 15 and 16 of the first register (4x).
Bit 15 0 0 16 0 1 Description Set Mode Get Mode
Second Register (4x+1) Usage The second register, 4x+1, allows you to control the set-up for the Set Mode operation. When you configure the register you need to consider both how the bits will be used, Bit Usage, and the results of the ON/OFF Combinations. Here is a graphic demonstrating the Bit Usage for the second register (4x+1).
The following tables describe both Bit Usage and the ON/OFF Combinations for bits 1 through 16 of the second register (4x+1). The following table describes Bit Usage and ON/OFF Combinations for bits 1 and 2 of the second register (4x+1).
Bit 1 Usage Terminal-count loading 0 - Disable 1 - Enable Reserved
The following table describes Bit Usage and ON/OFF Combinations for bits 3 and 4 of the second register (4x+1).
Bit 3 0 1 4 1 0 Description Disable interrupt service for Interrupt 3 Enable interrupt service for Interrupt 3
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Bit 9 0 1 10 1 0 Description Disable interrupt service for timer/counter interrupt Enable interrupt service for timer/counter interrupt
Bit 11 0 1 12 1 0 Description Disable auto-restart operation Enable auto-restart operation
Bit 13 0 1 14 1 0 Description Stop counter/timer operation Start counter/timer operation
Bit 15 0 1 16 1 0 Description Counter Mode Timer Mode
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Third Register (4x+2) Usage The third register, 4x+2, gives you the status for the Get Mode operation. When you configure the register you need to consider both how the bits will be used, Bit Usage, and the results of the ON/OFF Combinations. Here is a graphic demonstrating the Bit Usage for the third register (4x+2).
The following table describes Bit Usage and ON/OFF Combinations for bits 1 through 16 for the third register (4x+2).
Bit 1 2 3 4 5-9 10 Usage No subroutine for Interrupt 3 No subroutine for Interrupt 2 No subroutine for Interrupt 1 No subroutine for timer/counter interrupt Reserved Interrupt 3 0 - Disabled 1 - Enabled Interrupt 2 0 - Disabled 1 - Enabled Interrupt 1 0 - Disabled 1 - Enabled Interrupt serve for time/counter input 0 - Disabled 1 - Enabled Auto restart operation 0 - Disabled 1 - Enabled Counter/timer operation 0 - Stopped 1 - Started 0 - Counter Mode 1 - Timer Mode
11
12
13
14
15
16
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Fourth Register (4x+3) Usage The fourth register marks the current count value of the timer/counter interrupt. The count value can be set either by the instruction block (set automatically) or by the user. Get Mode Instruction block sets the current count. Set Mode User sets the counter/timer.
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DCTR: Down Counter 31007523 8/2010
DCTR: Down Counter
36
Introduction This chapter describes the instruction DCTR. What's in this Chapter? This chapter contains the following topics:
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DCTR: Down Counter
Short Description
Function Description The DCTR instruction counts control input transitions from OFF to ON down from a counter preset value to zero.
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DCTR: Down Counter
Representation
*Available on the following: E685/785 PLCs L785 PLCs Quantum Series PLCs Parameter Description Description of the instructions parameters
Parameters Top input Bottom input counter preset (top node) State RAM Reference 0x, 1x 0x, 1x 3x, 4x Data Type None None INT, UINT Meaning OFF ON = initiates the counter operation OFF = accumulated count is reset to preset value ON = counter accumulating Preset value, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register Preset Value: Max. 999 - 16-bit PLC Max. 9999 - 24-bit PLC Max. 65535 - *PLC Count value (actual value); which decrements by one on each transition from OFF to ON of the top input until it reaches zero. ON = accumulated count = 0 ON = accumulated count > 0
accumulated count (bottom node) Top output Bottom output
4x
INT, UINT None None
0x 0x
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DCTR: Down Counter
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DIOH: Distributed I/O Health 31007523 8/2010
DIOH: Distributed I/O Health
37
Introduction This chapter describes the instruction DIOH. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The DIOH instruction lets you retrieve health data from a specified group of drops on the distributed I/O network. It accesses the DIO health status table, where health data for modules in up to 189 distributed drops is stored.
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Representation

Parameters Top input source (top node) State RAM Data Reference Type 0x, 1x None INT, UINT Meaning ON = initiates the retrieval of the specified status words from the DIO health table into the destination table The source value entered in the top node is a four-digit constant in the form xxyy, where: xx is a decimal value in the range 00 ... 16, indicating the slot number in which the relevant DIO processor resides. The value 00 can always be used to indicate the Modbus Plus ports on the PLC, regardless of the slot in which it resides. yy is a decimal value in the range 1 ... 64, indicating the drop number on the appropriate token ring. For example, if you are interested in retrieving drop status starting at distributed drop #1 on a network being handled by a DIO processor in slot 3, enter 0301 in the top node. First holding register in the destination table, i.e. in a block of contiguous registers where the retrieved health status information is stored
destination (middle node) length (bottom node) Top output Bottom output
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4x
0x 0x
INT, UINT, WORD INT, Length of the destination table, range 1 ... 64 UINT None Echoes the state of the top input None ON = invalid source entry
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Source Value (Top Node) The source value entered in the top node is a four-digit constant in the form xxyy, where:
Digits xx Meaning Decimal value in the range 00 ... 16, indicating the slot number in which the relevant DIO processor resides. The value 00 can always be used to indicate the Modbus Plus ports on the PLC, regardless of the slot in which it resides. Decimal value in the range 1 ... 64, indicating the drop number on the appropriate token ring
yy
For example, if you are interested in retrieving drop status starting at distributed drop #1 on a network being handled by a DIO processor in slot 3, enter 0301 in the top node. Length of Destination Table (Bottom Node) The integer value entered in the bottom node specifies the length, i.e. the number of 4x registers, in the destination table. The length is in the range 1 ... 64. NOTE: If you specify a length that excedes the number of drops available, the instruction will return status information only for the drops available. For example, if you specify the 63rd drop number (yy) in the top node register and then request a length of 5, the instruction will give you only two registers (the 63rd and 64th drop status words) in the destination table.
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DISA - Disabled Discrete Monitor 31007523 8/2010
DISA - Disabled Discrete Monitor
38
Introduction This chapter describes the instruction DISA. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The Disabled Discrete Monitor (DISA) is a loadable function, an instruction that monitors disabled coils and inputs. Therefore, DISA monitors the disabled states of all 0xxxx and 1xxxx addresses.
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Representation
NOTE: The NSUP loadable must be loaded prior to loading the DISA loadable. Parameter Description Description of the instructions parameters
Parameters Top input coils (top node) inputs (middle node) State RAM Reference 0x, 1x 4x 4x+# 4y 4y+# length (bottom node) Top output Middle output Bottom output 0x 0x 0x Data Type None Meaning Disabled coils table
INT, UINT Number of disabled coils found (even if > NNN) INT, UINT Address of # disabled coil found INT, UINT Number of disabled input discretes found (even if > NNN) INT, UINT Address of # disabled discrete found INT, UINT Passes power when top input receives power None None None ON if disabled coils are found ON if disabled inputs are found Echoes state of top input
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DIV: Divide 31007523 8/2010
DIV: Divide
39
Introduction This chapter describes the instruction DIV. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Example Page 206 207 209
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DIV: Divide
Short Description
Function Description The DIV instruction divides unsigned value 1 (its top node) by unsigned value 2 (its middle node) and posts the quotient and remainder in two contiguous holding registers in the bottom node.
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DIV: Divide
Representation
*Available on the following: E685/785 PLCs L785 PLCs Quantum Series PLCs
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DIV: Divide

Parameters Top input Middle input value 1 (top node) State RAM Reference 0x, 1x 0x, 1x 3x, 4x Data Type None None INT, UINT Meaning ON = value 1 divided by value 2 ON = decimal remainder OFF = fraction remainder Dividend, can be displayed explicitly as an integer (range 1 ... 9999)* or stored in two contiguous registers (displayed for highorder half, implied for low-order half) *Max. 999 - 16 bit Max. 9999 - 24 bit Max. 65535 - *PLC (See availability list above.) Divisor, can be displayed explicitly as an integer (range 1 ... 9999) or stored in a register *Max. 999 - 16 bit Max. 9999 - 24 bit Max. 65535 - *PLC (See availability list above.) First of two contiguous holding registers: displayed: result of division implied: remainder (either a decimal or a fraction, depending on the state of middle input) ON = division successful ON = overflow: if result > 9999*, a 0 value is returned *Max. 999 - 16 bit Max. 9999 - 24 bit Max. 65535 - *PLC (See availability list above.) ON = value 2 = 0
3x, 4x
INT, UINT
result /remainder (bottom node)
4x
INT, UINT
0x 0x
None None
Bottom output
0x
None
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DIV: Divide
Example
Quotient of Instruction DIV The state of the middle input indicates whether the remainder will be expressed as a decimal or as a fraction. For example, if value 1 = 8 and value 2 = 3, the decimal remainder (middle input ON) is 6666; the fractional remainder (middle input OFF) is 2.
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DIV: Divide
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DLOG: Data Logging for PCMCIA Read/Write Support 31007523 8/2010
DLOG: Data Logging for PCMCIA Read/Write Support
40
Introduction This chapter describes the instruction DLOG. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Run Time Error Handling Page 212 213 214 216
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Short Description
Function Description NOTE: This instruction is only available with the PLC family TSX Compact. PCMCIA read and write support consists of a configuration extension to be implemented using a DLOG instruction. The DLOG instruction provides the facility for an application to copy data to a PCMCIA flash card, copy data from a PCMCIA flash card, erase individual memory blocks on a PCMCIA flash card, and to erase an entire PCMCIA flash card. The data format and the frequency of data storage are controlled by the application. NOTE: The DLOG instruction will only operate with PCMCIA linear flash cards that use AMD flash devices.
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Representation

Parameters Top input State RAM Data Meaning Reference Type 0x, 1x None ON = DLOG operation enabled, it should remain ON until the operation has completed successfully or an error has occurred. 0x, 1x None ON = stops the currently active operation 4x INT, First of five contiguous registers in the DLOG control UINT block (For expanded and detailed information please see Control Block (Top Node), page 214.) 4x INT, First 4x register in a data area used for the source or UINT destination of the specified operation (For expanded and detailed information please see Data Area (Middle Node), page 215.) INT, Maximum number of registers reserved for the data UINT area, range: 0 ... 100. 0x None Echoes state of the top input 0x None ON = error during DLOG operation (operation terminated unsuccessfully) 0x None ON = DLOG operation finishes successfully (operation successful) 213
Middle input control block (top node)
data area (middle node)
length (bottom node) Top output Middle output Bottom output
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Control Block (Top Node) The 4x register entered in the top node is the first of five contiguous registers in the DLOG control block. The control block defines the function of the DLOG command, the PCMCIA flash card window and offset, a return status word, and a data word count value.
Register Displayed First implied Function Error Status Operation Type Content Displays DLOG errors in HEX values 1 = Write to PCMCIA Card 2 = Read to PCMCIA Card 3 = Erase One Block 4 = Erase Entire Card Content This register identifies a particular block (PCMCIA memory window) located on the PCMCIA card (1 block=128k bytes) The number of blocks are dependent on the memory size of the PCMCIA card. (e.g.. 0 ... 31 Max. for a 4Meg PCMCIA card). Particular range of bytes located within a particular block on the PCMCIA card. Range: 1 ... 128k bytes Number of 4x registers to be written or read to the PCMCIA card. Range: 0 ... 100.
Second implied
Window (Block Identifier)
Third implied
Offset (Byte Address within the Block)
Fourth implied Count
NOTE: PCMCIA Flash Card address are address on a Window:Offset basis. Windows have a set size of 128k bytes (65 535 words (16-bit values)). No Write or Read operation can cross the boundary from one window to the next. Therefore, offset (third implied register) plus length (fourth implied register) must always be less or equal to 128k bytes (65 535 words).
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Data Area (Middle Node) The 4x register entered in the middle node is the first register in a contiguous block of 4x word registers, that the DLOG instruction will use for the source or destination of the operation specified in the top nodes control block.
Operation Write Read Erase Block Erase Card State Ram Reference 4x 4x none none Function Source Address Destination Address None None
Length (Bottom Node) The integer value entered in the bottom node is the length of the data area, i.e., the maximum number of words (registers) allowed in a transfer to/from the PCMCIA flash card. The length can range from 0 ... 100.
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Run Time Error Handling

Error Codes The displayed register of the control block contains the following DLOG errors in Hex-code.
Error Code in Hex 1 2 3 Content The count parameter of the control block > the DLOG block length during a WRITE operation (01) PCMCIA card operation failed when intially started (write/read/erase) PCMCIA card operation failed during execution (write/read/erase)
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DMTH - Double Precision Math 31007523 8/2010
DMTH - Double Precision Math
41
Introduction This chapter describes the four double precision math operations executed by the instruction DMTH. The four operations are addition, subtraction, multiplication, and division. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The Double Precision Math (DMTH) instruction performs double precision addition, subtraction, multiplication, or division (set by bottom node). DMTH uses 2 registers appended together to form one operand. Each DMTH instruction operates on the same two operands. OP1 = 4x, 4x + 1 (top node) OP2 = 4y, 4y + 1 (middle node) Function Codes The DMTH instruction performs any one of four possible double precision math operations. DMTH performs the operation by calling a function. To call the desired function enter a function code in the bottom node. Function codes range from 1 ... 4.
Code 1 2 3 DMTH Function Double Precision Addition Double Precision Subtraction Double Precision Multiplication Double Precision Division Function Performed Add (OP1) + (OP 2) Subtract (OP1) - (OP 2) Multiply (OP1) * (OP 2) Result Registers (4y + 3, 4y + 4) (4y + 2, 4y + 3) (4y + 2, 4y + 3) (4y + 4, 4y + 5) Divide (OP1)\(OP 2) (4y + 2, 4y + 3) quotient (4y + 4, 4y + 5) remainder
Notes: For numbers spread over more than one register, the least significant 4 digits are stored in the highest holding register. Results, flags, and remainders are stored in the registers following OP2. Registers not used by the chosen math function may be used for other purposes. The Subtract Function uses the outputs to indicate the result of comparison between Operands OP1 and OP2.
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Overview This topic describes the addition, subtraction, multiplication, and division operations, which are the four operations performed by the instruction DMTH. Each operations has a symbol, which is a graphical representation of the instruction, and a parameter description, which is a table-format representation of the instruction. Symbol -Addition Representation of the instruction for the addition operation
Parameter Description - Addition Description of the instructions parameters for the addition operation
Parameters Top input operand 1 (top node) State RAM Reference 0x, 1x 4x Data Type None INT, UINT Meaning ON adds operands and posts sum in designated registers. The first of two contiguous 4xxxx registers is entered in the top node. The second 4xxxx register is implied. Operand 1 is stored here. Each register holds a value in the range 0000 through 9999, for a combined double precision value in the range 0 through 99,999,999. The high-order half of operand 1 is stored in the displayed register, and the loworder half is stored in the implied register.
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Parameters operand 2 and sum (middle node)
Data Type INT, UINT
Meaning The first of six contiguous 4x registers is entered in the middle node. The remaining five registers are implied: The displayed register and the first implied register store the high-order and low-order halves of operand 2, respectively, for a combined double precision value in the range 0 through 99,999,999 The value stored in the second implied register indicates whether an overflow condition exists (a value of 1 = overflow) The third and fourth implied registers store the high-order and low-order halves of the double precision sum, respectively The fifth implied register is not used in the calculation but must exist in state RAM ON = operation successful On = operand out of range or invalid
0x 0x
None None
Symbol - Subtraction Representation of the instruction for the subtraction operation
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Parameter Description - Subtraction Description of the instructions parameters for the subtraction operation
Parameters Top input operand 1 (top node) State RAM Data Meaning Reference Type 0x, 1x 4x None ON subtracts operand 2 from operand 1 and posts difference in designated registers. INT, The first of two contiguous 4xxxx registers is entered in the top node. The UINT second 4xxxx register is implied. Operand 1 is stored here. Each register holds a value in the range 0000 through 9999, for a combined double precision value in the range 0 through 99,999,999. The high-order half of operand 1 is stored in the displayed register, and the low-order half is stored in the implied register. INT, The first of six contiguous 4xxxx registers is entered in the middle node. UINT The remaining five registers are implied: The displayed register and the first implied register store the high-order and low-order halves of operand 2, respectively, for a combined double precision value in the range 0 through 99,999,999 The value stored in the second implied register indicates whether an overflow condition exists (a value of 1 = overflow) The third and fourth implied registers store the high-order and low-order halves of the double precision sum, respectively The fifth implied register is not used in the calculation but must exist in state RAM None ON = operand 1 > operand 2 None ON = operand 1 = operand 2 None ON = operand 1 < operand 2
4x operand 2 difference (middle node)
0x 0x
Bottom output 0x
Symbol - Multiplication Representation of the instruction for the multiplication operation
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Parameter Description - Multiplication Description of the instructions parameters for the multiplication operation
Parameters Top input operand 1 (top node) State RAM Data Reference Type 0x, 1x 4x None INT, UINT Meaning ON = operand 1 x operand 2 and product posted in designated registers. The first of two contiguous 4xxxx registers is entered in the top node. The second 4xxxx register is implied. Operand 1 is stored here. The second 4x register is implied. Each register holds a value in the range 0000 through 9999, for a combined double precision value in the range 0 through 99,999,999. The high-order half of operand 1 is stored in the displayed register, and the low-order half is stored in the implied register. The first of six contiguous 4xxxx registers is entered in the middle node. The remaining five registers are implied: The displayed register and the first implied register store the high-order and low-order halves of operand 2, respectively, for a combined double precision value in the range 0 through 99,999,999 The last four implied registers store the double precision product in the range 0 through 9,999,999,999,999,999 ON = operation successful ON = operand out of range
operand 2/product (middle node)
4x
INT, UINT
0x 0x
None None
Symbol - Division Representation of the instruction for the division operation
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Parameter Description - Division Description of the instructions parameters for the division operation
Parameters Top input Middle input operand 1 (top node) State RAM Reference 0x, 1x 0x, 1x 4x Data Type None None INT, UINT Meaning ON = operand 1 divided by operand 2 and result posted in designated registers. ON = decimal remainder OFF = fractional remainder The first of two contiguous 4xxxx registers is entered in the top node. The second 4xxxx register is implied. Operand 1 is stored here. The second 4x register is implied. Each register holds a value in the range 0000 through 9999, for a combined double precision value in the range 0 through 99,999,999. The high-order half of operand 1 is stored in the displayed register, and the loworder half is stored in the implied register. The first of six contiguous 4x registers is entered in the middle node. The remaining five registers are implied: The displayed register and the first implied register store the high-order and low-order halves of operand 2, respectively, for a combined double precision value in the range 0 through 99,999,999 Note: Since division by 0 is illegal, a 0 value causes an error; an error trapping routine sets the remaining middle-node registers to 0000 and turns the bottom output ON. The second and third implied registers store an eight-digit quotient The fourth and fifth implied registers store the remainder. If the remainder is expressed as a fraction, it is eight digits long and both registers are used, if the remainder is expressed as a decimal, it is four digits long and only the fourth implied register is used Top output Middle output Bottom output 0x 0x 0x None None None ON = operation successful ON = an operand out of range On = operand 2 is 0
operand 2 quotient remainder (middle node)
4x
INT, UINT
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DRUM: DRUM Sequencer 31007523 8/2010
DRUM: DRUM Sequencer
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Introduction This chapter describes the instruction DRUM. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see Installation of DX Loadables, page 75." The DRUM instruction operates on a table of 4x registers containing data representing each step in a sequence. The number of registers associated with this step data table depends on the number of steps required in the sequence. You can pre-allocate registers to store data for each step in the sequence, thereby allowing you to add future sequencer steps without having to modify application logic. DRUM incorporates an output mask that allows you to selectively mask bits in the register data before writing it to coils. This is particularly useful when all physical sequencer outputs are not contiguous on the output module. Masked bits are not altered by the DRUM instruction, and may be used by logic unrelated to the sequencer.
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Representation
*Available on the following E685/785 PLCs L785 PLCs Quantum Series PLCs
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Parameters Top input Middle input Bottom input step pointer (top node) step data table (middle node) length (bottom node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 4x 4x Data Type None None None INT, UINT INT, UINT INT, UINT Meaning ON = initiates DRUM sequencer ON = step pointer increments to next step ON = reset step pointer to 0 Current step number First register in a table of step data information (For expanded and detailed information please see Step Data Table (Middle Node), page 229.) Number of application-specific registers used in the step data table, range: 1 .. 999 Length:Max. 255 - 16-bit PLC Max. 999 - 24-bit PLC Max. 65535 - *PLC Echoes state of the top input ON = step pointer value = length ON = Error
Top output Middle output Bottom output
0x 0x 0x
None None None
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Step Pointer (Top Node) The 4x register entered in the top node stores the current step number. The value in this register is referenced by the DRUM instruction each time it is solved. If the middle input to the block is ON, the contents of the register in the top node are incremented to the next step in the sequence before the block is solved. Step Data Table (Middle Node) The 4x register entered in the middle node is the first register in a table of step data information. The first six registers in the step data table hold constant and variable data required to solve the block:
Register Displayed Name masked output data Content Loaded by DRUM each time the block is solved; contains the contents of the current step data register masked with the outputmask register Loaded by DRUM each time the block is solved; contains data from the step pointer, causes the block logic to automatically calculate register offsets when accessing step data in the step data table Loaded by user before using the block, DRUM will not alter output mask contents during logic solve; contains a mask to be applied to the data for each sequencer step Identifies DRUM/ICMP blocks belonging to a specific machine configuration; value range: 0 ... 9 999 (0 = block not configured); all blocks belonging to same machine configuration have the same machine ID number Identifies profile data currently loaded to the sequencer; value range: 0... 9 999 (0 = block not configured); all blocks with the same machine ID number must have the same profile ID number Loaded by user before using the block, DRUM will not alter steps used contents during logic solve; contains between 1 ... 999 for 24 bit CPUs, specifying the actual number of steps to be solved; the number must be greater or less than the table length in the bottom node
First implied
current step data
Second implied output mask
Third implied
machine ID number
Fourth implied
profile ID number
Fifth implied
steps used
The remaining registers contain data for each step in the sequence.
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Length (Bottom Node) The integer value entered in the bottom node is the length, i.e., the number of application-specific registers used in the step data table. The length can range from 1 ... 999 in a 24-bit CPU. The total number of registers required in the step data table is the length + 6. The length must be greater or equal to the value placed in the steps used register in the middle node.
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DV16: Divide 16 Bit 31007523 8/2010
DV16: Divide 16 Bit
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Introduction This chapter describes the instruction DV16. What's in this Chapter? This chapter contains the following topics:
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DV16: Divide 16 Bit
Short Description
Function Description The DV16 instruction performs a signed or unsigned division on the 16-bit values in the top and middle nodes (value 1 / value 2), then posts the quotient and remainder in two contiguous 4x holding registers in the bottom node.
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DV16: Divide 16 Bit
Representation
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DV16: Divide 16 Bit

Parameters Top input Middle input Bottom input value 1 (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 3x, 4x Data Type None None None INT, UINT Meaning ON = enables value 1 / value 2 ON = decimal remainder OFF = fractional remainder ON = signed operation OFF = unsigned operation Dividend, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in two contiguous registers (displayed for highorder half, implied for low-order half) Divisor, can be displayed explicitly as an integer (range 1 ... 65 535, enter e.g. #65535) or stored in a register First of two contiguous holding registers: displayed: result of division implied: remainder (either a decimal or a fraction, depending on the state of middle input) ON = Divide operation completed successfully ON = overflow: quotient > 65 535 in unsigned operation -32 768 > quotient > 32 767 in signed operation Error
value 2 (middle node) quotient (bottom node)
3x, 4x
INT, UINT
4x
INT, UINT
0x 0x
None None
Bottom output
0x
None
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Example
Quotient of Instruction DV16 The state of the middle input indicates whether the remainder will be expressed as a decimal or as a fraction. For example, if the middle input is ON and value 1 = 8 and value 2 = 3, the quotient has a value of 2 in the Result register and a value of 6666 in the Remainder register.
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DV16: Divide 16 Bit
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Instruction Descriptions (E) 31007523 8/2010
Instruction Descriptions (E)
III
Introduction In this part all instruction descriptions start with E. What's in this Part? This part contains the following chapters:
Chapter 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61
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Chapter Name EARS - Event/Alarm Recording System EMTH: Extended Math EMTH-ADDDP: Double Precision Addition EMTH-ADDFP: Floating Point Addition EMTH-ADDIF: Integer + Floating Point Addition EMTH-ANLOG: Base 10 Antilogarithm EMTH-ARCOS: Floating Point Arc Cosine of an Angle (in Radians) EMTH-ARSIN: Floating Point Arcsine of an Angle (in Radians) EMTH-ARTAN: Floating Point Arc Tangent of an Angle (in Radians) EMTH-CHSIN: Changing the Sign of a Floating Point Number EMTH-CMPFP: Floating Point Comparison EMTH-CMPIF: Integer-Floating Point Comparison EMTH-CNVDR: Floating Point Conversion of Degrees to Radians EMTH-CNVFI: Floating Point to Integer Conversion EMTH-CNVIF: Integer to Floating Point Conversion EMTH-CNVRD: Floating Point Conversion of Radians to Degrees EMTH-COS: Floating Point Cosine of an Angle (in Radians) EMTH-DIVDP: Double Precision Division
Page 239 247 253 259 263 267 271 277 281 287 293 299 305 311 317 323 329 333 237
Instruction Descriptions (E)
Chapter 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
Chapter Name EMTH-DIVFI: Floating Point Divided by Integer EMTH-DIVFP: Floating Point Division EMTH-DIVIF: Integer Divided by Floating Point EMTH-ERLOG: Floating Point Error Report Log EMTH-EXP: Floating Point Exponential Function EMTH-LNFP: Floating Point Natural Logarithm EMTH-LOG: Base 10 Logarithm EMTH-LOGFP: Floating Point Common Logarithm EMTH-MULDP: Double Precision Multiplication EMTH-MULFP: Floating Point Multiplication EMTH-MULIF: Integer x Floating Point Multiplication EMTH-PI: Load the Floating Point Value of "Pi" EMTH-POW: Raising a Floating Point Number to an Integer Power EMTH-SINE: Floating Point Sine of an Angle (in Radians) EMTH-SQRFP: Floating Point Square Root EMTH-SQRT: Floating Point Square Root EMTH-SQRTP: Process Square Root EMTH-SUBDP: Double Precision Subtraction EMTH-SUBFI: Floating Point - Integer Subtraction EMTH-SUBFP: Floating Point Subtraction EMTH-SUBIF: Integer - Floating Point Subtraction EMTH-TAN: Floating Point Tangent of an Angle (in Radians) ESI: Support of the ESI Module EUCA: Engineering Unit Conversion and Alarms
Page 339 343 347 351 357 363 369 375 381 387 391 397 403 407 413 419 425 431 437 443 449 453 457 475
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EARS - Event/Alarm Recording System 31007523 8/2010
EARS - Event/Alarm Recording System
44
Introduction This chapter describes the instruction EARS. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The EARS block is loaded to a PLC used in an alarm/event recording system. An EARS system requires that the PLC work in conjunction with a human-machine interface (HMI) host device that runs a special offline software package. The PLC monitors a specified group of events for changes in state and logs change data into a buffer. The data is then removed by the host over a high speed network such as Modbus Plus. The two devices comply with a defined handshake protocol that ensures that all data detected by the PLC is accurately represented in the host. PLC Functions in an Event/Alarm Recording System When a PLC is employed in an EARS environment, it is set up to maintain and monitor two tables of 4xxxx registers, one containing the current state of a set of user-defined events and one containing the history of the most recent state of these events. Event states are stored as bit representations in the 4xxxx registers; a bit value of 1 signifying an ON state and a bit value of 0 signifying an OFF state. Each table can contain up to 62 registers, allowing you to monitor the states of up to 992 events. When the PLC detects a change between the current state bit and the history bit for an event, the EARS instruction prepares a two word message and places it in a buffer where they can be off-loaded to a host HMI. This message contains: a time stamp representing the time span from midnight to 24:00 hours in tenths of a second a transition flag indicating that the event is either a positive or negative transition with respect to the event state a number indicating which event has occurred Host to PLC Interaction The host HMI device must be able to read and write PLC data registers via the Modbus protocol. A handshake protocol maintains integrity between the host and the circular buffer running in the PLC. This enables the host to receive events asynchronously from the buffer at a speed suitable to the host while the PLC detects event changes and load the buffer at its faster scan rate.
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Representation

Parameters Top input State RAM Data Meaning Reference Type 0x, 1x None ON = Handshake performed (if needed), validation check performed, and EARS operations proceeds OFF = Handshake performed (if needed) and outstanding transactions are completed 0x, 1x None Buffer Reset: Event table and top node pointers cleared to 0 4x INT, The 4xxxx register entered in the top node is the first of UINT 64 contiguous registers. The first two registers contain values that specify the location and size of the current state table. (For expanded and detailed information please see the sectionRegister Table (Top Node), page 243.) The remaining 61 registers are available to store history data. If all the remaining registers are not required for the history table, those registers may be used elsewhere in the program for other purposes, but they will still be found (by a Modbus search) in the top node of the EARS block. 241
Bottom input state table pointer / history table (top node)
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Parameters buffer table (middle node)
State RAM Data Meaning Reference Type 4x INT, The 4xxxx register entered in the middle node is the first UINT in a series of contiguous registers uses as a buffer table. The first five registers are used as follows, and the rest contain the circular buffer. The circular buffer uses an even number of registers in the range 2 through 100. (For expanded and detailed information please see the topic Data Register Table (Middle Node), page 244.) The time stamp is encoded in 20 bits as a binary weighted value that represents the time in an increment of 0.1 s, starting from midnight of the day on which the status change was detected: 1 hour = 3,600 seconds = 36,000 tenths of a second 24 hours = 86,400 seconds = 864,000 tenths of a second Note: The real time clock in the chassis mount controllers has a tenth-of-a-second resolution, but the other 984s have real time clock chips that resolve only to a second. An algorithm is used in EARS to provide a best estimate of tenth-of-a-second resolution; it is accurate in the relative time intervals between events, but it may vary slightly from the real time clock. The integer value entered in the bottom node is the length - i.e., actual number of registers allocated for the circular buffer. The length can range from 2 through 100. Each event requires two registers for data storage. Therefore, if you wish to trap up to 25 events at any given time in the buffer, assign a length of 50 in the bottom node. ON = Data in the buffer Passes power when data is in the queue ON for one scan following communications acknowledgment from host Passes power for one scan after getting a host response Buffer full: No events can be added until host off-loads some or until Buffer Reset Passes power when queue is full. No more events can be added
INT, UINT
0x 0x
None None
Bottom output 0x
None
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Overview This topic provides detailed and expanded information in table form for the top and middle nodes, and the middle node provides further information, which is detailed in three additional tables. Therefore, there are five tables in this topic. register table (top node) data register table (middle node) status/error codes table event-change data table binary weighted value table Register Table (Top Node) This is the register table for the top node of EARS.
Register 4x Content Indirect pointer to the current state table for example if the register contains a value of 5, then the state table begins at register 40005; the indirect pointer register must be hard-coded by the programmer Contains a value in the range 1 through 62 that specifies the number of registers in the current state table; this value must be hard-coded by the programmer First register of the history table, and the remaining registers allocated to the top node may be used in the table as required; the history table can provide monitoring for as many as 992 contiguous events (if 16 bits in all the 62 available registers are used)
4x+1
4x+2
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Data Register Table (Middle Node) This is the data register table for the middle node of EARS.
Register 4x 4x+1 4x+2 Content A value that defines the maximum number of registers the circular buffer may occupy The Q_take pointer - the pointer to the next register where the host will go to remove data The low byte contains the Q_put pointer - the pointer to the register in the circular buffer where the EARS block will begin to place the next state-change data. The high byte contains the last transaction number received. The Q+count is a value indicating the number of words currently in the circular buffer. The 4x+4 register gives Status/Error information For an explanation of the codes and the status/error messages that the code represents please see the Status/Error Codes Table below. The 4x+5 register Gives Event-change data Is the first register in a circular buffer Is where Event-change data are stored Each change in event status produces two contiguous registers, and those registers are explained in the Event-change Data Table below.
4x+3 4x+4
4x+5
Status/Error Codes Table This is the status/error codes table for the 4x+4 register of the middle node. The information below provides detailed and expanded information for the 4x+4 register of the middle node. The code number displayed represents an existing condition.
Code 1 2 3 4 5 6 7 8 9 10 255 Condition Invalid block length Invalid clock request Invalid clock configuration Invalid state length Invalid queue put Invalid queue take Invalid state Invalid queue count Invalid sequence number Count removed Bad clock chip
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Event-change Data Table When a change occurs in the 4x+5 register, this register then produces two contiguous registers. This topic explains how these contiguous registers are used. Event Data Register 1
The following table describes the Bit Usage.

Bit 1-4 5 Usage Four most significant bits of Event Time Stamp Transition Event Type 0 = Negative 1 = Positive Reserved Event Number (1 ... 992)
6 7 - 16
Event Data Register 2
The following table describes the Bit Usage.

Bit 1 - 16 Usage Sixteen least significant bits of Event Time Stamp
The time stamp is encoded in 20 bits as a binary weighted value that represents the time in an increment of 0.1 s (tenths of a second), starting from midnight of the day on which the status change was detected. 1 hour = 3600 seconds = 36000 tenths of a second 24 hours = 86,400 seconds = 864,000 tenths of a second For expanded and detailed information on binary weighted values for the time stamp see the Binary Weighted Values Table below.
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Binary Weighted Values Table Event Data Register 1 (Most significant nibble (4 bits))
Event Data Register 2
The following table shows binary weighted values for the time stamp, where n is the relative bit position in the 20-bit time scheme.
2n 1 2 4 8 16 32 64 128 n 0 1 2 3 4 5 6 7 2n 256 512 1024 2048 4096 8192 16384 32768 n 8 9 10 11 12 13 14 15 2n 65536 131072 262144 524288 n 16 17 18 19
NOTE: The real time clock in chassis mount controllers has a tenth-of-a-second resolution, but the other 984s have real time clock chips that resolve only to a second. An algorithm is used in EARS to provide a best estimate of tenth-of-asecond resolution. The algorithmic estimate is accurate in relative time intervals between events, but the estimate may vary slightly from the real time clock.
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EMTH: Extended Math 31007523 8/2010
EMTH: Extended Math
45
Introduction This chapter describes the instruction EMTH. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Floating Point EMTH Functions Page 248 249 250 252
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EMTH: Extended Math
Short Description
Function Description This instruction accesses a library of double-precision math, square root and logarithm calculations and floating point (FP) arithmetic functions. The EMTH instruction allows you to select from a library of 38 extended math functions. Each of the functions has an alphabetical indicator of variable subfunctions that can be selected from a pulldown menu in your panel software and appears in the bottom node. EMTH control inputs and outputs are functiondependent.
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Representation

Parameters Top input Middle input Bottom input top node State RAM Reference 0x, 1x 0x, 1x 0x, 1x 3x, 4x Data Type None None None DINT, UDINT, REAL DINT, UDINT, REAL Meaning Depends on the selected EMTH function, see "Inputs, Outputs and Bottom Node, page 250" Depends on the selected EMTH function Depends on the selected EMTH function Two consecutive registers, usually 4x holding registers but, in the integer math cases, either 4x or 3x registers Two, four, or six consecutive registers, depending on the function you are implementing. An alphabetical label, identifying the EMTH function, see "Inputs, Outputs and Bottom Node, page 250" 0x 0x 0x None None None Depends on the selected EMTH function, see "Inputs, Outputs and Bottom Node, page 250" Depends on the selected EMTH function Depends on the selected EMTH function 249
middle node
4x
subfunction (bottom node) Top output Middle output Bottom output

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EMTH: Extended Math
Inputs, Outputs and Bottom Node The implementation of inputs to and outputs from the block depends on the EMTH subfunction you select. An alphabetical indicator of variable subfunctions appears in the bottom node identifing the EMTH function you have chosen from the library. You will find the EMTH subfunctions in the following tables. Double Precision Math Integer Math Floating Point Math Subfunctions for Double Precision Math Double Precision Math
EMTH Function Addition Subtraction Multiplication Division Subfunction ADDDP SUBDP MULDP DIVDP Active Inputs Top Top Top Top and Middle Active Outputs Top and Middle Top, Middle and Bottom Top and Middle Top, Middle and Bottom
Subfunctions for Integer Math Integer Math

EMTH Function Square root Process square root Logarithm Antilogarithm Subfunction SQRT SQRTP LOG ANLOG Active Inputs Top Top Top Top Active Outputs Top and Middle Top and Middle Top and Middle Top and Middle
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EMTH: Extended Math
Subfunctions for Floating Point Math

EMTH Function Integer-to-FP conversion Integer + FP Integer - FP Integer x FP Integer / FP FP - Integer FP / Integer Integer-FP comparison FP-to-Integer conversion Addition Subtraction Multiplication Division Comparison Square root Change sign Load Value of p Sine in radians Cosine in radians Tangent in radians Arcsine in radians Arccosine in radians Arctangent in radians Radians to degrees Degrees to radians FP to an integer power Exponential function Natural log Common log Report errors Subfunction CNVIF ADDIF SUBIF MULIF DIVIF SUBFI DIVFI CMPIF CNVFI ADDFP SUBFP MULFP DIVFP CMPFP SQRFP CHSIN PI SINE COS TAN ARSIN ARCOS ARTAN CNVRD CNVDR POW EXP LNFP LOGFP ERLOG Active Inputs Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Active Outputs Top Top Top Top Top Top Top Top Top and Middle Top Top Top Top Top, Middle and Bottom Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top Top and Middle
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EMTH: Extended Math
Floating Point EMTH Functions

Use of Floating Point Functions To make use of the floating point (FP) capability, the four-digit integer values used in standard math instructions must be converted to the IEEE floating point format. All calculations are then performed in FP format and the results must be converted back to integer format. The IEEE Floating Point Standard EMTH floating point functions require values in 32-bit IEEE floating point format. Each value has two registers assigned to it, the eight most significant bits representing the exponent and the other 23 bits (plus one assumed bit) representing the mantissa and the sign of the value. NOTE: Floating point calculations have a mantissa precision of 24 bits, which guarantees the accuracy of the seven most significant digits. The accuracy of the eighth digit in an FP calculation can be inexact. It is virtually impossible to recognize a FP representation on the programming panel. Therefore, all numbers should be converted back to integer format before you attempt to read them. Dealing with Negative Floating Point Numbers Standard integer math calculations do not handle negative numbers explicitly. The only way to identify negative values is by noting that the SUB function block has turned the bottom output ON. If such a negative number is being converted to floating point, perform the Integerto-FP conversion (EMTH subfunction CNVIF), then use the Change Sign function (EMTH subfunction CHSIN) to make it negative prior to any other FP calculations.
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EMTH-ADDDP: Double Precision Addition 31007523 8/2010
EMTH-ADDDP: Double Precision Addition
46
Introduction This chapter describes the EMTH subfunction EMTH-ADDDP. What's in this Chapter? This chapter contains the following topics:
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253
Short Description
Function Description This instruction is a subfunction of the EMTH instruction. It belongs to the category "Double Precision Math."
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Representation
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255

Parameters Top input operand 1 (top node) State RAM Reference 0x, 1x 4x Data Type None DINT, UDINT Meaning ON = adds operands and posts sum in designated registers Operand 1 (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second 4xxxx register is implied. Operand 1 is stored here. Each register holds a value in the range 0000 through 9999, for a combined double precision value in the range of 0 through 99,999,999. The high-order half of operand 1 is stored in the displayed register, and the low-order half is stored in the implied register. Operand 2 and sum (first of six contiguous registers) The first of six contiguous 4xxxx registers is entered in the middle node. The remaining five registers are implied: The displayed register and the first implied register store the high-order and low-order halves of operand 2, respectively, for a combined double precision value in the range 0 through 99,999,999 The value stored in the second implied register indicates whether an overflow condition exists (a value of 1 = overflow) The third and fourth implied registers store the high-order and low-order halves of the double precision sum, respectively The fifth implied register is not used in the calculation but must exist in state RAM Selection of the subfunction ADDDP 0x 0x None None ON = operation successful ON = operand out of range or invalid
operand 2 and sum (middle node)
4x
DINT, UDINT
ADDDP (bottom node) Top output Middle output
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Operand 1 (Top Node) The first of two contiguous 4x registers is entered in the top node. The second 4x register is implied. Operand 1 is stored here.
Register Displayed Content Register stores the low-order half of operand 1 Range 0 000 ... 9 999, for a combined double precision value in the range 0 ... 99 999 999 Register stores the high-order half of operand 1 Range 0 000 ... 9 999, for a combined double precision value in the range 0 ... 99 999 999
First implied
Operand 2 and Sum (Middle Node) The first of six contiguous 4x registers is entered in the middle node. The remaining five registers are implied:
Register Displayed First implied Second implied Third implied Fourth implied Fifth implied Content Register stores the low-order half of operand 2, respectively, for a combined double precision value in the range 0 ... 99 999 999 Register stores the high-order half of operand 2, respectively, for a combined double precision value in the range 0 ... 99 999 999 The value stored in this register indicates whether an overflow condition exists (a value of 1 = overflow) Register stores the low-order half of the double precision sum. Register stores the high-order half of the double precision sum. Register is not used in the calculation but must exist in state RAM
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EMTH-ADDFP: Floating Point Addition 31007523 8/2010
EMTH-ADDFP: Floating Point Addition
47
Introduction This chapter describes the EMTH subfunction EMTH-ADDFP. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description This instruction is a subfunction of the EMTH instruction. It belongs to the category "Floating Point Math."
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Representation

Parameters Top input value 1 (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = enables FP addition Floating point value 1 (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. FP value 1 in the addition is stored here. Floating point value 2 and the sum (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. FP value 2 is stored in the displayed register and the first implied register. The sum of the addition is stored in FP format in the second and third implied registers. Selection of the subfunction ADDFP 0x None ON = operation successful
value 2 and sum (middle node)
4x
REAL
ADDFP (bottom node) Top output
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Floating Point Value 1 (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied.
Register Displayed First implied Content Registers store the FP value 1.
Floating Point Value 2 and Sum (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers store the FP value 2. Registers store the sum of the addition in FP format.
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EMTH-ADDIF: Integer + Floating Point Addition 31007523 8/2010
EMTH-ADDIF: Integer + Floating Point Addition
48
Introduction This chapter describes the EMTH subfunction EMTH-ADDIF. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input integer (top node) State RAM Reference 0x, 1x 4x Data Type None Meaning ON = initiates integer + FP operation
DINT, Integer value (first of two contiguous registers) UDINT The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The double precision integer value to be added to the FP value is stored here. REAL FP value and sum (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The displayed register and the first implied register store the FP value to be added in the operation, and the sum is posted in the second and third implied registers. The sum is posted in FP format. Selection of the subfunction ADDIF
FP and sum (middle node)
4x
ADDIF (bottom node) Top output 0x None
ON = operation successful
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Integer Value (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied.
Register Displayed First implied Content The double precision integer value to be added to the FP value is stored here.
FP Value and Sum (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers store the FP value to be added in the operation. The sum is posted here in FP format.
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EMTH-ANLOG: Base 10 Antilogarithm 31007523 8/2010
EMTH-ANLOG: Base 10 Antilogarithm
49
Introduction This chapter describes the EMTH subfunction EMTH-ANLOG. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description This instruction is a subfunction of the EMTH instruction. It belongs to the category "Integer Math."
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Representation

Parameters Top input source (top node) State RAM Reference 0x, 1x 3x, 4x Data Type None INT, UINT Meaning ON = enables antilog(x) operation Source value The top node is a single 4xxxx holding register or 3xxxx input register. The source value (the value on which the antilog calculation will be performed) is stored here in the fixed decimal format 1.234 . It must be in the range of 0 through 7999, representing a source value up to a maximum of 7.999. Result (first of two contiguous registers The first of two contiguous 4xxxx registers is entered in the middle node. The second register is implied. The result of the antilog calculation is posted here in the fixed decimal format 12345678. The most significant bits are posted in the displayed register, and the least significant bits are posted in the implied register. The largest antilog value that can be calculated is 99770006 (9977 posted in the displayed register and 0006 posted in the implied register). Selection of the subfunction ANLOG 0x 0x None None ON = operation successful ON = an error or value out of range 269
result (middle node)
4x
DINT, UDINT
ANLOG (bottom node) Top output Middle output

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Source Value (Top Node) The top node is a single 4x holding register or 3x input register. The source value, i.e. the value on which the antilog calculation will be performed, is stored here in the fixed decimal format 1.234. It must be in the range 0 ... 7 999, representing a source value up to a maximum of 7.999. Result (Middle Node) The first of two contiguous 4x registers is entered in the middle node. The second register is implied. The result of the antilog calculation is posted here in the fixed decimal format 12345678:
Register Displayed First implied Content Most significant bits Least significant bits
The largest antilog value that can be calculated is 99770006 (9977 posted in the displayed register and 0006 posted in the implied register).
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EMTH-ARCOS: Floating Point Arc Cosine of an Angle (in Radians) 31007523 8/2010
EMTH-ARCOS: Floating Point Arc Cosine of an Angle (in Radians)
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Introduction This chapter describes the EMTH subfunction EMTH-ARCOS. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = calculates arc cosine of the value FP value indicating the cosine of an angle (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. An FP value indicating the cosine of an angle between 0 through Pi radians is stored here. This value must be in the range of -1.0 through +1.0; if not: The arc cosine is not computed An invalid result is returned An error is flagged in the EMTH ERLOG function Arc cosine in radians of the value in the top node (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node.The remaining three registers are implied. The arc cosine in radians of the FP value in the top node is posted in the second and third implied registers. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4x reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction ARCOS 0x None ON = operation successful
arc cosine of value (middle node)
4x
REAL
ARCOS (bottom node) Top output
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Value (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied.
Register Displayed First implied Content An FP value indicating the cosine of an angle between 0 ... p radians is stored here. This value must be in the range of -1.0 ... +1.0;
If the value is not in the range of -1.0 ... +1.0: The arc cosine is not computed An invalid result is returned An error is flagged in the EMTH-ERLOG function Arc Cosine of Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The arc cosine in radians of the FP value in the top node is posted here.
NOTE: To preserve registers, you can make the 4x reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used.
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EMTH-ARSIN: Floating Point Arcsine of an Angle (in Radians) 31007523 8/2010
EMTH-ARSIN: Floating Point Arcsine of an Angle (in Radians)
51
Introduction This chapter describes the EMTH subfunction EMTH-ARSIN. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Data Reference Type 0x, 1x 4x None Meaning ON = calculates the arcsine of the value
REAL FP value indicating the sine of an angle (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. An FP value indicating the sine of an angle between -Pi/2 through +Pi/2 radians is stored here. This value, the sine of an angle, must be in the range of -1.0 through +1.0; if not: The arcsine is not computed An invalid result is returned An error is flagged in the EMTH ERLOG function REAL Arcsine of the value in the top node (first of four contiguous registers) Selection of the subfunction ARSIN
arcsine of value 4x (middle node) ARSIN (bottom node) Top output 0x
None
ON = operation successful* *Error is flagged in the EMTH ERLOG function.
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Register Displayed First implied Content An FP value indicating the sine of an angle between -/2 ... /2 radians is stored here. This value (the sine of an angle) must be in the range of -1.0 ... +1.0;
If the value is not in the range of -1.0 ... +1.0: The arcsine is not computed An invalid result is returned An error is flagged in the EMTH-ERLOG function Arcsine of Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The arcsine of the value in the top node is posted here in FP format.
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EMTH-ARTAN: Floating Point Arc Tangent of an Angle (in Radians) 31007523 8/2010
EMTH-ARTAN: Floating Point Arc Tangent of an Angle (in Radians)
52
Introduction This chapter describes the EMTH subfunction EMTH-ARTAN. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = calculates the arc tangent of the value FP value indicating the tangent of an angle (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. An FP value indicating the tangent of an angle between -Pi/2 through +Pi/2 radians is stored here. Any valid FP value is allowed. Arc tangent of the value in the top node (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The arc tangent in radians of the FP value in the top node is posted in the second and third implied registers. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction ARTAN 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function.
arc tangent of value (middle node)
4x
REAL
ARTAN (bottom node) Top output
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Register Displayed First implied Content An FP value indicating the tangent of an angle between -/2 ... /2 radians is stored here. Any valid FP value is allowed.;
Arc Tangent of Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The arc tangent in radians of the FP value in the top node is posted here.
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EMTH-CHSIN: Changing the Sign of a Floating Point Number 31007523 8/2010
EMTH-CHSIN: Changing the Sign of a Floating Point Number
53
Introduction This chapter describes the EMTH subfunction EMTH-CHSIN. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = changes the sign of FP value Floating point value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The FP value whose sign will be changed is stored here. Floating point value with changed sign (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied.The top node FP value in the top node is posted in the second and third implied registers. The displayed register and the first implied register in the middle node are not used in the operation but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction CHSIN 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function.
-(value) (middle node)
4x
REAL
CHSIN (bottom node) Top output
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Floating Point Value (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied.
Register Displayed First implied Content The FP value whose sign will be changed is stored here.
Floating Point Value with changed sign (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The top node FP value with changed sign is posted here.
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EMTH-CMPFP: Floating Point Comparison 31007523 8/2010
EMTH-CMPFP: Floating Point Comparison
54
Introduction This chapter describes the EMTH subfunction EMTH-CMPFP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value 1 (top node) State RAM Reference 0x, 1x 4x Data Type None DINT, UDINT Meaning ON = initiates comparison First floating point value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The first FP value (value 1) to be compared is stored here. Second floating point value (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The second FP value (value 2) to be compared is entered in the displayed register and the first implied register; the second and third implied registers are not used in the comparison but their allocation in state RAM is required. Selection of the subfunction CMPFP 0x 0x None None ON = operation successful Please see the table named Middle and Bottom Output, page 297, which indicates the relationship created when CMFPF compares two floating point values. Please see the table named Middle and Bottom Output, page 297, which indicates the relationship created when CMFPF compares two floating point values.
4x
REAL
CMPFP (bottom node) Top output Middle output
Bottom output
0x
None
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Value 1 (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied:
Register Displayed First implied Content The first FP value (value 1) to be compared is stored here.
Value 2 (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content The second FP value (value 2) to be compared is stored here. Registers are not used but their allocation in state RAM is required.
Middle and Bottom Output When EMTH function CMPFP compares its two FP values, the combined states of the middle and the bottom output indicate their relationship:
Middle Output ON OFF ON Bottom Output OFF ON ON Relationship value 1 > value 2 value 1 < value 2 value 1 = value 2
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EMTH-CMPIF: Integer-Floating Point Comparison 31007523 8/2010
EMTH-CMPIF: Integer-Floating Point Comparison
55
Introduction This chapter describes the EMTH subfunction EMTH-CMPIF. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input integer (top node) State RAM Reference 0x, 1x 4x Data Type None DINT, UDINT Meaning ON = initiates comparison Integer value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The double precision integer value to be compared is stored here. Floating point value (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The FP value to be compared is entered in the displayed register and the first implied register; the second and third implied registers are not used in the comparison but their allocation in state RAM is required. Selection of the subfunction CMPIF 0x 0x None None ON = operation successful Please see the table named Middle and Bottom Output, page 303, which indicates the relationship created when CMPIF compares two floating point values. Please see the table named Middle and Bottom Output, page 303, which indicates the relationship created when CMPIF compares two floating point values.
FP (middle node)
4x
REAL
CMPIF (bottom node) Top output Middle output
Bottom output
0x
None
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Integer Value (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied:
Register Displayed First implied Content The double precision integer value to be compared is stored here.
Floating Point Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content The FP value to be compared is stored here. Registers are not used but their allocation in state RAM is required.
Middle and Bottom Output When EMTH function CMPIF compares its integer and FP values, the combined states of the middle and the bottom output indicate their relationship:
Middle Output ON OFF ON Bottom Output OFF ON ON Relationship integer > FP integer < FP integer = FP
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304
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EMTH-CNVDR: Floating Point Conversion of Degrees to Radians 31007523 8/2010
EMTH-CNVDR: Floating Point Conversion of Degrees to Radians
56
Introduction This chapter describes the EMTH subfunction EMTH-CNVDR. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = initiates conversion of value 1 to value 2 (result) Value in FP format of an angle in degrees (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The value in FP format of an angle in degrees is stored here. Converted result (in radians) in FP format (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The converted result in FP format of the top-node value (in radians) is posted in the second and third implied registers. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction CNVDR 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function.
4x
REAL
CNVDR (bottom node) Top output
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Value (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied:
Register Displayed First implied Content The value in FP format of an angle in degrees is stored here.
Result in Radians (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The converted result in FP format of the top-node value (in radians) is posted here.
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EMTH-CNVFI: Floating Point to Integer Conversion 31007523 8/2010
EMTH-CNVFI: Floating Point to Integer Conversion
57
Introduction This chapter describes the EMTH subfunction EMTH-CNVFI. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Runtime Error Handling Page 312 313 315 315
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Short Description
312
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Parameters Top input FP (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = initiates FP to integer conversion Floating point value to be converted (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The double precision integer value to be converted to 32-bit FP format is stored here. Note: If an invalid integer value ( > 9999) is entered in either of the two top-node registers, the FP conversion will be performed but an error will be reported and logged in the EMTH ERLOG function (see page 138). The result of the conversion may not be correct. Integer value (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The FP result of the conversion is posted in the second and third implied registers. The displayed register and the first implied register are not used in the function but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4x reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction CNVFI 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function. OFF = positive integer value ON = negative integer value
integer (middle node)
4x
DINT, UDINT
CNVFI (bottom node) Top output
Bottom output
0x
None
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Integer Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The double precision integer result of the conversion is stored here. This value should be the largest integer value possible that is the FP value. For example, the FP value 3.5 is converted to the integer value 3, while the FP value -3.5 is converted to the integer value -4.
Runtime Error Handling

Runtime Errors If the resultant integer is too large for double precision integer format (> 99 999 999), the conversion still occurs but an error is logged in the EMTH_ERLOG function.
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EMTH-CNVIF: Integer to Floating Point Conversion 31007523 8/2010
EMTH-CNVIF: Integer to Floating Point Conversion
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Introduction This chapter describes the EMTH subfunction EMTH-CNVIF. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input integer (top node) State RAM Reference 0x, 1x 4x Data Type None DINT, UDINT Meaning ON = initiates FP to integer conversion Integer value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The FP value to be converted is stored here. Result (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The double precision integer result of the conversion is stored in the second and third implied registers. This value should be the largest integer value possible that is <= the FP value. For example, the FP value 3.5 is converted to the integer value 3, while the FP value -3.5 is converted to the integer value -4. Note: If the resultant integer is too large for 984 double precision integer format (> 99,999,999), the conversion still occurs but an error is logged in the EMTH ERLOG function (see page 138). The displayed register and the first implied register in the middle node are not used in the conversion but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction CNVIF 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function.
4x
REAL
CNVIF (bottom node) Top output
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Register Displayed First implied Content The double precision integer value to be converted to 32-bit FP format is stored here.
Result (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied.
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The FP result of the conversion is posted here.

Runtime Errors If an invalid integer value ( > 9 999) is entered in either of the two top-node registers, the FP conversion will be performed but an error will be reported and logged in the EMTH_ERLOG function. The result of the conversion may not be correct.
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EMTH-CNVRD: Floating Point Conversion of Radians to Degrees 31007523 8/2010
EMTH-CNVRD: Floating Point Conversion of Radians to Degrees
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Introduction This chapter describes the EMTH subfunction EMTH-CNVRD. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = initiates conversion of value 1 to value 2 Value in FP format of an angle in radians (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The value in FP format of an angle in radians is stored here. Converted result (in degrees) in FP format (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The converted result in FP format of the top-node value (in degrees) is posted in the second and third implied registers. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction CNVRD 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function.
4x
REAL
CNVRD (bottom node) Top output
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Register Displayed First implied Content The value in FP format of an angle in radians is stored here.
Result in Degrees (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied.
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The converted result in FP format of the top-node value (in degrees) is posted here.
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EMTH-COS: Floating Point Cosine of an Angle (in Radians) 31007523 8/2010
EMTH-COS: Floating Point Cosine of an Angle (in Radians)
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Introduction This chapter describes the EMTH subfunction EMTH-COS. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = calculates the cosine of the value FP value indicating the value of an angle in radians (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. An FP value indicating the value of an angle in radians is stored here. The magnitude of this value must be < 65536.0; if not: The cosine is not computed An invalid result is returned An error is flagged in the EMTH ERLOG function Cosine of the value in the top node (first of four contiguous registers) Selection of the subfunction COS 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function. 331
cosine of value (middle node) COS (bottom node) Top output
4x
REAL
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Register Displayed First implied Content An FP value indicating the value of an angle in radians is stored here. The magnitude of this value must be < 65 536.0.
If the magnitude of this value is 65 536.0: The cosine is not computed An invalid result is returned An error is flagged in the EMTH-ERLOG function Cosine of Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The cosine of the value in the top node is posted here in FP format.
332
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EMTH-DIVDP: Double Precision Division 31007523 8/2010
EMTH-DIVDP: Double Precision Division
61
Introduction This chapter describes the EMTH subfunction EMTH-DIVDP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input Middle input operand 1 top node State RAM Data Reference Type 0x, 1x 0x, 1x 4x None None DINT, UDINT Meaning ON = operand 1 divided by operand 2 and result posted in designated registers. ON = decimal remainder OFF = fractional remainder Operand 1 (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The top node is stored here. Each register holds a value in the range of 0000 through 9999, for a combined double precision value in the range of 0 through 99,999,999. The high-order half of operand 1 is stored in the displayed register, and the low-order half is stored in the implied register. Operand 2, quotient and remainder (first of six contiguous registers) The first of six contiguous 4xxxx registers is entered in the middle node. The remaining five registers are implied: The displayed register and the first implied register store the high-order and low-order halves of operand 2, respectively, for a combined double precision value in the range of 0 through 99,999,999 Note: Since division by 0 is illegal, a 0 value causes an error. An error trapping routine sets the remaining middle-node registers to 0000 and turns the bottom output ON. The second and third implied registers store an eight-digit quotient The fourth and fifth implied registers store the remainder. If the remainder is expressed as a fraction, it is eight digits long and both registers are used; if the remainder is expressed as a decimal, it is four digits long and only the fourth implied register is used DIVDP (bottom node) Top output Middle output Bottom output 0x 0x 0x None None None Selection of the subfunction DIVDP" ON = operation successful ON = an operand out of range or invalid ON = operand 2 = 0
operand 2 quotient remainder middle node
4x
DINT, UDINT
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Operand 1 (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied.
Register Displayed First implied Content Low-order half of operand 1 is stored here. High-order half of Operand 1 is stored here.
Each register holds a value in the range 0000 ... 9 999, for a combined double precision value in the range 0 ... 99 999 999. Operand 2, Quotient and Remainder (Middle Node) The first of six contiguous 4x registers is entered in the middle node. The remaining five registers are implied
Register Displayed First implied Second implied Third implied Fourth implied Fifth implied Content Register stores the low-order half of operand 2, respectively, for a combined double precision value in the range 0 ... 99 999 999 Register stores the high-order half of operand 2, respectively, for a combined double precision value in the range 0 ... 99 999 999. Registers store an eight-digit quotient. Registers store the remainder. f it is expressed as a decimal, it is four digits long and only the fourth implied register is used. If it is expressed as a fraction, it is eight digits long and both registers are used

Runtime Errors Since division by 0 is illegal, a 0 value causes an error, an error trapping routine sets the remaining middle-node registers to 0000 and turns the bottom output ON.
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338
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EMTH-DIVFI: Floating Point Divided by Integer 31007523 8/2010
EMTH-DIVFI: Floating Point Divided by Integer
62
Introduction This chapter describes the EMTH subfunction EMTH-DIVFI. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input FP (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = initiates FP / integer operation Floating point value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The FP value to be divided by the integer value is stored here. Integer value and quotient (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The double precision integer value that divides the FP value is posted in the displayed register and the first implied register, and the quotient is posted in the second and third implied registers. The quotient is posted in FP format. Selection of the subfunction DIVFI 0x None ON = operation successful
integer and quotient (middle node)
4x
DINT, UDINT
DIVFI (bottom node) Top output
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Floating Point Value (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied:
Register Displayed First implied Content The FP value to be divided by the integer value is stored here.
Integer Value and Quotient (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied.
Register Displayed First implied Second implied Third implied Content The double precision integer value that divides the FP value is posted here. The quotient is posted here in FP format.
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EMTH-DIVFP: Floating Point Division 31007523 8/2010
EMTH-DIVFP: Floating Point Division
63
Introduction This chapter describes the instrcution EMTH-DIVFP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value 1 (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = initiates value 1 / value 2 operation Floating point value 1 (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. FP value 1, which will be divided by the value 2, is stored here. Floating point value 2 and the quotient (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. FP value 2, the value by which value 1 is divided, is stored in the displayed register and the first implied register. The quotient is posted in FP format in the second and third implied registers. Selection of the subfunction DIVFP 0x None ON = operation successful 345
value 2 and quotient (middle node)
4x
REAL
DIVFP (bottom node) Top output

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Floating Point Value 1 (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied:
Register Displayed First implied Content FP value 1, which will be divided by the value 2, is stored here.
Floating Point Value 2 and Quotient (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content FP value 2, the value by which value 1 is divided, is stored here The quotient is posted here in FP format.
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EMTH-DIVIF: Integer Divided by Floating Point 31007523 8/2010
EMTH-DIVIF: Integer Divided by Floating Point
64
Introduction This chapter describes the instruction EMTH-DIVIF. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input integer (top node) State RAM Reference 0x, 1x 4x Data Type None DINT, UDINT Meaning ON = initiates integer / FP operation Integer value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The double precision integer value to be divided by the FP value is stored here. FP value and quotient (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The displayed register and the first implied register store the FP value to be divided in the operation, and the quotient is posted in the second and third implied registers. The quotient is posted in FP format. Selection of the subfunction DIVIF 0x None ON = operation successful 349
FP and quotient 4x (middle node)
REAL
DIVIF (bottom node) Top output

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Register Displayed First implied Content The double precision integer value to be divided by the FP value is stored here.
Floating Point Value and Quotient (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied.
Register Displayed First implied Second implied Third implied Content The FP value to be divided in the operation is posted here. The quotient is posted here in FP format.
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EMTH-ERLOG: Floating Point Error Report Log 31007523 8/2010
EMTH-ERLOG: Floating Point Error Report Log
65
Introduction This chapter describes the instrcution EMTH-ERLOG. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: EMTH - ERLOG - Floating Point Math - Error Report Log Parameter Description Page 352 353 355
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Short Description
352
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Representation: EMTH - ERLOG - Floating Point Math - Error Report Log

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Parameters Top input not used (top node) State RAM Reference 0x, 1x 4x Data Type None Meaning ON = retrieves a log of error types since last invocation
Not used in the operation (first of two INT, UINT, DINT, UDINT, contiguous registers) The first of two contiguous 4xxxx registers REAL is entered in the top node. The second register is implied. These two registers are not used in the operation but their allocation in state RAM is required. Error log register (first of four contiguous INT, UINT, DINT, UDINT, registers) The first of four contiguous 4xxxx registers REAL is entered in the middle node. The remaining three registers are implied. The second implied register is used as the error log register. (For expanded and detailed information about the error log please see the table Error Log Register, page 355 in the section Parameter Description. The third implied register has all its bits cleared to zero. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since these registers must be allocated but none are used. Selection of the subfunction ERLOG
error data (middle node)
4x
ERLOG (bottom node) Top output Middle output 0x 0x None None
ON = retrieval successful ON = nonzero values in error log register OFF = all zeros in error log register
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Not used (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied:
Register Displayed First implied Content These two registers are not used in the operation but their allocation in state RAM is required.
Error Data (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied.
Register Displayed First implied Second implied Third implied Content Error log register, see table. This register has all its bits cleared to zero. These two registers are not used but their allocation in state RAM is required.
NOTE: To preserve registers, you can make the 4x reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since these registers must be allocated but none are used. Error Log Register Usage of error log register:
Bit 1-8 9 - 11 12 13 14 15 16
Function Function code of last error logged Not used Integer/FP conversion error Exponential function power too large Invalid FP value or operation FP overflow FP underflow
If the bit is set to 1, then the specific error condition exists for that bit.
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356
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EMTH-EXP: Floating Point Exponential Function 31007523 8/2010
EMTH-EXP: Floating Point Exponential Function
66
Introduction This chapter describes the EMTH subfunction EMTH-EXP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = calculates exponential function of the value Value in FP format (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. A value in FP format in the range -87.34 through +88.72 is stored here. If the value is out of range, the result will either be 0 or the maximum value. No error will be flagged. Exponential of the value in the top node (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The exponential of the value in the top node is posted in FP format in the second and third implied registers. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction EXP 0x None ON = operation successful
4x
REAL
EXP (bottom node) Top output
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Register Displayed First implied Content A value in FP format in the range -87.34 ... +88.72 is stored here. If the value is out of range, the result will either be 0 or the maximum value. No error will be flagged.
Result (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content These registers are not used but their allocation in state RAM is required The exponential of the value in the top node is posted here in FP format.
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362
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EMTH-LNFP: Floating Point Natural Logarithm 31007523 8/2010
EMTH-LNFP: Floating Point Natural Logarithm
67
Introduction This chapter describes the EMTH subfunction EMTH-LNFP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Representation
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = calculates the natural log of the value Value > 0 in FP format (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. A value > 0 is stored here in FP format. If the value <= 0, an invalid result will be returned in the middle node and an error will be logged in the EMTH ERLOG function. Natural logarithm of the value in the top node (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The natural logarithm of the value in the top node is posted in FP format in the second and third implied registers. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction LNFP 0x None ON = operation successful
4x
REAL
LNFP (bottom node) Top output
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Register Displayed First implied Content A value > 0 is stored here in FP format. If the value 0, an invalid result will be returned in the middle node and an error will be logged in the EMTH-ERLOG function.
Register Displayed First implied Second implied Third implied Content These registers are not used but their allocation in state RAM is required The natural logarithm of the value in the top node is posted here in FP format.
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368
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EMTH-LOG: Base 10 Logarithm 31007523 8/2010
EMTH-LOG: Base 10 Logarithm
68
Introduction This chapter describes the EMTH subfunction EMTH-LOG. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input source (top node) State RAM Reference 0x, 1x 3x, 4x Data Type None DINT, UDINT Meaning ON = enables log(x) operation Source value (first of two contiguous registers) The first of two contiguous 3xxxx or 4xxxx registers is entered in the top node. The second register is implied. The source value upon which the log calculation will be performed is stored in these registers. If you specify a 4xxxx register, the source value may be in the range of 0 through 99,999,99. The low-order half of the value is stored in the implied register, and the high-order half is stored in the displayed register. If you specify a 3xxxx register, the source value may be in the range of 0 through 9,999. The log calculation is done on only the value in the displayed register; the implied register is required but not used. Result The middle node contains a single 4xxxx holding register where the result of the base 10 log calculation is posted. The result is expressed in the fixed decimal format 1.234 , and is truncated after the third decimal position. The largest result that can be calculated is 7.999, which would be posted in the middle register as 7999. Selection of the subfunction LOG 0x 0x None None ON = operation successful ON = an error or value out of range
4x
INT, UINT
LOG (bottom node) Top output Middle output
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Source Value (Top Node) The first of two contiguous 3x or 4x registers is entered in the top node. The second register is implied. The source value upon which the log calculation will be performed is stored in these registers. If you specify a 4x register, the source value may be in the range 0 ... 99 999 99:
Register Displayed First implied Content The high-order half of the value is stored here. The low-order half of the value is stored here.
If you specify a 3x register, the source value may be in the range 0 ... 9 999:
Register Displayed First implied Content The source value upon which the log calculation will be performed is stored here This register is required but not used.
Result (Middle Node) The middle node contains a single 4x holding register where the result of the base 10 log calculation is posted. The result is expressed in the fixed decimal format 1.234, and is truncated after the third decimal position. The largest result that can be calculated is 7.999, which would be posted in the middle register as 7999.
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EMTH-LOGFP: Floating Point Common Logarithm 31007523 8/2010
EMTH-LOGFP: Floating Point Common Logarithm
69
Introduction This chapter describes the EMTH subfunction EMTH-LOGFP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = calculates the common log of the value Value > 0 in FP format (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. A value > 0 is stored here in FP format. If the value <= 0, an invalid result will be returned in the middle node and an error will be logged in the EMTH ERLOG function. Common logarithm of the value in the top node (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The common logarithm of the value in the top node is posted in FP format in the second and third implied registers. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction LOGFP 0x None ON = operation successful
4x
REAL
LOGFP (bottom node) Top output
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Register Displayed First implied Content A value > 0 is stored here in FP format. If the value 0, an invalid result will be returned in the middle node and an error will be logged in the EMTH-ERLOG function.
Register Displayed First implied Second implied Third implied Content These registers are not used but their allocation in state RAM is required The common logarithm of the value in the top node is posted here in FP format.
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380
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EMTH-MULDP: Double Precision Multiplication 31007523 8/2010
EMTH-MULDP: Double Precision Multiplication
70
Introduction This chapter describes the EMTH subfunction EMTH-MULDP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input operand 1 (top node) State RAM Reference 0x, 1x 4x Data Type None DINT, UDINT Meaning ON = Operand 1 x Operand 2 Product posted in designated registers Operand 1 (first of two contiguous registers) The first of two contiguous 4x registers is entered in the top node. The second 4x register is implied. Operand 1 is stored here. The second 4x register is implied. Each register holds a value in the range of 0000 through 9999, for a combined double precision value in the range of 0 through 99,999,999. The high-order half of operand 1 is stored in the displayed register, and the low-order half is stored in the implied register. Operand 2 and product (first of six contiguous registers) The first of six contiguous 4xxxx registers is entered in the middle node. The remaining five registers are implied: The displayed register and the first implied register store the high-order and low-order halves of operand 2, respectively, for a combined double precision value in the range 0 through 99,999,999 The last four implied registers store the double precision product in the range 0 through 9,999,999,999,999,999 Selection of the subfunction MULDP 0x 0x None None ON = operation successful ON = operand out of range
operand 2 / product (middle node)
4x
DINT, UDINT
MULDP (bottom node) Top output Middle output
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First implied
Operand 2 and Product (Middle Node) The first of six contiguous 4x registers is entered in the middle node. The remaining five registers are implied:
Register Displayed First implied Second implied Third implied Fourth implied Fifth implied Content Register stores the low-order half of operand 2, respectively, for a combined double precision value in the range 0 ... 99 999 999 Register stores the high-order half of operand 2, respectively, for a combined double precision value in the range 0 ... 99 999 999 These registers store the double precision product in the range 0 ... 9 999 999 999 999 999
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386
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EMTH-MULFP: Floating Point Multiplication 31007523 8/2010
EMTH-MULFP: Floating Point Multiplication
71
Introduction This chapter describes the EMTH subfunction EMTH-MULFP. What's in this Chapter? This chapter contains the following topics:
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Short Description
388
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Parameters Top input value 1 (top node) State RAM Data Reference Type 0x, 1x 4x None REAL Meaning ON = initiates FP multiplication Floating point value 1 (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. FP value 1 in the multiplication operation is stored here. Floating point value 2 and the product (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. FP value 2 in the multiplication operation is stored in the displayed register and the first implied register. The product of the multiplication is stored in FP format in the second and third implied registers. Selection of the subfunction MULFP 0x None ON = operation successful
value 2 and product (middle node)
4x
REAL
MULFP (bottom node) Top output
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Floating Point Value 1 (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied:
Register Displayed First implied Content FP value 1 in the multiplication operation is stored here.
Floating Point Value 2 and Product (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content FP value 2 in the multiplication operation is stored here. The product of the multiplication is stored here in FP format.
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EMTH-MULIF: Integer x Floating Point Multiplication 31007523 8/2010
EMTH-MULIF: Integer x Floating Point Multiplication
72
Introduction This chapter describes the EMTH subfunction EMTH-MULIF. What's in this Chapter? This chapter contains the following topics:
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Short Description
392
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Parameters Top input integer (top node) State RAM Reference 0x, 1x 4x Data Type None DINT, UDINT Meaning ON = initiates integer x FP operation Integer value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The double precision integer value to be multiplied by the FP value is stored here. FP value and product (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The displayed register and the first implied register store the FP value to be multiplied in the operation, and the product is posted in the second and third implied registers. The product is posted in FP format.The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The displayed register and the first implied register store the FP value to be multiplied in the operation, and the product is posted in the second and third implied registers. The product is posted in FP format. Selection of the subfunction MULIF 0x None ON = operation successful
FP and product 4x (middle node)
REAL
MULIF (bottom node) Top output
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Register Displayed First implied Content The double precision integer value to be multiplied by the FP value is stored here.
FP Value and Product (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content The FP value to be multiplied in the operation is stored here. The product of the multiplication is stored here in FP format.
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EMTH-PI: Load the Floating Point Value of "Pi" 31007523 8/2010
EMTH-PI: Load the Floating Point Value of "Pi"
73
Introduction This chapter describes the EMTH subfunction EMTH-PI. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Parameters Top input not used (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = loads FP value of to middle node register First of two contiguous registers The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. These registers are not used but their allocation in state RAM is required. FP value of (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node.The remaining three registers are implied. The FP value of p is posted in the second and third implied registers. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction PI 0x None ON = operation successful
FP value of (middle node)
4x
REAL
PI (bottom node) Top output
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Not used (Top Node) The first of two contiguous 4x registers is entered in the middle node. The second register is implied:
Register Displayed First implied Content These registers are not used but their allocation in state RAM is required.
Floating Point Value of (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content These registers are not used but their allocation in state RAM is required. The FP value of is posted here.
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402
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EMTH-POW: Raising a Floating Point Number to an Integer Power 31007523 8/2010
EMTH-POW: Raising a Floating Point Number to an Integer Power
74
Introduction This chapter describes the EMTH subfunction EMTH-POW. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: EMTH - POW - Raising a Floating Point Number to an Integer Power Parameter Description Page 404 405 406
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Short Description
404
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Representation: EMTH - POW - Raising a Floating Point Number to an Integer Power


Parameters Top input FP value (top node) State RAM Data Reference Type 0x, 1x None 4x REAL Meaning ON = calculates FP value raised to the power of integer value FP value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The FP value to be raised to the integer power is stored here. Integer value and result (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node.The remaining three registers are implied. The bit values in the displayed register must all be cleared to zero. An integer value representing the power to which the top-node value will be raised is stored in the first implied register. The result of the FP value being raised to the power of the integer value is stored in the second and third implied registers. Selection of the subfunction POW ON = operation successful
integer and result (middle node)
4x
INT, UINT
POW (bottom node) Top output

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0x
None
405
FP Value (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied:
Register Displayed First implied Content The FP value to be raised to the integer power is stored here.
Integer and Result (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied:
Register Displayed First implied Second implied Third implied Content The bit values in this register must all be cleared to zero. An integer value representing the power to which the top-node value will be raised is stored here. The result of the FP value being raised to the power of the integer value is stored here.
406
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EMTH-SINE: Floating Point Sine of an Angle (in Radians) 31007523 8/2010
EMTH-SINE: Floating Point Sine of an Angle (in Radians)
75
Introduction This chapter describes the EMTH subfunction EMTH-SINE. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: EMTH - SINE - Floating Point Math - Sine of an Angle (in Radians) Parameter Description Page 408 409 411
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Short Description
408
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Representation: EMTH - SINE - Floating Point Math - Sine of an Angle (in Radians)
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = calculates the sine of the value FP value indicating the value of an angle in radians (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. An FP value indicating the value of an angle in radians is stored here. The magnitude of this value must be < 65536.0; if not: The sine is not computed An invalid result is returned An error is flagged in the EMTH ERLOG function Sine of the value in the top node (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node.The remaining three registers are implied. The sine of the value in the top node is posted in the second and third implied registers in FP format. The displayed register and the first implied register are not used but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction SINE 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function.
sine of value (middle node)
4x
REAL
SINE (bottom node) Top output
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If the magnitude is 65 536.0: The sine is not computed An invalid result is returned An error is flagged in the EMTH-ERLOG function Sine of Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The sine of the value in the top node is posted here in FP format.
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412
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EMTH-SQRFP: Floating Point Square Root 31007523 8/2010
EMTH-SQRFP: Floating Point Square Root
76
Introduction This chapter describes the EMTH subfunction EMTH-SQRFP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Representation
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Parameters Top input value (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = initiates square root on FP value Floating point value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The FP value on which the square root operation is performed is stored here. Result in FP format (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The result of the square root operation is posted in FP format in the second and third implied registers. The displayed register and the first implied register in the middle node are not used in the operation but their allocation in state RAM is required. Tip: To preserve registers, you can make the 4xxxx reference numbers assigned to the displayed register and the first implied register in the middle node equal to the register references in the top node, since the first two middle-node registers are not used. Selection of the subfunction SQRFP 0x None ON = operation successful
4x
REAL
SQRFP (bottom node) Top output
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Register Displayed First implied Content The FP value on which the square root operation is performed is stored here.
Result (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The result of the square root operation is posted here in FP format.
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418
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EMTH-SQRT: Floating Point Square Root 31007523 8/2010
EMTH-SQRT: Floating Point Square Root
77
Introduction This chapter describes the EMTH subfunction EMTH-SQRT. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Representation
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Parameters Top input source (top node) State RAM Reference 0x, 1x 3x, 4x Data Type None DINT, UDINT Meaning ON = initiates a standard square root operation Source value (first of two contiguous registers) The first of two contiguous 3xxxx or 4xxxx registers is entered in the top node. The second register is implied. The source value (the value for which the square root will be derived) is stored here. If you specify a 4xxxx register, the source value may be in the range of 0 through 99,999,99. The low-order half of the value is stored in the implied register, and the high-order half is stored in the displayed register. If you specify a 3xxxx register, the source value may be in the range of 0 through 9,999. The square root calculation is done on only the value in the displayed register; the implied register is required but not used. Result (first of two contiguous registers) Enter the first of two contiguous 4xxxx registers in the middle node. The second register is implied. The result of the standard square root operation is stored here. The result is stored in the fixed-decimal format: 1234.5600. where the displayed register stores the four-digit value to the left of the first decimal point and the implied register stores the four-digit value to the right of the first decimal point. Numbers after the second decimal point are truncated; no round-off calculations are performed. Selection of the subfunction SQRT 0x 0x None None ON = operation successful ON =source value out of range
4x
DINT, UDINT
SQRT (bottom node) Top output Middle output
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Source Value (Top Node) The first of two contiguous 3x or 4x registers is entered in the top node. The second register is implied. The source value, i.e. the value for which the square root will be derived, is stored here. If you specify a 4x register, the source value may be in the range 0 ... 99 999 99:
Register Displayed First implied Content The high-order half of the value is stored here. The low-order half of the value is stored here.
If you specify a 3x register, the source value may be in the range 0 ... 9 999:
Register Displayed First implied Content The square root calculation is done on only the value in the displayed register This register is required but not used.
Result (Middle Node) Enter the first of two contiguous 4x registers in the middle node. The second register is implied. The result of the standard square root operation is stored here in the fixed-decimal format: 1234.5600.:.
Register Displayed First implied Content This register stores the four-digit value to the left of the first decimal point. This register stores the four-digit value to the right of the first decimal point.
NOTE: Numbers after the second decimal point are truncated; no round-off calculations are performed.
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424
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EMTH-SQRTP: Process Square Root 31007523 8/2010
EMTH-SQRTP: Process Square Root
78
Introduction This chapter describes the EMTH subfunction EMTH-SQRTP. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Example Page 426 427 429 430
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Short Description
Function Description This instruction is a subfunction of the EMTH instruction. It belongs to the category "Integer Math." The process square root function tailors the standard square root function for closed loop analog control applications. It takes the result of the standard square root result, multiplies it by 63.9922 (the square root of 4 095) and stores that linearized result in the middle-node registers. The process square root is often used to linearize signals from differential pressure flow transmitters so that they may be used as inputs in closed loop control operations.
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Parameters Top input source (top node) State RAM Reference 0x, 1x 3x, 4x Data Type None DINT, UDINT Meaning ON = initiates process square root operation Source value (first of two contiguous registers) The first of two contiguous 3xxxx or 4xxxx registers is entered in the top node. The second register is implied. The source value (the value for which the square root will be derived) is stored in these two registers. In order to generate values that have meaning, the source value must not exceed 4095. In a 4xxxx register group the source value will therefore be stored in the implied register, and in a 3xxxx register group the source value will be stored in the displayed register. Linearized result (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the middle node. The second register is implied. The linearized result of the process square root operation is stored here. The result is stored in the fixed-decimal format: 1234.5600. where the displayed register stores the four-digit value to the left of the first decimal point and the implied register stores the four-digit value to the right of the first decimal point. Numbers after the second decimal point are truncated; no round-off calculations are performed. Selection of the subfunction SQRPT 0x 0x None None ON = operation successful ON =source value out of range
linearized result 4x (middle node)
DINT, UDINT
SQRTP (bottom node) Top output Middle output
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Source Value (Top Node) The first of two contiguous 3x or 4x registers is entered in the top node. The second register is implied. The source value, i.e. the value for which the square root will be derived, is stored here. In order to generate values that have meaning, the source value must not exceed 4 095. If you specify a 4x register:
Register Displayed First implied Content Not used The source value will be stored here
If you specify a 3x register:

Register Displayed First implied Content The source value will be stored here Not used.
Linearized Result (Middle Node) The first of two contiguous 4x registers is entered in the middle node. The second register is implied. The linearized result of the process square root operation is stored here n the fixed-decimal format 1234.5600..
Register Displayed First implied Content This register stores the four-digit value to the left of the first decimal point. This register stores the four-digit value to the right of the first decimal point.
NOTE: Numbers after the second decimal point are truncated; no round-off calculations are performed.
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Example
Process Square Root Function This example gives a quick overview of how the process square root is calculated. Instruction
Suppose a source value of 2000 is stored in register 300030 of EMTH function SQRTP. First, a standard square root operation is performed:
Then this result is multiplied by 63.9922, yielding a linearized result of 2861.63:
The linearized result is placed in the two registers in the middle node:
Register 400030 400031 Part of the result 2861 (four-digit value to the left of the first decimal point) 6300 (four-digit value to the right of the first decimal point)
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EMTH-SUBDP: Double Precision Subtraction 31007523 8/2010
EMTH-SUBDP: Double Precision Subtraction
79
Introduction This chapter describes the EMTH subfunction EMTH-SUBDP. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: EMTH - SUBDP - Double Precision Math - Subtraction Parameter Description Page 432 433 435
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Short Description
432
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Representation: EMTH - SUBDP - Double Precision Math - Subtraction

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Parameters Top input operand 1 (top node) State RAM Data Reference Type 0x, 1x 4x None DINT, UDINT Meaning ON = subtracts operand 2 from operand 1 and posts difference in designated registers Operand 1 (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second 4xxxx register is implied. Operand 1 is stored here. Each register holds a value in the range 0000 through 9999, for a combined double precision value in the range of 0 through 99,999,999. The low-order half of operand 1 is stored in the displayed register, and the highorder half is stored in the implied register. Operand 2 and difference (first of six contiguous registers) The first of six contiguous 4xxxx registers is entered in the middle node. The remaining five registers are implied: The displayed register and the first implied register store the high-order and low-order halves of operand 2, respectively, for a combined double precision value in the range 0 through 99,999,999 The second and third implied registers store the high-order and low-order halves, respectively, of the absolute difference in double precision format The value stored in the fourth implied register indicates whether or not the operands are in the valid range (1 = out of range and 0 = in range) The fifth implied register is not used in this calculation but must exist in state RAM Selection of the subfunction SUBDP 0x 0x 0x None None None ON = operand 1 > operand 2 ON = operand 1 = operand 2 ON = operand 1 < operand 2
operand 2/ difference (middle node)
4x
DINT, UDINT
SUBDP (bottom node) Top output Middle output Bottom output
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First implied
Operand 2 and Product (Middle Node) The first of six contiguous 4x registers is entered in the middle node. The remaining five registers are implied:
Register Displayed First implied Second implied Third implied Fourth implied Fifth implied Content Register stores the low-order half of operand 2 for a combined double precision value in the range 0 ... 99 999 999 Register stores the high-order half of operand 2 for a combined double precision value in the range 0 ... 99 999 999 This register stores the low-order half of the absolute difference in double precision format This register stores the high-order half of the absolute difference in double precision format 0 = operands in range 1 = operands out of range This register is not used in the calculation but must exist in state RAM.
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436
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EMTH-SUBFI: Floating Point - Integer Subtraction 31007523 8/2010
EMTH-SUBFI: Floating Point Integer Subtraction
80
Introduction This chapter describes the EMTH subfunction EMTH-SUBFI. What's in this Chapter? This chapter contains the following topics:
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EMTH-SUBFI: Floating Point - Integer Subtraction
Short Description
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Representation
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Parameters Top input FP (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = initiates FP - integer operation Floating point value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The FP value from which the integer value is subtracted is stored here. Integer value and difference (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The displayed register and the first implied register store the double precision integer value to be subtracted from the FP value, and the difference is posted in the second and third implied registers. The difference is posted in FP format. Selection of the subfunction SUBFI 0x None ON = operation successful
integer and difference (middle node)
4x
DINT, UDINT
SUBFI (bottom node) Top output
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Register Displayed First implied Content The FP value from which the integer value is subtracted is stored here.
Sine of Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers store the double precision integer value to be subtracted from the FP value. The difference is posted here in FP format.
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442
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EMTH-SUBFP: Floating Point Subtraction 31007523 8/2010
EMTH-SUBFP: Floating Point Subtraction
81
Introduction This chapter describes the EMTH subfunction EMTH-SUBFP. What's in this Chapter? This chapter contains the following topics:
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Short Description
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Representation
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Parameters Top input value 1 (top node) State RAM Reference 0x, 1x 4x Data Type None REAL Meaning ON = initiates FP value 1 - value 2 subtraction Floating point value 1 (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. FP value 1 (the value from which value 2 will be subtracted) is stored here. Floating point value 2 and the difference (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. FP value 2 (the value to be subtracted from value 1) is stored in the displayed register and the first implied register. The difference of the subtraction is stored in FP format in the second and third implied registers. Selection of the subfunction SUBFP 0x None ON = operation successful
value 2 and difference (middle node)
4x
REAL
SUBFP (bottom node) Top output
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Floating Point Value 1 (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied.
Register Displayed First implied Content FP value 1 (the value from which value 2 will be subtracted) is stored here.
Floating Point Value 2 (Top Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content FP value 2 (the value to be subtracted from value 1) is stored in these registers The difference of the subtraction is stored here in FP format.
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448
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EMTH-SUBIF: Integer - Floating Point Subtraction 31007523 8/2010
EMTH-SUBIF: Integer Floating Point Subtraction
82
Introduction This chapter describes the EMTH subfunction EMTH-SUBIF. What's in this Chapter? This chapter contains the following topics:
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EMTH-SUBIF: Integer - Floating Point Subtraction
Short Description
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Representation

Parameters Top input integer (top node) State RAM Reference 0x, 1x 4x Data Type None DINT, UDINT Meaning ON = initiates integer - FP operation Integer value (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. The double precision integer value from which the FP value is subtracted is stored here. FP value and difference (first of four contiguous registers) The first of four contiguous 4xxxx registers is entered in the middle node. The remaining three registers are implied. The displayed register and the first implied register store the FP value to be subtracted from the integer value, and the difference is posted in the second and third implied registers. The difference is posted in FP format. Selection of the subfunction SUBIF ON = operation successful 451
FP and difference (middle node)
4x
REAL
SUBIF (bottom node) Top output 0x

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None
Integer Value (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied.
Register Displayed First implied Content The double precision integer value from which the FP value is subtracted is stored here.
FP Value and Difference (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers store the FP value to be subtracted from the integer value. The difference is posted here in FP format.
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EMTH-TAN: Floating Point Tangent of an Angle (in Radians) 31007523 8/2010
EMTH-TAN: Floating Point Tangent of an Angle (in Radians)
83
Introduction This chapter describes the EMTH subfunction EMTH-TAN. What's in this Chapter? This chapter contains the following topics:
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Short Description
454
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Representation

Parameters Top input value (top node) State RAM Data Meaning Reference Type 0x, 1x 4x None ON = calculates the tangent of the value REA L FP value indicating the value of an angle in radians (first of two contiguous registers) The first of two contiguous 4xxxx registers is entered in the top node. The second register is implied. A value in FP format indicating the value of an angle in radians is stored here. The magnitude of this value must be < 65536.0; if not: The tangent is not computed An invalid result is returned An error is flagged in the EMTH ERLOG function Tangent of the value in the top node (first of four contiguous registers) Selection of the subfunction TAN 0x None ON = operation successful* *Error is flagged in the EMTH ERLOG function. 455
tangent of value 4x (middle node) TAN (bottom node) Top output
REA L
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If the magnitude is 65 536.0: The tangent is not computed An invalid result is returned An error is flagged in the EMTH-ERLOG function Tangent of Value (Middle Node) The first of four contiguous 4x registers is entered in the middle node. The remaining three registers are implied
Register Displayed First implied Second implied Third implied Content Registers are not used but their allocation in state RAM is required. The tangent of the value in the top node is posted here in FP format.
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ESI: Support of the ESI Module 31007523 8/2010
ESI: Support of the ESI Module
84
Introduction This chapter describes the instruction ESI. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description READ ASCII Message (Subfunction 1) WRITE ASCII Message (Subfunction 2) GET DATA (Subfunction 3) PUT DATA (Subfunction 4) ABORT (Middle Input ON) Run Time Errors Page 458 459 460 463 467 468 469 473 474
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Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see the chapter Installation of DX Loadables, page 75. The instruction for the ESI module 140 ESI 062 10 are optional loadable instructions that can be used in a Quantum controller system to support operations using an ESI module. The controller can use the ESI instruction to invoke the module. The power of the loadable is its ability to cause a sequence of commands over one or more logic scans. With the ESI instruction, the controller can invoke the ESI module to: Read an ASCII message from a serial port on the ESI module, then perform a sequence of GET DATA transfers from the module to the controller. Write an ASCII message to a serial port on the ESI module after having performed a sequence of PUT DATA transfers to the variable data registers in the module. Perform a sequence of GET DATA transfers (up to 16 384 registers of data from the ESI module to the controller); one Get Data transfer will move up to 10 data registers each time the instruction is solved. Perform a sequence of PUT DATA (up to 16 384 registers of data to the ESI module from the controller). One PUT DATA transfer moves up to 10 registers of data each time the instruction is solved. Abort the ESI loadable command sequence running. NOTE: After placing the ESI instruction in your ladder diagram, you must enter the top, middle, and bottom parameters. Proceed by double clicking on the instruction. This action produces a form for the entry of the 3 parameters. This parametric must be completed to enable the DX zoom function in the Edit menu pulldown.
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Representation

Parameters Top input Middle input subfunction (top node subfunction parameters (middle node) length bottom node Top output Middle output Bottom output 0x 0x 0x State RAM Reference 0x, 1x 0x, 1x 4x 4x Data Type None None INT, UINT, WORD INT, UINT, WORD INT, UINT Meaning ON = enables the subfunction Abort current message Number of possible subfunction, range 1 ... 4 First of eighteen contiguous 4x holding registers which contain the subfunction parameters Number of subfunction parameter registers, i.e. the length of the table in the middle node Echoes state of the top input ON = operation done ON = error detected
None None None
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Top Input When the input to the top node is powered ON, it enables the ESI instruction and starts executing the command indicated by the subfunction code in the top node. Middle Input When the input to the middle node is powered ON, an Abort command is issued. If a message is running when the ABORT command is received, the instruction will complete; if a data transfer is in process when the ABORT command is received, the transfer will stop and the instruction will complete. Subfunction # (Top Node) The top node may contain either a 4x register or an integer. The integer or the value in the register must be in the range 1 ... 4. It represents one of four possible subfunction command sequences to be executed by the instruction:
Subfunction 1 2 3 4 Command Sequence One command (READ ASCII Message, page 463) followed by multiple GET DATA commands Multiple PUT DATA commands followed by one command (WRITE ASCII Message, page 467) Zero or more commands (GET DATA, page 468) Zero or more commands (PUT DATA, page 469)
NOTE: A fifth command, (ABORT ASCII Message (see page 473)), can be initiated by enabling the middle input to the ESI instruction.
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Subfunction Parameters (Middle Node) The first of eighteen contiguous 4x registers is entered in the middle node. The ramaining seventeen registers are implied. The following subfunction parameters are available:
Register Displayed First implied Parameter ESI status register Address of the first 4x register in the command structure Address of the first 3x register in the command structure Contents Returned error codes Register address minus the leading 4 and any leading zeros, as specified in the I/O Map (e.g., 1 represents register 400001) Register address minus the leading 3 and any leading zeros, as specified in the I/O Map (e.g., 7 represents register 300007)
Second implied Third implied
Address of the first 4x register Register address minus the leading 4 and in the controller's data register any leading zeros (e.g., 100 representing register 400100) area
Fourth implied Address of the first 3x register Register address minus the leading 3 and in the controller's data register any leading zeros (e.g., 1000 representing register 301000) area Fifth implied Sixth implied Seventh implied Ninth implied Starting register for data register area in module Data transfer count ESI timeout value, in 100 ms increments ASCII port number Number in the range 0 ... 3FFF hex Number in the range 0 ... 4000 hex Number in the range 0 ... FFFF hex, where 0 means no timeout Number in the range 1 ... 255 dec 1 or 2
Eighth implied ASCII message number
Note: The registers below are internally used by the ESI loadable. Do not write registers while the ESI loadable is running. For best use, initialize these registers to 0 (zero) when the loadable is inserted into logic. 10th implied 11th implied 12th implied 13th implied 14th implied 15th implied 16th implied 17th implied ESI loadable previous scan power in state Data left to transfer Current ASCII module command running ESI loadable sequence number ESI loadable flags ESI loadable timeout value (MSW) ESI loadable timeout value (LSW) Parameter Table Checksum generated by ESI loadable
NOTE: Once power has been applied to the top input, the ESI loadable starts running. Until the ESI loadable compiles (successfully or in error), the subfunction parameters should not be modified. If the ESI loadable detects a change, the loadable will compile in error (Parameter Table).
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Length (Bottom Node) The bottom node contains the length of the table in the middle node, i.e., the number of subfunction parameter registers. For READ/ WRITE operations, the length must be 10 registers. For PUT/GET operations, the required length is eight registers; 10 may be specified and the last two registers will be unused. Ouptuts NOTE: NSUP must be loaded before ESI in order for the loadable to work properly. If ESI is loaded before NSUP or ESI is loaded alone, all three outputs will be turned ON. Middle Output The middle output goes ON for one scan when the subfunction operation specified in the top node is completed, timed out, or aborted Bottom Output The bottom output goes ON for one scan if an error has been detected. Error checking is the first thing that is performed on the instruction when it is enabled, it it is completed before the subfunction is executed. For more details, see Run Time Errors, page 474.
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READ ASCII Message (Subfunction 1)

READ ASCII Message A READ ASCII command causes the ESI module to read incoming data from one of its serial ports and store the data in internal variable data registers. The serial port number is specified in the tenth (ninth implied) register of the subfunction parameters table. The ASCII message number to be read is specified in the ninth (eighth implied) register of the subfunction parameters table. The received data is stored in the 16K variable data space in user-programmed formats. When the top node of the ESI instruction is 1, the controller invokes the module and causes it to execute one READ ASCII command followed by a sequence of GET DATA commands (transferring up to 16,384 registers of data) from the module to the controller. Command Structure Command Structure
Word 0 1 2 3 ... 11 Content (hex) 01PD xxxx 00xx Not used Meaning P = port number (1 or 2); D = data count Starting register number, in the range 0 ... 3FFF Message number, where xx is in the range 1 ... FF (1 ... 255 dec)
Response Structure Command Structure

Word 0 1 2 3 4 ... 11 Content (hex) 01PD xxxx 00xx xxxx xxxx ... xxxx Meaning Echoes command word 0 Echoes starting register number from Command Word 1 Echoes message number from Command Word 2 Data word 1 Data word 2 ... Module status or data word 9
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A Comparative READ ASCII Message/Put Data Example Below is an example of how an ESI loadable instruction can simplify your logic programming task in an ASCII read application. Assume that the 12-point bidirectional ESI module has been I/O mapped to 400001 ... 400012 output registers and 300001 ... 300012 input registers. We want to read ASCII message #10 from port 1, then transfer four words of data to registers 400501 ... 400504 in the controller. Parameterizing of the ESI instruction:
The subfunction parameter table begins at register 401000 . Enter the following parameters in the table:
Register 401000 401001 401002 401003 401004 401005 401006 401007 401008 401009 401010-17 Parameter Value nnnn 1 1 501 0 100 4 600 10 1 N/A Description ESI status register I/O mapped output starting register (400001) I/O mapped input starting register (300001) Starting register for the data transfer (400501) No 3x starting register for the data transfer Module start register Number of registers to transfer timeout = 60 s ASCII message number ASCII port number Internal loadable variables
With these parameters entered to the table, the ESI instruction will handle the read and data transfers automatically in one scan.
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Read and Data Transfers without ESI Instruction The same task could be accomplished in ladder logic without the ESI loadable, but it would require the following three networks to set up the command and transfer parameters, then copy the data. Registers 400101 ... 400112 are used as workspace for the output values. Registers 400201 ... 400212 are initial READ ASCII Message command values. Registers 400501 ... 400504 are the data space for the received data from the module. First Network
Contents of registers
Register 400201 400202 400203 ... 400212 Value (hex) 0114 0064 nnnn ... nnnn Description READ ASCII Message command, Port 1, Four registers Modules starting register Not valid: data word 1 ... Not valid: data word 10
The first network starts up the READ ASCII Message command by turning ON coil 000011 forever. It moves the READ ASCII Message command into the workspace, then moves the workspace to the output registers for the module. Second Network
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Register 400098 400099 400088 400089 Value (hex) nnnn nnnn 7FFF 8000 Description Workspace for response word Workspace for response word Response word mask Status word valid bit mask
As long as coil 000011 is ON, READ ASCII Message response Word 0 in the input register is tested to make sure it is the same as command Word 0 in the workspace. This is done by ANDing response Word 0 in the input register with 7FFF hex to get rid of the Status Word Valid bit (bit 15) in Response Word 0. The module start register in the input register is also tested against the module start register in the workspace to make sure that are the same. If both these tests show matches, test the Status Word Valid bit in response Word 0. To do this, AND response Word 0 in the input register with 8000 hex to get rid of the echoed command word 0 information. If the ANDed result equals the Status Word Valid bit, coil 000020 is turned ON indicating an error and/or status in the Module Status Word. If the ANDed result is not the status word valid bit, coil 000012 is turned ON indicating that the message is done and that you can start another command in the module. Third Network
If coil 000020 is ON, this third network will test the Module Status Word for busy status. If the module is busy, do nothing. If the Module Status Word is greater than 1 (busy), a detected error has been logged in the high byte and coil 000099 will be turned ON. At this point, you need to determine what the error is using some errorhandling logic that you have developed.
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WRITE ASCII Message (Subfunction 2)

WRITE ASCII Message In a WRITE ASCII Message command, the ESI module writes an ASCII message to one of its serial ports. The serial port number is specified in the tenth (ninth implied) register of the subfunction parameters table. The ASCII message number to be written is specified in the ninth (eighth implied) register of the subfunction parameters table. When the top node of the ESI instruction is 2, the controller invokes the module and causes it to execute one Write ASCII command. Before starting the WRITE command, subfunction 2 executes a sequence of PUT DATA transfers (transferring up to 16 384 registers of data) from the controller to the module. Command Structure Command Structure
Word 0 1 2 3 4 ... 11 Content (hex) 02PD xxxx 00xx xxxx xxxx ... xxxx Meaning P = port number (1 or 2); D = data count Starting register number, in the range 0 ... 3FFF Message number, where xx is in the range 1 ... FF (1 ... 255 dec) Data word 1 Data word 2 ... Data word 9
Response Structure Response Structure

Word 0 1 2 3 ... 10 11 Content (hex) 02PD xxxx 00xx 0000 ... 0000 xxxx Meaning Echoes command word 0 Echoes starting register number from command word 1 Echoes message number from command word 2 Returns a zero ... Returns a zero Module status
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GET DATA (Subfunction 3)

GET DATA A GET DATA command transfers up to 10 registers of data from the ESI module to the controller each time the ESI instruction is solved in ladder logic. The total number of words to be read is specified in Word 0 of the GET DATA command structure (the data count). The data is returned in increments of 10 in Words 2 ... 11 in the GET DATA response structure. If a sequence of GET DATA commands is being executed in conjunction with a READ ASCII Message command (via subfunction 1), up to nine registers are transferred when the instruction is solved the first time. Additional data are returned in groups of ten registers on subsequent solves of the instruction until all the data has been transferred If there is an error condition to be reported (other than a command syntax error), it is reported in Word 11 in the GET DATA response structure. If the command has requested 10 registers and the error needs to be reported, only nine registers of data will be returned in Words 2 ... 10, and Word 11 will be used for error status. NOTE: If the data count and starting register number that you specify are valid but some of the registers to be read are beyond the valid register range, only data from the registers in the valid range will be read. The data count returned in Word 0 of the response structure will reflect the number of valid data registers returned, and an error code (1280 hex) will be returned in the Module Status Word (Word 11 in the response table). Command Structure Command Structure
Word 0 1 2 ... 11 Content (hex) Meaning 030D xxxx Not used D = data count Starting register number, in the range 0 ... 3FFF

Word 0 1 2 3 ... 11 468 Content (hex) Meaning 030D xxxx xxxx xxxx ... xxxx Echoes command word 0 Echoes starting register number from command word 1 Data word 1 Data word 2 ... Module status or data word 10
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PUT DATA (Subfunction 4)

PUT DATA A PUT DATA command writes up to 10 registers of data to the ESI module from the controller each time the ESI instruction is solved in ladder logic. The total number of words to be written is specified in Word 0 of the PUT DATA command structure (the data count). The data is returned in increments of 10 in words 2 ... 11 in the PUT DATA command structure. The command is executed sequentially until command word 0 changes to another command other than PUT DATA (040D hex). NOTE: If the data count and starting register number that you specify are valid but some of the registers to be written are beyond the valid register range, only data from the registers in the valid range will be written. The data count returned in Word 0 of the response structure will reflect the number of valid data registers returned, and an error code (1280 hex) will be returned in the Module Status Word (Word 11 in the response table). Command Structure Command Structure
Word 0 1 2 3 ... 11 Content (hex) 040D xxxx xxxx xxxx ... xxxx Meaning D = data count Starting register number, in the range 0 ... 3FFF Data word 1 Data word 2 ... Data word 10

Word 0 1 2 ... 10 11 Content (hex) 040D xxxx 0000 ... 0000 xxxx Meaning Echoes command word 0 Echoes starting register number from command word 1 Returns a zero ... Returns a zero Module status
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A Comparative PUT DATA Example Below is an example of how an ESI loadable instruction can simplify your logic programming task in a PUT DATA application. Assume that the 12-point bidirectional ESI 062 module has been I/O mapped to 400001 ... 400012 output registers and 300001 ... 300012 input registers. We want to put 30 controller data registers, starting at register 400501, to the ESI module starting at location 100. Parameterizing of the ESI instruction:
The subfunction parameter table begins at register 401000 . Enter the following parameters in the table:
Register 401000 401001 401002 401003 401004 401005 401006 401007 401008 401009 401009 Parameter Value nnnn 1 1 501 0 100 30 0 N/A N/A N/A Description ESI status register I/O mapped output starting register (400001) I/O mapped input starting register (300001) Starting register for the data transfer (400501) No 3x starting register for the data transfer Module start register Number of registers to transfer timeout = never ASCII message number ASCII port number Internal loadable variables
With these parameters entered to the table, the ESI instruction will handle the data transfers automatically over three ESI logic solves. Handling of Data Transfer without ESI Instruction The same task could be accomplished in ladder logic without the ESI loadable, but it would require the following four networks to set up the command and transfer parameters, then copy data multiple times until the operation is complete. Registers 400101 ... 400112 are used as workspace for the output values. Registers 400201 ... 400212 are initial PUT DATA command values. Registers 400501 ... 400530 are the data registers to be sent to the module.
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First Network - Command Register Network
Register 400201 400202 400203 ... 400212 Value (hex) 040A 0064 nnnn ... nnnn Description PUT DATA command, 10 registers Modules starting register Not valid: data word 1 ... Not valid: data word 10
The first network starts up the transfer of the first 10 registers by turning ON coil 000011 forever. It moves the initial PUT DATA command into the workspace, moves the first 10 registers (400501 ... 400510) into the workspace, and then moves the workspace to the output registers for the module. Second Network - Command Register Network
As long as coil 000011 is ON and coil 000020 is OFF, PUT DATA response word 0 in the input register is tested to make sure it is the same as the command word in the workspace. The module start register in the input register is also tested to make sure it is the same as the module start register in the workspace.
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If both these tests show matches, the current module start register is tested against what would be the module start register of the last PUT DATA command for this transfer. If the test shows that the current module start register is greater than or equal to the last PUT DATA command, coil 000020 goes ON indicating that the transfer is done. If the test shows that the current module start register is less than the last PUT DATA command, coil 000012 indicating that the next 10 registers should be transferred. Third Network - Command Register Network
As long as coil 000012 is ON, there is more data to be transferred. The module start register needs to be tested from the last command solve to determine which set of 10 registers to transfer next. For example, if the last command started with module register 400110, then the module start register for this command is 400120. Fourth Network - Command Register Network
As long as coil 000012 is ON, add 10 to the module start register value in the workspace and move the workspace to the output registers for the module to start the next transfer of 10 registers.
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ABORT (Middle Input ON)

ABORT When the middle input to the ESI instruction is powered ON, the instruction aborts a running ASCII READ or WRITE message. The serial port buffers of the module are not affected by the ABORT, only the message that is currently running. Command Structure Command Structure
Word 0 1 ... 11 Content (hex) 0900 not used

Word 0 1 ... 10 11 Content (hex) 0900 0000 ... 0000 xxxx Meaning Echoes command word 0 Returns a zero ... Returns a zero Module status
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Run Time Errors

Run Time Errors The command sequence executed by the ESI module (specified by the subfunction value in the top node of the ESI instruction) needs to go through a series of error checking routines before the actual command execution begins. If an error is detected, a message is posted in the register displayed in the middle node. The following table lists possible error message codes and their meanings:
Error Code (dec) Meaning 0001 0010 0101 0102 0103 0104 1000 1001 1002 1003 1004 1005 1006 1101 1102 2001 Unknown subfunction specified in the top node ESI instruction has timed out (exceeded the time specified in the eighth register of the subfunction parameter table) Error in the READ ASCII Message sequence Error in the WRITE ASCII Message sequence Error in the GET DATA sequence Error in the PUT DATA sequence Length (Bottom Node) is too small Nonzero value in both the 4x and 3x data offset parameters Zero value in both the 4x and 3x data offset parameters 4x or 3x data offset parameter out of range 4x or 3x data offset plus transfer count out of range 3x data offset parameter set for GET DATA Parameter Table Checksum error Output registers from the offset parameter out of range Input registers from the offset parameter out of range Error reported from the ESI module
Once the parameter error checking has completed without finding an error, the ESI module begins to execute the command sequence.
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EUCA: Engineering Unit Conversion and Alarms 31007523 8/2010
EUCA: Engineering Unit Conversion and Alarms
85
Introduction This chapter describes the instrcution EUCA. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Examples Page 476 477 478 480
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Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see "Installation of DX Loadables, page 75." The use of ladder logic to convert binary-expressed analog data into decimal units can be memory-intensive and scan-time intensive operation. The Engineering Unit Conversion and Alarms (EUCA) loadable is designed to eliminate the need for extra user logic normally required for these conversions. EUCA scales 12 bits of binary data (representing analog signals or other variables) into engineering units that are readily usable for display, data logging, or alarm generation. Using Y = mX + b linear conversion, binary values between 0 ... 4095 are converted to a scaled process variable (SPV). The SPV is expressed in engineering units in the range 0 ... 9 999. One EUCA instruction can perform up to four separate engineering unit conversions. It also provides four levels of alarm checking on each of the four conversions:
Level HA HW LW LA Meaning High absolute High warning Low warning Low absolute
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Representation

Parameters Top input Middle input Bottom input alarm status (top node) State RAM Data Reference Type 0x, 1x 0x, 1x 0x, 1x 4x None None None INT, UINT INT, UINT, Meaning ON initiates the conversion Alarm input Error input Alarm status for as many as four EUCA conversions (For more information please see Alarm Status (Top Node), page 478.) First of nine contiguous holding registers in the EUCA parameter table (For more information please see Parameter Table (Middle Node), page 479.) Integer value, indicates which one of the four nibbles in the alarm status register to use Echoes the state of the top input ON if the middle input is ON or if the result of the EUCA conversion crosses a warning level ON if the bottom input is ON or if a parameter is out of range
parameter table 4x (middle node)
nibble # (1...4) (bottom node) Top output Middle output Bottom output 0x 0x 0x
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Alarm Status (Top Node) The 4x register entered in the top node displays the alarm status for as many as four EUCA conversions, which can be performed by the instruction. The register is segmented into four four-bit nibbles. Each four-bit nibble represents the four possible alarm conditions for an individual EUCA conversion. The most significant nibble represents the first conversion, and the least significant nibble represents the fourth conversion:
Alarm Setting Condition of alarm setting

Alarm type HA HW LW LA Condition An HA alarm is set when the SPV exceeds the user-defined high alarm value expressed in engineering units An HW alarm is set when SPV exceeds a user-defined high warning value expressed in engineering units An LW alarm is set when SPV is less than a user-defined low warning value expressed in engineering units An LA alarm is set when SPV is less than a user-defined low alarm value expressed in engineering units
Only one alarm condition can exist in any EUCA conversion at any given time. If the SPV exceeds the high warning level the HW bit will be set. If the HA is exceeded, the HW bit is cleared and the HA bit is set. The alarm bit will not change after returning to a less severe condition until the deadband (DB) area has also been exited.
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Parameter Table (Middle Node) The 4x register entered in the middle node is the first of nine contiguous holding registers in the EUCA parameter table:
Register Displayed First implied Second implied Content Binary value input by the user SPV calculated by the EUCA block LEU < HEU 99 999 High engineering unit (HEU), maximum SPV required and set by the user (top of the scale) Low engineering unit (LEU), minimum SPV 0 LEU < HEU required and set by the user (bottom end of the scale) DB area in SPV units, below HA levels and above LA levels that must be crossed before the alarm status bit will reset HA alarm value in SPV units HW alarm value in SPV units LW alarm value in SPV units LA alarm value in SPV units 0 DB < (HEU - LEU) Range 0 ... 4 095
Third implied
Fourth implied
Fifth implied Sixth implied Seventh implied Eighth implied
HW < HA HEU LW < HW < HA LA < LW < HW LEU LA < LW
NOTE: An error is generated if any value is out of the range defined above
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Examples
Overview The following examples are shown. Principles of EUCA Operation (example 1) Use in a Drive System (example 2) Four EUCA conversions together (example 3) Example 1 This example demonstrates the principles of EUCA operation. The binary value is manually input in the displayed register in the middle node, and the result is visually available in the SPV register (the first implied register in the middle node). The illustration below shows an input range equivalent of a 0 ... 100 V measure, corresponding to the whole binary 12-bit range:
A range of 0 ... 100 V establishes 50 V for nominal operation. EUCA provides a margin on the nominal side of both warning and alarm levels (deadband). If an alarm threshold is exceeded, the alarm bit becomes active and stays active until the signal becomes greater (or less) than the DB setting -5 V in this example.
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Programming the EUCA block is accomplished by selecting the EUCA loadable and writing in the data as illustrated in the figure below:
Reference Data
Register 400440 400450 400451 400452 400453 400454 400455 400456 400457 400458 Meaning STATUS INPUT SPV HIGH_unit LOW_unit Dead_band HIGH_ALARM HIGH_WARN LOW_ALARM LOW_WARN Content 0000000000000000 1871 DEC 46 DEC 100 DEC 0 DEC 5 DEC 70 DEC 60 DEC 40 DEC 30 DEC
The nine middle-node registers are set using the reference data editor. DB is 5 V followed by 10 V increments of high and low warning. The actual high and low alarm is set at 20 V above and below nominal.
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On a graph, the example looks like this:
NOTE: The example value shows a decimal 46, which is in the normal range. No alarm is set, i.e., register 400440 = 0. You can now verify the instruction in a running PLC by entering values in register 400450 that fall into the defined ranges. The verification is done by observing the bit change in register 400440 where:
Example 2 If the input of 0 ... 4095 indicates the speed of a drive system of 0 ... 5000 rpm, you could set up a EUCA instruction as follows. The binary value in 400210 results in an SPV of 4835 decimal, which exceeds the high absolute alarm level, sets the HA bit in 400209, and powers the EUCA alarm node.
Parameter Maximum Speed Minimum Speed DB HA Alarm HW Alarm LW Alarm LA Alarm 482 Speed 5 000 rpm 0 rpm 100 rpm 4 800 rpm 4 450 rpm 2 000 rpm 1 200 rpm
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Instruction
Reference Data
Register 400209 400210 400211 400212 400213 400214 400215 400216 400217 400218 Meaning STATUS INPUT SPV MAX_SPEED MIN_SPEED Dead_band HIGH_ALARM HIGH_WARN LOW_ALARM LOW_WARN Content 1000000000000000 3960 DEC 4835 DEC 5000 DEC 0 DEC 100 DEC 4800 DEC 4450 DEC 2000 DEC 1200 DEC
The N.O. contact is used to suppress alarm checks when the drive system is shutdown, or during initial start up allowing the system to get above the Low alarm RPM level.
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Varying the binary value in register 400210 would cause the bits in nibble 1 of register 400209 to correspond with the changes illustrated above. The DB becomes effective when the alarm or warning has been set, then the signal falls into the DB zone. The alarm is maintained, thus taking what would be a switch chatter condition out of a marginal signal level. This point is exemplified in the chart above, where after setting the HA alarm and returning to the warning level at 4700 the signal crosses in and out of DB at the warning level (4450) but the warning bit in 400209 stays ON. The same action would be seen if the signal were generated through the low settings. Example 3 You can chain up to four EUCA conversions together to make one alarm status register. Each conversion writes to the nibble defined in the block bottom node. In the program example below, each EUCA block writes its status (based on the table values for that block) into a four bit (nibble) of the status register 400209.
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Reference Data
Register 400209 Meaning STATUS Content 0000001001001000
The status register can then be transferred using a BLKM instruction to a group of discretes wired to illuminate lamps in an alarm enunciator panel. As you observe the status content of register 400209 you see: no alarm in block 1, an LW alarm in block 2, an HW alarm in Block 3, and an HA alarm in block 4. The alarm conditions for the four blocks can be represented with the following table settings:
Conversion 1 Input Scaled # HEU LEU DB Hi Alarm Hi Warn Lo Warn Lo Alarm 400210 = 2048 400211 = 2501 400212 = 5000 400213 = 0000 400214 = 0015 400215 = 40000 400216 = 3500 400217 = 2000 400218 = 1200 Conversion 2 400220 = 1220 400221 = 1124 400222 = 3300 400223 = 0200 400224 = 0022 400225 = 2900 400226 = 2300 400227 = 1200 400228 = 0430 Conversion 3 400230 = 3022 400231 = 7379 400232 = 9999 400233 = 0000 400234 = 0100 400235 = 8090 400236 = 7100 400237 = 3200 400238 = 0992 Conversion 4 400240 = 3920 400241 = 0770 400242 = 0800 400243 = 0100 400244 = 0006 400245 = 0768 400246 = 0680 400247 = 0280 400248 = 0230
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Instruction Descriptions (F to N) 31007523 8/2010
Instruction Descriptions (F to N)
IV
Introduction In this part instruction descriptions are arranged alphabetically from F to N. What's in this Part? This part contains the following chapters:
Chapter 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 FIN: First In FOUT: First Out FTOI: Floating Point to Integer GD92 - Gas Flow Function Block GFNX AGA#3 85 and NX19 68 Gas Flow Function Block GG92 AGA #3 1992 Gross Method Gas Flow Function Block GM92 AGA #3 and #8 1992 Detail Method Gas Flow Function Block G392 AGA #3 1992 Gas Flow Function Block HLTH: History and Status Matrices HSBY - Hot Standby IBKR: Indirect Block Read IBKW: Indirect Block Write ICMP: Input Compare ID: Interrupt Disable IE: Interrupt Enable IMIO: Immediate I/O IMOD: Interrupt Module Instruction INDX Immediate Incremental Move ITMR: Interrupt Timer ITOF: Integer to Floating Point Chapter Name Page 489 493 499 503 515 529 541 553 565 579 585 589 593 599 603 607 613 621 625 631
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Instruction Descriptions (F to N)
Chapter 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 JOGS JOG Move
Chapter Name
Page 635 639 643 647 651 659 667 671 681 685 689 695 699 703 709 713 759 763 767 771 775 779
JSR: Jump to Subroutine LAB: Label for a Subroutine LOAD: Load Flash MAP3: MAP Transaction MATH - Integer Operations MBIT: Modify Bit MBUS: MBUS Transaction MMFB Modicon Motion Framework Bits Block MMFE Modicon Motion Framework Extended Parameters Subroutine MMFI Modicon Motion Framework Initialize Block MMFS Modicon Motion Framework Subroutine Block MOVE Absolute Move MRTM: Multi-Register Transfer Module MSPX (Seriplex) MSTR: Master MU16: Multiply 16 Bit MUL: Multiply NBIT: Bit Control NCBT: Normally Closed Bit NOBT: Normally Open Bit NOL: Network Option Module for Lonworks
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FIN: First In 31007523 8/2010
FIN: First In
86
Introduction This chapter describes the instruction FIN. What's in this Chapter? This chapter contains the following topics:
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FIN: First In
Short Description
Function Description The FIN instruction is used to produce a first-in queue. A FOUT instruction needs to be used to clear the register at the bottom of the queue. An FIN instruction has one control input and can produce three possible outputs.
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FIN: First In
Representation

Parameters Top input source data (top node) queue pointer (middle node) queue length (bottom node) Top output Middle output Bottom output 0x 0x 0x State RAM Reference 0x, 1x 0x, 1x, 3x, 4x 4x Data Type None ANY_BIT WORD Meaning ON = copies source bit pattern into queue Source data, will be copied to the top of the destination queue in the current logic scan First of a queue of 4x registers, contains queue pointer; the next contiguous register is the first register in the queue Number of 4x registers in the destination queue. Range: 1 ... 100 Echoes state of the top input ON = queue full, no more source data can be copied to the queue ON = queue empty (value in queue pointer register = 0)
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FIN: First In
Mode of Functioning The FIN instruction is used to produce a first-in queue. It copies the source data from the top node to the first register in a queue of holding registers. The source data is always copied to the register at the top of the queue. When a queue has been filled, no further source data can be copied to it.
Source Data (Top Node) When using register types 0x or 1x: First 0x reference in a string of 16 contiguous coils or discrete outputs First 1x reference in a string of 16 discrete inputs Queue Pointer (Middle Node) The 4x register entered in the middle node is a queue pointer. The first register in the queue is the next contiguous 4x register following the pointer. For example, if the middle node displays a a pointer reference of 400100, then the first register in the queue is 400101. The value posted in the queue pointer equals the number of registers in the queue that are currently filled with source data. The value of the pointer cannot exceed the integer maximum queue length value specified in the bottom node. If the value in the queue pointer equals the integer specified in the bottom node, the middle output passes power and no further source data can be written to the queue until an FOUT instruction clears the register at the bottom of the queue.
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FOUT: First Out 31007523 8/2010
FOUT: First Out
87
Introduction This chapter describes the instruction FOUT. What's in this Chapter? This chapter contains the following topics:
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FOUT: First Out
Short Description
DANGER
DISABLED COILS Before using the FOUT instruction, check for disabled coils. FOUT will override any disabled coils within a destination register without enabling them. This can cause injury if a coil has been disabled for repair or maintenance because the coils state can change as a result of the FOUT operation. Failure to follow these instructions will result in death or serious injury. The FOUT instruction works together with the FIN instruction to produce a first infirst out (FIFO) queue. It moves the bit pattern of the holding register at the bottom of a full queue to a destination register or to word that stores 16 discrete outputs. An FOUT instruction has one control input and can produce three possible outputs.
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FOUT: First Out
Representation
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FOUT: First Out

Parameters Top input source pointer (top node) State RAM Reference 0x, 1x 4x Data Type None WORD Meaning ON = clears source bit pattern from the queue First of a queue of 4x registers, contains source pointer; the next contiguous register is the first register in the queue In the FOUT instruction, the source data comes from the 4xxxx register at the bottom of a full queue. The next contiguous 4xxxx register following the source pointer register in the top node is the first register in the queue. For example, if the top node displays pointer register 40100, then the first register in the queue is 40101. The value posted in the source pointer equals the number of registers in the queue that are currently filled. The value of the pointer cannot exceed the integer maximum queue length value specified in the bottom node. If the value in the source pointer equals the integer specified in the bottom node, the middle output passes power and no further FIN data can be written to the queue until the FOUT instruction clears the register at the bottom of the queue to the destination register. Destination register The destination specified in the middle node can be a 0xxxx reference or 4xxxx register. When the queue has data and the top control input to the FOUT passes power, the source data is cleared from the bottom register in the queue and is written to the destination register. Number of 4x registers in the queue. Range: 1 ... 100 Echoes state of the top input ON = queue full, no more source data can be copied to the queue ON = queue empty (value in queue pointer re
destination register (middle node)
0x, 4x
ANY_BIT
queue length (bottom node) Top output Middle output Bottom output 0x 0x 0x
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FOUT: First Out
Mode of Functioning The FOUT instruction works together with the FIN instruction to produce a first infirst out (FIFO) queue. It moves the bit pattern of the holding register at the bottom of a full queue to a destination register or to word that stores 16 discrete outputs.
NOTE: The FOUT instruction should be placed before the FIN instruction in the ladder logic FIFO to ensure removal of the oldest data from a full queue before the newest data is entered. If the FIN block were to appear first, any attempts to enter the new data into a full queue would be ignored. Source Pointer (Top Node) In the FOUT instruction, the source data comes from the 4x register at the bottom of a full queue. The next contiguous 4x register following the source pointer register in the top node is the first register in the queue. For example, if the top node displays pointer register 400100, then the first register in the queue is 400101. The value posted in the source pointer equals the number of registers in the queue that are currently filled. The value of the pointer cannot exceed the integer maximum queue length value specified in the bottom node. If the value in the source pointer equals the integer specified in the bottom node, the middle output passes power and no further FIN data can be written to the queue until the FOUT instruction clears the register at the bottom of the queue to the destination register. Destination Register (Middle Node) The destination specified in the middle node can be a 0x reference or 4x register. When the queue has data and the top input to the FOUT passes power, the source data is cleared from the bottom register in the queue and is written to the destination register.
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FOUT: First Out
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FTOI: Floating Point to Integer 31007523 8/2010
FTOI: Floating Point to Integer
88
Introduction This chapter describes the instruction FTOI. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The FTOI instruction performs the conversion of a floating value to a signed or unsigned integer (stored in two contiguous registers in the top node), then stores the converted integer value in a 4x register in the middle node.
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Representation

Parameters Top input Bottom input FP (top node) converted integer (middle node) 1 (bottom node) Top output Bottom output 0x 0x State RAM Reference 0x, 1x 0x, 1x 4x 4x Data Type None None REAL INT, UINT INT, UINT None None Meaning ON = enables conversion ON = signed operation OFF = unsigned operation First of two contiguous holding registers where the floating point value is stored Converted integer value is posted here A constant value of 1 (can not be changed) ON = integer conversion completed successfully ON = converted integer value is out of range: unsigned integer > 65 535 -32 768 > signed integer > 32 767
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502
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GD92 Gas Flow Function Block 31007523 8/2010
GD92 - Gas Flow Function Block
89
Introduction This chapter describes the instruction GD92 AGA #3 and AGA #8 1992 detail method. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description - Inputs Parameter Description - Outputs Parameter Description - Optional Outputs Page 504 505 507 513 514
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GD92 Gas Flow Function Block
Short Description
Function Description The gas flow loadable function block allows you to run AGA 3 (1992) and AGA 8 (1992) equations. The computed flow rates agree within 1 ppm of the published AGA standards. The GD92 instruction uses the detail method of characterization requiring detailed knowledge of the gas composition. The GD92 gas flow loadable function block is available only on certain Compact and Micro controllers. NOTE: GD92 does not support API 21.1 audit trail. GD92 only supports a single meter run. NOTE: You must install the LSUP loadable before the GD92. More Information For detailed information about the gas flow function block loadables, especially the: system warning/error codes (4x+0) for each instruction program warning/error codes (4x+1) for each instruction API 21.1 Audit Trail GET_LOGS.EXE utility SET_SIZE.EXE utility please see the Modicon Starling Associates Gas Flow Loadable Function Block User Guide (890 USE 137).
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Representation
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Parameters Top input State RAM Data Reference Type 0x, 1x Meaning
None ON = solving This input starts the calculation of the gas flow. The calculations are based on your parameters entered into the input registers. Important: Never detach the top input while the block is running. You will generate an error 188 and the data in this block could be corrupted. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 507.) None Allows you to set a warning. Allows you to capture any user-defined warnings or errors as needed in your applications. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 507.) None Allows you to set an error and STOP the flow function. Allows you to capture any user-defined warnings or errors as needed in your applications. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 507.) INT, UINT INT, UINT The top node must contain a constant, #0001. The 4x register entered in the middle node is the first in a group of contiguous holding registers that comprise the configuration parameters and values associated with the Gas Flow Block. Important: Do not attempt to change the middle node 4x register while the Gas Flow Block is running. You will lose your data and generate an error 302. If you need to change the 4x register, first STOP the PLC. The bottom node specifies the calculation type and must contain a constant, #0003.
Middle input
0x, 1x
Bottom input
0x, 1x
constant #0001 (top node) register (middle node)
4x 4x
#0003 (bottom node) Top output Middle output Bottom output 0x 0x 0x
INT, UINT
None ON = Operation successful None ON = System or program warning None ON = System or program error
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Parameter Description - Inputs

Configuration Table You must fill in all pertinent values in the configuration table using the reference data editor either in ProWORX or Concept, or the DX Zoom screens in Modsoft, or Meter Manager. The following inputs table lists all the configuration parameters that you must be fill in. The outputs (Outputs Results Table) and the optional outputs (Optional Outputs Results Table) show the calculation results of the block. Some of those parameters are required. NOTE: Only valid entries are allowed. Entries outside the valid ranges are not accepted. Illegal entries result in errors or warnings. NOTE: Concept 2.1 or higher may be used to load the gas blocks. However, Concept and ProWORX do not provide help or DX zoom screens for configuration. When using Concept or ProWORX panel software, we recommend you use Meter Manager for your configuration needs. Inputs The following is a detailed description of configuration variables for the GD92 gas flow function block.
Inputs 4xxxx+3: 1 through 2 Description Location of Taps 1 - Upstream 2 - Downstream Meter Tube Material 1 - Stainless Steel 2 - Monel 3 - Carbon Steel Orfice Material 1 - Stainless Steel 2 - Monel 3 - Carbon Steel Reserved for Future Use (Do not use) Optional Outputs 1 - Yes 2 - No Note: When using only the standard outputs, the loadable uses 157 4xxxx registers. When using the optional outputs, the loadable uses 181 4xxxx registers. Reserved for Future Use (Do not use)
4xxxx+3: 3 through 4
4xxxx+3: 7 through 8 4xxxx+3: 9 through 10
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507
Inputs 4xxxx+4: 1
Description Absolute/Gauge Pressure 0 - Static Pressure Measured in Absolute Units 1 - Static Pressure Measured in Gauge Units Low Flow Cut Off 0 - Do Not Use Flow Cut Off 1 - Use Flow Cut Off Load Command 0 - Ready to Accept Command 1 - CMD: Send Configuration to Internal Table from 4xxxx 2 - CMD: Read Configuration from Internal Table to 4xxxx 3 - CMD: Reset API 21.1 configuration change log Input Type 1 - 3xxxx Pointers entered in 4x+6 ... 4x+10 2 - Input Values entered in 4x+6 ... 4x+10 Mole % Error Limits 1 - Enable 2 - Disable Dual Range Differential Pressure Option 1 - Yes 2 - No Compressible/Incompressible 1 - Compressible 2 - Incompressible Averaging Methods 0 - Flow Dependent Time Weighted Linear 1 - Flow Dependent Time Weighted Formulaic 2 - Flow Weighted Linear 3 - Flow Weighted Formulaic Note: For most applications you will use 0. Measurement Units 1 - US 2 - Metric (SI) Reserved for Future Use (Do not use) Temperature 3xxxx Pointer or Input Value Data type: Unsigned integer value Pressure (absolute) 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 1 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 2 3xxxx Pointer or Input Value Data type: Unsigned integer value
4xxxx+4: 2
4xxxx+5: 3 through 16 4xxxx+6 4xxxx+7 4xxxx+8 4xxxx+9
508
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Inputs 4xxxx+10 4xxxx+11 4xxxx+12 4xxxx+13 4xxxx+14 4xxxx+15 4xxxx+16 4xxxx+17 4xxxx+18 through 19
Description Analog Input Raw Value Minimum Temperature Data type: Unsigned integer value Analog Input Raw Value Maximum Temperature Data type: Unsigned integer value Analog Input Raw Value Minimum Pressure Data type: Signed integer value Analog Input Raw Value Maximum Pressure Data type: Signed integer value Analog Input Raw Value Minimum Differential Pressure 1 Data type: Signed integer value Analog Input Raw Value Maximum Differential Pressure 1 Data type: Signed integer value Analog Input Raw Value Minimum Differential Pressure 2 Data type: Signed integer value Analog Input Raw Value Maximum Differential Pressure 2 Data type: Signed integer value Engineering Unit Temperature Minimum -200 through 760F (-128.89 through 404.4C) Data type: Floating point number Engineering Unit Temperature Maximum -200 through 760F (-128.89 through 404.4C) Data type: Floating point number Engineering Unit Pressure Minimum 0 through 40,000psia (0 through 275,790.28kPa) Data type: Floating point number Engineering Unit Pressure Maximum 0 through 40,000psia (0 through 275,790.28kPa) Data type: Floating point number Engineering Unit Differential Pressure 1 Minimum >= 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 1 Maximum > 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 2 Minimum >= 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 2 Maximum > 0 (inches H2O or kPa) Data type: Floating point number
4xxxx+20 through 21
4xxxx+22 through 23
4xxxx+24 through 25
4xxxx+26 through 27
4xxxx+28 through 29
4xxxx+30 through 31
4xxxx+32 through 33
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509
Inputs 4xxxx+34 through 35
Description Orifice Plate Diameter, d r (0 < dr < 100in) (0 < dr < 2540mm) Data type: Floating point number Orifice Plate Diameter Measurement Temperature, T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Meter Tube Internal Diameter D r (0 <Dr <100in) (0 < Dr < 2540mm) Data type: Floating point number Measured Meter Tube Internal Diameter Temperature T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Base Temperature, T b (32.0 <= Tb < 77.0F) (0 <= Tb < 25C) Data type: Floating point number Base Pressure, P b (13.0 <= Pb < 16.0PSIA) (89.63 <= Pb < 110.32kPa) Data type: Floating point number Reference Temperature for Relative Density, T gr (32.0 <= Tgr < 77.0F) (0 <= Tgr < 25C) Data type: Floating point number Reference Pressure for Relative Density, P gr (13.0 <= Pgr < 16.0PSIA) (89.63 <= Pgr < 110.32kPa) Data type: Floating point number Reserved for Future Use (Do not use) User Input Correction Factor, F u (0 < Fu < 2.0) Data type: Floating point number Absolute Viscosity of Flowing Fluid, c (0.005 <= c <= 0.5 centipoise) Data type: Floating point number Isentropic Exponent, k (1.0 <= k < 2.0) Data type: Floating point number Beginning of Day Hour (0 ... 23) Data type: Unsigned integer value Reserved for Future Use (Do not use)
4xxxx+36 through 37
4xxxx+38 through 39
4xxxx+40 through 41
4xxxx+42 through 43
4xxxx+44 through 45
4xxxx+46 through 47
4xxxx+48 through 49
4xxxx+50 through 57 4xxxx+58 through 59
4xxxx+60 through 61
4xxxx+62 through 63
4xxxx+64
4xxxx+65 through 78
510
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Description Atmospheric Pressure P at (3 <= Pat <30psi) (20.684 <= Pat < 206.843kPa) Data type: Floating point number Low Flow Cut Off Level (>= 0ft3/Hr) (>= 0m3/Hr) Used if enabled in 4x+4: 2. Data type: Floating point number
4xxxx+81 through 82
4xxxx+83 through 84
Mole % of Methane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Nitrogen, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Carbon Dioxide, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Ethane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Propane, x i *(0.0 <= xi <= 12) Data type: Floating point number Mole % of Water, x i *(0.0 <= xi <= 10) Data type: Floating point number Mole % of Hydrogen Sulfide, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Hydrogen, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Carbon Monoxide, x i *(0.0 <= xi <= 3) Data type: Floating point number Mole % of Oxygen, x i *(0.0 <= xi <= 21) Data type: Floating point number
4xxxx+85 through 86
4xxxx+87 through 88
4xxxx+89 through 90
xxx+91 through 92
4xxxx+93 through 94
4xxxx+95 through 96
4xxxx+97 through 98
4xxxx+99 through 100
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511
Description Mole % of I-Butane, x i *(0.0 <= xi <= 6) for combined butanes Data type: Floating point number Mole % of n-Butane, x i *(0.0 <= xi <= 6) for combined butanes Data type: Floating point number Mole % of I-Pentane, x i *(0.0 <= xi <= 4) for combined pentanes Data type: Floating point number Mole % of n-Pentane, x i *(0.0 <= xi <= 4) for combined pentanes Data type: Floating point number Mole % of Hexane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Heptane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Octane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Nonane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Decane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Helium, x i *(0.0 <= xi <= 30) Data type: Floating point number Mole % of Argon, x i *(0.0 <= xi <= 100) Data type: Floating point number
*Valid range
512
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Parameter Description - Outputs

Outputs Results Table The outputs show the calculation results of the block.
Outputs 4xxxx+0 4xxxx+1 4xxxx+2 4xxxx+125 through 126 4xxxx+127 through 128 4xxxx+129 through 130 4xxxx+131 through 132 4xxxx+133 through 134 4xxxx+135 through 136 4xxxx+137 through 138 4xxxx+139 through 140 4xxxx+141 through 142 4xxxx+143 through 144 4xxxx+145 through 146 4xxxx+147 through 148 4xxxx+149 through 150 4xxxx+151 through 152 4xxxx+153 through 154 4xxxx+155: 13 4xxxx+155: 14 4xxxx+155: 15 4xxxx+155: 16 Description System Warning/Error Code (Displayed in Hex mode) Program Warning/Error Code Version Number (Displayed in Hex mode) Temperature at Flowing Conditions (Tf) (F or C) Pressure (Pf) (psia or kPa) Differential Pressure (hw) (in H2O or kPa Integral Value (IV) Integral Multiplier Value (IMV) Volume Flow Rate at Base Conditions (Tb, Pb), Qb (ft3/hr or m3/hr) Mass Flow Rate (Qm) (lbm/hr or Kg/hr) Accumulated Volume Current Day Accumulated Volume Last Hour Accumulated Volume Last Day Average Temperature Last Day Average Pressure Last Day Average Differential Pressure Last Day Average IV Last Day Average Volume Flow Rate at Base Conditions (Tb, Pb) for the Last Day 4xxxx Table Differs from Actual Configuration Flow Rate Solve Complete Heartbeat Block is Functioning Heartbeat End of Day Flag
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513
Parameter Description - Optional Outputs

Optional Outputs Configuration Table The optional outputs show the calculation results of the block. These are only active if 4x+3: 9 ... 10 is 1.
Optional Outputs 4xxxx+156 through 157 4xxxx+158 through 159 4xxxx+160 through 161 4xxxx+162 through 163 4xxxx+164 through 165 4xxxx+166 through 167 4xxxx+168 through 169 4xxxx+170 through 171 4xxxx+172 through 173 4xxxx+174 through 175 4xxxx+176 through 177 4xxxx+178 through 179 4xxxx+180 Description Compressibility at Flowing Conditions (Tf, Pf), Zf Compressibility at Base Conditions (Tb, Pb), Zb Compressibility at Standard Conditions (Ts, Ps), Zs Density at Fluid Flowing Conditions (Pt,p) Density of Fluid at Base Conditions () Supercompressibility (Fpv) Gas Relative Density (Gr) Orifice Plate Coefficient of Discharge (Cd) Expansion Factor (Y) Velocity of Approach Factor (Ev) Volume Flow Rate at Flowing Conditions (Tf, Pf), Qf Reserved for Future Use (Do not use) Orifice Plate Coefficient of Discharge Bounds Flag within Iteration Scheme (Cd-f)
514
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GFNX Gas Flow Function Block 31007523 8/2010
GFNX AGA#3 85 and NX19 68 Gas Flow Function Block
90
Introduction This chapter describes the instruction GFNX AGA#3 85 and NX19 68. What's in this Chapter? This chapter contains the following topics:
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515
GFNX Gas Flow Function Block
Short Description
Function Description The GFNX AGA #3 85 and NX19 API 21.1 gas flow loadable function block is available only on certain Compact and Micro controllers. The gas flow loadable function block allows you to run AGA 3 (1992) and AGA 8 (1992) equations. The computed flow rates agree within 1 ppm of the published AGA standards. The GFNX instruction uses the detail method of characterization requiring detailed knowledge of the gas composition. NOTE: You must install the LSUP loadable before the GFNX. More Information For detailed information about the gas flow function block loadables, especially the: system warning/error codes (4x+0) for each instruction program warning/error codes (4x+1) for each instruction API 21.1 Audit Trail GET_LOGS.EXE utility SET_SIZE.EXE utility please see the Modicon Starling Associates Gas Flow Loadable Function Block User Guide (890 USE 137).
516
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Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning ON = solving This input starts the calculation of the gas flow. The calculations are based on your parameters entered into the input registers. Important: Never detach the top input while the block is running. You will generate an error 188 and the data in this block could be corrupted. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 519.)
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517
Parameters Middle input
State RAM Reference 0x, 1x
Data Type None
Meaning Allows you to set a warning. Allows you to set a warning and log peripheral activities in the audit trail even log without stopping the block. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 519.) Allows you to set an error and STOP the flow function. Allows you to set an error, log peripheral errors in the audit trail event log, and STOP the flow function. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 519.) The top node must contain a constant, #0001. The 4x register entered in the middle node is the first in a group of contiguous holding registers that comprise the configuration parameters and values associated with the Gas Flow Block. Important: Do not attempt to change the middle node 4x register while the Gas Flow Block is running. You will lose your data and generate an error 302. If you need to change the 4x register, first STOP the PLC. The bottom node specifies the calculation type and must contain a constant. Important: Use only valid entries. Other entries deny access to the blocks DX zoom screens. ON = Operation successful ON = System or program warning ON = System or program error
Bottom input
0x, 1x
None
4x 4x
INT, UINT INT, UINT
method (bottom node)
INT, UINT
0x 0x 0x
None None None
518
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Configuration Table You must fill in all pertinent values in the configuration table using the reference data editor either in ProWORX or Concept, or the DX Zoom screens in Modsoft, or Meter Manager. The following inputs table lists all the configuration parameters that you must fill in. The outputs (Outputs Results Table) and the optional outputs (Optional Outputs Results Table) show the calculation results of the block. Some of those parameters are required. NOTE: Only valid entries are allowed. Entries outside the valid ranges are not accepted. Illegal entries result in errors or warnings. NOTE: Concept 2.1 or higher may be used to load the gas blocks. However, Concept and ProWORX do not provide help or DX zoom screens for configuration. When using Concept or ProWORX panel software, we recommend you use Meter Manager for your configuration needs. Inputs The following is a detailed description of configuration variables for the GFNX gas flow function block.
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519
Inputs 4xxxx+4: 1
Description Absolute/Gauge Pressure 0 - Static Pressure Measured in Absolute Units 1 - Static Pressure Measured in Gauge Units Low Flow Cut Off 0 - Do Not Use Flow Cut Off 1 - Use Flow Cut Off Load Command 0 - Ready to Accept Command 1 - CMD: Send Configuration to Internal Table from 4xxxx 2 - CMD: Read Configuration from Internal Table to 4xxxx 3 - CMD: Reset API 21.1 configuration change log Input Type 1 - 3xxxx Pointers entered in 4x+6 ... 4x+10 2 - Input Values entered in 4x+6 ... 4x+10 Mole % Error Limits 1 - Enable 2 - Disable Dual Range Differential Pressure Option 1 - Yes 2 - No Compressible/Incompressible 1 - Compressible 2 - Incompressible Averaging Methods 0 - Flow Dependent Time Weighted Linear 1 - Flow Dependent Time Weighted Formulaic 2 - Flow Weighted Linear 3 - Flow Weighted Formulaic Note: For most applications you will use 0. Measurement Units 1 - US 2 - Metric (SI) Reserved for Future Use (Do not use) Reserved for API 21.1 Temperature 3xxxx Pointer or Input Value Data type: Unsigned integer value Pressure (absolute) 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 1 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 2 3xxxx Pointer or Input Value Data type: Unsigned integer value
4xxxx+4: 2
4xxxx+5: 3 through 14 4xxxx+5: 15 through 16 4xxxx+6 4xxxx+7 4xxxx+8 4xxxx+9
520
31007523 8/2010
Description Analog Input Raw Value Minimum Temperature Data type: Unsigned integer value Analog Input Raw Value Maximum Temperature Data type: Unsigned integer value Analog Input Raw Value Minimum Pressure Data type: Signed integer value Analog Input Raw Value Maximum Pressure Data type: Signed integer value Analog Input Raw Value Minimum Differential Pressure 1 Data type: Signed integer value Analog Input Raw Value Maximum Differential Pressure 1 Data type: Signed integer value Analog Input Raw Value Minimum Differential Pressure 2 Data type: Signed integer value Analog Input Raw Value Maximum Differential Pressure 2 Data type: Signed integer value Engineering Unit Temperature Minimum -40 through 240F (-40 through 115.5556C) Data type: Floating point number Engineering Unit Temperature Maximum -40 through 240F (-40 through 115.5556C) Data type: Floating point number Engineering Unit Pressure Minimum 0 through 5,000psia (0 through 34,473.785kPa) Data type: Floating point number Engineering Unit Pressure Maximum 0 through 5,000psia (0 through 34,473.785kPa) Data type: Floating point number Engineering Unit Differential Pressure 1 Minimum >= 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 1 Maximum > 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 2 Minimum >= 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 2 Maximum > 0 (inches H2O or kPa) Data type: Floating point number
4xxxx+20 through 21
4xxxx+22 through 23
4xxxx+24 through 25
4xxxx+26 through 27
4xxxx+28 through 29
4xxxx+30 through 31
4xxxx+32 through 33
31007523 8/2010
521
Description Orifice Plate Diameter, d r (0 < dr < 100in) (0 < dr < 2540mm) Data type: Floating point number Orifice Plate Diameter Measurement Temperature, T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Meter Tube Internal Diameter D r (0 <Dr <100in) (0 < Dr < 2540mm) Data type: Floating point number Measured Meter Tube Internal Diameter Temperature T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Base Temperature, T b (32.0 <= Tb < 77.0F) (0 <= Tb < 25C) Data type: Floating point number Base Pressure, P b (13.0 <= Pb < 16.0PSIA) (89.63 <= Pb < 110.32kPa) Data type: Floating point number Reserved for Future Use (Do not use) User Input Correction Factor, F u (0 < Fu < 2.0) Data type: Floating point number Reserved for Future Use (Do not use) Beginning of Day Hour (0 ... 23) Data type: Unsigned integer value Reserved for API 21.1 Atmospheric Pressure P at (3 <= Pat <30psi) (20.684 <= Pat < 206.843kPa) Data type: Floating point number Low Flow Cut Off Level (>= 0ft3/Hr) (>= 0m3/Hr) Used if enabled in 4x+4: 2. Data type: Floating point number
4xxxx+36 through 37
4xxxx+38 through 39
4xxxx+40 through 41
4xxxx+42 through 43
4xxxx+44 through 45
4xxxx+60 through 63 4xxxx+64
4xxxx+81 through 82
522
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Inputs Detail Method 11 The following inputs apply to detail method 11.
Inputs Description
Applies when using Detail Method 11 4xxxx+83 through 84 Mole % of Methane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Nitrogen, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Carbon Dioxide, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Ethane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Propane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Water, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Hydrogen Sulfide, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Hydrogen, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Carbon Monoxide, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Oxygen, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of I-Butane, x i *(0.0 <= xi <= 100) Data type: Floating point number
4xxxx+85 through 86
4xxxx+87 through 88
4xxxx+89 through 90
xxx+91 through 92
4xxxx+93 through 94
4xxxx+95 through 96
4xxxx+97 through 98
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Inputs
Description
Applies when using Detail Method 11 4xxxx+105 through 106 Mole % of n-Butane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of I-Pentane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of n-Pentane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Hexane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Heptane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Octane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Nonane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Decane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Helium, x i *(0.0 <= xi <= 30) Data type: Floating point number Reserved for future use (do not use)
*Valid range
524
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Inputs Gross Methods 10, 12, and 13 The following inputs apply to gross methods 10, 12, and 13.
Inputs Description
Applies when using Gross Methods 10, 12, and 13 4xxxx+83 through 84 Mole % of Methane, x i *(0.0 <= xi <= 100) Data type: Floating point number (Required for method 13 ONLY) Mole % of Nitrogen, x i *(0.0 <= xi <= 100) Data type: Floating point number (Required for methods 10, 12, and 13) Mole % of Carbon Dioxide, x i *(0.0 <= xi <= 100) Data type: Floating point number (Required for methods 10, 12, and 13) Specific Gravity, G r (0.07 <= Gr < 1.52 Data type: Floating point number (Required for methods 10, 12, and 13) Heating Value, HV (0.07 HV < 1800) Data type: Floating point number (Required for method 12 ONLY)
4xxxx+85 through 86
4xxxx+87 through 88
4xxxx+93 through 94
4xxxx+95 through 96
*Valid range
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525

Outputs 4xxxx+0 4xxxx+1 4xxxx+2 4xxxx+125 through 126 4xxxx+127 through 128 4xxxx+129 through 130 4xxxx+131 through 132 4xxxx+133 through 134 4xxxx+135 through 136 Description System Warning/Error Code (Displayed in Hex mode) Program Warning/Error Code Version Number (Displayed in Hex mode) Temperature at Flowing Conditions (Tf) (F or C) Pressure (Pf) (psia or kPa) Differential Pressure (hw) (in H2O or kPa) Integral Value (IV) Integral Multiplier Value (IMV) Volume Flow Rate at Base Conditions (Tb, Pb), Qb ft3/hr or m3/hr 4xxxx+137 through 138 4xxxx+139 through 140 4xxxx+141 through 142 4xxxx+143 through 144 4xxxx+145 through 152 4xxxx+153 4xxxx+155: 13 4xxxx+155: 14 4xxxx+155: 15 4xxxx+155: 16 Reserved for future use (do not use) Accumulated Volume Current Day Accumulated Volume Last Hour Accumulated Volume Last Day Reserved for API 21.1 User-definable warning/error value (Use for API 21.1) 4xxxx Table Differs from Actual Configuration Flow Rate Solve Complete Heartbeat Block is Functioning Heartbeat End of Day Flag Note: This status bit does not appear in the DX Zoom screen but may be used in program logic.
526
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Optional Outputs 4xxxx+156 through 165 4xxxx+166 through 167 4xxxx+168 through 169 4xxxx+170 through 171 4xxxx+172 through 173 4xxxx+174 through 180 Description Reserved for future use (do not use) Supercompressibility, F pv Gas Relative Density, G r Reserved for future use (do not use) Expansion Factor, Y Reserved for future use (do not use)
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527
528
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GG92 Gross Method Gas Flow Function Block 31007523 8/2010
GG92 AGA #3 1992 Gross Method Gas Flow Function Block
91
Introduction This chapter describes the instruction GG92 AGA #3 and AGA #8 1992 gross method gas flow function block. What's in this Chapter? This chapter contains the following topics:
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529
GG92 Gross Method Gas Flow Function Block
Short Description
Function Description The GG92 gas flow loadable function block is available only on certain Compact and Micro controllers. The gas flow loadable function block allows you to run AGA 3 (1992) and AGA 8 (1992) equations. The computed flow rates agree within 1 ppm of the published AGA standards. The GG92 allows the API 21.1 audit trail. The GG92 permits 8 passes. The GG92 instruction uses the detail method of characterization requiring detailed knowledge of the gas composition. NOTE: You must install the LSUP loadable before the GG92. More Information For detailed information about the gas flow function block loadables, especially the: system warning/error codes (4x+0) for each instruction program warning/error codes (4x+1) for each instruction API 21.1 Audit Trail GET_LOGS.EXE utility SET_SIZE.EXE utility please see the Modicon Starling Associates Gas Flow Loadable Function Block User Guide (890 USE 137).
530
31007523 8/2010
Representation

31007523 8/2010
531
Data Type None
Meaning Allows you to set a warning. Allows you to set a warning and log peripheral activities in the audit trail event log without stopping the block. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 533.) Allows you to set an error and STOP the flow function. Allows you to set an error, log peripheral errors in the audit trail event log, and STOP the flow function. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 533.) The top node must contain a constant, #0001. The 4x register entered in the middle node is the first in a group of contiguous holding registers that comprise the configuration parameters and values associated with the Gas Flow Block. Important: Do not attempt to change the middle node 4x register while the Gas Flow Block is running. You will lose your data. If you need to change the 4x register, first STOP the PLC. The bottom node specifies the calculation type and must contain a constant, #0003. The integer value entered in the bottom node specifies the characterization method: 1 - Gross Method 1 (HV-Gr-CO2) 2 - Gross Method 2 (Gr-CO2-N2) ON = Operation successful ON = System or program warning ON = System or program error
Bottom input
0x, 1x
None
4x 4x
INT, UINT INT, UINT
method (bottom node)
INT, UINT
0x 0x 0x
None None None
532
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Configuration Table You must fill in all pertinent values in the configuration table using the reference data editor either in ProWORX or Concept, or the DX Zoom screens in Modsoft, or Meter Manager. The following inputs table lists all the configuration parameters that you must fill in. The outputs (Outputs Results Table) and the optional outputs (Optional Outputs Results Table) show the calculation results of the block. Some of those parameters are required. NOTE: Only valid entries are allowed. Entries outside the valid ranges are not accepted. Illegal entries result in errors or warnings. NOTE: Concept 2.1 or higher may be used to load the gas blocks. However, Concept and ProWORX do not provide help or DX zoom screens for configuration. When using Concept or ProWORX panel software, we recommend you use Meter Manager for your configuration needs. Inputs The following is a detailed description of configuration variables for the GG92 gas flow function block.
Inputs 4xxxx+3: 1 through 2 Description Location of Taps 1 - Upstream 2 - Downstream Meter Tube Material 1 - Stainless Steel 2 - Monel 3 - Carbon Steel Orfice Material 1 - Stainless Steel 2 - Monel 3 - Carbon Steel Reserved for future use (do not use) Optional Outputs 1 - Yes 2 - No Note: When using only the standard outputs, the loadable uses 157 4xxxx registers. When using the optional outputs, the loadable uses 181 4xxxx registers. Reserved for Future Use (Do not use)
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533
Inputs 4xxxx+4: 1
Description Absolute/Gauge Pressure 0 - Static Pressure Measured in Absolute Units 1 - Static Pressure Measured in Gauge Units Low Flow Cut Off 0 - Do Not Use Flow Cut Off 1 - Use Flow Cut Off Load Command 0 - Ready to Accept Command 1 - CMD: Send Configuration to Internal Table from 4xxxx 2 - CMD: Read Configuration from Internal Table to 4xxxx 3 - CMD: Reset API 21.1 configuration change log Input Type 1 - 3xxxx Pointers entered in 4x+6 ... 4x+10 2 - Input Values entered in 4x+6 ... 4x+10 Mole % Error Limits 1 - Enable 2 - Disable Dual Range Differential Pressure Option 1 - Yes 2 - No Compressible/Incompressible 1 - Compressible 2 - Incompressible Averaging Methods 0 - Flow Dependent Time Weighted Linear 1 - Flow Dependent Time Weighted Formulaic 2 - Flow Weighted Linear 3 - Flow Weighted Formulaic Note: For most applications you will use 0. Measurement Units 1 - US 2 - Metric (SI) Reserved for future use (do not use) Reserved for API 21.1 Temperature 3xxxx Pointer or Input Value Data type: Unsigned integer value Pressure (absolute) 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 1 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 2 3xxxx Pointer or Input Value Data type: Unsigned integer value
4xxxx+4: 2
534
31007523 8/2010
Description Analog Input Raw Value Minimum Temperature Data type: Unsigned integer value Analog Input Raw Value Maximum Temperature Data type: Unsigned integer value Analog Input Raw Value Minimum Pressure Data type: Signed integer value Analog Input Raw Value Maximum Pressure Data type: Signed integer value Analog Input Raw Value Minimum Differential Pressure 1 Data type: Signed integer value Analog Input Raw Value Maximum Differential Pressure 1 Data type: Signed integer value Analog Input Raw Value Minimum Differential Pressure 2 Data type: Signed integer value Analog Input Raw Value Maximum Differential Pressure 2 Data type: Signed integer value Engineering Unit Temperature Minimum 14 through 149F (-10 through 65C) Data type: Floating point number Engineering Unit Temperature Maximum 14 through 149F (-10 through 65C) Data type: Floating point number Engineering Unit Pressure Minimum 0 through 1,470psia (0 through 11,996kPa) Data type: Floating point number Engineering Unit Pressure Maximum 0 through 1,470psia (0 through 11,996kPa) Data type: Floating point number Engineering Unit Differential Pressure 1 Minimum >= 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 1 Maximum > 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 2 Minimum >= 0 (inches H2O or kPa) Data type: Floating point number Engineering Unit Differential Pressure 2 Maximum > 0 (inches H2O or kPa) Data type: Floating point number
4xxxx+20 through 21
4xxxx+22 through 23
4xxxx+24 through 25
4xxxx+26 through 27
4xxxx+28 through 29
4xxxx+30 through 31
4xxxx+32 through 33
31007523 8/2010
535
Description Orifice Plate Diameter, d r (0 < dr < 100in) (0 < dr < 2540mm) Data type: Floating point number Orifice Plate Diameter Measurement Temperature, T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Meter Tube Internal Diameter D r (0 <Dr <100in) (0 < Dr < 2540mm) Data type: Floating point number Measured Meter Tube Internal Diameter Temperature T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Base Temperature, T b (32.0 <= Tb < 77.0F) (0 <= Tb < 25C) Data type: Floating point number Base Pressure, P b (13.0 <= Pb < 16.0PSIA) (89.63 <= Pb < 110.32kPa) Data type: Floating point number Reference Temperature for Relative Density, T gr (32.0 <= Tgr < 77.0F) (0 <= Tgr < 25C) Data type: Floating point number Reference Pressure for Relative Density, P gr (13.0 <= Pgr < 16.0PSIA) (89.63 <= Pgr < 110.32kPa) Data type: Floating point number Reference Temperature for Molar Density, T d (32.0 <= Td < 77.0F) (0 <=Td < 25C) Data type: Floating point number Reference Pressure for Molar Density, P d (13.0 <= Pd < 16.0PSIA) (89.63 <= Pd < 110.32kPa Data type: Floating point number Reference Temperature fo Heating Value, T h (32.0 <= Th < 77.0) (0 <=Th < 25C) Data type: Floating point number Reserved for Future Use (Do not use) User Input Correction Factor, F u (0 < Fu < 2.0) Data type: Floating point number
4xxxx+36 through 37
4xxxx+38 through 39
4xxxx+40 through 41
4xxxx+42 through 43
4xxxx+44 through 45
4xxxx+46 through 47
4xxxx+48 through 49
4xxxx+50 through 51
4xxxx52 through 53
4xxxx+54 through 55
536
31007523 8/2010
Description Absolute Viscosity of Flowing Fluid, c (0.01 <= c <= 0.1 centipoise) Data type: Floating point number Isentropic Exponent, k (1.0 <= k < 2.0) Data type: Floating point number Beginning of Day Hour (0 ... 23) Data type: Unsigned integer value Reserved for API 21.1 Atmospheric Pressure P at (3 <= Pat <30psi) (20.684 <= Pat < 206.843kPa) Data type: Floating point number Low Flow Cut Off Level (>= 0ft3/Hr) (>= 0m3/Hr) Data type: Floating point number
4xxxx+62 through 63
4xxxx+64
4xxxx+81 through 82
Reserved for future use (do not use) Mole % of Nitrogen, x i *(0.0 <= xi <= 50) (Required for method 2 only) Data type: Floating point number Mole % of Carbon Dioxide, x i *(0.0 <= xi <= 30) Data type: Floating point number Mole % of Hydrogen, x i *(0.0 <= xi <= 10) Data type: Floating point number Mole % of Carbon Monoxide, x i *(0.0 <= xi <= 3) Data type: Floating point number Specific Gravity, G r *(.55 < Gr < 0.87)) Data type: Floating point number Heating Value, HV *(477 <= HV < 1211BTU/Ft3) (17.7725 <= HV < 45.1206Kj/dm3) (Required for method 1 only) Data type: Floating point number
4xxxx+87 through 88
4xxxx+89 through 90
4xxxx+91 through 92
4xxxx+93 through 94
4xxxx+95 through 96
Reserved for future use (do not use)
*Valid range
31007523 8/2010
537

Outputs 4xxxx+0 4xxxx+1 4xxxx+2 4xxxx+125 through 126 4xxxx+127 through 128 4xxxx+129 through 130 4xxxx+131 through 132 4xxxx+133 through 134 4xxxx+135 through 136 Description System Warning/Error Code (Displayed in Hex mode) Program Warning/Error Code Version Number (Displayed in Hex mode) Temperature at Flowing Conditions (Tf) (F or C) Pressure (Pf) (psia or kPa) Differential Pressure (hw) (in H2O or kPa) Integral Value (IV) Integral Multiplier Value (IMV) Volume Flow Rate at Base Conditions (Tb, Pb), Qb (ft3/hr or m3/hr 4xxxx+137 through 138 4xxxx+139 through 140 4xxxx+141 through 142 4xxxx+143 through 144 4xxxx+145 through 152 4xxxx+153 4xxxx+155: 13 4xxxx+155: 14 4xxxx+155: 15 4xxxx+155: 16 Mass Flow Rate (Qm) (lbm/hr or Kg/hr) Accumulated Volume Current Day Accumulated Volume Last Hour Accumulated Volume Last Day Reserved for API 21.1 User definable warning/error value (Use for API 21.1) 4xxxx Table Differs from Actual Configuration Flow Rate Solve Complete Heartbeat Block is Functioning Heartbeat End of Day Flag
538
31007523 8/2010

31007523 8/2010
539
540
31007523 8/2010
GM92 - Gas Flow Function Block 31007523 8/2010
GM92 AGA #3 and #8 1992 Detail Method Gas Flow Function Block
92
Introduction This chapter describes the instruction GM92 AGA #3 and #8 1992 detail method with API 21.1 audit trail. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
541
GM92 - Gas Flow Function Block
Short Description
Function Description The GM92 gas flow loadable function block is available only on certain Compact and Micro controllers. The gas flow loadable function block allows you to run AGA 3 (1992) and AGA 8 (1992) equations. The computed flow rates agree within 1 ppm of the published AGA standards. This function block allows you to run the API 21.1 audit trail. The block has 8 mether runs. NOTE: You must install the LSUP loadable before the GM92. More Information For detailed information about the gas flow function block loadables, especially the: system warning/error codes (4x+0) for each instruction program warning/error codes (4x+1) for each instruction API 21.1 Audit Trail GET_LOGS.EXE utility SET_SIZE.EXE utility please see the Modicon Starling Associates Gas Flow Loadable Function Block User Guide (890 USE 137).
542
31007523 8/2010
Representation

31007523 8/2010
543
Data Type None
Meaning Allows you to set a warning. Allows you to set a warning and log peripheral activities in the audit trail event log without stopping the block. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 545.) Allows you to set an error and STOP the flow function. Allows you to set an error, log peripheral errors in the audit trail event log, and STOP the flow function. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 545.) The top node must contain a constant, #0001. The 4x register entered in the middle node is the first in a group of contiguous holding registers that comprise the configuration parameters and values associated with the Gas Flow Block. Important: Do not attempt to change the middle node 4x register while the Gas Flow Block is running. You will lose your data. If you need to change the 4x register, first STOP the PLC. The bottom node specifies the calculation type and must contain a constant, #0003. ON = Operation successful ON = System or program warning ON = System or program error
Bottom input
0x, 1x
None
4x 4x
INT, UINT INT, UINT
544
31007523 8/2010

Configuration Table You must fill in all pertinent values in the configuration table using the reference data editor either in ProWORX or Concept, or the DX Zoom screens in Modsoft, or Meter Manager. The following inputs table lists all the configuration parameters that you must fill in. The outputs (Outputs Results Table) and the optional outputs (Optional Outputs Results Table) show the calculation results of the block. Some of those parameters are required. NOTE: Only valid entries are allowed. Entries outside the valid ranges are not accepted. Illegal entries result in errors or warnings. NOTE: Concept 2.1 or higher may be used to load the gas blocks. However, Concept and ProWORX do not provide help or DX zoom screens for configuration. When using Concept or ProWORX panel software, we recommend you use Meter Manager for your configuration needs. Inputs The following is a detailed description of configuration variables for the GD92 gas flow function block.
31007523 8/2010
545
Inputs 4xxxx+4: 1
Description Absolute/Gauge Pressure 0 - Static Pressure Measured in Absolute Units 1 - Static Pressure Measured in Gauge Units Low Flow Cut Off 0 - Do Not Use Flow Cut Off 1 - Use Flow Cut Off Load Command 0 - Ready to Accept Command 1 - CMD: Send Configuration to Internal Table from 4xxxx 2 - CMD: Read Configuration from Internal Table to 4xxxx 3 - CMD: Reset API 21.1 configuration change log Input Type 1 - 3xxxx Pointers entered in 4x+6 ... 4x+10 2 - Input Values entered in 4x+6 ... 4x+10 Mole % Error Limits 1 - Enable 2 - Disable Dual Range Differential Pressure Option 1 - Yes 2 - No Compressible/Incompressible 1 - Compressible 2 - Incompressible Averaging Methods 0 - Flow Dependent Time Weighted Linear 1 - Flow Dependent Time Weighted Formulaic 2 - Flow Weighted Linear 3 - Flow Weighted Formulaic Note: For most applications you will use 0. Measurement Units 1 - US 2 - Metric (SI) Reserved for Future Use (Do not use) Reserved for API 21.1 Temperature 3xxxx Pointer or Input Value Data type: Unsigned integer value Pressure (absolute) 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 1 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 2 3xxxx Pointer or Input Value Data type: Unsigned integer value
4xxxx+4: 2
546
31007523 8/2010
4xxxx+20 through 21
4xxxx+22 through 23
4xxxx+24 through 25
4xxxx+26 through 27
4xxxx+28 through 29
4xxxx+30 through 31
4xxxx+32 through 33
31007523 8/2010
547
Description Orifice Plate Diameter, d r (0 < dr < 100in) (0 < dr < 2540mm) Data type: Floating point number Orifice Plate Diameter Measurement Temperature, T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Meter Tube Internal Diameter D r (0 <Dr <100in) (0 < Dr < 2540mm) Data type: Floating point number Measured Meter Tube Internal Diameter Temperature T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Base Temperature, T b (32.0 <= Tb < 77.0F) (0 <= Tb < 25C) Data type: Floating point number Base Pressure, P b (13.0 <= Pb < 16.0PSIA) (89.63 <= Pb < 110.32kPa) Data type: Floating point number Reference Temperature for Relative Density, T gr (32.0 <= Tgr < 77.0F) (0 <= Tgr < 25C) Data type: Floating point number Reference Pressure for Relative Density, P gr (13.0 <= Pgr < 16.0PSIA) (89.63 <= Pgr < 110.32kPa) Data type: Floating point number Reserved for Future Use (Do not use) User Input Correction Factor, F u (0 < Fu < 2.0) Data type: Floating point number Absolute Viscosity of Flowing Fluid, c (0.005 <= c <= 0.5 centipoise) Data type: Floating point number Isentropic Exponent, k (1.0 <= k < 2.0) Data type: Floating point number Beginning of Day Hour (0 ... 23) Data type: Unsigned integer value Reserved for API 21.1
4xxxx+36 through 37
4xxxx+38 through 39
4xxxx+40 through 41
4xxxx+42 through 43
4xxxx+44 through 45
4xxxx+46 through 47
4xxxx+48 through 49
4xxxx+60 through 61
4xxxx+62 through 63
4xxxx+64
4xxxx+65 through 78
548
31007523 8/2010
Description Atmospheric Pressure P at (3 <= Pat <30psi) (20.684 <= Pat < 206.843kPa) Data type: Floating point number Low Flow Cut Off Level (>= 0ft3/Hr) (>= 0m3/Hr) Used if enabled in 4x+4: 2. Data type: Floating point number
4xxxx+81 through 82
4xxxx+83 through 84
Mole % of Methane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Nitrogen, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Carbon Dioxide, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Ethane, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Propane, x i *(0.0 <= xi <= 12) Data type: Floating point number Mole % of Water, x i *(0.0 <= xi <= 10) Data type: Floating point number Mole % of Hydrogen Sulfide, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Hydrogen, x i *(0.0 <= xi <= 100) Data type: Floating point number Mole % of Carbon Monoxide, x i *(0.0 <= xi <= 3) Data type: Floating point number Mole % of Oxygen, x i *(0.0 <= xi <= 21) Data type: Floating point number
4xxxx+85 through 86
4xxxx+87 through 88
4xxxx+89 through 90
xxx+91 through 92
4xxxx+93 through 94
4xxxx+95 through 96
4xxxx+97 through 98
31007523 8/2010
549
Description Mole % of I-Butane, x i *(0.0 <= xi <= 6) for combined butanes Data type: Floating point number Mole % of n-Butane, x i *(0.0 <= xi <= 6) for combined butanes Data type: Floating point number Mole % of I-Pentane, x i *(0.0 <= xi <= 4) for combined pentanes Data type: Floating point number Mole % of n-Pentane, x i *(0.0 <= xi <= 4) for combined pentanes Data type: Floating point number Mole % of Hexane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Heptane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Octane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Nonane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Decane, x i *(0.0 <= xi <= 10) for combined hexanes + Data type: Floating point number Mole % of Helium, x i *(0.0 <= xi <= 30) Data type: Floating point number Mole % of Argon, x i *(0.0 <= xi <= 100) Data type: Floating point number
*Valid range
550
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Outputs 4xxxx+0 4xxxx+1 4xxxx+2 4xxxx+125 through 126 4xxxx+127 through 128 4xxxx+129 through 130 4xxxx+131 through 132 4xxxx+133 through 134 4xxxx+135 through 136 Description System Warning/Error Code (Displayed in Hex mode) Program Warning/Error Code Version Number (Displayed in Hex mode) Temperature at Flowing Conditions (Tf) (F or C) Pressure (Pf) (psia or kPa Differential Pressure (hw) (in H2O or kPa) Integral Value (IV) Integral Multiplier Value (IMV) Volume Flow Rate at Base Conditions (Tb, Pb), Qb (ft3/hr or m3/hr) 4xxxx+137 through 138 4xxxx+139 through 140 4xxxx+141 through 142 4xxxx+143 through 144 4xxxx+145 through 152 4xxxx+153 4xxxx+155: 13 4xxxx+155: 14 4xxxx+155: 15 4xxxx+155: 16 Mass Flow Rate (Qm) (lbm/hr or Kg/hr) Accumulated Volume Current Day Accumulated Volume Last Hour Accumulated Volume Last Day Reserved for API 21.1 User definable warning/error value (Use for API 21.1) 4xxxx Table Differs from Actual Configuration Flow Rate Solve Complete Heartbeat Block is Functioning Heartbeat End of Day Flag
31007523 8/2010
551

552
31007523 8/2010
G392 Gas Flow Function Block 31007523 8/2010
G392 AGA #3 1992 Gas Flow Function Block
93
Introduction This chapter describes the instruction G392 AGA #3 1992 gross method with API 21.1 audit trail. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
553
G392 Gas Flow Function Block
Short Description
Function Description The G392 gas flow loadable function block is available only on certain Compact and Micro controllers. The gas flow loadable function block allows you to run AGA 3 (1992) equations. The computed flow rates agree within 1 ppm of the published AGA standards. NOTE: You must install the LSUP loadable before the G392. More Information For detailed information about the gas flow function block loadables, especially the: system warning/error codes (4x+0) for each instruction program warning/error codes (4x+1) for each instruction API 21.1 Audit Trail GET_LOGS.EXE utility SET_SIZE.EXE utility please see the Modicon Starling Associates Gas Flow Loadable Function Block User Guide (890 USE 137).
554
31007523 8/2010
Representation

31007523 8/2010
555
Data Type None
Meaning Allows you to set a warning. Allows you to set a warning and log peripheral activities in the audit trail event log without stopping the block. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 557.) Allows you to set an error and STOP the flow function. Allows you to set an error, log peripheral errors in the audit trail event log, and STOP the flow function. Important: You MUST fill in all pertinent values in the configuration table. (For information about entering values, see Configuration Table, page 557.) The top node must contain a constant, #0001. The 4x register entered in the middle node is the first in a group of contiguous holding registers that comprise the configuration parameters and values associated with the Gas Flow Block. Important: Do not attempt to change the middle node 4x register while the Gas Flow Block is running. You will lose your data. If you need to change the 4x register, first STOP the PLC. The bottom node specifies the calculation type and must contain a constant, #0017. ON = Operation successful ON = System or program warning ON = System or program error
Bottom input
0x, 1x
None
4x 4x
INT, UINT INT, UINT
556
31007523 8/2010

Configuration Table You must fill in all pertinent values in the configuration table using the reference data editor either in ProWORX or Concept, or the DX Zoom screens in Modsoft, or Meter Manager. The following inputs table lists all the configuration parameters that you must fill in. The outputs (Outputs Results Table) and the optional outputs (Optional Outputs Results Table) show the calculation results of the block. Some of those parameters are required. NOTE: Only valid entries are allowed. Entries outside the valid ranges are not accepted. Illegal entries result in errors or warnings. NOTE: Concept 2.1 or higher may be used to load the gas blocks. However, Concept and ProWORX do not provide help or DX zoom screens for configuration. When using Concept or ProWORX panel software, we recommend you use Meter Manager for your configuration needs. Inputs The following is a detailed description of configuration variables for the G392 gas flow function block.
Inputs 4xxxx+3: 1 through 2 Description Location of Taps 1 - Upstream 2 - Downstream Meter Tube Material 1 - Stainless Steel 2 - Monel 3 - Carbon Steel Orfice Material 1 - Stainless Steel 2 - Monel 3 - Carbon Steel Compressibility User Input Type 1 - Density at flowing and base condition 2 - Compressibility factor at flowing and base conditions and gas relative density at base conditions Optional Outputs 1 - Yes 2 - No Note: When using only the standard outputs, the loadable uses 157 4xxxx registers. When using the optional outputs, the loadable uses 181 4xxxx registers. 557
31007523 8/2010
Inputs 4xxxx+3: 11 through 16 4xxxx+4: 1
Description Reserved for Future Use (Do not use) Absolute/Gauge Pressure 0 - Static Pressure Measured in Absolute Units 1 - Static Pressure Measured in Gauge Units Low Flow Cut Off 0 - Do Not Use Flow Cut Off 1 - Use Flow Cut Off Load Command 0 - Ready to Accept Command 1 - CMD: Send Configuration to Internal Table from 4xxxx 2 - CMD: Read Configuration from Internal Table to 4xxxx 3 - CMD: Reset API 21.1 configuration change log Input Type 1 - 3xxxx Pointers entered in 4x+6 ... 4x+10 2 - Input Values entered in 4x+6 ... 4x+10 Reserved for Future Use (Do not use) Dual Range Differential Pressure Option 1 - Yes 2 - No Compressible/Incompressible 1 - Compressible 2 - Incompressible Averaging Methods 0 - Flow Dependent Time Weighted Linear 1 - Flow Dependent Time Weighted Formulaic 2 - Flow Weighted Linear 3 - Flow Weighted Formulaic Note: For most applications you will use 0. Measurement Units 1 - US 2 - Metric (SI) Reserved for Future Use (Do not use) Reserved for API 21.1 Temperature 3xxxx Pointer or Input Value Data type: Unsigned integer value Pressure (absolute) 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 1 3xxxx Pointer or Input Value Data type: Unsigned integer value Differential Pressure 2 3xxxx Pointer or Input Value Data type: Unsigned integer value
4xxxx+4: 2
558
31007523 8/2010
4xxxx+20 through 21
4xxxx+22 through 23
4xxxx+24 through 25
4xxxx+26 through 27
4xxxx+28 through 29
4xxxx+30 through 31
4xxxx+32 through 33
31007523 8/2010
559
Description Orifice Plate Diameter, d r (0 < dr < 100in) (0 < dr < 2540mm) Data type: Floating point number Orifice Plate Diameter Measurement Temperature, T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Meter Tube Internal Diameter D r (0 <Dr <100in) (0 < Dr < 2540mm) Data type: Floating point number Measured Meter Tube Internal Diameter Temperature T r (32 <= Tr < 77F) (0 <= Tr < 25C) Data type: Floating point number Base Temperature, T b (32.0 <= Tb < 77.0F) (0 <= Tb < 25C) Data type: Floating point number Base Pressure, P b (13.0 <= Pb < 16.0PSIA) (89.63 <= Pb < 110.32kPa) Data type: Floating point number Reserved for Future Use (Do not use) User Input Correction Factor, F u (0 < Fu < 2.0) Data type: Floating point number Absolute Viscosity of Flowing Fluid, c (0.005 <= c <= 0.5 centipoise) Data type: Floating point number Isentropic Exponent, k (1.0 <= k < 2.0) Data type: Floating point number Beginning of Day Hour (0 ... 23) Data type: Unsigned integer value Reserved for API 21.1 configuration Atmospheric Pressure P at (3 <= Pat <30psi) (20.684 <= Pat < 206.843kPa) Data type: Floating point number Low Flow Cut Off Level (>= 0ft3/Hr) (>= 0m3/Hr) Used if enabled in 4x+4: 2. Data type: Floating point number
4xxxx+36 through 37
4xxxx+38 through 39
4xxxx+40 through 41
4xxxx+42 through 43
4xxxx+44 through 45
4xxxx+60 through 61
4xxxx+62 through 63
4xxxx+64
4xxxx+81 through 82
560
31007523 8/2010
Description Density at Flowing Conditions, f (0 < f < 1000.0lbm/ft3) (0 < f < 1601.846kg/m3) Data type: Floating point number
4xxxx+85 through 86
Density at Base Conditions, b (0 < b < 100.0lbm/ft3) (0 < b < 1601.846kg/m3 Data type: Floating point number
4xxxx+87 through 88
Compressibility Factor at Flowing Conditions, Z f (0 < Zf < 3) Data type: Floating point number Compressibility Factor at Base Conditions, Z b (0 < Zb < 3) Data type: Floating point number Gas Relative Density at Base Conditions, Gr (0.07 <= Gr < 1.52) Data type: Floating point number Reserved for future use (do not use)
4xxxx+89 through 90
xxx+91 through 92
31007523 8/2010
561

Outputs 4xxxx+0 4xxxx+1 4xxxx+2 4xxxx+125 through 126 4xxxx+127 through 128 4xxxx+129 through 130 4xxxx+131 through 132 4xxxx+133 through 134 4xxxx+135 through 136 Description System Warning/Error Code (Displayed in Hex mode) Program Warning/Error Code Version Number (Displayed in Hex mode) Temperature at Flowing Conditions (Tf) ((F or C) Pressure (Pf) (psia or kPa) Differential Pressure (hw) (in H2O or kPa) Integral Value (IV) Integral Multiplier Value (IMV) Volume Flow Rate at Base Conditions (Tb, Pb), Qb (ft3/hr or m3/hr) 4xxxx+137 through 138 4xxxx+139 through 140 4xxxx+141 through 142 4xxxx+143 through 144 4xxxx+145 through 152 4xxxx+153 4xxxx+155: 13 4xxxx+155: 14 4xxxx+155: 15 4xxxx+155: 16 Mass Flow Rate (Qm) Accumulated Volume Current Day Accumulated Volume Last Hour Accumulated Volume Last Day Reserved for API 21.1 User definable warning/error value (Use for API 21.1) 4xxxx Table Differs from Actual Configuration Flow Rate Solve Complete Heartbeat Block is Functioning Heartbeat End of Day Flag
562
31007523 8/2010

Optional Outputs 4xxxx+156 through 157 4xxxx+158 through 159 4xxxx+160 through 161 4xxxx+162 through 163 4xxxx+164 through 165 4xxxx+166 through 167 4xxxx+168 through 169 4xxxx+170 through 171 4xxxx+172 through 173 4xxxx+174 through 175 4xxxx+176 through 177 4xxxx+178 through 179 4xxxx+180 Description Compressibility at Flowing Conditions (Tf, Pf), Zf Compressibility at Base Conditions (Tb, Pb), Zb Reserved for future use (do not use) Density at Fluid Flowing Conditions (Pt,p) Density of Fluid at Base Conditions () Supercompressibility (Fpv) Gas Relative Density (Gr) Orifice Plate Coefficient of Discharge (Cd) Expansion Factor (Y) Velocity of Approach Factor (Ev) Volume Flow Rate at Flowing Conditions (Tf, Pf), Qf Reserved for future use (do not use) Orifice Plate Coefficient of Discharge Bounds Flag within Iteration Scheme (Cd-f)
31007523 8/2010
563
564
31007523 8/2010
HLTH: History and Status Matrices 31007523 8/2010
HLTH: History and Status Matrices
94
Introduction This chapter describes the instruction HLTH. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Parameter Description Top Node (History Matrix) Parameter Description Middle Node (Status Matrix) Parameter Description Bottom Node (Length) Page 566 567 568 569 574 578
31007523 8/2010
565
Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see Installation of DX Loadables, page 75. The HLTH instruction creates history and status matrices from internal memory registers that may be used in ladder logic to detect changes in PLC status and communication capabilities with the I/O. It can also be used to alert the user to changes in a PLC System. HLTH has two modes of operation, (learn) and (monitor).
566
31007523 8/2010
Representation

Parameters Top input Middle input State RAM Data Type Meaning Reference 0x, 1x 0x, 1x None None ON initiates the designated operation Learn / monitor mode (For expanded and detailed information, see Learn / Monitor Mode (MIddle and Bottom Input), page 568.) Learn / monitor mode (For expanded and detailed information, see Learn / Monitor Mode (MIddle and Bottom Input), page 568.)
Bottom input
0x, 1x
None
history (top node) status (middle node) length (bottom node) Top output MIddle output Bottom output
4x 4x
INT, UINT, History matrix (first in a block of contiguous WORD registers, range: 6 ... 135) INT, UINT, Status matrix (first in a block of contiguous WORD registers, range: 3 ... 132) INT, UINT length = (number of RIO drops x 4) + 3 Echoes state of the top input Echoes state of the middle input ON = Error 567 None None None
0x 0x 0x
31007523 8/2010
Modes of operation The HLTH instruction has two modes of operation:
Type of Mode Learn Mode Meaning HLTH can be initialized to learn the configuration in which it is implemented and save the information as a point-in-time reference called history matrix. This matrix contains: A user-designated drop number for communications status monitoring User logic checksum Disabled I/O indicator S911 Health Choice of single or dual cable system I/O Map display Monitor mode enables an operation that checks PLC system conditions. Detected changes are recorded in a status matrix., which monitors the most recent system conditions and sets bit patterns to indicate detected changes. The status matrix contains: Communication status of the drop designated in the history matrix A flag to indicate when there is any disabled I/O Flags to indicate the "on/off" status of constant sweep and the Memory protect key switch Flags to indicate a battery-low condition and if Hot Standby is functional Failed module position data Changed user logic checksum flag RIO lost-communication flag
Monitor Mode
Learn / Monitor Mode (MIddle and Bottom Input) The HLTH instruction block has three control inputs and can produce three possible outputs. The combined states of the middle and bottom inputs control the operating mode:
Middle Input ON ON OFF OFF Bottom Input OFF ON ON OFF Operation Learn Mode as Dual Cable System Learn Mode as Single Cable System Monitor Mode Monitor Mode Update Logic Checksum
568
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Parameter Description Top Node (History Matrix)

History Matrix (Top Node) The 4x register entered in the top node is the first in a block of contiguous registers that comprise the history matrix. The data for the history matrix is gathered by the instruction during a learn mode operation and is set in the matrix when the mode changes to monitor. The history matrix can range from 6 ... 135 registers in length. Below is a description of the words in the history matrix. The information from word 1 is contained in the displayed register in the top node and the information from words 2 ... 135 is stored in the implied registers. Word 1 Enter drop number (range 0 ... 32) to be monitored for retries Word 2 High word of learned checksum Word 3 Low word of learned checksum Word 4 The status and a counter for multiplexing the inputs. HLTH processes 16 words of input (256 inputs) per scan. This word holds the last word location of the last scan. The register is overwritten on every scan. The value in the counter portion of the word increases to the maximum number of inputs, then restarts at 0. Usage of word 4:
Bit 1 2 - 16
Function 1 = at least one disabled input has been found Count of the number of word checked for disabled inputs prior to this scan.
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569
Word 5 Status and a counter for multiplexing outputs to detect if one is disabled. HLTH looks at 16 words (256 outputs) per scan to find one that is disabled. It holds the last word location of the last scan. The block is overwritten on every scan. The value in the counter portion increases to maximum outputs then restarts at 0. Usage of word 5:
Bit 1 2 - 16
Function 1 = at least one disabled output has been found. Count of the number of word checked for disabled outputs prior to this scan.
Word 6 Hot Standby cable learned data Usage of word 6:
Bit 1 2-8 9 10 11 - 16
Function 1 = S911 present during learn. Not used 1 = cable A is monitored. 1 = cable B is monitored. Not used
Word 7 ... 134 These words define the learned condition of drop 1 to drop 32 as follows:
Word 7 ... 10 11 ... 14 15 ... 18 : : 131 ... 134 Drop No. 1 2 3 : : 32
The structure of the four words allocated to each drop are as follows:
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First Word
Bit 1
Function Drop delay bit 1 Note: Drop delay bits are used by the software to delay the monitoring of the drop for four scans after reestablishing communications with a drop. The delay value is for internal use only and needs no user intervention. Drop delay bit 2 Drop delay bit 3 Drop delay bit 4 Drop delay bit 5 Rack 1, slot 1, module found Rack 1, slot 2, module found Rack 1, slot 3, module found Rack 1, slot 4, module found Rack 1, slot 5, module found Rack 1, slot 6, module found Rack 1, slot 7, module found Rack 1, slot 8, module found Rack 1, slot 9, module found Rack 1, slot 10, module found Rack 1, slot 11, module found
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Second Word
Bit 1 2 3 4 5 6 7 8 9
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Function Rack 2, slot 1, module found Rack 2, slot 2, module found Rack 2, slot 3, module found Rack 2, slot 4, module found Rack 2, slot 5, module found Rack 2, slot 6, module found Rack 2, slot 7, module found Rack 2, slot 8, module found Rack 2, slot 9, module found 571
Bit 10 11 12 13 14 15 16
Function Rack 2, slot 10, module found Rack 2, slot 11, module found Rack 3, slot 1, module found Rack 3, slot 2, module found Rack 3, slot 3, module found Rack 3, slot 4, module found Rack 3, slot 5, module found
Third Word
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Function Rack 3, slot 6, module found Rack 3, slot 7, module found Rack 3, slot 8, module found Rack 3, slot 9, module found Rack 3, slot 10, module found Rack 3, slot 11, module found Rack 4, slot 1, module found Rack 4, slot 2, module found Rack 4, slot 3, module found Rack 4, slot 4, module found Rack 4, slot 5, module found Rack 4, slot 6, module found Rack 4, slot 7, module found Rack 4, slot 8, module found Rack 4, slot 9, module found Rack 4, slot 10, module found
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Fourth Word
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 ... 16
Function Rack 4, slot 11, module found Rack 5, slot 1, module found Rack 5, slot 2, module found Rack 5, slot 3, module found Rack 5, slot 4, module found Rack 5, slot 5, module found Rack 5, slot 6, module found Rack 5, slot 7, module found Rack 5, slot 8, module found Rack 5, slot 9, module found Rack 5, slot 10, module found Rack 5, slot 11, module found not used
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Parameter Description Middle Node (Status Matrix)

Status Matrix (Middle Node) The 4x register entered in the middle node is the first in a block of contiguous holding registers that will comprise the status matrix. The status matrix is updated by the HLTH instruction during monitor mode (top input is ON and middle input is OFF). The status matrix can range from 3 ... 132 registers in length. Below is a description of the words in the status matrix. The information from word 1 is contained in the displayed register in the middle node and the information from words 2 ... 131 is stored in the implied registers. Word 1 This word is a counter for lost-communications at the drop being monitored. Usage of word 1:
Bit 1-8 9 - 16
Function Indicates the number of the drop being monitored (0 ... 32). Count of the lost communication incidents (0 ... 15).
Word 2 This word is the cumulative retry counter for the drop being monitored (the drop number is indicated in the high byte of word 1). Usage of word 2:
Bit 1-4 5 - 16
Function Not used Cumulative retry count (0 ... 255).
Word 3 This word updates PLC status (including Hot Standby health) on every scan.
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Usage of word 3:
Bit 1 2 3 4 5 6 7 - 10 11 12 13 14 15 - 16
Function ON = all drops are not communicating. Not used ON = logic checksum has changed since last learn. ON = at least one disabled 1x input detected. ON = at least one disabled 0x output detected. ON = constant sweep enabled. Not used ON = memory protect is OFF. ON = battery is bad. ON = an S911 is bad. ON = Hot Standby not active. Not used
Word 4 ... 131 These words indicate the status of drop 1 to drop 32 as follows:
Word 4 ... 7 8 ... 11 12 ... 15 : : 128 ... 131 Drop No. 1 2 3 : : 32
The structure of the four words allocated to each drop is as follows: First Word
Bit 1 2 3 4
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Function Drop communication fault detected Rack 1, slot 1, module fault Rack 1, slot 2, module fault Rack 1, slot 3, module fault 575
Bit 5 6 7 8 9 10 11 12 13 14 15 16
Function Rack 1, slot 4, module fault Rack 1, slot 5, module fault Rack 1, slot 6, module fault Rack 1, slot 7, module fault Rack 1, slot 8, module fault Rack 1, slot 9, module fault Rack 1, slot 10, module fault Rack 1, slot 11, module fault Rack 2, slot 1, module fault Rack 2, slot 2, module fault Rack 2, slot 3, module fault Rack 2, slot 4, module fault
Second Word
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Function Rack 2, slot 5, module fault Rack 2, slot 6, module fault Rack 2, slot 7, module fault Rack 2, slot 8, module fault Rack 2, slot 9, module fault Rack 2, slot 10, module fault Rack 2, slot 11, module fault Rack 3, slot 1, module fault Rack 3, slot 2, module fault Rack 3, slot 3, module fault Rack 3, slot 4, module fault Rack 3, slot 5, module fault Rack 3, slot 6, module fault Rack 3, slot 7, module fault Rack 3, slot 8, module fault Rack 3, slot 9, module fault
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Third Word
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Function Rack 3, slot 10, module fault Rack 3, slot 11, module fault Rack 4, slot 1, module fault Rack 4, slot 2, module fault Rack 4, slot 3, module fault Rack 4, slot 4, module fault Rack 4, slot 5, module fault Rack 4, slot 6, module fault Rack 4, slot 7, module fault Rack 4, slot 8, module fault Rack 4, slot 9, module fault Rack 4, slot 10, module fault Rack 4, slot 11, module fault Rack 5, slot 1, module fault Rack 5, slot 2, module fault Rack 5, slot 3, module fault
Fourth Word
Bit 1 2 3 4 5 6 7 8 9 10 11 ... 16
Function Rack 5, slot 4, module fault Rack 5, slot 5, module fault Rack 5, slot 6, module fault Rack 5, slot 7, module fault Rack 5, slot 8, module fault Rack 5, slot 9, module fault Rack 5, slot 10, module fault Rack 5, slot 11, module fault Cable A fault Cable B fault not used 577
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Parameter Description Bottom Node (Length)

Length (Bottom Node) The decimal value entered in the bottom node is a function of how many I/O drops you want to monitor. Each drop requires four registers/matrix. The length value is calculated using the following formula: length = (# of I/O drops x 4) + 3 This value gives you the number of registers in the status matrix. You only need to enter this one value as the length because the length of the history matrix is automatically increased by 3 registers -i.e., the size of the history matrix is length + 3.
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HSBY - Hot Standby 31007523 8/2010
HSBY - Hot Standby
95
Introduction This chapter describes the instruction HSBY. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: HSBY - Hot Standby Parameter Description Top Node Parameter Description Middle Node: HSBY - Hot Standby Page 580 581 583 584
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579
HSBY - Hot Standby
Short Description
Function Description The HSBY loadable instruction manages a 984 Hot Standby control system. This instruction must be placed in network 1 of segment 1 in the application logic for both the primary and standby controllers. It allows you to program a nontransfer area in system state RAMan area that protects a serial group of registers in the standby controller from being modified by the primary controller. Through the HSBY instruction you can access two registersa command register and a status register. Access allows you to monitor and control Hot Standby operations. The status register is the third register in the nontransfer area you specify.
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HSBY - Hot Standby
Representation: HSBY - Hot Standby

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HSBY - Hot Standby

Parameters Top input Middle input Bottom input command register (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 4x Data Type None None None INT, UINT Meaning Execute HSBY (unconditionally) ON = function enabled Enable command register ON = function enabled Enable nontransfer area ON = function enabled The 4xxxx register entered in the top node is the HSBY command register; eight bits in this register may be configured and controlled via your panel software. (For more information, see Configuring the Register, page 583.) The 4xxxx register entered in the middle node is the first register reserved for the nontransfer area in state RAM. The first three registers in the nontransfer area are special registers. (For more information, see Nontransfer Area Special Registers, page 584 or Application Specific Registers, page 584.) The integer value entered in the bottom node defines the length (the number of registers) of the HSBY nontransfer area in state RAM. The length must be at least four registers; in the range from 4 through 255 registers in a 16-bit CPU, and in the range of 4 through 8000 registers in a 24-bit CPU. Hot Standby system ACTIVE PLC cannot communicate with its HSBY module
nontransfer area (middle node)
4x
INT, UINT
INT, UINT
0x 0x
None None
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HSBY - Hot Standby
Parameter Description Top Node

Configuring the Register You may configure bits six through eight and 12 through 16.
Follow these guidelines for configuring those bits.

Bit 6 7 8 12 13 14 15 16 Function 0 = Swap Modbus port 2 address during switchover 1 = Do not swap Modbus port 3 address during switchover 0 = Swap Modbus port 2 address during switchover 1 = Do not swap Modbus port 2 address during switchover 0 = Swap Modbus port 1 address during switchover 1 = Do not swap Modbus port q address during switchover 0 = Allow exec upgrade only after application stops 1 = Allow exec upgrade without stopping application 0 = Force standby offline if there is a logic mismatch 1 = Do not force standby offline if there is a logic mismatch 0 = Controller B in OFFLINE mode 1 = Controller B in RUN mode 0 = Controller A in OFFLINE mode 1 = Controller A in RUN mode 0 = Disable keyswitch override 1 = Enable keyswitch override
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HSBY - Hot Standby
Parameter Description Middle Node: HSBY - Hot Standby

Nontransfer Area Special Registers The first three registers in the nontransfer area are special registers.
Register Displayed and first implied Second implied Content These two registers are reverse transfer registers for passing information from the standby to the primary PLC HSBY status register
Application Specific Registers Bits 11 through 16 are application specific.
The content of the remaining registers is application specific. The length is defined in the bottom node.
Bit 11 12 13 14 15 16 Function 0 = This PLCs switch set to A 1 = This PLCs switch set to B 0 = PLCs have matching logic 1 = PLCs do not have matching logic 0 1 = The other PLC in OFFLINE mode 1 0 = The other PLC running in primary mode 1 1 = The other PLC running in standby mode 0 1 = This PLC in OFFLINE mode 1 0 = This PLC running in primary mode 1 1 = This PLC running in standby mode
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IBKR: Indirect Block Read 31007523 8/2010
IBKR: Indirect Block Read
96
Introduction This chapter describes the instruction IBKR. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: IBKR - Indirect Block Read Page 586 587
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585
Short Description
Function Description The IBKR (indirect block read) instruction lets you access non-contiguous registers dispersed throughout your application and copy the contents into a destination block of contiguous registers. This instruction can be used with subroutines or for streamlining data access by host computers or other PLCs.
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Representation: IBKR - Indirect Block Read


Parameters Top input source table (top node) State RAM Reference 0x, 1x 4x Data Type None INT, UINT Meaning ON = initiates indirect read operation First holding register in a source table: contain values that are pointers to the non-contiguous registers you want to collect in the operation. First in a block of contiguous destination registers, i.e. the block to which the source data will be copied. Number of registers in the source table and the destination block, range: 1 ... 255 Echoes the state of the top input ON = error in source table
destination block (middle node) length (1 ... 255) (bottom node) Top output Bottom output
4x
INT, UINT
INT, UINT 0x 0x None None
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587
588
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IBKW: Indirect Block Write 31007523 8/2010
IBKW: Indirect Block Write
97
Introduction This chapter describes the instruction IBKW. What's in this Chapter? This chapter contains the following topics:
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589
Short Description
Function Description The IBKW (indirect block write) instruction lets you copy the data from a table of contiguous registers into several non-contiguous registers dispersed throughout your application.
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Representation

Parameters Top input source block (top node) State RAM Reference 0x, 1x 4x Data Type None INT, UINT Meaning ON = initiates indirect write operation First in a block of source registers: contain values that will be copied to noncontiguous registers dispersed throughout the logic program First in a block of contiguous destination pointer registers. Each of these registers contains a value that points to the address of a register where the source data will be copied. Number of registers in the source block and the destination pointer block, range: 1 ... 255 Echoes the state of the top input ON = error in destination table
destination pointers (middle node)
4x
INT, UINT
length (1 ... 255) (bottom node) Top output Bottom output 0x 0x
INT, UINT
None None
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591
592
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ICMP: Input Compare 31007523 8/2010
ICMP: Input Compare
98
Introduction This chapter describes the instruction ICMP. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: ICMP - Input Compare Parameter Description Cascaded DRUM/ICMP Blocks Page 594 595 596 598
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ICMP: Input Compare
Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see Installation of DX Loadables, page 75. The ICMP (input compare) instruction provides logic for verifying the correct operation of each step processed by a DRUM instruction. Errors detected by ICMP may be used to trigger additional error-correction logic or to shut down the system. ICMP and DRUM are synchronized through the use of a common step pointer register. As the pointer increments, ICMP moves through its data table in lock step with DRUM. As ICMP moves through each new step, it compares-bit for bit-the live input data to the expected status of each point in its data table.
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ICMP: Input Compare
Representation: ICMP - Input Compare


Parameters Top input Middle input State RAM Reference 0x, 1x 0x, 1x Data Type None None Meaning ON = initiates the input comparison A cascading input, telling the block that previous ICMP comparison were all good, ON = compare status is passing to the middle output Current step number First register in a table of step data information Number of application-specific registersused in the step data table, range: 1 .. 999 Echoes state of the top input ON =this comparison and all previous cascaded ICMPs are good ON = Error
step pointer (top node) step data table (middle node) length (bottom node) Top output Middle output Bottom output
4x 4x
INT, UINT INT, UINT INT, UINT
0x 0x 0x
None None None
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ICMP: Input Compare
Step Pointer (Top Node) The 4x register entered in the top node stores the step pointer, i.e., the number of the current step in the step data table. This value is referenced by ICMP each time the instruction is solved. The value must be controlled externally by a DRUM instruction or by other user logic. The same register must be used in the top node of all ICMP and DRUM instructions that are solved as a single sequencer. Step Data Table (Middle Node) The 4x register entered in the middle node is the first register in a table of step data information. The first eight registers in the table hold constant and variable data required to solve the instruction:
Register Name Content Loaded by user from a group of sequential inputs to be used by ICMP for current step Loaded by ICMP each time the block is solved; contains a copy of data in the step pointer; causes the block logic to automatically calculate register offsets when accessing step data in the step data table
Displayed raw input data First implied current step data
Second implied Third implied Fourth implied
input mask Loaded by user before using the block; contains a mask to be ANDed with raw input data for each step-masked bits will not be compared; masked data are put in the masked input data register masked input data compare status Loaded by ICMP each time the block is solved; contains the result of the ANDed input mask and raw input data Loaded by ICMP each time the block is solved; contains the result of an XOR of the masked input data and the current step data; unmasked inputs that are not in the correct logical state cause the associated register bit to go to 1-non-zero bits cause a miscompare, and middle output will not go ON
Fifth implied
machine Identifies DRUM/ICMP blocks belonging to a specific machine ID number configuration; value range: 0 ... 9999 (0 = block not configured); all blocks belonging to same machine configuration have the same machine ID Profile ID Number Steps used Identifies profile data currently loaded to the sequencer; value range: O... 9999 (0 = block not configured); all blocks with the same machine ID number must have the same profile ID number Loaded by user before using the block, DRUM will not alter steps used contents during logic solve: contains between 1 ... 999 for 24 bit CPUs, specifying the actual number of steps to be solved; the number must be the table length in the bottom node of the ICMP block
Sixth implied Seventh implied
The remaining registers contain data for each step in the sequence.
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ICMP: Input Compare
Length (Bottom Node) The integer value entered in the bottom node is the length-i.e., the number of application-specific registers-used in the step data table. The length can range from 1 .. 999 in a 24-bit CPU. The total number of registers required in the step data table is the length + 8. The length must be > the value placed in the steps used register in the middle node.
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ICMP: Input Compare
Cascaded DRUM/ICMP Blocks

Cascaded DRUM/ICMP Blocks A series of DRUM and/or ICMP blocks may be cascaded to simulate a mechanical drum up to 512 bits wide. Programming the same 4x register reference into the top node of each related block causes them to cascade and step as a grouped unit without the need of any additional application logic. All DRUM/ICMP blocks with the same register reference in the top node are automatically synchronized. The must also have the same constant value in the bottom node, and must be set to use the same value in the steps used register in the middle node.
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ID: Interrupt Disable 31007523 8/2010
ID: Interrupt Disable
99
Introduction This chapter describes the instruction ID. What's in this Chapter? This chapter contains the following topics:
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599
Short Description
Function Description Three interrupt mask/unmask control instructions are available to help protect data in both the normal (scheduled) ladder logic and the (unscheduled) interrupt handling subroutine logic. These are the Interrupt Disable (ID) instruction, the Interrupt Enable (IE) instruction, and the Block Move with Interrupts Disabled (BMDI) instruction. The ID instruction masks timer-generated and/or local I/O-generated interrupts. An interrupt that is executed in the time frame after an ID instruction has been solved and before the next IE instruction has been solved is buffered. The execution of a buffered interrupt takes place at the time the IE instruction is solved. If two or more interrupts of the same type occur between the ID ... IE solve, the mask interrupt overrun error bit is set, and the subroutine initiated by the interrupts is executed only one time.
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Representation

Parameters Top input Type bottom node State RAM Reference 0x, 1x Data Type None INT, UINT Meaning ON = instruction masks timer-generated and/or local I/O generated interrupts Type of interrupt to be masked (Constant integer) (For expanded and detailed information please see the section Type (Bottom Node), page 602.) Echoes state of the top input
Top output
0x
None
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601
Type (Bottom Node) Enter a constant integer in the range 1 ... 3 in the node. The value represents the type of interrupt to be masked by the ID instruction, where:
Integer Value 3 2 1 Interrupt Type Timer interrupt masked Local I/O module interrupt masked Both interrupt types masked
602
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IE: Interrupt Enable 31007523 8/2010
IE: Interrupt Enable
100
Introduction This chapter describes the instruction IE. What's in this Chapter? This chapter contains the following topics:
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603
Short Description
Function Description Three interrupt mask/unmask control instructions are available to help protect data in both the normal (scheduled) ladder logic and the (unscheduled) interrupt handling subroutine logic. These are the Interrupt Disable (ID) instruction, the Interrupt Enable (IE) instruction, and the Block Move with Interrupts Disabled (BMDI) instruction. The IE instruction unmasks interrupts from the timer or local I/O module and responds to the pending interrupts by executing the designated subroutines. An interrupt that is executed in the time frame after an ID instruction has been solved and before the next IE instruction has been solved is buffered. The execution of a buffered interrupt takes place at the time the IE instruction is solved. If two or more interrupts of the same type occur between the ID ... IE solve, the mask interrupt overrun error bit is set, and the subroutine initiated by the interrupts is executed only one time.
604
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Representation

Parameters Top input Type bottom node State RAM Reference 0x, 1x Data Type None INT, UINT Meaning ON = instruction unmasks interrupts and responds pending interrupts Type of interrupt to be unmasked (Constant integer) For more information, see Type (Bottom Node), page 606. Echoes state of the top input
Top output
0x
None
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605
Top Input When the input is energized, the IE instruction unmasks interrupts from the timer or local I/O module and responds to the pending interrupts by executing the designated subroutines. Type (Bottom Node) Enter a constant integer in the range 1 ... 3 in the node. The value represents the type of interrupt to be unmasked by the IE instruction, where:
Integer Value 3 2 1 Interrupt Type Timer interrupt unmasked Local I/O module interrupt unmasked Both interrupt types unmasked
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IMIO: Immediate I/O 31007523 8/2010
IMIO: Immediate I/O
101
Introduction This chapter describes the instruction IMIO. NOTE: This instruction is only available after configuring a CPU without extension. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Run Time Error Handling: IMIO - Immediate I/O Page 608 609 610 612
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607
IMIO: Immediate I/O
Short Description
Function Description The IMIO instruction permits access of specified I/O modules from within ladder logic. This differs from normal I/O processing, where inputs are accessed at the beginning of the logic solve for the segment in which they are used and outputs are updated at the end of the segments solution. The I/O modules being accessed must reside in the local backplane with the Quantum PLC. In order to use IMIO instructions, the local I/O modules to be accessed must be designated in the I/O Map in your panel software.
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IMIO: Immediate I/O
Representation
NOTE: This IMIO block will not work with the following Compact I/O modules due to hardware design restrictions inherent with these modules AS-BADU-204 AS-BADU-205 AS-BADU-206 AS-BADU-216 Parameter Description Description of the instructions parameters
Parameters Top input control block top node type bottom node State RAM Data Type Meaning Reference 0x, 1x 4x None ON = enables the immediate I/O access
INT, UINT, Control block (first of two contiguous registers) WORD For more information, see Runtime Errors, page 612. INT, UINT Type of operation (constant integer in the range of 1 ... 3) This is the function to perform 1 Input operation: Transfer data from module to state RAM 2 Output operation: Transfer date from state RAM to module 3 Bidirectional or I/O operation: Allows both Input and Output for bidirectional modules Echoes state of the top input Error (indicated by a code in the error status register in the IMIO control block) 609
0x 0x
None None
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IMIO: Immediate I/O
Control Block (Top Node) The first of two contiguous 4x registers is entered in the top node. The second register is implied.
Register Displayed First implied Content This register specifies the physical address of the I/O module to be accessed. This register logs the error status, which is maintained by the instruction.
Physical Address of the I/O Module The high byte of the displayed register in the control block allows you to specify which rack the I/O module to be accessed resides in, and the low byte allow you to specify slot number within the specified rack where the I/O module resides. Usage of word:
Bit 1-5
Function Not used Rack 1 only for Quantum Local racks 1 through 4 can be used for 32-bit Compact Rack number 1 to 4 (only rack 1 is currently supported) Not used Slot number
6-8 9 - 11 12 - 16
Rack Number
Bit Number 6 0 7 0 8 1 rack 1 Rack 1 only for Quantum Racks 1 through 4 can be used for 32-bit Compact rack 2 Racks 1 through 4 can be used for 32-bit Compact Rack Number
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IMIO: Immediate I/O
Bit Number 6 0 1 7 1 0 8 1 0
Rack Number
rack 3 Racks 1 through 4 can be used for 32-bit Compact rack 4 Racks 1 through 4 can be used for 32-bit Compact
Slot Number
Bit Number 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 13 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 14 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 15 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 16 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 slot 1 slot 2 slot 3 slot 4 slot 5 slot 6 slot 7 slot 8 slot 9 slot 10 slot 11 slot 12 slot 13 slot 14 slot 15 slot 16 Slot Number
Type (Bottom Node) Enter a constant integer in the range 1 ... 3 in the bottom node. The value represents the type of operation to be performed by the IMIO instruction, where:
Integer Value 1 2 3 Type of Immediate Access Input operation: transfers data from the specified module to state RAM Output operation: transfers data from state RAM to the specified module I/O operation: does both input and output if the specified module is bidirectional
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611
IMIO: Immediate I/O
Run Time Error Handling: IMIO - Immediate I/O

Runtime Errors The implied register in the control block will contain the following error code when the instruction detects an error:
Error Code 2001 2002 Meaning Invalid type specified in the bottom node Problem with the specified I/O slot, either an invalid slot number entered in the displayed register of the control block or the I/O Map does not contain the correct module definition for this slot A type 3 operation is specified in the bottom node, and the module is not bidirectional Specified I/O module is not healthy
2003 F001
612
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IMOD: Interrupt Module Instruction 31007523 8/2010
IMOD: Interrupt Module Instruction
102
Introduction This chapter describes the instruction IMOD. What's in this Chapter? This chapter contains the following topics:
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613
Short Description
Function Description The IMOD instruction initiates a ladder logic interrupt handler subroutine when the appropriate interrupt is generated by a local interrupt module and received by the PLC. Each IMOD instruction in an application is set up to correspond to a specific slot in the local backplane where the interrupt module resides. The IMOD instruction can designate the same or a separate interrupt handler subroutine for each interrupt point on the associated interrupt module.
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Representation

Parameters Top input Bottom input slot number (top node) State RAM Data Reference Type 0x, 1x 0x, 1x None None INT, UINT Meaning ON = initiates an interrupt ON = clears a previously detected error Indicates the slot number where the local interrupt module resides (constant integer in the range of 1 ... 16)
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615
Parameters control block (middle node)
State RAM Data Reference Type 4x INT, UINT, WORD
Meaning Control block (first of max. 19 contiguous registers, depending on number of interrupts) The middle node contains the first 4x register n the IMOD control block. The control block contains parameters required to program an IMOD instruction. The size (number of registers) of the control block will equal the total number of programmed interrupt points + 3. The first three registers in the control block contain status information. The remaining registers provide a means for you to specify the label (LAB) number of the interrupt handler subroutine. The interrupt handler subroutine is in the last (unscheduled) segment of the ladder logic program. For expanded and detailed information please see Control Block (Middle Node), page 617,) Indicates the number of interrupts that can be generated from the associated interrupt module (constant integer in the range of 1 ... 16) The bottom node contains an integer indicating the number of interrupts that can be generated from the associated interrupt module. The size (number of registers of the control block is the number of interrupts + 3. The PLC is able to be configured for a maximum of 64 module interrupts (from all the interrupt modules residing in the local backplane). If the number you enter in the bottom node of an IMOD instruction causes the total number of module interrupts system wide to exceed 64, an error is logged in bit 7 of the first register in the control block. For example, if you use four interrupt modules in the local backplane and assign 16 interrupts to each of these modules (by entering 16 in the bottom node of each associated 8MOD instruction, the PLC will not be able to handle any more module interrupts. If you attempt to create a fifth IMOD instruction, an error will be logged in the IMODs control block when you specify a value in the bottom node. Echoes state of the top input ON = error is detected. The source of the error can be from any one of the enabled interrupt points on the interrupt module.
number of interrupts (bottom node)
INT, UINT
0x 0x
None None
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General Information to IMOD Up to 14 IMOD instructions can be programmed in a ladder logic application, one for each possible option slot in a local backplane. Each interrupting point on each interrupt module can initiate a different interrupt handler subroutine. A maximum of 64 interrupt points can be defined in a user logic application. It is not necessary that all possible input points on a local interrupt module be defined in the IMOD instruction as interrupts. Enabling of the Instruction (Top Input) When the input to the top node is energized, the IMOD instruction is enabled. The PLC will respond to interrupts generated by the local interrupt module in the designated slot number. When the top input is not energized, interrupts from the module in the designated slot are disabled and all previously detected errors are cleared including any pending masked interrupts. Clear Error (Bottom Input) This input clears previous errors. Slot Number (Top Node) The top node contains a decimal in the range 1 ... 16, indicating the slot number where the local interrupt module resides. This number is used to index into an array of control structures used to implement the instruction. NOTE: The slot number in one IMOD instruction must be unique with respect to the slot numbers used in all other IMOD instruction in an application. If not the next IMOD with that particular slot number will have an error. NOTE: The slot numbers where the PLC and the power supply reside are illegal entries -i.e., a maximum of 14 of the 16 possible slot numbers can be used as interrupt module slots. If the IMOD slot number is the same as the PLC, the IMOD will have an error. Control Block (Middle Node) The middle node contains the first 4x register in the IMOD control block. The control block contains parameters required to program an IMOD instruction. The size (number of registers) of the control block will equal the total number of programmed interrupt points + 3.
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The first three registers in the control block contain status information, of the remaining registers provide means for you to specify the label (LAB) number of the interrupt handler subroutine that is in the last (unscheduled) segment of the ladder logic program. Control Block for IMOD
Register Displayed First implied Second implied Third implied ... Last implied Content Function status bits State of inputs 1 ... 16 from the interrupt module at the time of the interrupt State of inputs 17 ... 32 from the interrupt module at the time of the interrupt (invalid data for a 16-bit interrupt module) LAB number and status for the first interrupt programmed point on the interrupt module ... LAB number and status for the last interrupt programmed point on the interrupt
Function Status Bits Function status bits
Bit 1-2 3 4
Function Not used Error: controller slot The slot number given in the top node of the IMOD is the CPU slot number. Error: interrupt lost due to communication error in backplane When reading the interrupting module, a computation error occurred and the data is invalid. Because the interrupting points are cleared on the read, the interrupt(s) are lost. Module not healthy or not in I/O map The I/O module in the slot given in the top node is not healthy (i.e., not working, or missing) or a module has not been specified in the I/O map. Error: interrupt lost because of on-line editing While the operator was editing the ladder logic (this includes requesting a power display of a different network, i.e., page up or page down), two or more interrupts for the same point occurred. Only one is serviced. Error: Maximum number of interrupts exceeded More than 64 interrupts have been specified in the ladder logic and this "IMOD" is the one that causes the count to exceed 64.
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Bit 8
Function Error: slot number used in previous network (CAUTION: see Loss of Interrupts, page 619) The slot number in the top node is used in another "IMOD" block with in the ladder logic. The first block is working, but this one is ignored. Not used 0 = IMOD disabled 1 = IMOD enabled This bit reflects to the state of power in the top node.
9 - 15 16
Loss of Interrupts
CAUTION
LOSS OF INTERRUPTS: WORKING IMOD INSTRUCTION An error is indicated in bit 8 when two IMOD instructions are assigned the same slot number. When this happens, it is possible to lose interrupts from the working IMOD instruction without an indication if the number specified in the bottom node of the two instructions is different. Failure to follow these instructions can result in injury or equipment damage. Status Bits and LAB Number for each Interrupt Point Bits 1 ... 5 of the third implied through last implied registers are status bits for each interrupt point. Bits 7 ... 16 are used to specify the LAB number for the interrupt handler subroutine. The LAB number is a decimal value in the range 1 ... 1023. Function status bits
Bit
Function
Interrupt Point Status 1 Execution delayed because of interrupt mask This is not an error, but an indication that interrupts are disabled and at least one interrupt for this point has occurred and will be serviced when interrupts are enabled. Error: invalid block in the interrupt handler subroutine An invalid DX block has been used in the interrupt handler subroutine for this input point (see Instructions that Cannot be Used in an Interrupt Handler for details).
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Bit 3
Function Error: Mask interrupt overrun Two or more interrupts for this point have occurred while the interrupt was disabled: i.e., Use of the Interrupt Disable (ID) block without using the Interrupt Enable (IE) block or during online editing. Error: execution overrun A second interrupt (or more) has occurred while the interrupt handler subroutine was still running. Error: invalid LAB number The LAB number specified in bits 7...16, zero, or that LAB number is not used in the last segment of the user logic. This error will Auto Clear. not used
LAB number 7 - 16 LAB number for the associated interrupt handler Value in the range 1 ... 1023
Whenever the input to the bottom node of the IMOD instruction is enabled, the status bits (bits 1 ... 5) are cleared. If a LAB number is specified (in bits 7 ... 16) as 0 or an invalid number, any interrupts generated from that point are ignored by the PLC. Number of Interrupts (Bottom Node) The bottom node contains an integer indicating the number of interrupts that can be generated from the associated interrupt module. The size (number of registers) of the control block is this number + 3. The PLC is able to be configured for a maximum of 64 module interrupts (from all the interrupt modules residing in the local backplane). If the number you enter in the bottom node of an IMOD instruction causes the total number of module interrupts system wide to exceed 64, an error is logged in bit 7 of the first register in the control block. For example, if you use four interrupt modules in the local backplane and assign 16 interrupts to each of these modules (by entering 16 in the bottom node of each associated IMOD instruction, the PLC will not be able to handle any more module interrupts. If you attempt to create a fifth IMOD instruction, an error will be logged in that IMODs control block when you specify a value in the bottom node.
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INDX 31007523 8/2010
INDX Immediate Incremental Move
103
Introduction This chapter describes the INDX instruction. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Parameters Description Page 622 623
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INDX
Short Description
Function Description The INDX function block issues an MMFStart Immediate Incremental Move on the axis specified. The velocity and increment are specified in the associated table.
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INDX
Parameters Description
Symbol The following diagram shows an INDX function.

Parameters State RAM Data Reference Type Top input 0x None Top node 4x INT, UINT Meaning ON initiates the move function. When this input goes off, the function is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments for the move. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 8. Turned on when the move start is complete without error. Turned on when the move is not started and an error code is generated in register 4xxxx5. Turned on when the register length is not set at 8, the MMFSTART revision is not correct, or the function timed out. 623
Middle node 4x
INT, UINT INT
Bottom node Top output Middle output Bottom output
4x
0x 0x 0x
None None None
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INDX

Register 4xxxxx 4xxxx1 4xxxx3 4xxxx5 4xxxx6 4xxxx7 Data Type Short Float Float Short Short Short Description Axis id for the incremental move. Length of the incremental move. Velocity of the incremental move. Error code generated when attempting to start move. Current operating state number Current state entry count.
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ITMR: Interrupt Timer 31007523 8/2010
ITMR: Interrupt Timer
104
Introduction This chapter describes the instruction ITMR. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The ITMR instruction allows you to define an interval timer that generates interrupts into the normal ladder logic scan and initiates the execution of an interrupt handling subroutine. The user-defined interrupt handler is a ladder logic subroutine created in the last, unscheduled segment of ladder logic with its first network marked by a LAB instruction. Subroutine execution is asynchronous to the normal scan cycle. Up to 16 ITMR instructions can be programmed in an application. Each interval timer can be programmed to initiate the same or different interrupt handler subroutines, controlled by the JSR/LAB method described in the chapter General. Each instance of the interval timer is delayed for a programmed interval while the PLC is running, then generates a processor interrupt when the interval has elapsed. An interval timer can execute at any time during normal logic scan, including system I/O updating or other system housekeeping operations. The resolution of each interval timer is 1 ms. An interval can be programmed in units of 1 ms, 10 ms, 100 ms, or 1 s. An internal counter increments at the specified resolution. You should be aware that if the ITMR time is less than the L/L edit time slice, there will be no power flow display or user logic edit allowed.
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Representation
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Parameters Top input State RAM Data Type Meaning Reference 0x, 1x None ON = enables instruction (For expanded and detailed information please see the section Top Input.)
control block (top node)
4x
INT, UINT, Control block (first of three contiguous registers) WORD The top node contains the first of three contiguous 4xxxx registers in the ITMR control block. These registers are used to specify the parameters required to program each ITMR instruction. The lower eight bits of the first (displayed) register in the control block allow you to specify function control parameters, and the upper eight bits are used to display function status. In the second register of the control block, specify a value representing the interval at which the ITRM instruction will generate interrupts and initiate the execution of the interrupt handler. The interval will be incremented in the units specified by bits 12 and 13 of the first control block register - i.e., 1 ms, 10 ms, 100 ms, or 1 s units. In the third register of the control block, specify a value indicating the label (LAB) number that will start the interrupt handler subroutine. The number must be in the range of 1 through 1023. Note: We recommend that the size of the logic subroutine associated with the LAB be minimized so that the application does not become interruptdriven. (For more information, see Control Block (Top Node), page 629.) INT, UINT Timer number assigned to this ITMR instruction (must be unique with respect to all other ITMR instructions in the application); range: 1 ... 16 Echoes state of the top input Error (source of the error may be in the programmed parameters or a runtime execution error)
timer number (bottom node) Top output 0x
None None
Bottom output 0x
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Top Input When the top input is energized, the ITMR instruction is enabled. It begins counting the programmed time interval. When that interval has expired the counter is reset and the designated error handler logic executes. When the top input is not energized, the following events occur: All indicated errors are cleared The timer is stopped The time count is either reset or held, depending on the state of bit 15 of the first register in the control block (the displayed register in the top node) Any pending masked interrupt is cleared for this timer Control Block (Top Node) The top node contains the first of three contiguous 4x registers in the ITMR control block. These registers are used to specify the parameters required to program each ITMR instruction. Control Block for ITMR
Register Displayed First implied Content Function status and function control bits In this register specify a value representing the interval at which the ITMR instruction will generate interrupts and initiate the execution of the interrupt handler. The interval will be incremented in the units specified by bits 12 and 13 of the first control block register, i.e. 1 ms, 10 ms, 100 ms, or 1 s units. In this register specify a value indicating the label (LAB) number that will start the interrupt handler subroutine. The number must be in the range 1 ... 1023.
Second implied
NOTE: We recommend that the size of the logic subroutine associated with the LAB be minimized so that the application does not become interrupt-driven.
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Function Status and Function Control Bits The lower eight bits of the displayed register in the control block allow you to specify function control parameters, and the upper eight bits are used to display function status:
Bit 1 2 3 4 5 6 7 8 9 - 11 12 - 13
Function Execution delayed because of interrupt mask. Invalid block in the interrupt handler subroutine. Not used Time = 0 Mask interrupt overrun. Execution overrun. No LAB or invalid LAB. Timer number used in previous network. Not used 0 0 = 1 ms time base 0 1 = 10 ms time base 1 0 = 100 ms time base 1 1 = 1 s time base 1 = PLC stop holds counter. 0 = PLC stop resets counter. 1 = enable OFF holds counter. 0 = enable OFF resets counter. 1 = instruction enabled 0 = instruction disabled
Function Status
Function Control
14 15 16
Timer Number (Bottom Node) Up to 16 ITMR instructions can be programmed in an application. The interrupts are distinguished from one another by a unique number between 1 ... 16, which you assign to each instruction in the bottom node. The lowest interrupt number has the highest execution priority. For example, if ITMR 4 and ITMR 5 occur at the same time, ITMR 4 is executed first. After ITMR 4 has finished, ITMR 5 generally will begin executing. An exception would be when another ITMR interrupt with a higher priority occurs during ITMR 4s execution. For example, suppose that ITMR 3 occurs while ITMR 5 is waiting for ITMR 4 to finish executing. In this case, ITMR 3 begins executing when ITMR4 finishes, and ITMR 5 continues to wait.
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ITOF: Integer to Floating Point 31007523 8/2010
ITOF: Integer to Floating Point
105
Introduction This chapter describes the instruction ITOF. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The ITOF instruction performs the conversion of a signed or unsigned integer value (its top node) to a floating point (FP) value, and stores the FP value in two contiguous 4x registers in the middle node.
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Representation

Parameters Top input Bottom input integer (top node) converted FP (middle node) 1 (bottom node) Top output 0x State RAM Reference 0x, 1x 0x, 1x 3x, 4x Data Type None None INT, UINT Meaning ON = enables conversion ON = signed operation OFF = unsigned operation Integer value, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register Converted FP value (first of two contiguous holding registers) Constant value of 1, can not be changed ON = FP conversion completed successfully
4x
REAL INT, UINT None
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634
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JOGS 31007523 8/2010
JOGS JOG Move
106
Introduction This chapter describes the JOGS instruction. What's in this Chapter? This chapter contains the following topics:
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635
JOGS
Short Description
Function Description This function block jogs an axis positive or negative using MMFStart Immediate Continuous Move and Halt. Jog velocity is specified in the associated register table.
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JOGS
Representation
Symbol The following diagram shows the JOGS function.
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JOGS

Parameters State RAM Data Reference Type Top input 0x None None INT, UINT Meaning ON activates a JOG positive. A HALT command is used when the input turns off. ON activates a JOG negative. A HALT command is used when the input turns off. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments for the jog. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 6. Turned on when the jog has been issued without error and reflects the state of the top or middle inputs. Turned on when the jog has been issued without error and reflects the state of the top or middle inputs. Turned on when the register length is not set at 6.
Middle Input 0x Top node 4x
Middle node 4x
INT, UINT INT
Bottom node 4x
0x 0x 0x
None None None

Register 4xxxxx 4xxxx1 4xxxx3 4xxxx4 4xxxx5 Data Type Short Float Short Short Short Description Axis id for the incremental move. Velocity used for jogging the axis. Error code generated when attempting to start move. Current operating state number Current state entry count.
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JSR: Jump to Subroutine 31007523 8/2010
JSR: Jump to Subroutine
107
Introduction This chapter describes the instruction JSR. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description When the logic scan encounters an enabled JSR instruction, it stops the normal logic scan and jumps to the specified source subroutine in the last (unscheduled) segment of ladder logic. You can use a JSR instruction anywhere in user logic, even within the subroutine segment. The process of calling one subroutine from another subroutine is called nesting. The system allows you to nest up to 100 subroutines; however, we recommend that you use no more than three nesting levels. You may also perform a recursive form of nesting called looping, whereby a JSR call within the subroutine recalls the same subroutine. Example to Subroutine Handling For an example of subroutine handling, see Subroutine Handling, page 73.
640
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Representation

Parameters Top input source (top node) State RAM Reference 0x, 1x 4x Data Type None INT, UINT Meaning Enables the source subroutine Source pointer (indicator of the subroutine to which the logic scan will jump), entered explicitly as an integer or stored in a register; range: 1 ... 1 023 Always enter the constant value 1 Echoes state of the top input Error in subroutine jump On if jump cannot be executed Label does not exist or Nesting level > 100
#1 (bottom node) Top output Bottom output 0x 0x
INT, UINT None None
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641
642
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LAB: Label for a Subroutine 31007523 8/2010
LAB: Label for a Subroutine
108
Introduction This chapter describes the instruction LAB. What's in this Chapter? This chapter contains the following topics:
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643
Short Description
Function Description The LAB instruction is used to label the starting point of a subroutine in the last (unscheduled) segment of user logic. This instruction must be programmed in row 1, column 1 of a network in the last (unscheduled) segment of user logic. LAB is a one-node function block. LAB also serves as a default return from the subroutine in the preceding networks. If you are executing a series of subroutine networks and you find a network that begins with LAB, the system knows that the previous subroutine is finished, and it returns the logic scan to the node immediately following the most recently executed JSR block. NOTE: If you need real world I/O serviced while you are in the interrupt subroutine, you must use the IMIO (see page 607) (read/write) function block in the same subroutine. If you do not, the real world I/O referenced in that subroutine will not get serviced until the appropriate segment is solved. Example to Subroutine Handling For an example of subroutine handling, see Subroutine Handling, page 73.
644
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Representation

Parameters Top input subroutine (top node) State RAM Reference 0x, 1x Data Type None INT, UINT Meaning Initiates the subroutine specified by the number in the bottom node Integer value, identifies the subroutine you are about to execute Range: 1 ... 255 16-bit PLC. Range: 1 ... 1023 24-bit PLC. Size = constant 1 - 255 or Size = constant 1-1023 for 785L Subroutine number error ON if return cannot be executed If more than one network begins with a LAB instruction with the same subroutine value, the lowest-numbered network is used as the starting point for the subroutine. ON = error in the specified subroutines initiation
Top output
0x
None
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Subroutine (Bottom Node) The integer value entered in the node identifies the subroutine you are about to execute. The value can range from 1 ... 255. If more than one subroutine network has the same LAB value, the network with the lowest number is used as the starting point for the subroutine.
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LOAD: Load Flash 31007523 8/2010
LOAD: Load Flash
109
Introduction This chapter describes the instruction LOAD. What's in this Chapter? This chapter contains the following topics:
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647
LOAD: Load Flash
Short Description
Function Description NOTE: This instruction is available with the PLC family TSX Compact, with Quantum CPUs 434 12/ 534 14 and Momentum CPUs CCC 960 x0/ 980 x0. The LOAD instruction loads a block of 4x registers (previously saved) from state RAM where they are protected from unauthorized modification.
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LOAD: Load Flash
Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning Start LOAD operation: it should remain ON until the operation has completed successfully or an error has occurred. First of max. 512 contiguous 4x registers to be loaded from state RAM Integer value, which defines the specific buffer where the block of data is to be loaded Number of words to be loaded, range: 1 ... 512 ON = LOAD is active ON = a LOAD is requested from a buffer where no data has been saved. ON = Length not equal to SAVEd length
register (top node) 1, 2, 3, 4 (middle node) length (bottom node) Top output Middle output Bottom output
4x
INT, UINT, WORD INT
INT 0x 0x 0x None None None
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LOAD: Load Flash
1, 2, 3, 4 (Middle Node) The middle node defines the specific buffer where the block of data is to be loaded. Four 512 word buffers are allowed. Each buffer is defined by placing its corresponding value in the middle node, that is, the value 1 represents the first buffer, value 2 represents the second buffer and so on. The legal values are 1, 2, 3, and 4. When the PLC is started all four buffers are zeroed. Therefore, you may not load data from the same buffer without first saving it with the instruction SAVE. When this is attempted the middle output goes ON. In other words, once a buffer is used, it may not be used again until the data has been removed. Bottom Output The output from the bottom node goes ON when a LOAD request is not equal to the registers that were SAVEd. This kind of transaction is allowed, however, it is your responsibility to ensure this does not create a problem in your application.
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MAP3: MAP Transaction 31007523 8/2010
MAP3: MAP Transaction
110
Introduction This chapter describes the instruction MAP3. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see Installation of DX Loadables, page 75. Ladder logic applications running in the controller initiate communication with MAP network nodes through the MAP3 instruction.
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Representation

Parameters Top input Middle input control block (top node) data source (middle node) length (bottom node) Top output MIddle output Bottom output 0x 0x 0x State RAM Reference 0x, 1x 0x, 1x 4x 4x Data Type None None INT, UINT, WORD INT, UINT, WORD INT, UINT None None None Meaning ON = initiates a transaction ON = new transaction to be initiated in the same scan Control Block (first register of a block) Data source (starting register) Length of local data area, range: 1 ... 255) Transaction completes successfully Transaction is in progress Error
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Top Input This input initiates a transaction. To start a transaction the input must be held ON (HIGH) for at least one scan. If the S980 has resources to process the transaction, the middle output passes power. If resources are not available, no outputs pass power. Once a transaction is started, it will run until a reply is received, a communications error is detected, or a timeout occurs. The values in the control block, data source, and length must not be altered, or the transaction will not be completed and the bottom output will pass power. A second transaction cannot be started by the same block until the first one is complete. Middle Input If the top input is also HIGH, the middle input going ON allows a new transaction to be initiated in the same scan, following the completion of a previous one. A new transaction begins when the top output passes power from the first transaction. Control Block (Top Node) The top node is the starting 4x register of a block of registers that control the blocks operation. The contents of each register is determined by the kind of operation to be performed by the MAP3 block: read or write information report unsolicited status conclude abort Registers of the control block:
Word 1 2 3 4 5 Meaning Destination Device Qualifier / Function Code Network Mode / Network Type Function Status Register A Reference Type This word is labeled Register A* and contains the reference type for 4 types of Read (0x, 1x, 3x, and 4x registers) and 2 types of Write (0X or 4x). Register B Reference Number This word is labeled Register B* and contains the starting reference number in the range 1 to 99999.
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Word 7
Meaning Register C Reference Length This word is labeled Register C* and contains the Quantity of references requested. Register D Timeout This word is labeled Register D* and contains the Timeout parameter. This value sets the maximum length of time used to complete a transaction, including retries.
Destination Device Word 1 contains the destination device in bit position 9 through 16. The computer works with this byte as the LSB and will accept a range of 1 to 255. Usage of word 1:
Bit 1-8 9 - 16
Function Not used Destination device
Qualifier / Function Code Word 2 contains two bytes of information. The qualifier bits are 1 to 8 and the function code is in bits 9 to 16. Usage of word 2:
Bit Qualifier 1-8
Function
0 = addressed >0 = named
Function Code 9 - 16 4 = read 5 = write
Network Mode / Network Type Word 3 contains two bites of information. The mode is in bits 5 through 8 and the type is in bits 9 through 16.
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Usage of word 3:
Bit 1-4 Mode 5-8 Type 9 - 12 13 - 16
Function Not used
1 = association
7 = 7 layer MAP network 1 = type 1 service
Function Status Word 4 is the function status. An error code is returned if an error occurs in a block initiated function. The decimal codes are:
Code 1 4 5 6 8 17 19 22 23 24 25 26 28 99 103 105 110 Meaning Association request rejected Message timeout application response Invalid destination device Message size exceeded Invalid function code Device not available Unsupported network type No channel available MMS message not sent Control block changed Initiate failed System download in progress Channel not ready Undetermined error Access denied Invalid address Object nonexistent
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Function summary The network controlling device may issue a function code that alters the control block register assignment as given above for read/write. Those differences for information, status, conclude and abort are identified in this summary on the bottom of your screen. Refer to Modicon S980 Map 3.0 Network Interface User Guide that describes the register contents for each operation. Data Source (Middle Node) The middle node is the starting 4x register of the local data source (for a write request) or local data destination (for a read). Length (Bottom Node) The bottom node defines the maximum size of the local data area (the quantity of registers) starting at 4x register of data source, in the range of 1 to 255 decimal. The quantity of data to be actually transferred in the operation is determined by a reference length parameter in one of the control registers. Top Output The top output passes power for one scan when a transaction completes successfully. Middle Output The middle output passes power when a transaction is in progress. If the top input is ON and the middle input is OFF, then the middle output will go OFF on the same scan that the top output goes ON. If both top input and middle input are ON, then the middle output will remain ON. Bottom Output The bottom output passes power for one scan when a transaction cannot be completed. An error code is returned to the function status word (register 4x+3) in the functions control block.
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MATH - Integer Operations 31007523 8/2010
MATH - Integer Operations
111
Introduction This chapter describes the four integer operations executed by the instruction MATH. The four operations are decimal square root, process square root, logarithm (base 10), and antilogarithm (base 10). What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The MATH instruction performs any one of four integer math operations, which is called by entering a function code in the range 1 ... 4 in the bottom node. Table with two columns:
Code 1 2 3 4 MATH Function Decimal square root Process square root Logarithm (base 10) Antilogarithm (base 10)
Each MATH function operates on the contents of the top node registers and places a result in the middle node registers. For example, the normal square root uses registers 3/4xxxx and 3/4xxxx+1 as an 8 digit operand and stores the result in 4yyyy and 4yyyy+1. The result storage format is XXXX.XX00 where there are 2 places of precision following an implied decimal point. Math performs the function indicated by the bottom node:
Code 1 2 3 4 Function Normal Process Log (x) Antilog (x) Operand Registers 3/4x, 3/4x + 1 3/4x 3/4x, 3/4x + 1 3/4x Range 8 Digits 4 Digits 8 Digits 1 to 7,999 Result Registers 4y, 4y + 1 4y, 4y + 1 4y 4y, 4y + 1 Range xxxx.xxoo xxxx.xxoo 1 to 7,999 8 Digits
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Representation
Symbol - Decimal Square Root Representation of the instruction for the decimal square root operation
Parameter Description - Decimal Square Root Description of the instructions parameters for the decimal square root operation
Parameters Top Input source (top node) State RAM Reference 0x, 1x 3x. 4x Data Type None INT, UINT Meaning ON initiates a standard square root operation. The first of two contiguous 3xxxx or 4xxxx registers is entered in the top node. The second register is implied. The source value (the value for which the square root will be derived) is stored here. If you specify a 4xxxx register, the source value may be in the range 0 through 99,999,999. The low-order half of the value is stored in the implied register, and the high-order half is stored in the displayed register. If you specify a 3xxxx register, the source value may be in the range 0 through 9,999. The square root calculation is done on only the value in the displayed register; the implied register is required but not used.
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Parameters result (middle node)
Data Type INT, UINT
Meaning Enter the first of two contiguous 4xxxx registers in the middle node. The second register is implied. The result of the standard square root operation is stored here. The result is stored in the fixed-decimal format: 1234.5600. where the displayed register stores the four-digit value to the left of the first decimal point and the implied register stores the four-digit value to the right of the first decimal point. Numbers after the second decimal point are truncated; no round-off calculations are performed. ON = operation successful ON = top-node value out of range
0x 0x
None None
Symbol - Process Square Root Representation of the instruction for the process square root operation
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Parameter Description - Process Square Root The process square root function tailors the standard square root function for closed loop analog control applications. It takes the result of the standard square root result, multiplies it by 63.9922 (the square root of 4095), and stores that linearized result in the middle-node registers.
Parameters Top Input source (top node) State RAM Reference 0x, 1x 3x. 4x Data Type None INT, UINT Meaning ON initiates process square root operation The first of two contiguous 3xxxx or 4xxxx registers is entered in the top node. The second register is implied. The source value (the value for which the square root will be derived) is stored in these two registers. In order to generate values that have meaning, the source value must not exceed 4095. In a 4xxxx register group the source value will therefore be stored in the implied register, and in a 3xxxx register group the source value will be stored in the displayed register. The first of two contiguous 4xxxx registers is entered in the middle node. The second register is implied. The linearized result of the process square root operation is stored here. The result is stored in the fixed-decimal format: 1234.5600. where the displayed register stores the four-digit value to the left of the first decimal point and the implied register stores the four-digit value to the right of the first decimal point. Numbers after the second decimal point are truncated; no round-off calculations are performed. ON = Operation successful ON = Source value out of range
4x
INT, UINT
0x 0x
None None
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663
Symbol - Logarithm (base 10) Representation of the instruction for the Logarith (base 10) operation
Parameter Description - Logarithm (base 10 logarithm) Description of the instructions parameters for the logarithm (base 10) operation
Parameters Top Input source (top node) State RAM Reference 0x, 1x 3x. 4x Data Type None INT, UINT Meaning ON enables log(x) operation The first of two contiguous 3xxxx or 4xxxx registers is entered in the top node. The second register is implied. The source value upon which the log calculation will be performed is stored in these registers. If you specify a 4xxxx register, the source value may be in the range 0 through 99,999,99. The low-order half of the value is stored in the implied register, and the highorder half is stored in the displayed register. log calculation is done on only the value in the displayed register; the implied register is required but not used.
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Parameters result (middle node)
Data Type INT, UINT
Meaning The middle node contains a single 4xxxx holding register where the result of the base 10 log calculation is posted. The result is expressed in the fixed decimal format 1.234 , and is truncated after the third decimal position. The largest result that can be calculated is 7.999, which would be posted in the middle register as 7999. ON = Operation Successful ON = an error ar a value out of range
0x 0x
None None
Symbol - Antilogarithm (base 10) Representation of the instruction for the antilogarithm (base 10) operation
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665
Parameter Description - Antilogarithm (base 10) Description of the instructions parameters for the antilogarithm (base 10) operation
Parameters Top Input source (top node) State RAM Reference 0x, 1x 3x. 4x Data Type None INT, UINT Meaning ON enables antilog(x) operation The top node is a single 4xxxx holding register or 3xxxx input register. The source value (the value on which the antilog calculation will be performed) is stored here in the fixed decimal format 1.234 . It must be in the range 0 through 7999, representing a source value up to a maximum of 7.999. The first of two contiguous 4xxxx registers is entered in the middle node. The second register is implied. The result of the antilog calculation is posted here in the fixed decimal format 12345678. The largest antilog value that can be calculated is 99770006 (9977 posted in the displayed register and 0006 posted in the implied register). ON = Operation successful ON = An error or a value out of range
4x
INT, UINT
0x 0x
None None
666
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MBIT: Modify Bit 31007523 8/2010
MBIT: Modify Bit
112
Introduction This chapter describes the instruction MBIT. What's in this Chapter? This chapter contains the following topics:
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667
MBIT: Modify Bit
Short Description
WARNING
DISABLED COILS Before using the MBIT instruction, check for disabled coils. MBIT will override any disabled coils within a destination group without enabling them. This can cause injury if a coil has been disabled for repair or maintenance because the coils state can change as a result of the MBIT instruction. Failure to follow these instructions can result in death, serious injury, or equipment damage. The MBIT instruction modifies bit locations within a data matrix, i.e. it sets the bit(s) to 1 or clears the bit(s) to 0. One bit location may be modified per scan.
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MBIT: Modify Bit
Representation

Parameters Top input Middle input Bottom input bit location (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 3x, 4x Data Type None None None INT, UINT, WORD Meaning ON = implements bit modification OFF = clear bit locations to 0 ON = set bit locations to 1 Increment bit location by one after modification Specific bit location to be set or clear in the data matrix; entered explicitly as an integer value or stored in a register (range 1 ... 9 600) First word or register in the data matrix Matrix length; range: 1 ... 600 Echoes state of the top input Echoes state of the middle input ON = error: bit location > matrix length
data matrix (middle node) length (bottom node) Top output Middle output Bottom output
0x, 4x
INT, UINT, WORD INT, UINT
0x 0x 0x
None None None
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669
MBIT: Modify Bit
Bit Location (Top Node) NOTE: If the bit location is entered as an integer or in a 3x register, the instruction will ignore the state of the bottom input. Matrix Length (Bottom Node) The integer value entered in the bottom node specifies a matrix length, i.e, the number of 16-bit words or registers in the data matrix. The length can range from 1 ... 600 in a 24-bit CPU, e.g, a matrix length of 200 indicates 3200 bit locations.
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MBUS: MBUS Transaction 31007523 8/2010
MBUS: MBUS Transaction
113
Introduction This chapter describes the instruction MBUS. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description The MBUS Get Statistics Function Page 672 673 674 676
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671
Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see Installation of DX Loadables, page 75. The S975 Modbus II Interface option modules use two loadable function blocks: MBUS and PEER. MBUS is used to initiate a single transaction with another device on the Modbus II network. In an MBUS transaction, you are able to read or write discrete or register data. PLCs on a Modbus II network can handle up to 16 transactions simultaneously. Transactions include incoming (unsolicited) messages as well as outgoing messages. Thus, the number of message initiations a PLC can manage at any time is 16 - # of incoming messages. A transaction cannot be initiated unless the S975 has enough resources for the entire transaction to be performed. Once a transaction has been initiated, it runs until a reply is received, an error is detected, or a timeout occurs. A second transaction cannot be started in the same scan that the previous transaction completes unless the middle input is ON. A second transaction cannot be initiated by the same MBUS instruction until the first transaction has completed.
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Representation

Parameters Top input Middle input Bottom input control block (top node) State RAM Data Reference Type 0x, 1x 0x, 1x 0x, 1x 4x None None None INT, UINT, WORD INT, UINT, WORD INT, UINT Meaning Enable MBUS transaction Repeat transaction in same scan Clears system statistics First of seven contiguous registers in the MBUS control block (For more information, see Control Block (Top Node), page 674.) First 4x register in a data block to be transmitted or received in the MBUS transaction. Number of words reserved for the data block is entered as a constant value (For more information, see Length (Bottom Node), page 675.) Transaction complete Transaction in progress or new transaction starting Error detected in transaction 673
data block (middle node) length (bottom node)
4x
0x 0x 0x
None None None
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Control Block (Top Node) The 4x register entered in the top node is the first of seven contiguous registers in the MBUS control block:
Register Displayed First implied Second implied Third implied Fourth implied Content Address of destination device (range: 0 ... 246) not used Function code Reference type Reference number, e.g., if you placed a 4 in the third implied register and you place a 23 in this register, the reference will be holding register 400023 Number of words of discrete or register references to be read or written Time allowed for a transaction to be completed before an error is declared; expressed as a multiple of 10 ms, e.g., 100 indicates 1 000 ms; the default timeout is 250 ms.
Fifth implied Sixth implied
Function Code This register contains the function code for requested action:
Value 01 02 03 04 255 Meaning Read discretes Read registers Write discrete outputs Write register outputs Get system statistics
Reference Type This register contains one of 4 possible discrete or register reference types:
Value 0 1 2 3 Reference type Discrete output (0x) Discrete input (1x) Input register (3x) Holding register (4x)
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Number of Words to Read or Write Number of words of discrete or register references to be read or written; the length limits are:
Read register Write register Read coils Write coils 251 registers 249 registers 7.848 discretes 7.800 discretes
Length (Bottom Node) The number of words reserved for the data block is entered as a constant value in the bottom node. This number does not imply a data transaction length, but it can restrict the maximum allowable number of register or discrete references to be read or written in the transaction. The maximum number of words that may be used in the specified transaction is:
Max. Number of Words 251 249 490 487 Transaction Reading registers (one register/word) Writing registers (one register/word) Reading discretes using 24-bit CPUs (up to 16 discretes/word) Writing discretes using 24-bit CPUs (up to 16 discretes/word
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675
The MBUS Get Statistics Function

General Issuing function code 255 in the second implied register of the MBUS control block obtains a copy of the Modbus II local statistics, a series of 46 contiguous register locations where data describing error and system conditions is stored. To use MBUS for a get statistics operation, set the length in the bottom node to 46, a length < 46 returns an error (the bottom output will go ON), and a length > 46 reserves extra registers that cannot be used. Example Parameterizing of the instruction
Register 400101 is the first register in the MBUS control block, making register 400103 the control register that defines the MBUS function code. By entering a value of 255 in register 400103, you implement a get statistics function. Registers 401000 ... 401045 are then filled with the system statistics. System Statistics Overview The following system statistics are available. Token bus controller (TBC) Software-maintained receive statistics TBC-maintained error counters Software-maintained transmit errors Software-maintained receive errors User logic transaction errors Manufacturing message format standard (MMFS) errors Background statistics Software revision
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Token Bus Controller (TBC) Registers 401000 ... 401003 are then filled with the following:
Register 401000 401001 401002 401003 Content Number of tokens passed by this station Number of tokens sent by this station Number of time the TBC has failed to pass token and has not found a successor Number of times the station has had to look for a new successor
Software-maintained Receive Statistics Registers 401004 ... 401010 are then filled with the following:
Register 401004 401005 401006 401007 401008 401009 401010 Content TBC-detected error frames Invalid request with response frames Applications message too long Media access control (MAC) address out of range Duplicate application frames Unsupported logical link control (LLC) message types Unsupported LLC address
TBC-maintained Error Counters Registers 401011 ... 401018 are then filled with the following:
Register 401011 401012 401013 401014 401015 401016 401017 401018 Content Receive noise bursts (no start delimiter) Frame check sequence errors E-bit error in end delimiter Fragmented frames received (start delimiter not followed by end delimiter) Receive frames too long Discarded frames because there is no receive buffer Receive overruns Token pass failures
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Software-maintained Transmit Errors Registers 401019 ... 401020 are then filled with the following:
Register 401019 401020 Content Retries on request with response frames All retries performed and no response received from unit
Software-maintained Receive Errors Registers 401021... 401022 are then filled with the following:
Register 401021 401022 Content Bad transmit request Negative transmit confirmation
User Logic Transaction Errors Registers 401023... 401024 are then filled with the following:
Register 401023 401024 Content Message sent but no application response Invalid MBUS/PEER logic
Manufacturing Message Format Standard Registers 401025... 401026 are then filled with the following:
Register 401025 401026 Content Command not executable Data not available
(MMFS) Errors Registers 401027... 401035 are then filled with the following:
Register 401027 401028 401029 401030 401031 401032 Content Device not available Function not implemented Request not recognized Syntax error Unspecified error Data request out of bounds
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Register 401033 401034 401035
Content Request contains invalid controller address Request contains invalid data type None of the above
Background Statistics Registers 401036... 401043 are then filled with the following:
Register 401036 401037 401038 401039 401040 401041 Content Invalid MBUS/PEER request Number of unsupported MMFS message types received Unexpected response or response received after timeout Duplicate application responses received Response from unspecified device Number of responses buffered to be processed (in the least significant byte); number of MBUS/PEER requests to be processed (in the most significant byte) Number of received requests to be processed (in the least significant byte); number of transactions in process (in the most significant byte) S975 scan time in 10 ms increments
401042 401043
Software Revision Registers 401044... 401045 are then filled with the following:
Register 401044 401045 Content Version level of fixed software (PROMs): major version number in most significant byte; minor version number in least significant byte Version of loadable software (EEPROMs): major version number in most significant byte; minor version number in least significant byte
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679
680
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MMFB 31007523 8/2010
MMFB Modicon Motion Framework Bits Block
114
Introduction This chapter describes the MMFB block. What's in this Chapter? This chapter contains the following topics:
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681
MMFB
Short Description
Function Description The MMFB function block sets control bits for an axis in the MMFSTART table area. See Representation, page 683 for a description of the control bit functions. Most of these functions can be accomplished with subroutines, but this is more efficient Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for detailed information on using motion loadables.
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MMFB
Representation
Symbol The following diagram shows the MMFB function.

Parameters Top input Top node State RAM Reference 0x 4x Data Type None INT, UINT Meaning ON moves control data. Data will be moved constantly when this input is on. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments for the jog. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 3. Echoes state of top input, except if the axis (top node content) is incorrect or table length is not two. Turned on when the register length is not set at 3.
Middle node
4x
INT, UINT INT
Bottom node 4x

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0x 0x
None None
683
MMFB

Register 4xxxxx 4xxxx1 4xxxx2 Data Type INT INT INT Description Axis id. Low order control: bits 0-15 High order control: bits 16-31
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MMFE 31007523 8/2010
MMFE Modicon Motion Framework Extended Parameters Subroutine
115
Introduction This chapter describes the MMFE block. What's in this Chapter? This chapter contains the following topics:
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685
MMFE
Short Description
Function Description The MMFE function block is designed specifically for executing moveImmed and moveQueue subroutines with Coordinated Sets. Par1 specifies the MoveType (Absolute or Incremental) and EPar1 through EParN take the Position for all the N axes in the Coordinated Set. Then EparN+1 through Epar2N take the Velocity of all N axes in the Coordinated Set, up to eight axes. For these move subroutines, Par2 is not used and there are no return values, but they are included in the function block for future subroutines.
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MMFE
Representation
Symbol The following diagram shows an MMFE block.

Parameters State RAM Data Reference Type Top input Top node 0x 4x None INT, UINT Meaning ON initiates the subroutine. When this input goes off, the function block is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments and routines for a generic subroutine call. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 47. Turned on when the subroutine call is complete without error. Turned on when the subroutine call is complete and an error is code is generated in register 4xxx38. Turned on when the register length is not set at 47.
Middle node 4x
INT, UINT INT
Bottom node 4x

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0x 0x 0x
None None None
687
MMFE

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx4 4xxxx6 4xxxx8 4xxx10 4xxx12 4xxx14 4xxx16 4xxx18 4xxx20 4xxx22 4xxx24 4xxx26 4xxx28 4xxx30 4xxx32 4xxx34 4xxx36 4xxx38 4xxx39 4xxx41 4xxx43 4xxx45 4xxx47 Data Type Short Short Unsigned Unsigned Float Float Float Float Float Float Float Float Float Float Float Float Float Float Float Float Short Unsigned Float Float Function State State Count Description Number of the subroutine to be executed Axis id for the subroutine First parameter for the subroutine Second parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Error code generated from subroutine First return value from subroutine Second return value from subroutine Third return value from subroutine Current operating state number Current state entry count
688
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MMFI 31007523 8/2010
MMFI Modicon Motion Framework Initialize Block
116
Introduction This chapter describes the MMFI block. What's in this Chapter? This chapter contains the following topics:
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689
MMFI
Short Description
Function Description This function block defines the MMFSTART communication register table. This table starts at 41000 length 200. It passes power from input 1 but checks the revision in the table. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for detailed information on using motion loadables.
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MMFI
Representation
Symbol The following diagram shows an MMFI block.

Parameters Top input Middle node State RAM Reference 0x 4x Data Type None INT, UINT Meaning ON initiates the function to check the MMFSTART revision. Points to a block of 200 registers that makeup the MMFSTART communication area. This address is normally 401001, but can be changed with MMFSTART configuration in the SERCOS CONTROLLER The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 200. Echoes the state of top input. Turned on when the register length is not set at 200.
Bottom node
4x
INT
0x 0x
None None
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MMFI
Registers The following table shows the instructions registers.

Register base+001:002 base+003 base+004 base+005 base+006 base+007:010 base+011:042 base+043:050 base+051:066 base+067:074 base+075:082 base+083:090 base+091 base+092 base+93:096 base+97:100 base+101:102 base+103 base+104 base+105 base+106 base+107 base+108 base+109 base+110 692 Information RingControl WatchDogCont Debug SubNumber AxisID Parameter 1...2 Data Type UDINT INT INT INT INT UDINT Description Indicates enabling, stopping, holding, etc. Used by controller and PLC to make sure the other is allowed. Used to output debug messages. Indicates the subroutine number. Apply subroutine to this motion axis. Indicates parameters for this subroutine (two integers). Indicates parameters for this subroutine (16 floats) (eight words) UDINT UDINT UDINT UDINT INT INT Indicates control bits for each SERCOS Axis Indicates control bits for each Imaginary Axis Indicates control bits for each Coordinated Set. Indicates control bits for each Follower Set. Indicates user subroutine number Apply user subroutine to this motion axis Indicates user parameters for this subroutine (two integers) User parameters for this subroutine (two floats) Indicates fault, enabled, holding, profile end, in position Echoes what is written in WatchDogCont Indicates how many SERCOS axes have been configured Indicates which axis faulted Indicates what fault occurred Indicates which axis is having a problem Indicates what warning occurred Echoes SubNumber when subroutine code completes Echoes AxisID
Parameter 3...18 REAL (Reserved) SA1..8Control IA1..4Control CS1..4Control FS1..4Control USubNumber UAxisID
UParameter1...2 UDINT UParameter3...4 REAL RingStatus WatchDogState NumberOfAxes FaultAxis FaultCode WarnAxis WarnCode SubNumEcho AxisIDEcho UDINT INT INT INT INT INT INT INT INT
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MMFI
Register base+111 base+112:113 base+114:117 base+118 base+119:134 base+135:142 base+143:150 base+151:166 base+167:174 base+175:182 base+183:190 base+191 base+192 base+193 base+194 base+196:199
Information Error Return1 Return2...3 Revision SA1..8Position IA1..4Position RA1..4Position SA1..8Status IA1..45Status CS1..45Status FS1..45Status USubNumEcho UAxisIDEcho UError UReturn1 UReturn2..3
Data Type INT UDINT REAL INT REAL REAL REAL UDINT UDINT UDINT UDINT INT INT INT UDINT REAL
Description Indicates subroutine motion error number Indicates subroutine return value (one integer) Indicates subroutine return value (two floats) Indicates interface revision number Indicates position for eight SERCOS axes Indicates position for four imaginary axes indicates position for four remote axes Indicates status bits for each SERCOS Axis Indicates status bits for each Imaginary Axis Indicates status bits for each Coordinated Set Indicates status bits for each Follower Set Echoes user SubNumber when subroutine code complete Echoes user AxisID Indicates user subroutine motion error number Indicates user subroutine return value (one integer) Indicates user subroutine value (two floats)
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693
MMFI
694
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MMFS 31007523 8/2010
MMFS Modicon Motion Framework Subroutine Block
117
Introduction This chapter describes the MMFS block. What's in this Chapter? This chapter contains the following topics:
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695
MMFS
Short Description
Function Description This function block issues an MMFSTART subroutine using standard parameters and returns. It can be used to execute any MMFSTART standard subroutine except moves to CoordinatedSets. These subroutines provide a common interface to SERCOS drives. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for detailed information on using motion loadables.
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MMFS
Representation
Symbol The following diagram shows an MMFS block.

Parameters Top input State RAM Reference 0x Data Type None Meaning ON initiates the subroutine. When this input goes off, the function block is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments and routines for a generic subroutine call. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 19.
Top node
4x
INT, UINT
Middle node
4x
INT, UINT
Bottom node
4x
INT
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MMFS
Parameters Top output
Data Type None
Meaning Turned on when the subroutine call is complete without error. Note: Top and middle outputs are reset by the top input being turned off. Turned on when the subroutine call is complete and an error is code is generated in register 4xxx10. Turned on when the register length is not set at 19.
Middle output
0x
None
Bottom output
0x
None

Register 4xxxxx 4xxxx1 4xxxx2 4xxxx4 4xxxx6 4xxxx8 4xxx10 4xxx11 4xxx13 4xxx15 4xxx17 4xxx18 Data Type Short Short Unsigned Unsigned Float Float Short Unsigned Float Float Short Short Description Number of the subroutine to be executed Axis id for the subroutine First parameter for the subroutine Second parameter for the subroutine Third parameter for the subroutine Fourth parameter for the subroutine Error code generated from the subroutine First return value from the subroutine Second return value from the subroutine Third return value from the subroutine Current operating state number Current state entry count
698
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MOVE 31007523 8/2010
MOVE Absolute Move
118
Introduction This chapter describes the MOVE block. What's in this Chapter? This chapter contains the following topics:
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699
MOVE
Short Description
Function Description This function block issues an MMFStart Immediate Absolute move on the axis specified. The velocity and position are specified in the associated table. Related Information See the MMFStart Loadables for ProWORX 32 file in the Programs\Lib\Quantum folder on the ProWORX 32 installation CD for detailed information on using motion loadables.
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MOVE
Representation
Symbol The following diagram shows a MOVE block.

Parameters Top input State RAM Reference 0x Data Type None Meaning ON initiates the incremental move. When this input goes off, the function block is reset and can be initiated again. Address of the MMFSTART 200 Register communications table. This is normally 401001. This address can be configured by modifying the MMFSTART.CFG file on the QUANTUM SERCOS controller. This register points to a block of registers that define all the arguments for the configuration. The last two registers are for state control. The integer value entered in the bottom node specifies the table length. In this case, the number of registers in the table must be 8.
Top node
4x
INT, UINT
Middle node
4x
INT, UINT
Bottom node
4x
INT
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MOVE
Parameters Top output
Data Type None
Meaning Turned on when the move start is complete without error. Note: Top and middle outputs are reset by the top input being turned off. Turned on when the move is not started and an error is code is generated in register 4xxxx5. Turned on when the register length is not set at 8.
Middle output
0x
None
Bottom output
0x
None

Register 4xxxxx 4xxxx2 4xxxx3 4xxxx5 4xxxx6 4xxxx7 Data Type Short Float Float Short Short Short Description Axis ID for the absolute move Target position of the absolute move Velocity of the absolute move Error generated when attempting to start move Current operating state number Current state entry count
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MRTM: Multi-Register Transfer Module 31007523 8/2010
MRTM: Multi-Register Transfer Module
119
Introduction This chapter describes the instruction MRTM. What's in this Chapter? This chapter contains the following topics:
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703
Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see Installation of DX Loadables, page 75. The MRTM instruction is used to transfer blocks of holding registers from the program table to the command block, a group of output registers. To verify each block transfer, an echo of the data contained in the first holding register is returned to an input register.
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Representation

Parameters Top input Middle input State RAM Reference 0x, 1x 0x, 1x Data Type Meaning None None ON = enables the operation ON = one instruction block is transferred, table pointer of control table is increased by the value of "length" ON =reset
Bottom input program table (top node) control table (middle node) length (bottom node) Top output Middle output
0x, 1x 0x, 1x, 3x, 4x 3x, 4x
None
INT, UINT, First register of the program table. The digit 4 WORD is assumed as the most significant digit. INT, UINT, First register of the control table. The digit 4 is WORD assumed as the most significant digit. INT, UINT Number of registers moved from the program table during each transfer, range: 1 to 127 Echoes state of the top input Instruction block is transferred to the command block (stays on only for the remainder of the current scan). ON = pointer value table end 705
0x 0x
None None
Bottom output
0x
None
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Mode of Functioning The MRTM transfers contiguous blocks of up to 127 registers from a table of register blocks to a block size holding register area. The MRTM function block controls the operation of the module in the following manner:
If power is applied to the... Top input Middle input Then ... The function block is enabled for data transfers. Note: On initial startup, power must be applied to the bottom input. The function block attempts to transfer one instruction block. Before a transfer can occur, the echo register is evaluated. The most significant bit (MSB) of the echo register is not evaluated just bits 0 through 14. Echo mismatch is a condition that prohibits a transfer. If a transfer is permitted, one instruction block is transferred form the table starting at the table pointer. The table pointer in the control table is then advanced. If the pointers new value is equal to or greater than the table end, the bottom output is turned on. A table pointer value less than the table end turns off the output. The function block resets. The table pointer in the control table is reloaded with the start of commands value from the header of the program table
Bottom input
Parameter Description Increment Step (MIddle Input) When power is applied, this input attempts to transfer one instruction block. Before a transfer can occur, the echo register is evaluated. The most significant bit (MSB) of the echo register is not evaluated, just bits 0 through 14. Echo mismatch is a condition that prohibits a transfer. If a transfer is permitted, one instruction block is transferred from the program table starting at the table pointer. The table pointer in the control table is then incremented by the value "Length" (displayed in the bottom node). NOTE: The MRTM function block is designed to accept fault indications from I/O modules, which echo valid commands to the controller, but set a bit to indicate the occurrence of a fault. This method of fault indication is common for motion products and for most other I/O modules. If using a module that reports a fault condition in any other way, especially if the echo involved is not an echo of a valid command, special care must be taken when writing the error handler for the ladder logic to ensure the fault is detected. Failure to do so may result in a lockup or some other undesirable performance of the MRTM.
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Parameter Description Reset Pointer (Bottom Input) When power is applied to this input, the function block is reset. The table pointer in the control table is reloaded with the start of commands value from the header of the program table.
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707
708
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MSPX (Seriplex) 31007523 8/2010
MSPX (Seriplex)
120
Introduction This chapter describes the instruction MSPX. What's in this Chapter? This chapter contains the following topics:
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MSPX (Seriplex)
Short Description
Function Description The MSPX reads and writes bits within the base units registers. The top node of the MSPX instruction represents the internal sub-function number. This node can be assigned a decimal constant value of 32 or a 4xxxx register containing the value of 32. The middle node represents the starting 4xxxx register location for the SERIPLEXMOMENTUM interface base unit. The bottom node is interpreted as a numeric offset from 3000 indicating the first 3xxxx input register assigned to the interface base unit. The bottom node value specifies the location of the base unit's status register.
710
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MSPX (Seriplex)
Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning The Block Enable/Disable input enables and disables the operation of the MSPX block. When the associated logic is TRUE the top input is turned ON and the block's instructions are executed. The values of the base unit's input and output registers are not affected by the enabling or disabling of the block. The Run/Stop Bus input regulates the operation of the Seriplex bus through the run/halt bit within the base unit's control register. The run/halt bit is set to 1 when the associated logic is TRUE, and cleared to 0 when the associated logic is FALSE. The parameters of this input are not to be altered while it is enabled or the run/halt bit will result in a configuration fault.
Middle input
0x, 1x
None
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MSPX (Seriplex)
Parameters 32 (top node)
State RAM Reference
Data Type INT, UINT
Meaning Represents the internal sub-function number. This node can be assigned a decimal constant value of 32 or a 4xxxx register containing the value of 32. Represents the starting 4xxxx register location for the SERIPLEX-MOMENTUM interface base unit. Interpreted as a numeric offset from 3000 indicating the first 3xxxx input register assigned to the interface base unit. The bottom node value specifies the location of the base unit's status register. The Bus Running Indicator output reports whether or not the Seriplex bus is running. If the bus running bit is ON, the output is TRUE and the Seriplex bus is operating normally, but, if the bus running bit is OFF, the output will be FALSE. The Fault output reports if the MSPX instruction has experienced a fault condition other than a configuration fault. This will occur if any of the following status registers are ON: Bus fault (bit 3); MOMENTUM fault (bit 4); CDR error (bit 5). The detailed description of the detected fault can be determined by reading the base unit's status register. The Config Error output indicates that a configuration error has occurred, and its state is explained in the base unit's status register. When the config fault bit is ON the output becomes TRUE indicating that an improper attempt was made while writing to the base units control register.
register (middle node) offset (bottom node)
4x
INT, UINT INT, UINT
3x
Top output
0x
None
Middle output
0x
None
Bottom output
0x
None
712
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MSTR: Master 31007523 8/2010
MSTR: Master
121
Introduction This chapter describes the instruction MSTR. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Write MSTR Operation READ MSTR Operation Get Local Statistics MSTR Operation Clear Local Statistics MSTR Operation Write Global Data MSTR Operation Read Global Data MSTR Operation Get Remote Statistics MSTR Operation Clear Remote Statistics MSTR Operation Peer Cop Health MSTR Operation Reset Option Module MSTR Operation Read CTE (Config Extension Table) MSTR Operation Write CTE (Config Extension Table) MSTR Operation Modbus Plus Network Statistics TCP/IP Ethernet Statistics Run Time Errors Modbus Plus and SY/MAX Ethernet Error Codes SY/MAX-specific Error Codes TCP/IP Ethernet Error Codes CTE Error Codes for SY/MAX and TCP/IP Ethernet Page 714 715 718 722 724 726 728 730 731 732 734 736 738 740 742 744 749 750 751 753 755 758
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MSTR: Master
Short Description
Function Description PLCs that support networking communications capabilities over Modbus Plus and Ethernet have a special MSTR (master) instruction with which nodes on the network can initiate message transactions. The MSTR instruction allows you to initiate one of 12 possible network communications operations over the network. Read MSTR Operation Write MSTR Operation Get Local Statistics MSTR Operation Clear Local Statistics MSTR Operation Write Global Data MSTR Operation Read Global Data MSTR Operation Get Remote Statistics MSTR Operation Clear Remote Statistics MSTR Operation Peer Cop Health MSTR Operation Reset Option Module MSTR Operation Read CTE (Config Extension) MSTR Operation Write CTE (Config Extension) MSTR Operation
714
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MSTR: Master
Representation
Parameter Description For more information, see Parameter Description, page 718.
Parameters Top input Middle input Bottom input control block (top node) data area (middle node) length (bottom node) Top output MIddle output 0x 0x State RAM Reference 0x, 1x 0x, 1x 0x, 1x 4x 4x Data Type None None None INT, UINT INT, UINT INT None None Meaning ON = enables selected MSTR operation ON = terminates active MSTR operation Note: Only available for M1E: ON = TCP port will be held open Control block (first of several (networkdependant) contiguous holding registers) Data area (source or destination depending on selected operation) Length of data area (maximum number of registers), range: 1 ... 100 ON while the instruction is active (echoes state of the top input) ON if the MSTR operation is terminated prior to completion (echoes state of the middle input) ON = operation successful 715
Bottom output
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0x
None
MSTR: Master
Bottom Input With 984LL exec. versions 1.20 and later, power is asserted to the bottom input of the MSTR block. Along with the top enable input, this assertion causes the TCP connection to remain open. Once the connection has been established, only Modbus command and response packets are transmitted onto the Ethernet. The repetition rate, however, cannot be specified. It transmits as fast as the scan and the target served can accomodate. No dynamic changes to the control block are accepted until the enable (top) input is pulsed. 984LL function block example for open connection operation
IEC MSTR Function Block A new feature has been added to IEC exec. versions 1.21 and later by setting a bit in the Slot_ID of the EFB TCP_IP_ADR. Asserting this go-again bit, along with the TCP/IP operation, bit causes the TCP connection to remain open. Once the connection has been established, only Modbus command and response packets are transmitted onto the Ethernet. The only difference is that the repetition rate cannot be specified. It goes as fast as the scan and the target server can acomodate. The Slot_ID of the EFB TCP_IP_ADR has extended usage: Bit 0 = 0 MBP operation Bit 0 = 1 TCP/IP operation Bit 1 = 0 The TCP port will be closed after the transaction has completed (as before). Bit 1 = 1 The TCP port will be held open. Bits 2 through 7 are reserved and must remain at 0.
716
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MSTR: Master
NOTE: Map_idx = 0 for Momentum M1E processors IEC EFB example for open connection operation: Register 400050 = 3 hex
This feature is only usable for the following EFBs: CREAD_REG CREADREG CWRITE_REG CWRITERREG MBP_MSTR (needs to be always kept active: ENABLE=1) Do not use this feature with the following EFBs READREG WRITEREG READ_REG WRITE_REG
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MSTR: Master
Mode of Functioning The MSTR instruction allows you to initiate one of 12 possible network communications operations over the network. Each operation is designated by a code. Up to four MSTR instructions can be simultaneously active in a ladder logic program. More than four MSTRs may be programmed to be enabled by the logic flow; as one active MSTR block releases the resources it has been using and becomes deactivated, the next MSTR operation encountered in logic can be activated. Master Operations Certain MSTR operations are supported on some networks and not on others.
Code 1 2 3 4 5 6 7 8 9 10 11 12 Type of Operation Write Data Read Data Get Local Statistics Clear Local Statistics Write Global Database Read Global Database Get Remote Statistics Clear Remote Statistics Peer Cop Health Reset Option Module Read CTE (config extension) Write CTE (config extension) Modbus Plus x x x x x x x x x TCP/IP Ethernet x x x x x x x x x SY/MAX Ethernet x x x x x
Legend
x supported not supported
718
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MSTR: Master
Control Block (Top Node) The 4x register entered in the top node is the first of several (network-dependant) holding registers that comprise the network control block. The control block structure differs according to the network in use. Modbus Plus TCP/IP Ethernet SY/MAX Ethernet NOTE: You need to understand the routing procedures used by the network you are using when you program an MSTR instruction. A full discussion of Modbus Plus routing path structures is given in Modbus Plus Planning and Installtion Guide. If TCP/IP or SY/MAX Ethernet routing is being implemented, it must be accomplished via standard third-party Ethernet IP router products. Control Block for Modbus Plus The first of twelve contiguous 4x registers is entered in the top node. The remaining eleven registers are implied:
Register Displayed First implied Second implied Third implied Fourth implied Content Identifies one of the nine MSTR operations legal for Modbus Plus (1 ... 9) Displays error status Displays length (number of registers transferred) Displays MSTR operation-dependent information The Routing 1 register, used to designate the address of the destination node for a network transaction. The register display is implemented physically for the Quantum PLCs The Routing 2 register The Routing 3 register The Routing 4 register The Routing 5 register not applicable not applicable not applicable
Fifth implied Sixth implied Seventh implied Eighth implied Ninth implied Tenth implied Eleventh implied
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MSTR: Master
Routing 1 Register for Quantum Automation Series PLCs (Fourth Implied Register) To target a Modbus Plus Network Option module (NOM) in a Quantum PLC backplane as the destination of an MSTR instruction, the value in the high byte represents the physical slot location of the NOM, e.g. if the NOM resides in slot 7 in the backplane, the high byte of routing register 1 would look like this:
Bit 1... 8
Function
High byte: indicating physical location (range 1 ... 16) 9 ... 16 Destination address: binary value between 1 ... 64
NOTE: If you have created a logic program using an MSTR instruction for a 984 PLC and want to port it to a Quantum Automation Series PLC without having to edit the routing 1 register value, make sure that NOM #1 is installed in slot 1 of the Quantum backplane (and if a NOM #2 is used, that it is installed in slot 2 of the backplane). If you try to run the ported application with the NOMs in other slots without modifying the register, an F001 status error will appear, indicating the wrong destination node. Control Block for TCP/IP Ethernet The first of nine contiguous 4x registers is entered in the top node. The remaining eight registers are implied.
Register Displayed First implied Second implied Third implied Fourth implied Fifth implied Sixth implied Seventh implied Eighth implied Content Identifies one of the nine MSTR operations legal for TCP/IP (1 ... 4, 7, 8, 10 ... 12) Displays error status Displays length (number of registers transferred) Displays MSTR operation-dependent information Low byte: slot address of the NOE module High byte: MBP-to-Ethernet Transporter (MET) Map index Byte 4 of the 32-bit destination IP Address Byte 3 of the 32-bit destination IP Address Byte 2 of the 32-bit destination IP Address Byte 1 of the 32-bit destination IP Address
720
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MSTR: Master
Control Block for SY/MAX Ethernet The first of seven contiguous 4x registers is entered in the top node. The remaining six registers are implied.
Register Displayed First implied Second implied Third implied Fourth implied Content Identifies one of the nine MSTR operations legal for SY/MAX (1, 2, 10 ... 12) Displays error status Displays Read/Write length (number of registers transferred) Displays Read/Write base address Low byte: slot address of the NOE module (e.g., slot 10 = 0A00, slot 6 = 0600) High byte: MBP-to-Ethernet Transporter (MET) Map index Destination drop number (or set to FF hex) Terminator (set to FF hex)
Fifth implied Sixth implied
Data Area (Middle Node) The 4x register entered in the middle node is the first in a group of contiguous holding registers that comprise the data area. For operations that provide the communication processor with data, such as a Write operation, the data area is the source of the data. For operations that acquire data from the communication processor, such as a Read operation, the data area is the destination for the data. In the case of the Ethernet Read and Write CTE operations, the middle node stores the contents of the Ethernet configuration extension table in a series of registers.
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MSTR: Master
Write MSTR Operation

Short Description An MSTR Write operation transfers data from a master source device to a specified slave destination device on the network. Read and Write use one data master transaction path and may be completed over multiple scans. If you attempt to program the MSTR to Write its own station address, an error will be generated in the first implied register of the MSTR control block. It is possible to attempt a Write operation to a nonexistent register in the slave device. The slave will detect this condition and report it, this may take several scans. Network Implementation The MSTR Write operation can be implemented on the Modbus Plus, TCP/IP Ethernet, and SY/MAX Ethernet networks. Control Block Utilization In a Write operation, the registers in the MSTR control block (the top node) contain the information that differs depending on the type of network you are using. Modbus Plus TCP/IP Ethernet SY/MAX Ethernet Control Block for Modbus Plus
Register Displayed First implied Second implied Third implied Fourth ... Eighth implied Function Operation type Error status Length Slave device data area Routing 1 ... 5 Content 1 = Write Displays a hex value indicating an MSTR error, when relevant Number of registers to be sent to slave Specifies starting 4x register in the slave to be written to (1 = 40001, 49 = 40049) Designates the first ... fifth routing path addresses, respectively; the last nonzero byte in the routing path is the destination device
722
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MSTR: Master
Control Block for TCP/IP Ethernet

Register Displayed First implied Function Operation type Error status Content 1 = Write Displays a hex value indicating an MSTR error: Exception code + 3000: Exception response, where response size is correct 4001: Exception response, where response size is incorrect 4001: Read/Write Number of registers to be sent to slave Specifies starting 4x register in the slave to be written to (1 = 40001, 49 = 40049) Slot address of the network adapter module Each register contains one byte of the 32-bit IP address
Second implied Third implied Fourth implied Fifth ... eighth implied
Length Slave device data area Low byte Destination
Control Block for SY/MAX Ethernet

Register Displayed First implied Second implied Third implied Fourth implied Fourth implied Fifth ... eighth implied Function Operation type Error status Length Slave device data area Slot ID Slot ID Terminator Content 1 = Write Displays a hex value indicating an MSTR error, when relevant Number of registers to be sent to slave Specifies starting 4x register in the slave to be written to (1 = 40001, 49 = 40049) Low byte: slot address of the network adapter module High byte: Destination drop number FF hex
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MSTR: Master
READ MSTR Operation

Short Description An MSTR Read operation transfers data from a specified slave source device to a master destination device on the network. Read and Write use one data master transaction path and may be completed over multiple scans. If you attempt to program the MSTR to Read its own station address, an error will be generated in the first implied register of the MSTR control block. It is possible to attempt a Read operation to a nonexistent register in the slave device. The slave will detect this condition and report it, this may take several scans. Network Implementation The MSTR Read operation can be implemented on the Modbus Plus, TCP/IP Ethernet, and SY/MAX Ethernet networks. Control Block Utilization In a Read operation, the registers in the MSTR control block (the top node) contain the information that differs depending on the type of network you are using. Modbus Plus TCP/IP Ethernet SY/MAX Ethernet Control Block for Modbus Plus
Register Displayed First implied Second implied Third implied Fourth ... Eighth implied Function Operation type Error status Length Slave device data area Routing 1 ... 5 Content 2 = Read Displays a hex value indicating an MSTR error, when relevant Number of registers to be read from slave Specifies starting 4x register in the slave to be read from(1 = 40001, 49 = 40049) Designates the first ... fifth routing path addresses, respectively; the last nonzero byte in the routing path is the destination device
724
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MSTR: Master
Control Block for TCP/IP EthernetEthernet

Register Displayed First implied Function Operation type Error status Content 2 = Read Displays a hex value indicating an MSTR error: Exception code + 3000: Exception response, where response size is correct 4001: Exception response, where response size is incorrect 4001: Read/Write Number of registers to be read from slave Specifies starting 4x register in the slave to be read from (1 = 40001, 49 = 40049) Slot address of the network adapter module Each register contains one byte of the 32-bit IP address
Second implied Third implied Fourth implied Fifth ... eighth implied
Length Slave device data area High byte Destination

Register Displayed First implied Second implied Third implied Fourth implied Fourth implied Fifth ... eighth implied Function Operation type Error status Length Slave device data area Slot ID Slot ID Terminator Content 2 = Read Displays a hex value indicating an MSTR error, when relevant Number of registers to be read from slave Specifies starting 4x register in the slave to be read from (1 = 40001, 49 = 40049) Low byte: slot address of the network adapter module High byte: Destination drop number FF hex
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MSTR: Master
Get Local Statistics MSTR Operation

Short Description The Get Local Statistics operation obtains information related to the local node, where the MSTR has been programmed. This operation takes one scan to complete and does not require a data master transaction path. Network Implementation The Get Local Statistics operation (type 3 in the displayed register of the top node) can be implemented for Modbus Plus and TCP/IP Ethernet networks. It is not used for SY/MAX Ethernet. The following network statistics are available. Modbus Plus network statistics TCP/IP Ethernet network statistics Control Block Utilization In a Get local statistics operation, the registers in the MSTR control block (the top node) contain the information that differs depending on the type of network you are using. Modbus Plus TCP/IP Ethernet Control Block for Modbus Plus
Register Displayed First implied Second implied Function Operation type Error status Length Content 3 Displays a hex value indicating an MSTR error, when relevant Starting from offset, the number of words of statistics from the local processors statistics table ; the length must be > 0 data area An offset value relative to the first available word in the local processors statistics table; if the offset is specified as 1, the function obtains statistics starting with the second word in the table If this is the second of two local nodes, set the high byte to a value of 1 Note: If your PLC does not support Modbus Plus option modules (S985s or NOMs), the fourth implied register is not used.
Third implied
Offset
Fourth implied
Routing 1
726
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MSTR: Master

Register Displayed First implied Second implied Function Operation type Error status Length Content 3 Displays a hex value indicating an MSTR error, when relevant Starting from offset, the number of words of statistics from the local processors statistics table ; the length must be > 0 data area An offset value relative to the first available word in the local processors statistics table, if the offset is specified as 1, the function obtains statistics starting with the second word in the table Low byte: Slot address of the network adapter module
Third implied
Offset
Fourth implied Fifth ... Eighth implied
Slot ID Not applicable
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MSTR: Master
Clear Local Statistics MSTR Operation

Short Description The Clear local statistics operation clears statistics relative to the local node (where the MSTR has been programmed). This operation takes one scan to complete and does not require a data master transaction path. NOTE: When you issue the Clear Local Statistics operation, only words 13 ... 22 in the statistics table are cleared. Network Implementation The Clear Local Statistics operation (type 4 in the displayed register of the top node) can be implemented for Modbus Plus and TCP/IP Ethernet networks. It is not used for SY/MAX Ethernet. The following network statistics are available. Modbus Plus network statistics TCP/IP Ethernet network statistics Control Block Utilization In a Clear local statistics operation, the registers in the MSTR control block (the top node) differ according to the type of network in use. Modbus Plus TCP/IP Ethernet Control Block for Modbus Plus
Register Displayed First implied Second implied Third implied Fourth implied Routing 1 Function Operation type Error status Content 4 Displays a hex value indicating an MSTR error, when relevant Reserved Reserved If this is the second of two local nodes, set the high byte to a value of 1 Note: If your PLC does not support Modbus Plus option modules (S985s or NOMs), the fourth implied register is not used.
728
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MSTR: Master

Register Displayed First implied Second implied Third implied Fourth implied Fifth ... Eighth implied Slot ID Function Operation type Error status Content 4 Displays a hex value indicating an MSTR error, when relevant Reserved Reserved Low byte: Slot address of the network adapter module Reserved
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729
MSTR: Master
Write Global Data MSTR Operation

Short Description The Write global data operation transfers data to the communications processor in the current node so that it can be sent over the network when the node gets the token. All nodes on the local network link can receive this data. This operation takes one scan to complete and does not require a data master transaction path. Network Implementation The Write global data operation (type 5 in the displayed register of the top node) can be implemented only for Modbus Plus networks. Control Block Utilization The registers in the MSTR control block (the top node) are used in a Write global data operation
Register Displayed First implied Second implied Function Operation type Error status Length Content 5 Displays a hex value indicating an MSTR error, when relevant Specifies the number of registers from the data area to be sent to the comm processor; the value of the length must be 32 and must not exceed the size of the data area Reserved Routing 1 If this is the second of two local nodes, set the high byte to a value of 1 Note: If your PLC does not support Modbus Plus option modules (S985s or NOMs), the fourth implied register is not used.
Third implied Fourth implied
730
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MSTR: Master
Read Global Data MSTR Operation

Short Description The Read global data operation gets data from the communications processor in any node on the local network link that is providing global data. This operation may require multiple scans to complete if global data is not currently available from the requested node. If global data is available, the operation completes in a single scan. No master transaction path is required. Network Implementation The Read global data operation (type 6 in the displayed register of the top node) can be implemented only for Modbus Plus networks. Control Block Utilization The registers in the MSTR control block (the top node) are used in a Read global data operation
Register Displayed First implied Second implied Function Operation type Error status Length Content 6 Displays a hex value indicating an MSTR error, when relevant Specifies the number of words of global data to be requested from the comm processor designated by the routing 1 parameter; the value of the length must be > 0 32 and must not exceed the size of the data area Contains the number of words available from the requested node; the value is automatically updated by internal software The low byte specifies the address of the node whose global data are to be returned (a value between 1 ... 64); if this is the second of two local nodes, set the high byte to a value of 1 Note: If your PLC does not support Modbus Plus option modules (S985s or NOMs), the high byte of the fourth implied register is not used and the highbyte bits must all be set to 0.
Third implied
Available words
Fourth implied
Routing 1
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MSTR: Master
Get Remote Statistics MSTR Operation

Short Description The Get Remote Statistics operation obtains information relative to remote nodes on the network. This operation may require multiple scans to complete and does not require a master data transaction path. Network Implementation The Get Remote Statistics operation (type 7 in the displayed register of the top node) can be implemented for Modbus Plus and TCP/IP Ethernet networks. It is not used for SY/MAX Ethernet. Control Block Utilization In a Get remote statistics operation, the registers in the MSTR control block (the top node) contain the information that differs depending on the type of network you are using. Modbus Plus TCP/IP Ethernet Control Block for Modbus Plus
Register Displayed First implied Second implied Function Operation type Error status Length Content 7 Displays a hex value indicating an MSTR error, when relevant Starting from an offset, the number of words of statistics to be obtained from a remote node; the length must be > 0 total number of statistics available (54) and must not exceed the size of the data area Specifies an offset value relative to the first available word in the statistics table, the value must not exceed the number of statistic words available. Designates the first ... fifth routing path addresses, respectively; the last nonzero byte in the routing path is the destination device.
Third implied
Offset
Fourth ... Eighth implied
Routing 1 ... 5
The remote comm processor always returns its complete statistics table when a request is made, even if the request is for less than the full table. The MSTR instruction then copies only the amount of words you have requested to the designated 4x registers.
732
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MSTR: Master

Register Displayed First implied Second implied Function Operation type Error status Length Content 7 Displays a hex value indicating an MSTR error, when relevant Starting from offset, the number of words of statistics from the local processors statistics table; the length must be > 0 data area An offset value relative to the first available word in the local processors statistics table, if the offset is specified as 1, the function obtains statistics starting with the second word in the table Slot address of the network adapter module Each register contains one byte of the 32-bit IP address
Third implied
Offset
Fourth implied Fifth ... Eighth implied
Low byte Destination
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MSTR: Master
Clear Remote Statistics MSTR Operation

Short Description The Clear remote statistics operation clears statistics related to a remote network node from the data area in the local node. This operation may require multiple scans to complete and uses a single data master transaction path. NOTE: When you issue the Clear Remote Statistics operation, only words 13 ... 22 in the statistics table are cleared Network Implementation The Clear remote statistics operation (type 8 in the displayed register of the top node) can be implemented for Modbus Plus and TCP/IP Ethernet networks. It is not used for SY/MAX Ethernet. The following network statistics are available. Modbus Plus network statistics TCP/IP Ethernet network statistics Control Block Utilization In a Clear remote statistics operation, the registers in the MSTR control block (the top node) contain information that differs according to the type of network in use. Modbus Plus TCP/IP Ethernet Control Block for Modbus Plus
Register Displayed First implied Second implied Third implied Fourth ... Eighth implied Routing 1 ... 5 Function Operation type Error status Content 8 Displays a hex value indicating an MSTR error, when relevant Reserved Reserved Designates the first ... fifth routing path addresses, respectively; the last nonzero byte in the routing path is the destination device
734
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MSTR: Master

Register Displayed First implied Second implied Third implied Fourth implied Fifth ... Eighth implied Low byte Destination Slot address of the network adapter module Each register contains one byte of the 32-bit IP address Function Operation type Error status Not applicable Content 8 Displays a hex value indicating an MSTR error, when relevant
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735
MSTR: Master
Peer Cop Health MSTR Operation

Short Description The peer cop health operation reads selected data from the peer cop communications health table and loads that data to specified 4x registers in state RAM. The peer cop communications health table is 12 words long, and the words are indexed via this MSTR operation as words 0 ... 11. Network Implementation The peer cop health operation (type 9) in the displayed register of the top node) can be implemented only for Modbus Plus networks. Control Block Utilization The registers in the MSTR control block (the top node) are used in a Peer cop health operation:
Register Displayed First implied Second implied Third implied Function Operation type Error status Data size Index Content 9 Displays a hex value indicating an MSTR error, when relevant Number of words requested from peer cop table (range 1 ... 12) First word from the table to be read (range 0 ... 11, where 0 = the first word in the peer cop table and 11 = the last word in the table) If this is the second of two local nodes, set the high byte to a value of 1 Note: If your PLC does not support Modbus Plus option modules (S985s or NOMs), the fourth implied register is not used.
Fourth implied
Routing 1
Peer Cop Communications Health Status Information The peer cop communications health table comprises 12 contiguous registers that can be indexed in an MSTR operation as words 0 ... 11. Each bit in each of the table words is used to represent an aspect of communications health relative to a specific node on the Modbus Plus network.
736
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MSTR: Master
Bit-to-Network Node Relationship The bits in words 0 ... 3 represent the health of the global input communication expected from nodes 1 ... 64. The bits in words 4 ... 7 represent the health of the output from a specific node. The bits in words 8 ... 11 represent the health of the input to a specific node:
Type of Status Global Input Word Index 0 1 2 3 Specific Output 4 5 6 7 Specific Input 8 9 10 11 Bit-to-network Node Relationship
State of a Peer Cop Health Bit The state of a peer cop health bit reflects the current communication status of its associated node. A health bit is set when its associated node accepts inputs for its peer copped input data group or hears that another node has accepted specific output data from the its peer copped output data group. A health bit is cleared when no communication has occurred for its associated data group within the configured peer cop health time-out period. All health bits are cleared when the Put Peer Cop interface command is executed at PLC start-up time. Table values are not valid until at least one full token rotation cycle has been completed after execution of the Put Peer Cop interface command. The health bit for a given node is always zero when its associated peer cop entry is null.
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MSTR: Master
Reset Option Module MSTR Operation

Short Description The Reset option module operation causes a Quantum NOE option module to enter a reset cycle to reset its operational environment. Network Implementation The Reset option module operation (type 10 in the displayed register of the top node) can be implemented for TCP/IP and SY/MAX Ethernet networks, accessed via the appropriate network adapter. Modbus Plus networks do not use this operation. Control Block Utilization In a Reset option module operation, the registers in the MSTR control block (the top node) differ according to the type of network in use. TCP/IP Ethernet SY/MAX Ethernet Control Block for TCP/IP Ethernet
Register Displayed First implied Second implied Third implied Fourth implied Slot ID Number displayed in the low byte, in the range 1 ... 16 indicating the slot in the local backplane where the option module resides Function Operation type Error status Not applicable Content 10 Displays a hex value indicating an MSTR error, when relevant
Fifth ... Eighth implied
Not applicable
738
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MSTR: Master

Register Displayed First implied Second implied Third implied Fourth implied Fifth ... Eighth implied Slot ID Not applicable Low byte: slot address of the network adapter module Function Operation type Error status Not applicable Content 10 Displays a hex value indicating an MSTR error, when relevant
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739
MSTR: Master
Read CTE (Config Extension Table) MSTR Operation

Short Description The Read CTE operation reads a given number of bytes from the Ethernet configuration extension table to the indicated buffer in PLC memory. The bytes to be read begin at a byte offset from the beginning of the CTE. The content of the Ethernet CTE table is displayed in the middle node of the MSTR block. Network Implementation The Read CTE operation (type 11 in the displayed register of the top node) can be implemented for TCP/IP and SY/MAX Ethernet networks, accessed via the appropriate network adapter. Modbus Plus networks do not use this operation. Control Block Utilization In a Read CTE operation, the registers in the MSTR control block (the top node) differ according to the type of network in use. TCP/IP Ethernet SY/MAX Ethernet Control Block for TCP/IP Ethernet
Register Displayed First implied Second implied Third implied Fourth implied Map index Slot ID Either a value displayed in the high byte of the register or not used Number displayed in the low byte, in the range 1 ... 16 indicating the slot in the local backplane where the option module resides Function Operation type Error status Not applicable Content 11 Displays a hex value indicating an MSTR error, when relevant
Not applicable
740
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MSTR: Master
Control Block for SY/MAX Ethernet Control Block for SY/MAX Ethernet
Register Displayed First implied Second implied Third implied Fourth implied Function Operation type Error status Data Size Base Address Low byte High byte Fifth ... Eighth implied Not applicable Content 11 Displays a hex value indicating an MSTR error, when relevant Number of words transferred Byte offset in PLC register structure indicating where the CTE bytes will be written Slot address of the NOE module Terminator (FF hex)
CTE Display Implementation (Middle Node) The values in the Ethernet configuration extension table (CTE) are displayed in a series of registers in the middle node of the MSTR instruction when a Read CTE operation is implemented. The middle node contains the first of 11 contiguous 4x registers. The registers display the following CTE data.
Parameter Frame type IP address Register Displayed First implied Second implied Third implied Fourth implied Subnetwork mask Fifth implied Sixth implied Gateway Seventh implied Eighth implied Ninth implied Tenth implied Content 1 = 802.3 2 = Ethernet First byte of the IP address Second byte of the IP address Third byte of the IP address Fourth byte of the IP address Hi word Low word First byte of the gateway Second byte of the gateway Third byte of the gateway Fourth byte of the gateway
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MSTR: Master
Write CTE (Config Extension Table) MSTR Operation

Short Description The Write CTE operation writes the configuration CTE table from the data specified in the middle node to an indicated Ethernet configuration extension table or a specified slot. Network Implementation The Write CTE operation (type 12 in the displayed register of the top node) can be implemented for TCP/IP and SY/MAX Ethernet networks, via the appropriate network adapter. Modbus Plus networks do not use this operation. Control Block Utilization In a Write CTE operation, the registers in the MSTR control block (the top node) differ according to the type of network in use. TCP/IP Ethernet SY/MAX Ethernet Control Block for TCP/IP Ethernet
Register Displayed First implied Second implied Third implied Fourth implied Map index Slot ID Either a value displayed in the high byte of the register or not used Number displayed in the low byte, in the range 1 ... 16 indicating the slot in the local backplane where the option module resides Function Operation type Error status Not applicable Content 12 Displays a hex value indicating an MSTR error, when relevant
Not applicable
742
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MSTR: Master

Register Displayed First implied Second implied Third implied Fourth implied Function Operation type Error status Data Size Base Address Low byte High byte Fifth implied Sixth ... Eighth implied Terminator Not applicable Content 12 Displays a hex value indicating an MSTR error, when relevant Number of words transferred Byte offset in PLC register structure indicating where the CTE bytes will be written Slot address of the NOE module Destination drop number FF hex
CTE Display Implementation (Middle Node) The values in the Ethernet configuration extension table (CTE) are displayed in a series of registers in the middle node of the MSTR instruction when a Write CTE operation is implemented. The middle node contains the first of 11 contiguous 4x registers. The registers are used to transfer the following CTE data.
Parameter Frame type IP address Register Displayed First implied Second implied Third implied Fourth implied Subnetwork mask Fifth implied Sixth implied Gateway Seventh implied Eighth implied Ninth implied Tenth implied Content 1 = 802.3 2 = Ethernet First byte of the IP address Second byte of the IP address Third byte of the IP address Fourth byte of the IP address Hi word Low word First byte of the gateway Second byte of the gateway Third byte of the gateway Fourth byte of the gateway
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MSTR: Master
Modbus Plus Network Statistics

Modbus Plus Network Statistics The following table shows the statistics available on the Modbus Plus network. You may acquire this information by using the appropriate MSTR operation or by using Modbus function code 8. NOTE: When you issue the Clear local or Clear remote statistics operations, only words 13 ... 22 are cleared. Modbus Plus Network Statistics
Word 00 0 1 2 3 4 5 01 0 ... 11 12 ... 14 15 Bits Meaning Node type ID Unknown node type PLC node Modbus bridge node Host computer node Bridge Plus node Peer I/O node Software version number in hex (to read, strip bits 12-15 from word) Reserved Defines Word 15 error counters (see Word 15) Most significant bit defines use of error counters in Word 15. Least significant half of upper byte, plus lower byte, contain software version:
02
Network address for this station
744
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MSTR: Master
Word 03
Bits
Meaning MAC state variable:
0 1 2 3 4 5 6 7 8 9 10 04 0 32 64 96 128 05 06 07 LO HI 08 LO HI 09 LO HI 10 11 HI LO HI 12 LO HI 13 LO HI
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Power up state Monitor offline state Duplicate offline state Idle state Use token state Work response state Pass token state Solicit response state Check pass state Claim token state Claim response state Peer status (LED code); provides status of this unit relative to the network: Monitor link operation Normal link operation Never getting token Sole station Duplicate station Token pass counter; increments each time this station gets the token Token rotation time in ms Data master failed during token ownership bit map Program master failed during token ownership bit map Data master token owner work bit map Program master token owner work bit map Data slave token owner work bit map Program slave token owner work bit map Data slave/get slave command transfer request bit map Program master/get master rsp transfer request bit map Program slave/get slave command transfer request bit map Program master connect status bit map Program slave automatic logout request bit map Pretransmit deferral error counter Receive buffer DMA overrun error counter 745
MSTR: Master
Word 14
Bits LO HI
Meaning Repeated command received counter Frame size error counter If Word 1 bit 15 is not set, Word 15 has the following meaning:
15 LO HI
Receiver collision-abort error counter Receiver alignment error counter If Word 1 bit 15 is set, Word 15 has the following meaning:
LO HI 16 LO HI 17 LO HI 18 LO HI 19 LO HI 20 LO HI 21 LO HI 22 LO HI 23 LO HI 24 LO HI 25 LO HI 26 LO HI 27 LO HI 28 LO HI
Cable A framing error Cable B framing error Receiver CRC error counter Bad packet-length error counter Bad link-address error counter Transmit buffer DMA-underrun error counter Bad internal packet length error counter Bad MAC function code error counter Communication retry counter Communication failed error counter Good receive packet success counter No response received error counter Exception response received error counter Unexpected path error counter Unexpected response error counter Forgotten transaction error counter Active station table bit map, nodes 1 ... 8 Active station table bit map, nodes 9 ...16 Active station table bit map, nodes 17 ... 24 Active station table bit map, nodes 25 ... 32 Active station table bit map, nodes 33 ... 40 Active station table bit map, nodes 41 ... 48 Active station table bit map, nodes 49 ... 56 Active station table bit map, nodes 57 ... 64 Token station table bit map, nodes 1 ... 8 Token station table bit map, nodes 9 ... 16 Token station table bit map, nodes 17 ... 24 Token station table bit map, nodes 25 ... 32
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MSTR: Master
Word 29
Bits LO HI
Meaning Token station table bit map, nodes 33 ... 40 Token station table bit map, nodes 41 ... 48 Token station table bit map, nodes 49 ... 56 Token station table bit map, nodes 57 ... 64 Global data present table bit map, nodes 1 ... 8 Global data present table bit map, nodes 9 ... 16 Global data present table bit map, nodes 17 ... 24 Global data present table bit map, nodes 25 ... 32 Global data present table bit map, nodes 33 ... 40 Global data present table bit map, nodes 41 ... 48 Global data present table map, nodes 49 ... 56 Global data present table bit map, nodes 57 ... 64 Receive buffer in use bit map, buffer 1-8 Receive buffer in use bit map, buffer 9 ... 16 Receive buffer in use bit map, buffer 17 ... 24 Receive buffer in use bit map, buffer 25 ... 32 Receive buffer in use bit map, buffer 33 ... 40 Station management command processed initiation counter Data master output path 1 command initiation counter Data master output path 2 command initiation counter Data master output path 3 command initiation counter Data master output path 4 command initiation counter Data master output path 5 command initiation counter Data master output path 6 command initiation counter Data master output path 7 command initiation counter Data master output path 8 command initiation counter Data slave input path 41 command processed counter Data slave input path 42 command processed counter Data slave input path 43 command processed counter Data slave input path 44 command processed counter Data slave input path 45 command processed counter Data slave input path 46 command processed counter Data slave input path 47 command processed counter Data slave input path 48 command processed counter
30
LO HI
31
LO HI
32
LO HI
33
LO HI
34
LO HI
35
LO HI
36
LO HI
37
LO HI
38
LO HI
39
LO HI
40
LO HI
41
LO HI
42
LO HI
43
LO HI
44
LO HI
45
LO HI
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MSTR: Master
Word 46
Bits LO HI
Meaning Program master output path 81 command initiation counter Program master output path 82 command initiation counter Program master output path 83 command initiation counter Program master output path 84 command initiation counter Program master command initiation counter Program master output path 86 command initiation counter Program master output path 87 command initiation counter Program master output path 88 command initiation counter Program slave input path C1 command processed counter Program slave input path C2 command processed counter Program slave input path C3 command processed counter Program slave input path C4 command processed counter Program slave input path C5 command processed counter Program slave input path C6 command processed counter Program slave input path C7 command processed counter Program slave input path C8 command processed counter
47
LO HI
48
LO HI
49
LO HI
50
LO HI
51
LO HI
52
LO HI
53
LO HI
748
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MSTR: Master
TCP/IP Ethernet Statistics

TCP/IP Ethernet Statistics A TCP/IP Ethernet board responds to Get Local Statistics and Set Local Statistics commands with the following information:
Word 00 ... 02 Meaning MAC address, e.g., if the MAC address is 00 00 54 00 12 34, it is displayed as follows: Word 00 01 02 03 Board status 0x0001 0x4000 0x8000 04 and 05 06 and 07 08 and 09 10 and 11 12 and 13 14 and 15 16 and 17 18 and 19 20 and 21 22 and 23 24 and 25 26 and 27 28 and 29 30 and 31 32 and 33 34 and 35 36 and 37 Content 00 00 00 54 34 12 Meaning Running APPI LED (1=ON, 0 = OFF) Link LED
Number of receiver interrupts Number of transmitter interrupts Transmit-timeout error count Collision-detect error count Missed packets Memory error count Number of times driver has restarted lance Receive framing error count Receiver overflow error count Receive CRC error count Receive buffer error count Transmit buffer error count Transmit silo underflow count Late collision count Lost carrier count Number of retries IP address, e.g., if the IP address is 198.202.137.113 (or c6 CA 89 71), it is displayed as follows: Word 36 37 Content 89 71 C6 CA
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MSTR: Master
Run Time Errors

Runtime Errors If an error occurs during a MSTR operation, a hexadecimal error code will be displayed in the first implied register in the control block (the top node). Function error codes are network-specific. Modbus Plus and SY/MAX Ethernet Error Codes SY/MAX-specific Error Codes TCP/IP Ethernet Error Codes CTE Error Codes for SY/MAX and TCP/IP Ethernet
750
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MSTR: Master
Modbus Plus and SY/MAX Ethernet Error Codes

Form of the Function Error Code The form of the function error code for Modbus Plus and SY/MAX Ethernet transactions is Mmss, where M represents the major code m represents the minor code ss represents a subcode Hexadecimal Error Code
Hex Error Code 1001 2001 2002 Meaning User has aborted the MSTR element An unsupported operation type has been specified in the control block One or more control block parameter has been changed while the MSTR element is active (applies only to operations that take multiple scans to complete). Control block parameters may be changed only when the MSTR element is not active. Invalid value in the length field of the control block Invalid value in the offset field of the control block Invalid values in the length and offset fields of the control block Invalid slave device data area Invalid slave device network area Invalid slave device network routing Route equal to your own address Attempting to obtain more global data words than available Modbus slave exception response Inconsistent Modbus slave response Inconsistent network response Routing failure
2003 2004 2005 2006 2007 2008 2009 200A 30ss 4001 5001 6mss)
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MSTR: Master
ss HEX Value in Error Code 30ss The ss subfield in error code 30ss is:
ss Hex Value 01 02 03 04 05 06 07 08 ... 255 Meaning Slave device does not support the requested operation Nonexistent slave device registers requested Invalid data value requested Reserved Slave has accepted long-duration program command Function cant be performed now: a long-duration command in effect Slave rejected long-duration program command Reserved
ss Hex Value in Error Code 6mss The m subfield in error code 6mss is an index into the routing information indicating where an error has been detected (a value of 0 indicates the local node, a 2 the second device on the route, etc.). The ss subfield in error code 6mss is:
ss Hex Value 01 02 03 04 05 06 07 08 10 20 40 80 F001 Meaning No response received Program access denied Node off-line and unable to communicate Exception response received Router node data paths busy Slave device down Bad destination address Invalid node type in routing path Slave has rejected the command Initiated transaction forgotten by slave device Unexpected master output path received Unexpected response received Wrong destination node specified for the MSTR operation
752
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MSTR: Master
SY/MAX-specific Error Codes

Types or Errors Three additional types of errors may be reported in the MSTR instruction when SY/MAX Ethernet is being used. The error codes have the following designations: 71xx errors: Errors detected by the remote SY/MAX device 72xx errors: Errors detected by the serve 73xx errors: Errors detected by the Quantum translator Hexadecimal Error Code SY/MAX-specific HEX Error Code SY/MAX-specific:
Hex Error Code 7101 7103 7109 710F 7110 7111 7113 711D 7149 714B 7201 7203 7209 720F 7210 7211 7213 721D 7249 Meaning Illegal opcode detected by the remote SY/MAX device Illegal address detected by the remote SY/MAX device Attempt to write a read-only register detected by the remote SY/MAX device Receiver overflow detected by the remote SY/MAX device Invalid length detected by the remote SY/MAX device Remote device inactive, not communicating (occurs after retries and time-out have been exhausted) detected by the remote SY/MAX device Invalid parameter on a read operation detected by the remote SY/MAX device Invalid route detected by the remote SY/MAX device Invalid parameter on a write operation detected by the remote SY/MAX device Illegal drop number detected by the remote SY/MAX device Illegal opcode detected by the SY/MAX server Illegal address detected by the SY/MAX server Attempt to write to a read-only register detected by the SY/MAX server Receiver overflow detected by the SY/MAX server Invalid length detected by the SY/MAX server Remote device inactive, not communicating (occurs after retries and time-out have been exhausted) detected by the SY/MAX server Invalid parameter on a read operation detected by the SY/MAX server Invalid route detected by the SY/MAX server Invalid parameter on a write operation detected by the SY/MAX server
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MSTR: Master
Hex Error Code 724B 7301 7303 7309 731D
Meaning Illegal drop number detected by the SY/MAX server Illegal opcode in an MSTR block request by the Quantum translator Read/Write QSE module status (200 route address out of range) Attempt to write to a read-only register when performing a status write (200 route) Invalid rout detected by Quantum translator Valid routes are: dest_drop, 0xFF 200, dest_drop, 0xFF 100+drop, dest_drop, 0xFF All other routing values generate an error
734B
One of the following errors has occurred: No CTE (configuration extension) table was configured No CTE table entry was created for the QSE Module slot number No valid drop was specified The QSE Module was not reset after the CTE was created Note: After writing and configuring the CTE and downloading it to the QSE Module, you must reset the QSE Module to make the changes take effect. When using an MSTR instruction, no valid slot or drop was specified
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MSTR: Master
TCP/IP Ethernet Error Codes

Error in an MSTR Routine An error in an MSTR routine over TCP/IP Ethernet may produce one of the following errors in the MSTR control block. The form of the code is Mmss, where M represents the major code m represents the minor code ss represents a subcode Hexadecimal Error Code for MSTR Routine over TCP/IP Ethernet
Hex Error Code 1001 2001 2002 Meaning User has aborted the MSTR element An unsupported operation type has been specified in the control block One or more control block parameter has been changed while the MSTR element is active (applies only to operations that take multiple scans to complete). Control block parameters may be changed only when the MSTR element is not active Invalid value in the length field of the control block Invalid value in the offset field of the control block Invalid values in the length and offset fields of the control block Invalid slave device data area Generic Modbus fail code Modbus slave exception response Inconsistent Modbus slave response
2003 2004 2005 2006 3000 30ss 4001
ss Hex Value in Error Code 30ss The ss subfield in error code 30ss is:
ss Hex Value 01 02 03 04 05 06 07 Meaning Slave device does not support the requested operation Nonexistent slave device registers requested Invalid data value requested Reserved Slave has accepted long-duration program command Function cant be performed now: a long-duration command in effect Slave rejected long-duration program command
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755
MSTR: Master
HEX Error Code TCP/IP Ethernet Network An error on the TCP/IP Ethernet network itself may produce one of the following errors in the MSTR control block.
Hex Error Code 5004 5005 5006 5009 500C 500D 5011 5016 5017 5020 5023 5024 5025 5026 5027 5028 5029 502A 502B 502C 502D 502E 502F 5030 5031 5032 5033 5034 5035 5036 5037 756 Meaning Interrupted system call I/O error No such address The socket descriptor is invalid Not enough memory Permission denied Entry exists An argument is invalid An internal table has run out of space The connection is broken This operation would block and the socket is nonblocking The socket is nonblocking and the connection cannot be completed The socket is nonblocking and a previous connection attempt has not yet completed Socket operation on a nonsocket The destination address is invalid Message too long Protocol wrong type for socket Protocol not available Protocol not supported Socket type not supported Operation not supported on socket Protocol family not supported Address family not supported Address is already in use Address not available Network is down Network is unreachable Network dropped connection on reset The connection has been aborted by the peer The connection has been reset by the peer An internal buffer is required, but cannot be allocated
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MSTR: Master
Hex Error Code 5038 5039 503A 503B 503C 503D 5040 5041 5042 5046 5047 5048 5049 504A 504B 5050 5051 5052 5053 5054 5055 5056 5057 F001 F002
Meaning The socket is already connected The socket is not connected Cant send after socket shutdown Too many references; cant splice Connection timed out The attempt to connect was refused Host is down The destination host could not be reached from this node Directory not empty NI_INIT returned -1 The MTU is invalid The hardware length is invalid The route specified cannot be found Collision in select call; these conditions have already been selected by another task The task id is invalid No network resource Length error Addressing error Application error Client in bad state for request No remote resource Nonoperational TCP connection Incoherent configuration In Reset mode Module not fully initialized
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MSTR: Master
CTE Error Codes for SY/MAX and TCP/IP Ethernet

CTE Error Codes for SY/MAX and TCP/IP Ethernet HEX Error Code MSTR routine over TCP/IP Ethernet:
Hex Error Code 7001 7002 7003 7004 7005 Meaning The is no Ethernet configuration extension The CTE is not available for access The offset is invalid The offset + length is invalid Bad data field in the CTE
758
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MU16: Multiply 16 Bit 31007523 8/2010
MU16: Multiply 16 Bit
122
Introduction This chapter describes the instruction MU16. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The MU16 instruction performs signed or unsigned multiplication on the 16-bit values in the top and middle nodes, then posts the product in two contiguous holding registers in the bottom node.
760
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Representation

Parameters Top input Bottom input value 1 (top node) value 2 (middle node) product (bottom node) State RAM Reference 0x, 1x 0x, 1x 3x, 4x Data Type None None INT, UINT Meaning ON = enables value 1 x value 2 ON = signed operation OFF = unsigned operation Multiplicand, can be displayed explicitly as an integer (range 1 ... 65 535, enter e.g. #65535) or stored in a register Multiplier, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register First of two contiguous holding registers: displayed register contains half of the product and the implied register contains the other half Echoes the state of the top input
3x, 4x
INT, UINT
4x
INT, UINT
Top output
0x
None
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762
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MUL: Multiply 31007523 8/2010
MUL: Multiply
123
Introduction This chapter describes the instruction MUL. What's in this Chapter? This chapter contains the following topics:
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763
MUL: Multiply
Short Description
Function Description The MUL instruction multiplies unsigned value 1 (its top node) by unsigned value 2 (its middle node) and stores the product in two contiguous holding registers in the bottom node.
764
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MUL: Multiply
Representation
*Available on the following E685/785 PLCs L785 PLCs Quantum Series PLCs Parameter Description
Parameters Top input value 1 (top node) State RAM Data Reference Type 0x, 1x 3x, 4x None UINT Meaning ON = value 1 multiplied by value 2 Multiplicand, can be displayed explicitly as an integer (range 1 ... 9 999) or stored in a register Max. Value: 999 -16-bit PLC Max. Value: 9999 - 24-bit PLC Max. Value: 65535 - *PLC Multiplier, can be displayed explicitly as an integer (range 1 ... 9 999) or stored in a register Max. Value: 999 -16-bit PLC Max. Value: 9999 - 24-bit PLC Max. Value: 65535 - *PLC Product (first of two contiguous holding registers; displayed: high-order digits; implied: low-order digits) Echoes the state of the top input
3x, 4x
UINT
result (bottom node) Top output
4x 0x
UINT None
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765
MUL: Multiply
Example
Product of Instruction MUL For example, if value 1 = 8 000 and value 2 = 2, the product is 16 000. The displayed register contains the value 0001 (the high-order half of the product), and implied register contains the value 6 000 (the low-order half of the product).
766
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NBIT: Bit Control 31007523 8/2010
NBIT: Bit Control
124
Introduction This chapter describes the instruction NBIT. What's in this Chapter? This chapter contains the following topics:
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767
NBIT: Bit Control
Short Description
Function Description The normal bit (NBIT) instruction lets you control the state of a bit from a register by specifying its associated bit number in the bottom node. The bits being controlled are similar to coils, when a bit is turned ON, it stays ON until a control signal turns it OFF. NOTE: The NBIT instruction does not follow the same rules of network placement as 0x-referenced coils do. An NBIT instruction cannot be placed in column 11 of a network and it can be placed to the left of other logic nodes on the same rungs of the ladder.
768
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NBIT: Bit Control
Representation

Parameters Top input register # (top node) bit # (bottom node) Top output 0x State RAM Reference 0x, 1x 4x Data Type None WORD INT, UINT None Meaning ON = sets the specified bit to 1 OFF = clears the specified bit to 0 Holding register whose bit pattern is being controlled Indicates which one of the 16 bits is being controlled Echoes the state of the top input: ON = top input ON and specified bit set to 1 OFF = top input OFF and specified bit set to 0
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769
NBIT: Bit Control
770
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NCBT: Normally Closed Bit 31007523 8/2010
NCBT: Normally Closed Bit
125
Introduction This chapter describes the instruction NCBT. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The normally closed bit (NCBT) instruction lets you sense the logic state of a bit in a register by specifying its associated bit number in the bottom node. The bit is representative of an N.C contact. It passes power from the top output when the specified bit is OFF and the top input is ON.
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Representation

Parameters Top input register # (top node) bit # (bottom node) Top output 0x State RAM Reference 0x, 1x 3x, 4x Data Type None WORD INT, UINT None Meaning ON = enables bit sensing Register whose bit pattern is being used to represent N.C. contacts (Indicates which one of the 16 bits is being sensed ON = top input is ON and specified bit is OFF (logic state 0)
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773
774
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NOBT: Normally Open Bit 31007523 8/2010
NOBT: Normally Open Bit
126
Introduction This chapter describes the instruction NOBT. What's in this Chapter? This chapter contains the following topics:
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Short Description
Function Description The normally open bit (NOBT) instruction lets you sense the logic state of a bit in a register by specifying its associated bit number in the bottom node. The bit is representative of an N.O contact.
776
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Representation

Parameters Top input register # (top node) bit # (bottom node) Top output 0x State RAM Reference 0x, 1x 3x, 4x Data Type None WORD INT, UINT None Meaning ON = enables bit sensing Register whose bit pattern is being used to represent N.O. contacts (Indicates which one of the 16 bits is being sensed ON = top input is ON and specified bit is ON (logic state 1)
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777
778
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NOL: Network Option Module for Lonworks 31007523 8/2010
NOL: Network Option Module for Lonworks
127
Introduction This chapter describes the instruction NOL. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Detailed Description Page 780 781 782
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Short Description
Function Requirements The following steps are necessary before using this instruction:
Step 1 Action Add loadable NSUP.exe to the controllers configuration Note: This loadable needs only be loaded once to support multiple loadables, such as ECS.exe and XMIT.exe.
CAUTION
The outputs of the instruction turn on, regardless of the input states When the NSUP loadable is not installed or is installed after the NOL loadable or is installed in a Quantum PLC with an executive < V2.0, all three outputs turn on, regardless of the input states. Failure to follow these instructions can result in injury or equipment damage.
Step 2
Action Unpack and install the DX Loadable NOL. For more information, see Installation of DX Loadables, page 75.
Function Description The NOL instruction is provided to facilitate the movement of the large amount of data between the NOL module and the controller register space. The NOL Module is mapped for 16 input registers (3X) and 16 output registers (4X). Of these registers, two input and two output registers are for handshaking between the NOL Module and the instruction. The remaining fourteen input and fourteen output registers are used to transport the data.
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Representation
Parameters Top input Middle input function # (top node) State RAM Reference 0x, 1x 0x, 1x 4x Data Type None None INT, UINT, WORD Meaning ON = Enables the NOL function ON = Initialize: causes the instruction to re-sync with the module Function number selects the function of the NOL block Function 0 transfers data to/from the module. Any other function number yields an error. Register block (first of 16 contiguous registers Total number of registers required by the instruction ON = instruction enabled and no error New data Set for one sweep when the entire data block from the module has been written to the register area. ON = Error
register block (middle node) count (bottom node) Top output Middle output
4x
INT, UINT, WORD INT, UINT
0x 0x
None None
Bottom output
0x
None
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Detailed Description
Register Block (Middle Node) This block provides the registers for configuration and status information, the registers for the health status bits and the registers for the actual data of the Standard Network Variable Types (SNVTs). Register Block
Register Configuration and Displayed and first implied Status information Second and third implied Fourth implied Fifth implied Sixth implied Seventh implied Eighth implied Ninth implied 10th implied 11th implied 12th implied 13th implied 14th to 15th implied SNVTs Health Bit Status (if enabled in DXZoom screen) SNVTs Actual Data 16th to 31st implied Content I/O Map input base (3x) I/O Map output base (4x) Enable health bits Number of input registers Number of output registers Number of discrete input registers Number of discrete output registers Config checksum (CRC) NOL version Module firmware version NOL DX version Module DX version Not used Health bits of each programmable network variable
Enable Health Bit = NO: from 16th implied up Enable Health Bit = YES: from 32nd implied up
Data is stored in 4 groups: Discrete inputs Register inputs Discrete outputs Register outputs These groups of data are set up consecutively and start on word boundaries.
The first 16 registers with configuration and status information can be programmed and monitored via the NOL DX Zoom screen. For setting up the link to the NOL module the only parameters that need to be entered are the beginning 3x and 4x registers used when I/O mapping the NOL module. Further information you will find in the documentation Network Option Module for LonWorks.
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Count (Bottom Node) Defines the total number of registers required by the function block. This value must be set to a value equal to or greater than the number of data registers required to transfer and store the network data being used by the NOL module. If the count value is not large enough for the required data, the error output will be set.
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784
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Instruction Descriptions (O to Q) 31007523 8/2010
Instruction Descriptions (O to Q)
V
Introduction In this part instruction descriptions are arranged alphabetically from O to Q. What's in this Part? This part contains the following chapters:
Chapter 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 OR: Logical OR PCFL: Process Control Function Library PCFL-AIN: Analog Input PCFL-ALARM: Central Alarm Handler PCFL-AOUT: Analog Output PCFL-AVER: Average Weighted Inputs Calculate PCFL-CALC: Calculated Preset Formula PCFL-DELAY: Time Delay Queue PCFL-EQN: Formatted Equation Calculator PCFL-INTEG: Integrate Input at Specified Interval PCFL-KPID: Comprehensive ISA Non Interacting PID PCFL-LIMIT: Limiter for the Pv PCFL-LIMV: Velocity Limiter for Changes in the Pv PCFL-LKUP: Look-up Table PCFL-LLAG: First-order Lead/Lag Filter PCFL-MODE: Put Input in Auto or Manual Mode PCFL-ONOFF: ON/OFF Values for Deadband PCFL-PI: ISA Non Interacting PI PCFL-PID: PID Algorithms PCFL-RAMP: Ramp to Set Point at a Constant Rate Chapter Name Page 787 793 799 805 811 815 821 827 831 837 841 847 851 855 861 865 869 873 879 885
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Instruction Descriptions (O to Q)
Chapter 148 149 150 151 152 153 154
Chapter Name PCFL-RATE: Derivative Rate Calculation over a Specified Time PCFL-RATIO: Four Station Ratio Controller PCFL-RMPLN: Logarithmic Ramp to Set Point PCFL-SEL: Input Selection PCFL-TOTAL: Totalizer for Metering Flow PEER: PEER Transaction PID2: Proportional Integral Derivative
Page 889 893 897 901 907 913 917
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OR: Logical OR 31007523 8/2010
OR: Logical OR
128
Introduction This chapter describes the instruction OR. What's in this Chapter? This chapter contains the following topics:
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OR: Logical OR
Short Description
WARNING
DISABLED COILS Before using the OR instruction, check for disabled coils. OR will override any disabled coils within the destination matrix without enabling them. This can cause personal injury if a coil has disabled an operation for maintenance or repair because the coils state can be changed by the OR operation. Failure to follow these instructions can result in death, serious injury, or equipment damage. The OR instruction performs a Boolean OR operation on the bit patterns in the source and destination matrices. The ORed bit pattern is then posted in the destination matrix, overwriting its previous contents.
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OR: Logical OR
Representation
Parameters Top input source matrix (top node) destination matrix (middle node) length (bottom node) Top output 0x State RAM Reference 0x, 1x 0x, 1x, 3x, 4x 0x, 4x Data Type None ANY_BIT ANY_BIT Meaning Initiates OR First reference in the source matrix. First reference in the destination matrix
INT, UINT None
Matrix length, range: 1 ... 100. Echoes state of the top input
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OR: Logical OR
An OR Example Whenever contact 10001 passes power, the source matrix formed by the bit pattern in registers 40600 and 40601 is ORed with the destination matrix formed by the bit pattern in registers 40606 and 40607. The ORed bit pattern is then copied into registers 40606 and 40607, overwriting the original destination bit pattern.
CAUTION
OUTPUT/COIL RESTRICTIONS WITH THE OR INSTRUCTION Do not turn off outputs and coils when using the OR instruction. Failure to follow these instructions can result in injury or equipment damage. NOTE: If you want to retain the original destination bit pattern of registers 40606 and 40607, copy the information into another table using the BLKM instruction before performing the OR operation.
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OR: Logical OR
Matrix Length (Bottom Node) The integer entered in the bottom node specifies the matrix length, i.e. the number of registers or 16-bit words in the two matrices. The matrix length can be in the range 1 ... 100. A length of 2 indicates that 32 bits in each matrix will be ORed.
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791
OR: Logical OR
792
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PCFL: Process Control Function Library 31007523 8/2010
PCFL: Process Control Function Library
129
Introduction This chapter describes the instruction PCFL. What's in this Chapter? This chapter contains the following topics:
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793
Short Description
Function Description The PCFL instruction gives you access to a library of process control functions utilizing analog values. PCFL operations fall into three major categories. Advanced Calculations Signal Processing Regulatory Control A PCFL function is selected from a list of alphabetical subfunctions in a pulldown menu in the panel software, and the subfunction is displayed in the top node of the instruction (see Function (Top Node), page 796 for a list of subfunctions and descriptions). PCFL uses the same FP library as EMTH. If the PLC that you are using for PCFL does not have the onboard 80x87 math coprocessor chip, calculations take a comparatively long time to execute. PLCs with the math coprocessor can solve PCFL calculations ten times faster than PLCs without the chip. Speed, however, should not be an issue for most traditional process control applications where solution times are measured in seconds, not milliseconds.
794
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Representation
Parameters Top input function (top node) State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of process control function An indicator for the selected PCFL library function is specified in the top node. (For more information, see Function (Top Node), page 796.) 4x INT, UINT, WORD INT, UINT 0x 0x None None First in a block of contiguous holding registers where the parameters for the specified subfunction are stored Length of parameter block (depending on selected subfunction ON = operation successful ON = error
parameter block (middle node) length (bottom node) Top output Bottom output
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795
Function (Top Node) A subfunction for the selected PCFL library function is specified in the top node.
Operation Subfunction Description Timedependent Operations no no no no no no yes no yes yes no yes no yes yes yes no yes no yes
Advanced Calculations
AVER CALC EQN
Average weighted inputs Calculate preset formula Formatted equation calculator Central alarm handler for a PV input Convert inputs to scaled engineering units Convert outputs to values in the 0 ... 4095 range Time delay queue Look-up table Integrate input at specified interval First-order lead/lag filter Limiter for the PV (low/low, low, high, high/high) Velocity limiter for changes in the PV (low, high) Put input in auto or manual mode Ramp to set point at a constant rate Logarithmic ramp to set point (~2/3 closer to set point for each time constant) Derivative rate calculation over a specified time High/low/average input selection Comprehensive ISA non-interacting proportional-integral-derivative (PID) Specifies ON/OFF values for deadband PID algorithms
Signal Processing
ALARM AIN AOUT DELAY LKUP INTEG LLAG LIMIT LIMV MODE RAMP RMPLN RATE SEL
Regulatory Control
KPID ONOFF PID PI RATIO TOTAL
ISA non-interacting PI (with halt/manual/auto yes operation features) Four-station ratio controller Totalizer for metering flow no yes
796
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Advanced Calculations Advanced calculations are used for general mathematical purposes and are not limited to process control applications. With advanced calculations, you can create custom signal processing algorithms, derive states of the controlled process, derive statistical measures of the process, etc. Simple math routines have already been offered in the EMTH instruction. The calculation capability included in PCFL is a textual equation calculator for writing custom equations instead of programming a series of math operations one by one. Signal Processing Signal processing functions are used to manipulate process and derived process signals. They can do this in a variety of ways; they linearize, filter, delay, and otherwise modify a signal. This category would include functions such as an Analog Input/Output, Limiters, Lead/Lag, and Ramp generators. Regulatory Control Regulatory functions perform closed loop control in a variety of applications. Typically, this is a PID (proportional integral derivative) negative feedback control loop. The PID functions in PCFL offer varying degrees of functionality. Function 75, PID, has the same general functionality as the PID2 instruction but uses floating point math and represents some options differently. PID is beneficial in cases where PID2 is not suitable because of numerical concerns such as round-off. For more information, see PCFL Subfunctions, page 45. Parameter Block (Middle Node) The 4x register entered in the middle node is the first in a block of contiguous holding register where the parameters for the specified PCFL operation are stored. The ways that the various PCFL operations implement the parameter block are described in the description of the various subfunctions (PCFL operations). Within the parameter block of each PCFL function are two registers used for input and output status. Output Flags In all PCFL functions, bits 12 ... 16 of the output status register define the following standard output flags:
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797
Bit 1 - 11 12 13 14 15 16
Function Not used 1 = Math error - invalid floating point or output 1 = Unknown PCFL function not used 1 = Size of the allocated register table is too small 1 = Error has occurred - pass power to the bottom output
For time-dependent PCFL functions, bits 9 and 11 are also used as follows:
Bit 1-8 9 10 11 12 13 14 15 16
Function Not used 1 = Initialization working Not used 1 = Illegal solution interval 1 = Math error - invalid floating point or output 1 = Unknown PCFL function not used 1 = Size of the allocated register table is too small 1 = Error has occurred - pass power to the bottom output
Input Flags In all PCFL functions, bits 1 and 3 of the input status register define the following standard input flags:
Bit 1 2 3 4 -16
Function 1 = Function initialization complete or in progress 0 = Initialize the function not used 1 = Timer override not used
Length (Bottom Node) The integer value entered in the bottom node specifies the length, i.e. the number of registers, of the PCFL parameter block. The maximum allowable length will vary depending on the function you specify.
798
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PCFL-AIN: Analog Input 31007523 8/2010
PCFL-AIN: Analog Input
130
Introduction This chapter describes the subfunction PCFL-AIN. What's in this Chapter? This chapter contains the following topics:
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799
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The AIN function scales the raw input produced by analog input modules to engineering values that can be used in the subsequent calculations. Three scaling options are available. Auto input scaling Manual input scaling Implementing process square root on the input to linearize the signal before scaling
800
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Representation
Parameters Top input AIN (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction AIN First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 802. Length of parameter block for subfunction AIN (can not be changed) ON = operation successful ON = error
14 (bottom node) Top output Bottom output 0x 0x
INT, UINT None None
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801
Mode of Functioning AIN supports the range resolutions for following device types: Quantum Engineering Ranges
Resolution 10 V V 0 ... 10 V 0 ... 5 V 1 ... 5 V Range: Valid 768 ... 64 768 16 768 ... 48 768 0 ... 64 000 0 ... 32 000 6 400 ... 32 000 Range: Under 767 16 767 0 0 6 399 Range: Over 64 769 48 769 64 001 32 001 32 001
Quantum Thermocouple
Resolution TC degrees TC 0.1 degrees TC Raw Units Range: Valid -454 ... +3 308 -4 540 ... +32 767 0 ... 65 535
Quantum Voltmeter
Resolution 10 V 5V 0 ... 10 V 0 ... 5 V 1 ... 5 V Range: Valid -10 000 ... +10 000 -5 000 ... +5 000 0 ... 10 000 0 ... 5 000 1 000 ... 5 000 Range: Under -10 001 -5 001 0 0 999 Range: Over +10 001 +5 001 10 001 5 001 5 001
Parameter Block (Middle Node) The length of the AIN parameter block is 14 registers.
Register Displayed First implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied 802 Content Input from a 3x register Reserved Output status Input status Scale 100% engineering units Scale 0% engineering units
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Register Eighth and ninth implied 10th and 11th implied 12th and 13th implied
Content Manual input Auto input Output
Output Status
Bit 1...5 6 7 8 9 10 11 12 ... 16 Function Not used 1 = with TC PSQRT, invalid: in extrapolation range, PSQRT not used 1 = input out of range 1 = echo under range from input module 1 = echo over range from input module 1 = invalid output mode selected 1 = invalid Engineering Units Standard output bits (flags)
Input Status
Bit 1 ... 3 4 ... 8 9 10 11 12 ... 16 Function Standard input bits (flags) Ranges (see following tables) 1 = process square root on raw input 1 = manual scaling mode 0 = auto scaling mode 1 = extrapolate over-/under-range for auto mode 0 = clamp over-/under-range for auto mode Not used
Quantum Engineering Ranges

Bit 4 0 0 0 0 0
31007523 8/2010
5 1 1 1 1 1
6 0 0 0 0 1
7 0 0 1 1 0
8 0 1 0 1 0
Range +/- 10V +/- 5V 0 ... 10 V 0 ... 5 V 1 ... 5 V 803
Quantum Thermocouple
Bit 4 0 0 0 5 1 1 1 6 1 1 1 7 0 1 1 8 1 0 1 Range TC degrees TC 0.1 degrees TC raw units
Quantum Voltmeter
Bit 4 1 1 1 1 1 5 0 0 0 0 1 6 0 0 1 1 0 7 0 1 0 1 0 8 0 0 0 0 0 Range +/- 10V +/- 5V 0 ... 10 V 0 ... 5 V 1 ... 5 V
NOTE: Bit 4 in this register is nonstandard use.
804
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PCFL-ALARM: Central Alarm Handler 31007523 8/2010
PCFL-ALARM: Central Alarm Handler
131
Introduction This chapter describes the subfunction PCFL-Alarm. What's in this Chapter? This chapter contains the following topics:
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805
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The ALARM function gives you a central block for alarm handling where you can set high (H), low (L), high high (HH), and low low (LL) limits on a process variable. ALARM lets you specify A choice of normal or deviation operating mode Whether to use H/L or both H/L and HH/LL limits Whether or not to use deadband (DB) around the limits
806
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Representation
Parameters Top input ALRM (top node) parameter block (middle node) 4x INT, UINT, WORD State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction ALARM First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 808. Length of parameter block for subfunction ALARM (can not be changed) ON = operation successful ON = error
INT, UINT None None
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807
Mode of Functioning The following operating modes are available.
Mode Normal Operating Mode Deviation Operating Mode Deadband Meaning ALARM operates directly on the input. Normal is the default condition ALARM operates on the change between the current input and the last input. When enabled, the DB option is incorporated into the HH/H/LL/L limits. These calculated limits are inclusive of the more extreme range, e.g. if the input has been in the high range, the output remains high and does not transition when the input hits the calculated H limit. A flag is set when the input or deviation equals or crosses the corresponding limit. If the DB option is used, the HH, H, LL, L limits are adjusted internally for crossed-limit checking and hysteresis.
Operations
NOTE: ALARM automatically tracks the last input, even when you specify normal mode, to facilitate a smooth transition to deviation mode. Parameter Block (Middle Node) The length of the ALARM parameter block is 16 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied Content Input registers Output status Input status HH limit value H limit value L limit value LL limit value Deadband (DB) around limit Last input
808
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Output Status
Bit 1 ... 4 5 6 7 8 9 10 11 12 ... 16 Function Not used 1 = DB set to negative number 1 = deviation mode chosen with DB option 1 = LL crossed (x LL 1 = L crossed (x L or LL < x L) with HH/LL option set 1 = H crossed (x H or H x < HH) with HH/LL option set 1 = HH crossed (x HH) 1 = invalid limits specified Standard output bits (flags)
Input Status
Bit 1 ... 4 5 6 7 8 9 ... 16 Function Standard input bits (flags) 1 = deviation mode 0 = normal mode 1 = both H/L and HH/LL limits apply 1 = DB enabled 1 = retain H/L flag when HH/LL limits crossed Not used
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809
810
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PCFL-AOUT: Analog Output 31007523 8/2010
PCFL-AOUT: Analog Output
132
Introduction This chapter describes the subfunction PCFL-AOUT. What's in this Chapter? This chapter contains the following topics:
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811
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The AOUT function is an interface for calculated signals for output modules. It converts the signal to a value in the range 0 ... 4 096. Formula Formula of the AOUT function:
The meaning of the elements:

Element HEU IN LEU OUT scale Meaning High Engineering Unit Input Low Engineering Unit Output Scale
812
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Representation
Parameters Top input AOUT (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction AOUT First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 814. Length of parameter block for subfunction AOUT (can not be changed) ON = operation successful ON = error
INT, UINT None None
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813
Parameter Block (Middle Node) The length of the AOUT parameter block is 9 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth and ninth implied Content Input in engineering units Output status Input status High engineering units Low engineering units Output
Output Status
Bit 1 ... 7 8 9 10 11 12 ... 16 Function Not used 1 = clamped low 1 = clamped high not used 1 = invalid H/L limits Standard output bits (flags)
Input Status
Bit 1 ... 4 5 ... 16 Function Standard input bits (flags) Not used
814
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PCFL-AVER: Average Weighted Inputs Calculate 31007523 8/2010
PCFL-AVER: Average Weighted Inputs Calculate
133
Introduction This chapter describes the subfunction PCFL-AVER. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
815
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Advanced Calculation. The AVER function calculates the average of up to four weighted inputs. Formula Formula of the AVER function:
The meaning of the elements:

Element In1 ... In4 k RES w1 ... w4 Meaning Inputs Constant Result Weights
816
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Representation
Parameters Top input AVER (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction AVER First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 818. Length of parameter block for subfunction AVER (can not be changed) ON = operation successful ON = error
INT, UINT None None
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817
Parameter Block (Middle Node) The length of the AVER parameter block is 24 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied 16th and 17th implied 18th and 19th implied 20th and 21st implied 22nd and 23rd implied Content reserved Output status Input status Value of In1 Value of Inv2 Value of In3 Value of In4 Value of k Value of wv1 Value of wv2 Value of wv3 Value of wv4 Value of result
Output Status
Bit 1 ... 9 10 11 12 ... 16 Function Not used 1 = no inputs activated 1 = result negative 0 = result positive Standard output bits (flags)
818
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Input Status
Bit 1 ... 4 5 6 7 8 9 10 ... 16 Function Standard input bits (flags) 1 = In4 and w4 are used 1 = In3 and w3 are used 1 = In2 and w2 are used 1 = In1 and w1 are used 1 = k is active Not used
A weight can be used only when its corresponding input is enabled, e.g. the 20th and 21st implied registers (which contain the value of w4) can be used only when the 10th and 11th implied registers (which contain In4) are enabled. The I in the denominator is used only when the constant is enabled.
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819
820
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PCFL-CALC: Calculated Preset Formula 31007523 8/2010
PCFL-CALC: Calculated Preset Formula
134
Introduction This chapter describes the subfunction PCFL-CALC. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
821
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Advanced Calculation. The CALC function calculates a preset formula with up to four inputs, each characterized in a separate register of the parameter block.
822
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Representation
Parameters Top input CALC (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction CALC First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 824. Length of parameter block for subfunction CALC (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
823
Parameter Block (Middle Node) The length of the CALC parameter block is 14 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied Content Reserved Output status Input status Value of input A Value of input B Value of input C Value of input D Value of the output
Output Status
Bit 1...10 11 12 ... 16 Function Not used 1 = bad input code chosen Standard output bits (flags)
824
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Input Status
Bit 1 ... 4 5 ... 6 7 ... 10 11 ... 16 Function Standard input bits (flags) not used Formula Code Not used
Formula Code
Bit 7 0 0 0 0 0 0 1 1 1 1 1 1 8 0 0 1 1 1 1 0 0 0 0 1 1 9 0 1 0 0 1 1 0 0 1 1 0 0 10 1 1 0 1 0 1 0 1 0 1 0 1 Formula Code
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825
826
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PCFL-DELAY: Time Delay Queue 31007523 8/2010
PCFL-DELAY: Time Delay Queue
135
Introduction This chapter describes the subfunction PCFL-DELAY. What's in this Chapter? This chapter contains the following topics:
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827
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The DELAY function can be used to build a series of readings for time-delay compensation in the logic. Up to 10 sampling instances can be used to delay an input. All values are carried along in registers, where register x[0] contains the current sampled input. The 10th delay period does not need to be stored. When the 10th instance in the sequence takes place, the value in register x[9] can be moved directly to the output A DXDONE message is returned when the calculation is complete. The function can be reset by toggling the first-scan bit.
828
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Representation
Parameters Top input DELY (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction DELY First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 830. Length of parameter block for subfunction DELY (can not be changed) ON = operation successful ON = error
INT, UINT None None
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829
Parameter Block (Middle Node) The length of the DELAY parameter block is 32 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied ... 28th and 29th implied 30th and 31st implied Content Input at time n Output status Input status Time register Reserved t (in ms) since last solve Solution interval (in ms) x[0] delay x[1] delay x[2] delay ... x[9] delay Output registers
Output Status
Bit 1...3 4 5 ... 8 9 ... 16 Function Not used 1 = k out of range Count of registers left to be initialized Standard output bits (flags)
Input Status
Bit 1 ... 4 5 ... 8 9 ... 11 12 ... 16 Function Standard input bits (flags) Time Delay 10 Echo number of registers left to be initialized Not used
830
31007523 8/2010
PCFL-EQN: Formatted Equation Calculator 31007523 8/2010
PCFL-EQN: Formatted Equation Calculator
136
Introduction This chapter describes the subfunction PCFL-EQN. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
831
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Advanced Calculation. The EQN function is a formatted equation calculator. You must define the equation in the parameter block with various codes that specify operators, input selection and inputs. EQN is used for equations that have four or fewer variables but do not fit into the CALC format. It complements the CALC function by letting you input an equation with floating point and integer inputs as well as operators.
832
31007523 8/2010
Representation
Parameters Top input EQN (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction EQN First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 834. Length of parameter block for subfunction EQN ON = operation successful ON = error
15 ... 64 (bottom node) Top output Bottom output 0x 0x
INT, UINT None None
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833
Parameter Block (Middle Node) The length of the EQN parameter block can be as high as 64 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th implied 15th implied ... 63rd implied Content Reserved Output status Input status Variable A Variable B Variable C Variable D Output First formula code Second possible formula code ... Last possible formula code
Output Status
Bit 1 2...3 4 ... 8 9 10 11 12 ... 16 Function Stack error Not used Code of last error logged 1 = bad operator selection code 1 = EQN not fully programmed 1 = bad input code chosen Standard output bits (flags)
Input Status
Bit 1 ... 4 5 6 ... 8 9 ... 16 834 Function Standard input bits (flags) 1 = Degree/radian option for trigonometry not used Equation size for display in Concept
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Formula Code Each formula code in the EQN function defines either an input selection code or an operator selection code. Formula Code (Parameter Block)
Bit 1 ... 4 5 ... 8 9 ... 11 12 ... 16
Function Not used Definition of input selection Not used Definition of operator selection
Input Selection
Bit 5 0 0 0 1 1 1 1 6 0 0 0 0 0 0 0 7 0 0 1 0 0 1 1 8 0 1 1 0 1 0 1 Use operator selection Float input 16-bit integer Variable A Variable B Variable C Variable D Input Selection
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835
Operator Selection
Bit 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 13 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 14 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 15 0 0 1 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 16 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 No operation Absolute value Addition Division Exponent LN (natural logarithm) G (logarithm) Multiplication Negation Power Square root Subtraction Sine Cosine Tangent Arcsine Arccosine Arctangent Operator Selection
836
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PCFL-INTEG: Integrate Input at Specified Interval 31007523 8/2010
PCFL-INTEG: Integrate Input at Specified Interval
137
Introduction This chapter describes the subfunction PCFL-INTEG. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
837
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The INTEG function is used to integrate over a specified time interval. No protection against integral wind-up is provided in this function. INTEG is time-dependent, e.g. if you are integrating at an input value of 1/sec, it matters whether it operates over one second (in which case the result is 1) or over one minute (in which case the result is 60). You can set flags to either initialize or restart the function after an undetermined down-time, and you can reset the integral sum if you wish. If you set the initialize flag, you must specify a reset value (zero or the last output in case of power failure), and calculations will be skipped for one sample. The function returns a DXDONE message when the operation is complete.
838
31007523 8/2010
Representation
Parameters Top input INTG (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction INTEG First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 840. Length of parameter block for subfunction INTEG (can not be changed) ON = operation successful ON = error
INT, UINT None None
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839
Parameter Block (Middle Node) The length of the INTEG parameter block is 16 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied Content Current Input Output status Input status Time register Reserved t (in ms) since last solve Solution interval (in ms) Last input Reset value Result
Output Status
Bit 1...8 9 ... 16 Function Not used Standard output bits (flags)
Input Status
Bit 1 ... 4 5 6 ... 16 Function Standard input bits (flags) Reset sum Not used
840
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PCFL-KPID: Comprehensive ISA Non Interacting PID 31007523 8/2010
PCFL-KPID: Comprehensive ISA Non Interacting PID
138
Introduction This chapter describes the subfunction PCFL-KPID. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
841
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Regulatory Control. The KPID function offers a superset of the functionality of the PID function, with additional features that include: A gain reduction zone A separate register for bumpless transfer when the integral term is not used A reset mode An external set point for cascade control Built-in velocity limiters for set point changes and changes to a manual output A variable derivative filter constant Optional expansion of anti-reset wind-up limits
842
31007523 8/2010
Representation
Parameters Top input KPID (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction KPID First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 844. Length of parameter block for subfunction KPID (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
843
Parameter Block (Middle Node) The length of the KPID parameter block is 64 registers.
Register General Parameters Displayed and first implied Second implied Third implied Fourth implied Fifth implied Input Parameters Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied 16th and 17th implied 18th and 19th implied 20th and 21st implied 22nd and 23rd implied 24th and 25th implied 26th and 27th implied Inputs 28th and 29th implied 30th and 31st implied 32nd and 33rd implied 34th and 35th implied 36th and 37th implied Outputs 38th and 39th implied 40th and 41st implied 42nd implied 43rd and 44th implied 45th and 46th implied 47th and 48th implied 49th and 50th implied 51st and 52nd implied 53rd and 54th implied Content Live input, x Output Status, Register 1 Output Status, Register 2 Reserved Input Status Proportional rate, KP Reset time, TI Derivative action time, TD Delay time constant, TD1 Gain reduction zone, GRZ Gain reduction in GRZ, KGRZ Limit rise of manual set point value Limit rise of manual output High limit for Y Low limit for Y Expansion for anti-reset wind-up limits External set point for cascade Manual set point Manual Y Reset for Y Bias Bumpless transfer register, BT Calculated control difference (error term), XD Previous operating mode Dt (in ms) since last solve Previous system deviation, XD_1 Previous input, X_1 Integral part for Y, YI Differential part for Y, YD Set point, SP
844
31007523 8/2010
Register 55th and 56th implied 57th implied Timing Information 58th implied 59th implied 60th and 61th implied Output 62th and 63th implied
Content Proportional part for Y, YP Previous operating status 10 ms clock at time n Reserved Solution interval (in ms) Manipulated output variable, Y
Output Status, Register 1

Bit 1 2 3 4 5 6 7 8 9 ... 16 Function Error 1 = low limit exceeded 1 = high limit exceeded 1 = Cascade mode selected 1 = Auto mode selected 1 = Halt mode selected 1 = Manual mode selected 1 = Reset mode selected Standard output bits (flags)
Output Status, Register 2

Bit 1...4 5 6 7 8 9 ... 16 Function Not used 1 = Previous D mode selected 1 = Previous I mode selected 1 = Previous P mode selected 1 = Previous mode selected Not used
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845
Input Status
Bit 1 ... 4 5 6 7 8 9 10 11 12 13 14 15 16 Function Standard input bits (flags) 1 = Reset mode 1 = Manual mode 1 = Halt mode 1 = Cascade mode 1 = Solve proportional algorithm 1 = Solve integral algorithm 1 = Solve derivative algorithm 1 = solve derivative algorithm based on x 0 = solve derivative algorithm based on xd 1 = anti--reset wind-up on YI only 0 = normal anti--reset wind-up 1 = disable bumpless transfer 0 = bumpless transfer 1 = Manual Y tracks Y 1 = reverse action for loop output 0 = direct action for loop output
846
31007523 8/2010
PCFL-LIMIT: Limiter for the Pv 31007523 8/2010
PCFL-LIMIT: Limiter for the Pv
139
Introduction This chapter describes the subfunction PCFL-LIMIT. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
847
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The LIMIT function limits the input to a range between a specified high and low value. If the high or low limit is reached, the function sets an H or L flag and clamps the output. LIMIT returns a DXDONE message when the operation is complete.
848
31007523 8/2010
Representation
Parameters Top input LIMIT (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction LIMIT First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, see Parameter Block (Middle Node), page 850. Length of parameter block for subfunction LIMIT (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
849
Parameter Block (Middle Node) The length of the LIMIT parameter block is 9 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth implied Content Current input Output status Input status Low limit High Limit Output register
Output Status
Bit 1...8 9 10 11 12 ... 16 Function Not used 1 = input < low limit 1 = input > high limit 1 = invalid high/low limits (e.g., low high Standard output bits (flags)
Input Status
850
31007523 8/2010
PCFL-LIMV: Velocity Limiter for Changes in the Pv 31007523 8/2010
PCFL-LIMV: Velocity Limiter for Changes in the Pv
140
Introduction This chapter describes the subfunction PCFL-LIMV. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
851
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The LIMV function limits the velocity of change in the input variable between a specified high and low value. If the high or low limit is reached, the function sets an H or L flag and clamps the output. LIMV returns a DXDONE message when the operation is complete.
852
31007523 8/2010
Representation
Parameters Top input LIMV (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction LIMV First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For expanded and detailed information please see Parameter Block (Middle Node), page 854.) Length of parameter block for subfunction LIMV (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
853
Parameter Block (Middle Node) The length of the LIMV parameter block is 14 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied Content Input register Output status Input status Time register Reserved t (in ms) since last solve Solution interval (in ms) Velocity limit / sec Result
Output Status
Bit 1...5 6 7 8 9 ... 16 Function Not used 1 = negative velocity limit 1 = input < low limit 1 = input > high limit Standard output bits (flags)
Input Status
854
31007523 8/2010
PCFL-LKUP: Look-up Table 31007523 8/2010
PCFL-LKUP: Look-up Table
141
Introduction This chapter describes the subfunction PCFL-LKUP. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
855
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The LKUP function establishes a look-up table using a linear algorithm to interpolate between points. LKUP can handle variable point intervals and variable numbers of points.
856
31007523 8/2010
Representation
Parameters Top input LKUP (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction LKUP First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 859.) Length of parameter block for subfunction LKUP (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
857
Mode of Functioning The LKUP function establishes a look-up table using a linear algorithm to interpolate between points. LKUP can handle variable point intervals and variable numbers of points. If the input (x) is outside the specified range of points, the output (y) is clamped to the corresponding output y0 or yn. If the specified parameter block length is too small or if the number of points is out of range, the function does not check the xn because the information from that pointer is invalid. Points to be interpolated are determined by a binary search algorithm starting near the center of x data. The search is valid for x1 < x < xn. The variable x may occur multiple times with the same value, the value chosen from the look-up table is the first instance found. For example, if the table is:
x 10.0 20.0 30.0 30.0 40.0 y 1.0 2.0 3.0 3.5 4.0
then an input of 30.0 finds the first instance of 30.0 and assigns 3.0 as the output. An input of 31.0 would assign the value 3.55 as the output. No sorting is done on the contents of the lookup table. Independent variable table values should be entered in ascending order to prevent unreachable gaps in the table. The function returns a DXDONE message when the operation is complete.
858
31007523 8/2010
Parameter Block (Middle Node) The length of the LKUP parameter block is 39 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth and sixth implied Seventh and eighth implied Ninth and tenth implied 11th and 12th implied ... 33rd and 34th implied 35th and 36th implied 37th and 38th implied Content Input Output status Input status Number of point pairs Point x1 Point y1 Point x2 Point y2 ... Point x8 Point y8 Output
Output Status
Bit 1 ... 9 10 11 12 ... 16 Function Not used 1 = input clamped, i.e. out of tables range ! = invalid number of points Standard output bits (flags)
Input Status
31007523 8/2010
859
860
31007523 8/2010
PCFL-LLAG: First-order Lead/Lag Filter 31007523 8/2010
PCFL-LLAG: First-order Lead/Lag Filter
142
Introduction This chapter describes the subfunction PCFL-LLAG. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
861
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The LLAG function provides dynamic compensation for a known disturbance. It usually appears in a feed-forward algorithm or as a dynamic filter. LLAG passes the input through a filter comprising a lead term (a numerator) and a lag term (a denominator) in the frequency domain, then multiplies it by a gain. Lead, lag, gain, and solution interval must be user-specified. For best results, use lead and lag terms that are 4 *t. This will ensure sufficient granularity in the output response. LLAG returns a DXDONE message when the operation completes
862
31007523 8/2010
Representation
Parameters Top input LLAG (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction LLAG First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 864.) Length of parameter block for subfunction LLAG (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
863
Parameter Block (Middle Node) The length of the LLAG parameter block is 20 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied 16th and 17th implied 18th and 19th implied Content Current Input Output status Input status Time register Reserved t (in ms) since last solve Solution interval (in ms) Last input Lead term Lag term Filter gain Result
Output Status
Bit 1...8 9 ... 16 Function Not used Standard output bits (flags)
Input Status
864
31007523 8/2010
PCFL-MODE: Put Input in Auto or Manual Mode 31007523 8/2010
PCFL-MODE: Put Input in Auto or Manual Mode
143
Introduction This chapter describes the subfunction PCFL-MODE. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
865
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The MODE function sets up a manual or automatic station for enabling and disabling data transfers to the next block. The function acts like a BLKM instruction, moving a value to the output register. In auto mode, the input is copied to the output. In manual mode, the output is overwritten by a user entry. MODE returns a DXDONE message when the operation completes.
866
31007523 8/2010
Representation
Parameters Top input MODE (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction MODE First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 868.) Length of parameter block for subfunction MODE (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
867
Parameter Block (Middle Node) The length of the MODE parameter block is 8 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Content Input Output status Input status Manual input Output register
Output Status
Bit 1 ... 10 11 Function Not used Echo mode: 1 = manual mode 0 = auto mode Standard output bits (flags)
12 ... 16
Input Status
Bit 1 ... 4 5 6 ... 16 Function Standard input bits (flags) 1 = manual mode 0 = auto mode Not used
868
31007523 8/2010
PCFL-ONOFF: ON/OFF Values for Deadband 31007523 8/2010
PCFL-ONOFF: ON/OFF Values for Deadband
144
Introduction This chapter describes the subfunction PCFL-ONOFF. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
869
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Regulatory Control. The ONOFF function is used to control the output signal between fully ON and fully OFF conditions so that a user can manually force the output ON or OFF. You can control the output via either a direct or reverse configuration:
Configuration Direct IF Input... < (SP - DB) > (SP + DB) Revers > (SP + DB) < (SP - DB) Then Output... ON OFF ON OFF
Manual Override Two bits in the input status register (the third implied register in the parameter block) are used for manual override. When bit 6 is set to 1, manual mode is enforced. In manual mode, a 0 in bit 7 forces the output OFF, and a 1 in bit 7 forces the output ON. The state of bit 7 has meaning only in manual mode.
870
31007523 8/2010
Representation
Parameters Top input ONOFF (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction ONOFF First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 872.) Length of parameter block for subfunction ONOFF (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
871
Parameter Block (Middle Node) The length of the ONOFF parameter block is 14 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied Content Current Input Output status Input status Set point, SP Deadband (DB) around SP Fully ON (maximum output) Fully OFF (minimum output) Output, ON or OFF
Output Status
Bit 1 ... 8 9 10 Function Not used 1 = DB set to negative number Echo mode: 1 = manual override 0 = auto mode 1 = output set to ON 0 = output set to OFF Standard output bits (flags)
11 12 ... 16
Input Status
Bit 1 ... 4 5 6 7 8 ... 16 Function Standard input bits (flags) 1 = reverse configuration 0 = direct configuration 1 = manual override 0 = auto mode 1 = force output ON in manual mode 0 = force output OFF in manual mode Not used
872
31007523 8/2010
PCFL-PI: ISA Non Interacting PI 31007523 8/2010
PCFL-PI: ISA Non Interacting PI
145
Introduction This chapter describes the subfunction PCFL-PI. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
873
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Regulatory Control. The PI function performs a simple proportional-integral operations using floating point math. It features halt / manual / auto operation modes. It is similar to the PID and KPID functions but does not contain as many options. It is available for higherspeed loops or inner loops in cascade strategies.
874
31007523 8/2010
Representation
Parameters Top input PI (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction PI First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 876.) Length of parameter block for subfunction PI (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
875
Parameter Block (Middle Node) The length of the PI parameter block is 36 registers.
Register General Parameters Displayed and first implied Second implied Third implied Fourth implied Fifth implied Inputs Sixth and seventh implied Eighth and ninth implied 10th and 11th implied Outputs 12th implied 13th and 14th implied 15th and 16th implied 17th and 18th implied 19th and 20th implied 21st implied Timing Information 22nd implied 23rd implied 24th and 25th implied Input Parameters 26th and 27th implied 28th and 29th implied 30th and 31st implied 32nd and 33rd implied Output 34th and 35th implied Content Live input, x Output Status Error Word Reserved Input Status Set point, SP Manual output Calculated control difference (error), XD Previous operating mode Dt (in ms) since last solve Previous system deviation, XD_1 Integral part of output Y Previous input, X_1 Previous operating status 10 ms clock at time n Reserved Solution interval (in ms) Proportional rate, KP Reset time, TI High limit on output Y Low limit on output Y Manipulated variable output, Y
876
31007523 8/2010
Output Status
Bit 1 2 3 4 ... 8 9 ... 16 Function Error 1 = low limit exceeded 1 = high limit exceeded Not used Standard output bits (flags)
Error Word
Bit 1...11 12 ... 16 Function Not used Error Description
Error Description
Bit 12 1 1 13 0 0 14 1 1 15 1 0 16 0 1 Negative integral time constant High/low limit error (low high) Meaning
Input Status
Bit 1 ... 4 5 6 7 8 ... 15 16 Function Standard input bits (flags) Not used 1 = Manual mode 1 = Halt mode Not used 1 = reverse action for loop output 0 = direct action for loop output
31007523 8/2010
877
878
31007523 8/2010
PCFL-PID: PID Algorithms 31007523 8/2010
PCFL-PID: PID Algorithms
146
Introduction This chapter describes the subfunction PCFL-PID. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
879
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Regulatory Control. The PID function performs ISA non-interacting proportional-integral-derivative (PID) operations using floating point math. Because it uses FP math (unlike PID2), roundoff errors are negligible. In the part "General Information" you will find A PID Example, page 49.
880
31007523 8/2010
Representation
Parameters Top input PID (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction PID First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 882.) Length of parameter block for subfunction PID (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
881
Parameter Block (Middle Node) The length of the KPID parameter block is 44 registers.
Register General Parameters Displayed and first implied Second implied Third implied Fourth implied Fifth implied Inputs Sixth and seventh implied Eighth and ninth implied 10th and 11th implied Outputs 12th and 13th implied 14th implied 15th and 16th implied 17th and 18th implied 19th and 20th implied 21st and 22nd implied 23rd and 24th implied 25th and 26th implied 27th implied Timing Information Inputs 28th implied 29th implied 30th and 31st implied 34th and 35th implied 36th and 37th implied 38th and 39th implied 40th and 41st implied 42nd and 43rd implied Content Live input, x Output Status Error Word Reserved Input Status Set point, SP Manual output Summing junction, Bias Error, XD Previous operating mode Elapsed time (in ms) since last solve Previous system deviation, XD_1 Previous input, X_1 Integral part of output Y, YI Differential part of output Y, YD Proportional part of output Y, YP Previous operating status Current time Reserved Solution interval (in ms) Reset time, TI Derivative action time, TD High limit on output Y Low limit on output Y Manipulated control output, Y
882
31007523 8/2010
Output Status
Bit 1 2 3 4 ... 8 9 ... 16 Function Error 1 = low limit exceeded 1 = high limit exceeded Not used Standard output bits (flags)
Error Word
Bit 1...11 12 ... 16 Function Not used Error Description
Error Description
Bit 12 1 1 1 13 0 0 0 14 1 1 1 15 1 1 0 16 1 0 1 Negative derivative time constant Negative integral time constant High/low limit error (low high) Meaning
Input Status
Bit 1 ... 4 5 6 7 8 9 10 11 12 13... 15 16 Function Standard input bits (flags) Not used 1 = Manual mode 1 = Halt mode Not used 1 = Solve proportional algorithm 1 = Solve integral algorithm 1 = Solve derivative algorithm 1 = solve derivative algorithm based on x 0 = solve derivative algorithm based on xd Not used 1 = reverse action for loop output 0 = direct action for loop output
31007523 8/2010
883
884
31007523 8/2010
PCFL-RAMP: Ramp to Set Point at a Constant Rate 31007523 8/2010
PCFL-RAMP: Ramp to Set Point at a Constant Rate
147
Introduction This chapter describes the subfunction PCFL-RAMP. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
885
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The RAMP function allows you to ramp up linearly to a target set point at a specified approach rate. You need to specify: The target set point, in the same units as the contents of the input register are specified The sampling rate A positive rate toward the target set point, negative rates are illegal The direction of the ramp depends on the relationship between the target set point and the input, i.e. if x < SP, the ramp is up; if x > SP, the ramp is down. You may use a flag to initialize after an undetermined down-time. The function will store a new sample, then wait for one cycle to collect the second sample. Calculations will be skipped for one cycle and the output will be left as is, after which the ramp will resume. RAMP terminates when the entire ramping operation is complete (over multiple scans) and returns a DXDONE message. Starting the Ramp The following steps need to be done when starting the ramp (up/down) and each and every time you need to start or restart the ramp.
Step 1 2 Action Set bit 1 of the standard input bits to "1" (third implied register of the parameter block). Retoggle the top input (enable input) to the instruction. Ramp will now start to ramp up/down from the initial value previously configured up/down to the previously configured setpoint. Monitor the 12th implied register of the parameter block for floating point value of the ramp value in progress.
886
31007523 8/2010
Representation
Parameters Top input RAMP (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction RAMP First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 888.) Length of parameter block for subfunction RAMP (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
887
Parameter Block (Middle Node) The length of the RAMP parameter block is 14 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied Content Set point (Input) Output status Input status Time register Reserved t (in ms) since last solve Solution interval (in ms) Rate of change (per second) toward set point Output
Output Status
Bit 1 ... 4 5 6 7 8 9 ... 16 Function Not used 1 = ramp rate is negative 1 = ramp complete 0 = ramp in progress 1 = ramping down 1 = ramping up Standard output bits (flags)
Input Status
Top Output (Operation Succesfull) The top output of the PCFL subfunction RAMP goes active at each successive discrete ramp step up/down. It happens so fast that it appears to be solidly on. This top output should NOT be used as "Ramp done bit". Bit 6 of the output status (second impied register of the parameter block) should be monitored as "Ramp done bit".
888
31007523 8/2010
PCFL-RATE: Derivative Rate Calculation over a Specified Time 31007523 8/2010
PCFL-RATE: Derivative Rate Calculation over a Specified Time
148
Introduction This chapter describes the subfunction PCFL-RATE. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
889
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The RATE function calculates the rate of change over the last two input values. If you set an initialization flag, the function records a sample and sets the appropriate flags. If a divide-by-zero operation is attempted, the function returns a DXERROR message. It returns a DXDONE message when the operation completes successfully.
890
31007523 8/2010
Representation
Parameters Top input RATE (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction RATE First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 892.) Length of parameter block for subfunction RATE (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
891
Parameter Block (Middle Node) The length of the RATE parameter block is 14 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied Content Current input Output status Input status Time register Reserved t (in ms) since last solve Solution interval (in ms) Last input Result
Output Status
Bit 1 ... 8 9 ... 16 Function Not used Standard output bits (flags)
Input Status
892
31007523 8/2010
PCFL-RATIO: Four Station Ratio Controller 31007523 8/2010
PCFL-RATIO: Four Station Ratio Controller
149
Introduction This chapter describes the subfunction PCFL-RATIO. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
893
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Regulatory Control. The RATIO function provides a four-station ratio controller. Ratio control can be used in applications where one or more raw ingredients are dependent on a primary ingredient. The primary ingredient is measured, and the measurement is converted to engineering units via an AIN function. The converted value is used to set the target for the other ratioed inputs. Outputs from the ratio controller can provide set points for other controllers. They can also be used in an open loop structure for applications where feedback is not required.
894
31007523 8/2010
Representation
Parameters Top input RATIO (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction RATIO First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information. please see Parameter Block (Middle Node), page 896.) Length of parameter block for subfunction RATIO (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
895
Parameter Block (Middle Node) The length of the RATIO parameter block is 20 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied 16th and 17th implied 18th and 19th implied Content Live input Output status Input status Ratio for input 1 Ratio for input 2 Ratio for input 3 Ratio for input 4 Output for input 1 Output for input 2 Output for input 3 Output for input 4
Output Status
Bit 1 ... 9 10 11 12 ... 16 Function Not used 1 = parameter(s) out of range 1 = no inputs activated Standard output bits (flags)
Input Status
Bit 1 ... 4 5 6 7 8 9 ... 16 Function Standard input bits (flags) 1= input 4 active 1= input 3 active 1= input 2 active 1= input 1 active Not used
896
31007523 8/2010
PCFL-RMPLN: Logarithmic Ramp to Set Point 31007523 8/2010
PCFL-RMPLN: Logarithmic Ramp to Set Point
150
Introduction This chapter describes the subfunction PCFL-RMPLN. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
897
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The RMPLN function allows you to ramp up logarithmically to a target set point at a specified approach rate. At each successive call, it calculates the output until it is within a specified deadband (DB). DB is necessary because the incremental distance the ramp crosses decreases with each solve. You need to specify: The target set point, in the same units as the contents of the input register are specified The sampling rate The time constant used for the logarithmic ramp, which is the time it takes to reach 63.2% of the new set point For best results, use a t that is 4 *t. This will ensure sufficient granularity in the output response. You may use a flag to initialize after an undetermined down-time. The function will store a new sample, then wait for one cycle to collect the second sample. Calculations will be skipped for one cycle and the output will be left as is, after which the ramp will resume. RMPLN terminates when the input reaches the target set point + the specified DB and returns a DXDONE message.
898
31007523 8/2010
Representation
Parameters Top input RMPLN (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction RMPLN First in a block of contiguous holding registers where the parameters for the specified subfunction are stored For more information, please see Parameter Block (Middle Node), page 900.) Length of parameter block for subfunction RMPLN (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
899
Parameter Block (Middle Node) The length of the RMPLN parameter block is 16 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied Content Set point (Input) Output status Input status Time register Reserved t (in ms) since last solve Solution interval (in ms) Time constant, , (per second) of exponential ramp toward the target set point DB (in engineering units) Output
Output Status
Bit 1 ... 4 5 6 7 8 9 ... 16 Function Not used 1 = DB or set to negative units 1 = ramp complete 0 = ramp in progress 1 = ramping down 1 = ramping up Standard output bits (flags)
Input Status
900
31007523 8/2010
PCFL-SEL: Input Selection 31007523 8/2010
PCFL-SEL: Input Selection
151
Introduction This chapter describes the subfunction PCFL-SEL. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
901
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Signal Processing. The SEL function compares up to four inputs and makes a selection based upon either the highest, lowest, or average value. You choose the inputs to be compared and the comparison criterion. The output is a copy of the selected input. SEL returns a DXDONE message when the operation is complete.
902
31007523 8/2010
Representation
Parameters Top input SEL (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction SEL First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 904.) Length of parameter block for subfunction SEL (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
903
Parameter Block (Middle Node) The length of the SEL parameter block is 14 registers.
Register Displayed and first implied Second implied Third implied Fourth and fifth implied Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied Content Reserved Output status Input status Input 1 Input 2 Input 3 Input 4 Output
Output Status
Bit 1 ... 9 10 11 12 ... 16 Function Not used Invalid selection modes No inputs selected Standard output bits (flags)
Input Status
Bit 1 ... 4 5 6 7 8 9 ... 10 11 ... 16 Function Standard input bits (flags) 1 = enable input 1 0 = disable input 1 1 = enable input 2 0 = dyeable input 2 1 = enable input 3 0 = dyeable input 3 1 = enable input 4 0 = dyeable input 4 Selection mode Not used
904
31007523 8/2010
Selection mode
Bit 9 0 0 1 1 10 0 1 0 1 Select average Select high Select low reserved / invalid Meaning
31007523 8/2010
905
906
31007523 8/2010
PCFL-TOTAL: Totalizer for Metering Flow 31007523 8/2010
PCFL-TOTAL: Totalizer for Metering Flow
152
Introduction This chapter describes the subfunction PCFL-TOTAL. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
907
Short Description
Function Description NOTE: This instruction is a subfunction of the PCFL instruction. It belongs to the category Regulatory Control. The TOTAL function provides a material totalizer for batch processing reagents. The input signal contains the units of weight or volume per unit of time. The totalizer integrates the input over time. The algorithm reports three outputs: The integration sum The remainder left to meter in The valve output (in engineering units).
908
31007523 8/2010
Representation
Parameters Top input TOTAL (top node) parameter block (middle node) 4x INT, UINT State RAM Reference 0x, 1x Data Type None Meaning ON = enables specified process control function Selection of the subfunction TOTAL First in a block of contiguous holding registers where the parameters for the specified subfunction are stored (For more information, please see Parameter Block (Middle Node), page 910.) Length of parameter block for subfunction TOTAL (can not be changed) ON = operation successful ON = error
INT, UINT None None
31007523 8/2010
909
Mode of Functioning The function uses up to three different set points: A trickle flow set point A target set point An auxiliary trickle flow set point The target set point is for the full amount to be metered in. Here the output will be turned OFF. The trickle flow set point is the cut-off point when the output should be decreased from full flow to a percentage of full flow so that the target set point is reached with better granularity. The auxiliary trickle flow set point is optional. It is used to gain another level of granularity. If this set point is enabled, the output is reduced further to 10% of the trickle output. The totalizer works from zero as a base point. The set point must be a positive value In normal operation, the valve output is set to 100% flow when the integrated value is below the trickle flow set point. When the sum crosses the trickle flow set point, the valve flow becomes a programmable percentage of full flow. When the sum reaches the desired target set point, the valve output is set to 0% flow. Set points can be relative or absolute. With a relative set point, the deviation between the last summation and the set point is used. Otherwise, the summation is used in absolute comparison to the set point. There is a halt option to stop the system from integrating. When the operation has finished, the output summation is retained for future use. You have the option of clearing this sum. In some applications, it is important to save the sum, e.g. if the meters or load cells cannot handle the full batch in one charge and measurements are split up, if there are several tanks to fill for a batch and you want to keep track of batch and production sums. Parameter Block (Middle Node) The length of the TOTAL parameter block is 28 registers.
Register Displayed and first implied Second implied Third implied Fourth implied Fifth implied Content Live input Output status Input status Time register Reserved
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Register Sixth and seventh implied Eighth and ninth implied 10th and 11th implied 12th and 13th implied 14th and 15th implied 16th and 17th implied 18th and 19th implied 20th and 21st implied 22nd and 23rd implied 24th and 25th implied 26th and 27th implied
Content t (in ms) since last solve Solution interval (in ms) Last input, X_1 Reset value Set point, target Set point, trickle flow % of full flow for trickle flow set point Full flow Remaining amount to SP Resulting sum Output for final control element
Output Status
Bit 1 ... 2 3 ... 4 Function Not used 0 0 = OFF 0 1 = trickle flow 1 0 = full flow 1 = operation done 1 = totalizer running 1 = overshoot past set point by more than 5% 1 = parameter(s) out of range Standard output bits (flags)
5 6 7 8 9 ... 16
Input Status
Bit 1 ... 4 5 6 7 8 9 ... 16 Function Standard input bits (flags) 1 = reset sum 1 = halt integration 1 = deviation set point 0 = absolute set point 1 = use auxiliary trickle flow set point Not used
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911
912
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PEER: PEER Transaction 31007523 8/2010
PEER: PEER Transaction
153
Introduction This chapter describes the instruction PEER. What's in this Chapter? This chapter contains the following topics:
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913
Short Description
Function Description NOTE: This instruction is only available if you have unpacked and installed the DX Loadables. For further information, see Installation of DX Loadables, page 75. The S975 Modbus II Interface option modules use two loadable function blocks: MBUS and PEER. The PEER instruction can initiate identical message transactions with as many as 16 devices on Modbus II at one time. In a PEER transaction, you may only write register data.
914
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Representation
Parameters Top input Middle input control block (top node) State RAM Reference 0x, 1x 0x, 1x 4x Data Type None None INT, UINT, WORD Meaning Enable MBUS transaction Repeat transaction in same scan First of 19 contiguous registers in the PEER control block (For more information, please see Control Block (Top Node), page 916.) First register in a data block to be transmitted by the PEER function Length, i.e. the number of holding registers, of the data block; range: 1 ... 249. Transaction complete Transaction in progress or new transaction starting Error detected in transaction
data block (middle node) length (bottom node) Top output Middle output Bottom output
4x
INT, UINT INT, UINT
0x 0x 0x
None None None
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915
Control Block (Top Node) The 4x register entered in the top node is the first of 19 contiguous registers in the PEER control block.
Register Displayed Function Indicates the status of the transactions at each device, the leftmost bit being the status of device #1 and the rightmost bit the status of device #16: 0 = OK, 1 = transaction error Defines the reference to the first 4x register to be written to in the receiving device; a 0 in this field is an invalid value and will produce an error (the bottom output will go ON) Time allowed for a transaction to be completed before an error is declared; expressed as a multiple of 10 ms, e.g. 100 indicates 1,000 ms; the default timeout is 250 ms The Modbus port 3 address of the first of the receiving devices; address range: 1 ... 255 (0 = no transaction requested) The Modbus port 3 address of the second of the receiving devices; address range: 1 ... 255 (0 = no transaction requested) ... The Modbus port 3 address of the 16th of the receiving devices (address range: 1 ... 255)
First implied
Second implied
Third implied
Fourth implied
... 18th implied
916
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PID2: Proportional Integral Derivative 31007523 8/2010
PID2: Proportional Integral Derivative
154
Introduction This chapter describes the instruction PID2. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Detailed Description Parameter Description Run Time Errors Page 918 919 920 923 927
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917
Short Description
Function Description The PID2 instruction implements an algorithm that performs proportional-integralderivative operations. The algorithm tunes the closed loop operation in a manner similar to traditional pneumatic and analog electronic loop controllers. It uses a rate gain limiting (RGL) filter on the PV as it is used for the derivative term only, thereby filtering out higher-frequency PV noise sources (random and process generated). Formula Proportional Control
Proportional-Integral Control
Proportional-Integral-Derivative Control
918
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Representation
Parameters Top input Middle input Bottom input source (top node) destination (middle node) solution interval (bottom node) Top output Middle output Bottom output 0x 0x 0x State RAM Data Reference Type 0x, 1x 0x, 1x 0x, 1x 4x 4x None None None INT, UINT INT, UINT INT, UINT None None None Meaning 0 = Manual mode 1 = Auto mode 0 = Integral preload OFF 1 = Integral preload ON 0 = Output increases as E increases 1 = Output decreases as E decreases First of 21 contiguous holding registers in a source block (For more information, please see Source Block (Top Node), page 923.) First of nine contiguous holding registers used for PID2 calculation. Do not load anything in these registers! For more information, please see Destination (MIddle Node), page 925.) Contains a number ranging from 1 ... 255, indicating how often the function should be performed. 1 = Invalid user parameter or Loop ACTIVE but not being solved 1 = PV high alarm limit 1 = PV low alarm limit
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Detailed Description
Block Diagram
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The elements in the block diagram have the following meaning:

Element E SP PV x K2 K3 RGL Ts PB bias M GE Z Qn F I Ilow Ihigh K1 Meaning Error, expressed in raw analog units Set point, in the range 0 ... 4095 Process variable, in the range 0 ... 4095 Filtered PV Integral mode gain constant, expressed in 0.01 min-1 Derivative mode gain constant, expressed in hundredths of a minute Rate gain limiting filter constant, in the range 2 ... 30 Solution time, expressed in hundredths of a second Proportional band, in the range 5 ... 500% Loop output bias factor, in the range 0 ... 4095 Loop output Gross error, the proportional-derivative contribution to the loop output Derivative mode contribution to GE Unbiased loop output Feedback value, in the range 0 ... 4095 Integral mode contribution to the loop output Anti-reset-windup low SP, in the range 0 ... 4095 Anti-reset-windup high SP, in the range 0 ... 4095 100/PB
NOTE: The integral mode contribution calculation actually integrates the difference of the output and the integral sum, this is effectively the same as integrating the error.
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Proportional Control With proportional-only control (P), you can calculate the manipulated variable by multiplying error by a proportional constant, K1, then adding a bias. See Formula, page 918. However, process conditions in most applications are changed by other system variables so that the bias does not remain constant; the result is offset error, where PV is constantly offset from the SP. This condition limits the capability of proportional-only control. NOTE: The value in the integral term (in registers 4y + 3, 4y + 4, and 4y + 5) is always used, even when the integral mode is not enabled. Using this value is necessary to preserve bumpless transfer between modes. If you wish to disable bumpless transfer, these three registers must be cleared. In manual mode setpoint changes will not take effect unless the above three registers are cleared and the mode is switched back to automatic. The transfer will not be bumpless. Proportional-Integral Control To eliminate this offset error without forcing you to manually change the bias, an integral function can be added to the control equation. See Formula, page 918. Proportional-integral control (PI) eliminates offset by integrating E as a function of time. K1 is the integral constant expressed as rep/min. As long as E 0, the integrator increases (or decreases) its value, adjusting Mv. This continues until the offset error is eliminated. Proportional-Integral-Derivative Control You may want to add derivative functionality to the control equation to minimize the effects of frequent load changes or to override the integral function in order to get to the SP condition more quickly. See Formula, page 918. Proportional-integral-derivative (PID) control can be used to save energy in the process or as a safety valve in the event of a sudden, unexpected change in process flow. K3 is the derivative time constant expressed as min. DPV is the change in the process variable over a time period of t. Example An example to PID2 level control you will find in PID2 Level Control Example.
922
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Source Block (Top Node) The 4x register entered in the top node is the first of 21 contiguous holding registers in a source block. The contents of the fifth ... eighth implied registers determine whether the operation will be P, PI, or PID:
Operation P PI PID Fifth Implied ON ON ON ON ON ON Sixth Implied Seventh Implied Eighth Implied ON
The source block comprises the following register assignments:

Register Displayed Name Scaled PV Content Loaded by the block each time it is scanned; a linear scaling is done on register 4x + 13 using the high and low ranges from registers 4x + 11 and 4x + 12: Scaled PV = (4x13 / 4095) * (4x11 - 4x12) + 4x12 You must specify the set point in engineering units; the value must be < value in the 11th implied register and > value in the 12th implied register Loaded by the block every time the loop is solved; it is clamped to a range of 0 ... 4095, making the output compatible with an analog output module; the manipulated variable register may be used for further CPU calculations such as cascaded loops Load a value in this register to specify a high alarm for PV (at or above SP); enter the value in engineering units within the range specified in the 11th and 12th implied registers Load a value in this register to specify a low alarm for PV (at or below SP); enter the value in engineering units within the range specified in the 11th and 12th implied registers Load this register with the desired proportional constant in the range 5 ... 500; the smaller the number, the larger the proportional contribution; a valid number is required in this register for PID2 to operate Load this register to add integral action to the calculation; enter a value between 0000 ... 9999 to represent a range of 00.00 ... 99.99 repeats/min; the larger the number, the larger the integral contribution; a value > 9999 stops the PID2 calculation
First implied
SP
Second implied
Mv
Third implied
High Alarm Limit
Fourth implied Low Alarm Limit Fifth implied Proportional Band
Sixth implied
Reset Time Constant
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923
Register Seventh implied
Name Rate Time Constant
Content Load this register to add derivative action to the calculation; enter a value between 0000 ... 9999 to represent a range of 00.00 ... 99.99 min; the larger the number, the larger the derivative contribution; a value > 9999 stops the PID2 calculation Load this register to add a bias to the output; the value must be between 000 .... 4095, and added directly to Mv, whether the integral term is enabled or not Load this register with the upper limit of the output value (between 0 ... 4095) where the anti-reset windup takes effect; the updating of the integral sum is stopped if it goes above this value (this is normally 4095) Load this register with the lower limit of the output value (between 0 ... 4095) where the anti-reset windup takes effect (this is normally 0) Load this register with the highest value for which the measurement device is spanned, e.g. if a resistance temperature device ranges from 0 ... 500 degrees C, the high engineering range value is 500; the range must be given as a positive integer between 0001 ... 9999, corresponding to the raw analog input 4095 Load this register with the lowest value for which the measurement device is spanned; the range must be given as a positive integer between 0 ... 9998, and it must be less than the value in the 11th implied register; it corresponds to the raw analog input 0
Eighth implied Bias
Ninth implied
High Integral Windup Limit
10th implied
Low Integral Windup Limit High Engineering Range
11th implied
12th implied
Low Engineering Range
13th implied
Raw Analog The logic program loads this register with PV; the Measurement measurement must be scaled and linear in the range 0 ... 4095 Pointer to Loop Counter Register The value you load in this register points to the register that counts the number of loops solved in each scan; the entry is determined by discarding the most significant digit in the register where the controller will count the loops solved/scan, e.g., if the PLC does the count in register 41236, load 1236 into the 14th implied register; the same value must be loaded into the 14th implied register in every PID2 block in the logic program Solved In a Scan: If the 14th implied register contains a nonzero value, you may load a value in this register to limit the number of loops to be solved in one scan The value you load in this register points to the holding register that contains the value of feedback (F); drop the 4 from the feedback register and enter the remaining four digits in this register; integration calculations depend on the F value being should F vary from 0 ... 4095
14th implied
15th implied
Maximum Number of Loops Pointer To Reset Feedback Input:
16th implied
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PID2: Proportional Integral Derivative Register 17th implied 18th implied 19th implied Name Content
Output Clamp The value entered in this register determines the upper limit - High of Mv (this is normally 4095) Output Clamp The value entered in this register determines the lower limit - Low of Mv (this is normally 0) Rate Gain Limit (RGL) Constant Pointer to Integral Preload The value entered in this register determines the effective degree of derivative filtering; the range is from 2 ... 30; the smaller the value, the more filtering takes place The value entered in this register points to the holding register containing the track input (T) value; drop the 4 from the tracking register and enter the remaining four digits in this register; the value in the T register is connected to the input of the integral lag whenever the auto bit and integral preload bit are both true
20th implied
Destination (MIddle Node) The 4y register entered in the middle node is the first of nine contiguous holding register used for PID2 calculations. You do not need to load anything into these registers:
Register Displayed First implied Second implied Name Loop Status Register Error (E) Status Bits Loop Timer Register Content Twelve of the 16 bits in this register are used to define loop status. This register displays PID2 error codes. This register stores the real-time clock reading on the system clock each time the loop is solved: the difference between the current clock value and the value stored in the register is the elapsed time; if elapsed time solution interval (10 times the value given in the bottom node of the PID2 block), then the loop should be solved in this scan Integral (integer portion) Integral-fraction 1 (1/3 000) Integral-fraction 2 (1/600 000) This register stores the result of the filtered analog input (from register 4x14) multiplied by 8; this value is useful in derivative control operations This register, which is updated after each loop solution, contains the absolute value of (SP - PV); bit 8 in register 4y + 1 indicates the sign of E Current solution interval
Third implied Fifth implied Sixth implied
For Internal Use For Internal Use Pv x 8 (Filtered)
Fourth implied For Internal Use
Seventh implied
Absolute Value of E
Eighth implied For Internal Use
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Loop Status Register

Bit 1 2 3 4 5 6 7 8 Function Top output status (Node lockout or parameter error Middle output status (High alarm) Bottom output status (Low alarm) Loop in AUTO mode and time since last solution solution interval Wind-down mod (for REV B or higher) Loop in AUTO mode but not being solved 4x14 register referenced by 4x15 is valid Sign of E in 4y + 7: 0 = + (plus) 1 = - (minus) Rev B or higher Integral windup limit never set Integral windup saturated Negative values in the equation Bottom input status (direct / reverse acting) Middle input status (tracking mode) 1 = tracking 0 = no tracking Top input status (MAN / AUTO) Bit 16 is set after initial startup or installation of the loop. If you clear the bit, the following actions take place in one scan: The loop status register 4y is reset The current value in the real-time clock is stored in the first implied register (4y+1) Values in the third ... fifth registers (4y+2,3) are cleared The value in the13th implied register (4x+13) x 8 is stored in the sixth implied register (4y+6) The seventh and eighth implied registers (4y+7,8) are cleared
9 10 11 12 13 14
15 16
Solution Interval (Bottom Node) The bottom node indicates that this is a PID2 function and contains a number ranging from 1 ... 255, indicating how often the function should be performed. The number represents a time value in tenths of a second, or example, the number 17 indicates that the PID function should be performed every 1.7 s.
926
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Run Time Errors

Error Status Bit The first implied register of the destination contains the error status bits:
Code 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 0010 0011 0012 0013 0014 0015 0016 Explanation No errors, all validations OK Scaled SP above 9999 High alarm above 9999 Low alarm above 9999 Proportional band below 5 Proportional band above 500 Reset above 99.99 r/min Rate above 99.99 min Bias above 4095 High integral limit above 4095 Low integral limit above 4095 Check these Registers in the Source Block (Top Node) None First implied Third implied Fourth implied Fifth implied Fifth implied Sixth implied Seventh implied Eighth implied Ninth implied 10th implied
High engineering unit (E.U.) scale above 9999 11th implied Low E.U. scale above 9999 High E.U. below low E.U. Scaled SP above high E.U. .Scaled SP below low E.U. Maximum loops/scan > 9999 Note: Activated by maximum loop feature, i.e. only if 4x15 is not zero. Reset feedback pointer out of range High output clamp above 4095 Low output clamp above 4095 Low output clamp above high output clamp RGL below 2 RGL above 30 Track F pointer out of range Note: Activated only if the track feature is ON, i.e. the middle input of the PID2 block is receiving power while in AUTO mode. 12th implied 11th and 12th implied First and 11th implied First and 12th implied 15th implied
0017 0018 0019 0020 0021 0022 0023
16th implied 17th implied 18th implied 17th and 18th implied 19th implied 19th implied 20th implied with middle input ON
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927
Code 0024
Explanation Track F pointer is zero Note: Activated only if the track feature is ON, i.e. the middle input of the PID2 block is receiving power while in AUTO mode.
Check these Registers in the Source Block (Top Node) 20th implied with middle input ON
0025
None Node locked out (short of scan time) Note: Activated by maximum loop feature, i.e. only if 4x15 is not zero. Note: If lockout occurs often and the parameters are all valid, increase the maximum number of loops/scan. Lockout may also occur if the counting registers in use are not cleared as required. Loop counter pointer is zero Note: Activated by maximum loop feature, i.e. only if 4x15 is not zero. Loop counter pointer out of range 14th and 15th implied
0026
0027
14th and 15th implied
928
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Instruction Descriptions (R to Z) 31007523 8/2010
Instruction Descriptions (R to Z)
VI
Introduction In this part instruction descriptions are arranged alphabetically from R to Z. What's in this Part? This part contains the following chapters:
Chapter 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 Chapter Name R --> T: Register to Table RBIT: Reset Bit READ: Read RET: Return from a Subroutine RTTI - Register to Input Table RTTO - Register to Output Table RTU - Remote Terminal Unit SAVE: Save Flash SBIT: Set Bit SCIF: Sequential Control Interfaces SENS: Sense Shorts SKP - Skipping Networks SRCH: Search STAT: Status SU16: Subtract 16 Bit SUB: Subtraction SWAP - VME Bit Swap TTR - Table to Register T --> R Table to Register T --> T: Table to Table Page 931 935 939 945 949 953 957 963 967 971 975 979 983 987 993 1021 1025 1029 1037 1033 1041 929
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Instruction Descriptions (R to Z)
Chapter 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192
Chapter Name T.01 Timer: One Hundredth of a Second Timer T0.1 Timer: One Tenth Second Timer T1.0 Timer: One Second Timer T1MS Timer: One Millisecond Timer TBLK: Table to Block TEST: Test of 2 Values UCTR: Up Counter VMER - VME Read VMEW - VME Write WRIT: Write XMIT - Transmit XMIT Communication Block XMIT Port Status Block XMIT Conversion Block XMRD: Extended Memory Read XMWT: Extended Memory Write XOR: Exclusive OR
Page 1047 1051 1055 1059 1065 1073 1077 1081 1085 1089 1095 1103 1115 1123 1131 1137 1143
930
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R --> T: Register to Table 31007523 8/2010
R --> T: Register to Table
155
Introduction This chapter describes the instruction R T. What's in this Chapter? This chapter contains the following topics:
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931
Short Description
Function Description The RT instruction copies the bit pattern of a register or of a string of contiguous discretes stored in a word into a specific register located in a table. It can accommodate the transfer of one register/word per scan.
932
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Representation
Parameters Top input Middle input Bottom input source (top node) destination pointer (middle node) table length (bottom node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 0x, 1x, 3x, 4x 4x Data Type None None None INT, UINT, WORD INT, UINT Meaning ON = copies source data and increments the pointer value ON = freezes the pointer value ON = resets the pointer value to zero Source data to be copied in the current scan Destination table where source data will be copied in the scan Number of registers in the destination table, range: 1 ... 999 Length: Max. 255 16-bit PLC Max. 999 24-bit PLC Echoes the state of the top input ON = pointer value = table length (instruction cannot increment any further)
INT, UINT
0x 0x
None None
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933
Top Input The input to the top node initiates the DX move operation. Middle Input When the middle input goes ON, the current value stored in the destination pointer register is frozen while the DX operation continues. This causes new data being copied to the destination to overwrite the data copied on the previous scan. Bottom Input When the bottom input goes ON, the value in the destination pointer register is reset to zero. This causes the next DX move operation to copy source data into the first register in the destination table. Source Data (Top Node) When using register types 0x or 1x: First 0x reference in a string of 16 contiguous coils or discrete outputs First 1x reference in a string of 16 discrete inputs Destination Pointer (Middle Node) The 4x register entered in the middle node is a pointer to the destination table where source data will be copied in the scan. The first register in the destination table is the next contiguous 4x register following the pointer, i.e. if the pointer register is 400027, then the destination table begins at register 400028. The value posted in the pointer register indicates the register in the destination table where the source data will be copied. A value of zero indicates that the source data will be copied to the first register in the destination table; a value of 1 indicates that the source data be copied to the second register in the destination table; etc. NOTE: The value posted in the destination pointer register cannot be larger than the table length integer specified in this node. Outputs RT can produce two possible outputs, from the top and middle nodes. The state of the output from the top node echoes the state of the top input. The output from the middle node goes ON when the value in the destination pointer register equals the specified table length. At this point, the instruction cannot increment any further.
934
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RBIT: Reset Bit 31007523 8/2010
RBIT: Reset Bit
156
Introduction This chapter describes the instruction RBIT. What's in this Chapter? This chapter contains the following topics:
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935
RBIT: Reset Bit
Short Description
Function Description The reset bit (RBIT) instruction lets you clear a latched-ON bit by powering the top input. The bit remains cleared after power is removed from the input. This instruction is designed to clear a bit set by the SBIT instruction. NOTE: The RBIT instruction does not follow the same rules of network placement as 0x-referenced coils do. An RBIT instruction cannot be placed in column 11 of a network and it can be placed to the left of other logic nodes on the same rungs of the ladder.
936
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RBIT: Reset Bit
Representation
Parameters Top input State RAM Reference 0x, 1x Data Type Meaning None ON = clears the specified bit to 0. The bit remains cleared after power is removed from the input Holding register whose bit pattern is being controlled Indicates which one of the 16 bits is being cleared ON = the specified bit has been cleared to 0
register # (top node) bit # (bottom node) Top output
4x
WORD INT, UINT
0x
None
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937
RBIT: Reset Bit
938
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READ: Read 31007523 8/2010
READ: Read
157
Introduction This chapter describes the instruction READ. What's in this Chapter? This chapter contains the following topics:
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939
READ: Read
Short Description
Function Description The READ instruction provides the ability to read data from an ASCII input device (keyboard, bar code reader, etc.) into the PLCs memory via its RIO network. The connection to the ASCII device is made at an RIO interface. In the process of handling the messaging operation, READ performs the following functions: Verifies the lengths of variable data fields Verifies the correctness of the ASCII communication parameters, e.g. the port number, the message number Performs error detection and recording Reports RIO interface status READ requires two tables of registers: a destination table where retrieved variable data (the message) is stored, and a control block where comm port and message parameters are identified. Further information about formatting messages you will find in Formatting Messages for ASCII READ/WRIT Operations, page 57.
940
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READ: Read
Representation
Parameters Top input Middle input Bottom input control block (top node) destination (middle node) table length (bottom node) State RAM Data Type Reference 0x, 1x 0x, 1x 0x, 1x 4x 4x None None None INT, UINT, WORD INT, UINT, WORD INT, UINT Meaning ON = initiates a READ ON = pauses READ operation ON = abort READ operation Control block (first of seven contiguous holding registers) Destination table Length of destination table (number of registers where the message data will be stored), range: 1 ... 999 Length: Max. 255 16-bit PLC Max. 999 24-bit PLC Echoes the state of the top input ON = error in communication or operation has timed out (for one scan) ON = READ complete (for one scan) 941
0x 0x 0x
None None None
31007523 8/2010
READ: Read
Control Block (Top Node) The 4x register entered in the top node is the first of seven contiguous holding register in the control block.
Register Displayed First implied Second implied Third implied Fourth implied Fifth implied Sixth implied Definition Port number and error code Message number Number of registers required to satisfy format Count of the number of registers transmitted thus far Status of the solve Reserved Checksum of registers 0 ... 5
Port Number and Error Code

Bit 1 ... 4 5 6 7 8 9 10 11 12 ... 16 Function PLC error code Not used Input from the ASCII device not compatible with format Input buffer overrun, data received too quickly at RIOP USART error, bad byte received at RIOP ASCII device off-line, check cabling Illegal format, not received properly by RIOP ASCII message terminated early (in keyboard mode Comm port # (1 ... 32)
942
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READ: Read
PLC Error Code

Bit 1 0 0 0 0 0 0 0 1 1 1 1 1 1 1 2 0 0 0 1 1 1 1 0 0 0 0 1 1 1 3 0 1 1 0 0 1 1 0 0 1 1 0 0 1 4 1 0 1 0 1 0 1 0 1 0 2 0 1 1 Error in the input to RIOP from ASCII device Exception response from RIOP, bad data Sequenced number from RIOP differs from expected value User register checksum error, often caused by altering READ registers while the block is active Invalid port or message number detected User-initiated abort, bottom input energized No response from drop, communication error Node aborted because of SKP instruction Message area scrambled, reload memory Port not configured in the I/O map Illegal ASCII request Unknown response from ASCII port Illegal ASCII element detected in user logic RIOP in the PLC is down Meaning
Destination (Middle Node) The middle node contains the first 4x register in a destination table. Variable data in a READ message are written into this table. The length of the table is defined in the bottom node. Consider this READ message:
NOTE: An ASCII READ message may contain the embedded text, placed inside quotation marks, as well as the variable data in the format statement, i.e., the ASCII message. The 10-character ASCII field AAAAAAAAAA is the variable data field; variable data must be entered via an ASCII input device.
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943
READ: Read
944
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RET: Return from a Subroutine 31007523 8/2010
RET: Return from a Subroutine
158
Introduction This chapter describes the instruction RET. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: RET - Return to Scheduled Logic Page 946 947
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945
Short Description
Function Description The RET instruction may be used to conditionally return the logic scan to the node immediately following the most recently executed JSR block. This instruction can be implemented only from within the subroutine segment, the (unscheduled) last segment in the user logic program. NOTE: If a subroutine does not contain a RET block, either a LAB block or the endof-logic (whichever comes first) serves as the default return from the subroutine. An example to the subroutine handling you will find in Subroutine Handling, page 73.
946
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Representation: RET - Return to Scheduled Logic


Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning ON = return to previous logic ON returns the logic scan to the node immediately following the most recently executed JSR instruction or to the point where the interrupt occurred in the logic scan. Constant value, can not be changed ON = error in the specified subroutine
00001 Top output 0x
INT, UINT None
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947
948
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RTTI - Register to Input Table 31007523 8/2010
RTTI - Register to Input Table
159
Introduction This chapter describes the instruction RTTI. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
949
Short Description
Function Description The Register to Input Table block is one of four 484-replacement instructions. It copies the contents of an input register or a holding register to another input or holding register. This destination register is pointed to by the input register implied by the constant in the bottom node. Only one such operation can be accommodated by the system in each scan.
950
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Representation

Parameters Top input source (top node) State RAM Reference 0x, 1x 3x, 4x Data Type None INT, UINT Meaning Control source The source node (top node) contains the source register address. The data located in the source register address will be copied to the destination address, which is determined by the destination offset pointer. The pointer is a 3xxxx implied by a constant (i.e. 00018 -> 30018) whose contents indicate the destination. A value of 1 to 254 indicates a holding register (40001 - 40254) and a value of 801 to 832 indicates an input register (30001 - 30032). If the value is outside this range, the operation is not performed and the ERROR rail is powered. Note the pointer's value is NOT automatically increased. Echoes the value of the top input ON = error Pointer value out of range
pointer (bottom node)
(1 ... 254) (801 ... 832)
INT, UINT
0x 0x
None None
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951
952
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RTTO - Register to Output Table 31007523 8/2010
RTTO - Register to Output Table
160
Introduction This chapter describes the instruction RTTO. What's in this Chapter? This chapter contains the following topics:
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953
Short Description
Function Description The Register to Output Table block is one of four 484-replacement instructions. It copies the contents of an input register or a holding register to another input or holding register. The holding register implied by the constant in the bottom node points to this destination register. Only one such operation can be accommodated by the system in each scan.
954
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Representation

Parameters Top input source (top node) State RAM Reference 0x, 1x 3x, 4x Data Type None INT, UINT Meaning Control source The source node (top node) contains the source register address. The data located in the source register address will be copied to the destination address, which is determined by the destination offset pointer. The pointer is a 4xxxx implied by a constant (i.e. 00018 -> 40018) whose contents indicate the destination. A value of 1 to 254 indicates a holding register (40001 - 40254) and a value of 801 to 832 indicates an input register (30001 - 30032). If the value is outside this range, the operation is not performed and the ERROR rail is powered. Note that the pointer's value is NOT automatically increased. Echoes the value of the top input ON = error Pointer value out of range
pointer (bottom node)
(1 ... 254) (801 ... 824)
INT, UINT
0x 0x
None None
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955
956
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RTU - Remote Terminal Unit 31007523 8/2010
RTU - Remote Terminal Unit
161
Introduction This chapter describes the instruction RTU. What's in this Chapter? This chapter contains the following topics:
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957
Short Description
Function Description The Modbus Remote Terminal Unit (RTU) block supports the following data baud rates: 1200 2400 4800 9600 19200
958
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Representation
Register 4x 4x + 1 4x + 2 4x + 3 Function RTU revision number (read-only) Fault status field (read-only) Field not used Set the Data Baud Rate register For expanded and detailed information about the register entries for baud rates please see the section below: Register Entries for Baud Rates. Set the Data Bits register For expanded and detailed information about the register entries for data bits please see the section below: Register Entries for Data Bits Parity register Stop bit register Field not used Set the Command Word register For expanded and detailed information about the register entries for command words please see the section below: Register Entries for Command Words
4x + 4
4x + 5 4x + 6 4x + 7 4x + 8
Register Entries for Baud Rates The Modbus Remote Terminal Unit (RTU) block supports the following data baud rates: 1200 2400 4800 9600 19200 Below are the register entries for the supported data rates. To configure a data rate, type the appropriate decimal number (for example 1200) in the data baud rate register.
Register Entry 1200 2400 4800 9600 19200
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Baud Rate 1200 2400 4800 9600 19200 959
Register Entries for Data Bits The RTU block supports data bits 7 and 8. Below are the possible register entries for the data bits field:
Register Entry 7 8 Data Bit Field 7 8
Modbus messages can be sent in Modbus RTU format or Modbus ASCII format. If messages are sent in Modbus ASCII format, type 7 in the field. If messages are sent in Modbus RTU format, type 8. If you're sending ASCII character messages, this register can be set to 7 or 8 data bits. Register Entries for Command Words The RTU block interprets each bit of the command word as a function to implement or perform. Below are the bit definitions for the command word register entries.
Register Entry 1 (msb) 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (lsb) Definitions Not used Enable RTS/CTS control Not used Not used Not used Not used Enable ASCII string messaging Enable Modbus messaging Not used Not used Not used Not used Not used Hang up modem Dial modem Initialize modem
The following items provide expanded and detailed information about Bits 2, 7, and 8.
960
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Bit 2 Enable request-to-send/clear-to-send (RTS/CTS) control This bit should be set (or true) when a DCE that is connected to the PLC requires hardware handshaking using RTS/CTS control. This bit can be used in conjunction with the values contained in the (4xxxx 13) start-of-transmission delay register and the (4xxxx + 13) end-of-transmission delay register. Start-of-transmission delay keeps RTS asserted for 0-9999 ms before the RTU block sends a message from the PLC port. After the RTU block sends a message, end-of-transmission delay keeps RTS asserted for 0-9999 ms. When end-of-transmission delay has expired, the RTU block de-asserts RTS. Bit 7 Enable ASCII string messaging This bit should be set (or true) to send ASCII string messages form the PLC communication Port #1. The RTU block can send an ASCII string of up to 512 characters in length. Each ASCII message must be programmed into contiguous 4x registers of the PLC. Two characters per register are allowed. Note: This ASCII message string should not be confused with a Modbus message sent in ASCII format. Bit 8 Enable Modbus messaging This bit should be set (or true) to send Modbus messages from the PLC communication port #1. Modbus messages can be sent in RTU or ASCII formats. If sending Modbus messages in RTU format, set the data bits in the (4xxxx + 4) data bits register to 8. If sending Modbus message in ASCII format, set the data bits in the (4xxxx + 4) data bits register to 7.
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961
962
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SAVE: Save Flash 31007523 8/2010
SAVE: Save Flash
162
Introduction This chapter describes the instruction SAVE. What's in this Chapter? This chapter contains the following topics:
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963
SAVE: Save Flash
Short Description
Function Description NOTE: This instruction is available with the PLC family TSX Compact, with Quantum CPUs 434 12/ 534 14 and Momentum CPUs CCC 960 x0/ 980 x0. The SAVE instruction saves a block of 4x registers to state RAM where they are protected from unauthorized modification.
964
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SAVE: Save Flash
Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning Start SAVE operation: it should remain ON until the operation has completed successfully or an error has occurred. First of max. 512 contiguous 4x registers to be saved to state RAM Integer value, which defines the specific buffer where the block of data is to be saved Number of words to be saved, range: 1 ... 512 ON = SAVE is active ON = SAVE is not allowed
register (top node) 1, 2, 3, 4 (see page 966) (middle node) length (bottom node) Top output Middle output (see page 966)
4x
INT, UINT, WORD INT
INT 0x 0x None None
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965
SAVE: Save Flash
1, 2, 3, 4 (Middle Node) The middle node defines the specific buffer, within state RAM, where the block of data is to be saved. Four 512 word buffers are allowed. Each buffer is defined by placing its corresponding value in the middle node, that is, the value 1 represents the first buffer, value 2 represents the second buffer and so on. The legal values are 1, 2, 3, and 4. When the PLC is started all four buffers are zeroed. Therefore, you may not save data to the same buffer without first loading it with the instruction LOAD (see page 647). When this is attempted the middle output goes ON. In other words, once a buffer is used, it may not be used again until the data has been removed. Middle Output The output from the middle node goes ON when previously saved data has not been accessed using the LOAD (see page 647) instruction. This prevents inadvertent overwriting of data in the SAVE buffer.
966
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SBIT: Set Bit 31007523 8/2010
SBIT: Set Bit
163
Introduction This chapter describes the instruction SBIT. What's in this Chapter? This chapter contains the following topics:
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967
SBIT: Set Bit
Short Description
Function Description The set bit (SBIT) instruction lets you set the state of the specified bit to ON (1) by powering the top input. NOTE: The SBIT instruction does not follow the same rules of network placement as 0x-referenced coils do. An SBIT instruction cannot be placed in column 11 of a network and it can be placed to the left of other logic nodes on the same rungs of the ladder.
968
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SBIT: Set Bit
Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning ON = sets the specified bit to 1. The bit remains set after power is removed from the input Holding register whose bit pattern is being controlled Indicates which one of the 16 bits is being set Goes ON, when the specified bit is set and remains ON until it is cleared (via the RBIT (see page 935) instruction)
register # (top node) bit # (bottom node) Top output
4x
WORD INT, UINT
0x
None
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969
SBIT: Set Bit
970
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SCIF: Sequential Control Interfaces 31007523 8/2010
SCIF: Sequential Control Interfaces
164
Introduction This chapter describes the instruction SCIF. What's in this Chapter? This chapter contains the following topics:
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971
Short Description
Function Description The SCIF instruction performs either a drum sequencing operation or an input comparison (ICMP) using the data defined in the step data table. The choice of operation is made by defining the value in the first register of the step data table (see page 974): 0 = drum mode: The instruction controls outputs in the drum sequencing application. 1 = ICMP mode: The instruction reads inputs to ensure that limit switches, proximity switches, pushbuttons, etc. are properly positioned to allow drum outputs to be fired.
972
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Representation

Parameters Top input Middle input Bottom input step pointer (top node) step data table (see page 974) (middle node) length (see page 974) (bottom node) Top output Middle output State RAM Reference 0x, 1x 0x, 1x 0x, 1x 4x 4x Data Meaning Type None ON = initiates specified sequence control operation None Drum mode: step pointer increments to the next step ICMP mode: compare status is shown at the middle output None Drum mode: ON = reset step pointer to 0 ICMP mode: not used INT, Number of the current step in the step data table UINT INT, First register in the step data table UINT (For expanded and detailed information please see the section Step Data Table (Middle Node), page 974.) INT, Number of application-specific registers used in the step data table UINT None Echoes state of the top input None Drum mode goes ON for the last step Note: When using the middle output, be aware that when integrating with other logic, if the step pointer is zero and the middle input is ON, then the middle output will also be ON. This condition will cause the step pointer to be one step out of sequence. None ON = error is detected 973
0x 0x
Bottom output
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0x
Step Data Table (Middle Node) The 4x register entered in the middle node is the first register in the step data table. The first seven registers in the table hold constant and variable data required to solve the instruction:
Register Displayed First implied Register Name subfunction type masked output data (in drum mode) raw input data (in ICMP mode) Second implied Third implied current step data output mask (in drum mode) input mask (in ICMP mode) Fourth implied masked input data (in ICMP mode) not used in drum mode Fifth implied compare status (in ICMP mode) Loaded by SCIF each time the block is solved, it contains the result of an XOR of the masked input data and the current step data; unmasked inputs that are not in the correct logical state cause the associated register bit to go to 1, non-zero bits cause a miscompare and turn ON the middle output from the SCIF block First of K registers in the table containing the user-specified control data Note: This and the rest of the registers represent application-specific step data in the process being controlled. Description 0 = drum mode; 1 = ICMP mode (entry of any other value in this register will result in all outputs OFF) Loaded by SCIF each time the block is solved; the register contains the contents of the current step data register masked with the output mask register Loaded by the user from a group of sequential inputs to be used by the block in the current step Loaded by SCIF each time the block is solved; the register contains data from the current step (pointed to by the step pointer) Loaded by the user before using the block, the contents will not be altered during logic solving; contains a mask to be applied to the data for each sequencer step Loaded by the user before using the block, it contains a mask to be ANDed with raw input data for each step, masked bits will not be compared; the masked data are put in the masked input data register Loaded by SCIF each time the block is solved, it contains the result of the ANDed input mask and raw input data
not used in drum mode Sixth implied start of data table
Length of Step Data Table (Bottom Node) The integer value entered in the bottom node is the length, i.e. the number of application-specific registers, used in the step data table. The length can range from 1 ... 255. The total number of registers required in the step data table is the length + 7. The length must be the value placed in the steps used register in the middle node.
974
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SENS: Sense 31007523 8/2010
SENS: Sense
165
Introduction This chapter describes the instruction SENS. What's in this Chapter? This chapter contains the following topics:
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975
SENS: Sense
Short Description
Function Description The SENS instruction examines and reports the sense (1 or 0) of a specific bit location in a data matrix. One bit location is sensed per scan.
976
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SENS: Sense
Representation

Parameters Top input Middle input Bottom input bit location (see page 978) (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 3x, 4x Data Type None None None WORD Meaning ON = senses the bit location Increment bit location by one on next scan Reset bit location to 1 Specific bit location to be sensed in the data matrix, entered explicitly as an integer or stored in a register; range: 1 ... 9600 Pointer: ( 999 16-bit PLC) (max) (9900 24-bit PLC) First word or register in the data matrix Matrix length max 255 Registers (4080 bits 16-bit PLC) 600 Registers (9600 bits 24-bit PLC) Echoes state of the top input ON = bit sense is 1 OFF = bit sense is 0 ON = error: bit location > matrix length 977
data matrix (middle node) length (see page 978) (bottom node) Top output Middle output Bottom output
0x, 4x
BOOL, WORD INT, UINT
0x 0x 0x
None None None
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SENS: Sense
Bit Location (Top Node) NOTE: If the bit location is entered as an integer or in a 3x register, the instruction will ignore the state of the middle and bottom inputs. Matrix Length (Bottom Node) The integer value entered in the bottom node specifies a matrix length, i.e, the number of 16-bit words or registers in the data matrix. The length can range from 1 ... 600 in a 24-bit CPU, e.g, a matrix length of 200 indicates 3200 bit locations.
978
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Shorts 31007523 8/2010
Shorts
166
Introduction This chapter describes the instruction element Shorts. What's in this Chapter? This chapter contains the following topics:
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979
Shorts
Short Description
Function Description Shorts are simply straight-line connections between contacts and/or instructions in a ladder logic network. Vertical (|) and horizontal () shorts are used to make connections between rows and columns of logic. To cancel a vertical short, use a vertical open.
980
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Shorts
Representation
Vertical Shorts Connects contacts or instructions vertically in a network column, or node inputs and outputs to create either/or conditions. When two contacts are connected by vertical shorts, power is passed when one or both contacts receive power. Horizontal Shorts Expands logic horizontally along a rung in a ladder logic network.
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981
Shorts
982
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SKP - Skipping Networks 31007523 8/2010
SKP - Skipping Networks
167
Introduction This chapter describes the instruction SKP. What's in this Chapter? This chapter contains the following topics:
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983
Short Description
WARNING
SKIPPED INPUTS AND OUTPUTS When using the SKP instruction, watch for skipped inputs and outputs. SKP is a dangerous instruction that should be used carefully. If inputs and outputs that normally effect control are unintentionally skipped (or not skipped), the result can create hazardous conditions for personnel and application equipment. Failure to follow these instructions can result in death, serious injury, or equipment damage.
CAUTION
READING VALUES WHILE CHANGING Use 3xxxx and 4xxxx registers with caution. The processor can read the value while it's changing. Failure to follow these instructions can result in injury or equipment damage. The SKP instruction is a standard instruction in all PLCs. It should be used with caution. The SKP instruction is used to reduce the scan time by not solving a portion of the logic. The SKP instruction causes the logic scan to skip specified networks in the program. The SKP function can be used to bypass seldom used program sequences create subroutines The SKP instruction allows you to skip a specified number of networks in a ladder logic program. When it is powered, the SKP operation is performed on every scan. The remainder of the network in which the instruction appears counts as the first of the specified number of networks to be skipped. The CPU continues to skip networks until the total number of networks skipped equals the number specified in the instruction block or until a segment boundary is reached. A SKP operation cannot cross a segment boundary. A SKP instruction can be activated only if you specify in the PLC set-up editor that skips are allowed. SKP is a one-high nodal instruction.
984
31007523 8/2010
Representation

Parameters Top input State RAM Reference 1x Data Type None Meaning ON initiates a skip network operation when it passes power. A SKP operation is performed on every scan while the input is ON The value entered in the node specifies the number of networks to be skipped. The value can be Specified explicitly as an integer constant in the range 1 through 999 Stored in a 3xxxx input register Stored in a 4xxxx holding register The node value includes the network that contains the SKP instruction. The nodal regions in the network where the SKP resides that have not already been scanned will be skipped; this counts as one of the networks specified to be skipped. The CPU continues to skip networks until the total number of networks skipped equals the value specified.
# of networks skipped (top node)
3x, 4x
INT, UINT WORD
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985
986
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SRCH: Search 31007523 8/2010
SRCH: Search
168
Introduction This chapter describes the instruction SRCH. What's in this Chapter? This chapter contains the following topics:
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987
SRCH: Search
Short Description
Function Description The SRCH instruction searches the registers in a source table for a specific bit pattern.
988
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SRCH: Search
Representation

Parameters Top input Middle input source table (top node) pointer (see page 991) (middle node) table length (bottom node) Top output Middle output 0x 0x State RAM Reference 0x, 1x 0x, 1x 3x, 4x 4x Data Type None None INT, UINT, WORD INT, UINT Meaning ON = initiates search OFF = search from beginning ON = search from last match Source table to be searched Pointer into the source table
INT, UINT None None
Number of registers in the source table; range: 1 ... 100 Echoes state of the top input ON = match found
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989
SRCH: Search
A SRCH Example In the following example, we search a source table that contains five registers (40421 ... 40425) for a specific bit pattern. The pointer register (40430) indicates that the desired bit pattern is stored in register 40431, and we see that the register contains a bit value of 3333.
In each scan where P.T. contact 10001 transitions from OFF to ON, the source table is searched for a bit pattern equivalent to the value 3333. when the math is found, the middle output passes power to coil 00142. If N.O. contact 10002 is OFF when the match is found at register 40423, the SRCH instruction energizes coil 00142 for one scan, then starts the search again in the next scan at the top of the source table (register 40421). If contact 10002 is ON, the SRCH instruction energizes coil 00142 for one scan, then starts the search in register 40424, Because the top input is a P.T. contact, on any scan where power is not applied to the top input the pointer value is cleared. We use a BLKM instruction here to sage the pointer value to register 40500.
990
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SRCH: Search
Pointer (Middle Node) The 4x register entered in the middle node is the pointer into the source table. It points to the source register that contains the same value as the value stored in the next contiguous register after the pointer, e.g. if the pointer register is 400015, then register 400016 contains a value that the SRCH instruction will attempt to match in source table.
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991
SRCH: Search
992
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STAT: Status 31007523 8/2010
STAT: Status
169
Introduction This chapter describes the instruction STAT. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Description of the Status Table Controller Status Words 1 - 11 for Quantum and Momentum I/O Module Health Status Words 12 - 20 for Momentum I/O Module Health Status Words 12 - 171 for Quantum Communication Status Words 172 - 277 for Quantum Controller Status Words 1 - 11 for TSX Compact and Atrium I/O Module Health Status Words 12 - 15 for TSX Compact Global Health and Communications Retry Status Words 182 ... 184 for TSX Compact Page 994 995 996 997 1001 1006 1008 1010 1015 1018 1019
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993
STAT: Status
Short Description
Function Description The STAT instruction accesses a specified number of words in a status table (see page 997) in the PLCs system memory. Here vital diagnostic information regarding the health of the PLC and its remote I/O drops is posted. This information includes: PLC status Possible error conditions in the I/O modules Input-to-PLC-to-output communication status
994
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STAT: Status
Representation

Parameters Top input destination (see page 996) (top node) length (see page 996) (bottom node) State RAM Data Type Meaning Reference 0x, 1x 0x, 4x None ON = copies specified number of words from the status table
INT, UINT, First position in the destination block BOOL, WORD INT, UINT number of registers or 16-bit words in the destination block The integer value entered in the bottom node specifies a matrix length - i.e., the number of 16bit words or registers in the data matrix. The length can range from 1 through 255 in a 16-bit CPU and from 1 through 600 in a 24-bit CPU e.g., a matrix length of 200 indicates 3200 bit locations. Note: If 0xxxx references are used as the destination, they cannot be programmed as coils, only as contacts referencing those coil numbers. (For expanded and detailed information regarding table length and PLCs see the section Length (Bottom Node), page 996.) ON = operation successful 995
Top output
0x
None
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STAT: Status
Mode of Functioning With the STAT instruction, you can copy some or all of the status words into a block of registers or a block of contiguous discrete references. The copy to the STAT block always begins with the first word in the table up to the last word of interest to you. For example, if the status table is 277 words long and you are interested only in the statistics provided in word 11, you need to copy only words 1 ... 11 by specifying a length of 11 in the STAT instruction. Destination Block (Top Node) The reference number entered in the top node is the first position in the destination block, i.e. the block where the current words of interest from the status table will be copied. The number of holding registers or 16-bit words in the destination block is specified in the bottom node (length). NOTE: We recommend that you do not use discretes in the STAT destination node because of the excessive number required to contain status information. Length (Bottom Node) The integer value entered in the bottom node specifies the number of registers or 16-bit words in the destination block where the current status information will be written. The maximum allowable length will differ according to the type of PLC in use and the type of I/O communications protocol employed. For a 984A, 984B, or 984X Chassis Mount PLC using the S901 RIO protocol the available range of the system status table is 1 ... 75 words For PLCs with 16-bit CPUs using the S908 RIO protocol - for example the 38x, 48x, and 68x Slot Mount PLCs - the available range of the system status table is 1 ... 255 For PLCs with 24-bit CPUs using the S908 RIO protocol - for example the 78x Slot Mount PLCs, the Quantum PLCs - the available range of the system status table is 1 ... 277 For Compact-984 PLCs the available range of the system status table is 1 ... 184 For Modicon Micro PLCs the available range of the system status table is 1 ... 56
996
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STAT: Status
Description of the Status Table

General The STAT instruction is used to display the Status of Controller and I/O system for Quantum (see page 997), Atrium (see page 1000), TSX Compact (see page 1000) and Momentum (see page 999). The first 11 status words are used by Quantum and Momentum in the same way and by TSX Compact and Atrium in the same way. The following have a different meaning for Quantum, TSX Compact and Momentum. Quantum Overview The 277 words in the status table are organized in three sections: Controller Status (words 1 ... 11) (see page 1001) I/O Module Health (words 12 ... 171) (see page 1008) I/O Communications Health (words 172 ... 277) (see page 1010) Words of the status table:
Decimal Word Word Content 1 2 3 4 5 6 7 8 9 10 11 12 13 ... 16 17 18 ... 171 172
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Hex Word 01 02 03 04 06 06 07 08 09 0A 0B 0C 0D ... 0F 10 11 ... AB AC 997
Controller Status Hot Standby Status Controller Status RIO Status Controller Stop State Number of Ladder Logic Segments End-of-logic (EOL) Pointer RIO Redundancy and Timeout ASCII Message Status RUN/LOAD/DEBUG Status not used Drop 1, Rack 1 Drop 1, Rack 2 ...... Drop 1, Rack 5 Drop 2, Rack 1 Drop 2, Rack 2 ...... Drop 32, Rack 5 S908 Startup Error Code
STAT: Status
Decimal Word Word Content 173 174 175 176 178 178 179 180 181 182 183 184 185 ... 275 276 277 Cable A Errors Cable A Errors Cable A Errors Cable B Errors Cable B Errors Cable B Errors Global Communication Errors Global Communication Errors Global Communication Errors Drop 1 Errors/Health Status and Retry Counters (in the TSX Compact 984 Controllers) (First word) Drop 1 Errors/Health Status and Retry Counters (in the TSX Compact 984 Controllers) (Second word) Drop 1 Errors/Health Status and Retry Counters (in the TSX Compact 984 Controllers) (Third word) Drop 2 Errors/Health Status and Retry Counters (in the TSX Compact 984 Controllers) (First word) ......
Hex Word AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 ...
Drop 32 Errors/Health Status and Retry Counters (in the TSX 113 Compact 984 Controllers) (First word) Drop 32 Errors/Health Status and Retry Counters (in the TSX 114 Compact 984 Controllers) (Second word) Drop 32 Errors/Health Status and Retry Counters (in the TSX 115 Compact 984 Controllers) (Third word)
998
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STAT: Status
Momentum Overview The 20 words in the status table are organized in two sections: Controller Status (words 1 ... 11) (see page 1001) I/O Module Health (words 12 ... 20) (see page 1006) Words of the status table:
Decimal Word 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Word Content Controller Status Hot Standby Status Controller Status RIO Status Controller Stop State Number of Ladder Logic Segments End-of-logic (EOL) Pointer RIO Redundancy and Timeout ASCII Message Status RUN/LOAD/DEBUG Status not used Local Momentum I/O Module Health I/O Bus Module Health I/O Bus Module Health I/O Bus Module Health I/O Bus Module Health I/O Bus Module Health I/O Bus Module Health I/O Bus Module Health I/O Bus Module Health Hex Word 01 02 03 04 06 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14
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999
STAT: Status
TSX Compact and Atrium Overview The 184 words in the status table are organized in three sections: Controller Status (words 1 ... 11) (see page 1015) I/O Module Health (words 12 ... 15) (see page 1018) Not used (16 ... 181) Global Health and Communications retry status (words 182 ... 184) (see page 1019) Words of the status table:
Decimal Word Word Content 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ... 181 182 183 184 CPU Status not used Controller Status not used CPU Stop State Number of Ladder Logic Segments End-of-logic (EOL) Pointer not used not used RUN/LOAD/DEBUG Status not used I/O Health Status Rack 1 I/O Health Status Rack 2 I/O Health Status Rack 3 I/O Health Status Rack 4 not used Health Status I/O Error Counter PAB Bus Retry Counter Hex Word 01 02 03 04 06 06 07 08 09 0A 0B 0C 0D 0E 0F 10 ... B5 B6 B7 B8
1000
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STAT: Status
Controller Status Words 1 - 11 for Quantum and Momentum

Controller Status (Word 1) Word 1 displays the following aspects of the PLC status:
Bit 1-5 6 7 8 9 10 11 12 13 - 16
Function Not used 1 = enable constant sweep 1 = enable single sweep delay 1 = 16 bit user logic 0 = 24 bit user logic 1 = AC power on 1 = RUN light OFF 1 = memory protect OFF 1 = battery failed Not used
Hot Standby Status (Word 2) Word 2 displays the Hot Standby status for 984 PLCs that use S911/R911 Hot Standby Modules:
Bit 1 2 - 10 11 12 13, 14
Function 1 = S911/R911 present and healthy Not used 0 = controller toggle set to A 1 = controller toggle set to B 0 = controllers have matching logic 1 = controllers do not have matching logic Remote system state: 0 1 = Off line (1 dec) 1 0 = primary (2 dec) 1 1 = standby (3 dec) Local system state: 0 1 = Off line (1 dec) 1 0 = primary (2 dec) 1 1 = standby (3 dec)
15, 16
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1001
STAT: Status
Controller Status (Word 3) Word 3 displays more aspects of the controller status:
Bit 1 2 3 4 5 - 12 13 - 16
Function 1 = first scan 1 = start command pending 1 = constant sweep time exceeded 1 = Existing DIM AWARENESS Not used Single sweeps
RIO Status (Word 4) Word 4 is used for IOP information:
Bit 1 2 3 4 5 - 12 13 - 16
Function 1 = IOP bad 1 = IOP time out 1 = IOP loop back 1 = IOP memory failure Not used 00 = IO did not respond 01 = no response 02 = failed loopback
1002
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STAT: Status
Controller Stop State (Word 5)
CAUTION
Using a Quantum or 984-684E/785E PLC If you are using a Quantum or 984-684E/785E PLC, bit 15 in word 5 is never set. These PLCs can be started and run with coils disabled in RUN (optimized) mode. Also all the bits in word 5 must be set to 0 when one of these PLCs is running. Failure to follow these instructions can result in injury or equipment damage. Word 5 displays the PLCs stop state conditions:
Bit 1 2
Function 1 = peripheral port stop Extended memory parity error (for chassis mount controllers) or traffic cop/S908 error (for other controllers) If the bit = 1 in a 984B controller, an error has been detected in extended memory; the controller will run, but the error output will be ON for XMRD/XMWT functions If the bit = 1 for any other controller than a chassis mount, then either a traffic cop error has been detected or the S908 is missing from a multi-drop configuration. 1 = controller in DIM AWARENESS 1 = illegal peripheral intervention 1 = segment scheduler invalid 1 = start of node did not start segment 1 = state RAM test failed 1 = invalid traffic cop 1 = watchdog timer expired 1 = real time clock error CPU logic solver failed (for chassis mount controllers) or Coil Use TABLE (for other controllers) If the bit = 1 in a chassis mount controller, the internal diagnostics have detected CPU failure. If the bit = 1 in any controller other than a chassis mount, then the Coil Use Table does not match the coils in user logic. 1 = IOP failure 1 = invalid node 1 = logic checksum 1 = coil disabled in RUN mode (see Caution below) 1 = bad config
3 4 5 6 7 8 9 10 11
12 13 14 15 16
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STAT: Status
Controller Stop State (Word 6) Word 6 displays the number of segments in ladder logic; a binary number is shown:
Bit 1 - 16
Function Number of segments (expressed as a decimal number)
Controller Stop State (Word 7) Word 7 displays the address of the end-of-logic (EOL) pointer:
Bit 1 - 16
Function EOL pointer address
RIO Redundancy and Timeout (Word 8) Word 8 uses its four least significant bits to display the remote I/O timeout constant:
Bit 1 - 12 13 - 16
Function Not used RIO timeout constant
ASCII Message Status (Word 9) Word 9 uses its four least significant bits to display ASCII message status:
Bit 1 ... 12 13 14 15 16
Function Not used 1 = Mismatch between numbers of messages and pointers 1 = Invalid message pointer 1 = Invalid message 1 = Message checksum error
1004
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STAT: Status
RUN/LOAD/DEBUG Status (Word 10) Word 10 uses its two least significant bits to display RUN/LOAD/DEBUG status:
Bit 1 ... 14 15, 15
Function Not used 0 0 = Debug (0 dec) 0 1 = Run (1 dec) 1 0 = Load (2 dec)
Word 11 This word is not used.
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1005
STAT: Status
I/O Module Health Status Words 12 - 20 for Momentum

I/O Module Health Status Status words 12 ... 20 display I/O module health status. 1 word is reserved for each of up to 1 Local drop, 8 words are used to represent the health of up to 128 I/O Bus Modules Local Momentum I/O Module Health Word 12 displays the Local Momentum I/O Module health:
Bit 1 2 - 16
Function 1 = Local Module Not used
Momentum I/O Bus Module Health Word 13 through 20 display the health status for Momentum I/O Bus Modules as follows:
Word 13 14 15 16 17 18 19 20 I/O Bus Modules 1 ... 16 17 ... 32 33 ... 48 49 ... 64 65 ... 80 81 ... 96 97 ... 112 113 ... 128
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STAT: Status
Each Word display the Momentum I/O Bus Module health as follows:
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Function 1 = Module 1 1 = Module 2 1 = Module 3 1 = Module 4 1 = Module 5 1 = Module 6 1 = Module 7 1 = Module 8 1 = Module 9 1 = Module 10 1 = Module 11 1 = Module 12 1 = Module 13 1 = Module 14 1 = Module 15 1 = Module 16
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1007
STAT: Status
I/O Module Health Status Words 12 - 171 for Quantum

RIO Status Words Status words 12 ... 20 display I/O module health status. Five words are reserved for each of up to 32 drops, one word for each of up to five possible racks (I/O housings) in each drop. Each rack may contain up to 11 I/O modules; bits 1 ... 11 in each word represent the health of the associated I/O module in each rack.
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Function 1 = Slot 1 1 = Slot 2 1 = Slot 3 1 = Slot 4 1 = Slot 5 1 = Slot 6 1 = Slot 7 1 = Slot 8 1 = Slot 9 1 = Slot 10 1 = Slot 11 1 = Slot 12 1 = Slot 13 1 = Slot 14 1 = Slot 15 1 = Slot 16
Four conditions must be met before an I/O module can indicate good health: The slot must be traffic copped The slot must contain a module with the correct personality Valid communications must exist between the module and the RIO interface at remote drops Valid communications must exist between the RIO interface at each remote drop and the I/O processor in the controller
1008
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STAT: Status
Status Words for the MMI Operator Panels The status of the 32 Element Pushbutton Panels and PanelMate units on an RIO network can also be monitored with an I/O health status word. The Pushbutton Panels occupy slot 4 in an I/O rack and can be monitored at bit 4 of the appropriate status word. A PanelMate on RIO occupies slot 1 in rack 1 of the drop and can be monitored at bit 1 of the first status word for the drop. NOTE: The ASCII Keypads communication status can be monitored with the error codes in the ASCII READ/WRIT blocks.
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STAT: Status
Communication Status Words 172 - 277 for Quantum

DIO Status Status words 172 ... 277 contain the I/O system communication status. Words 172 ... 181 are global status words. Among the remaining 96 words, three words are dedicated to each of up to 32 drops, depending on the type of PLC. Word 172 stores the Quantum Startup Error Code. This word is always 0 when the system is running. If an error occurs, the controller does not start-it generates a stop state code of 10 (word 5 (see page 1003)). Quantum Start-up Error Codes
Code 01 02 03 04 10 11 12 13 14 15 16 17 18 20 21 22 23 25 26 27 28 30 31 32 33 1010 Error BADTCLEN BADLNKNUM BADNUMDPS BADTCSUM BADDDLEN BADDRPNUM BADHUPTIM BADASCNUM BADNUMODS PRECONDRP PRECONPRT TOOMNYOUT TOOMNYINS BADSLTNUM BADRCKNUM BADOUTBC BADINBC BADRF1MAP BADRF2MAP NOBYTES BADDISMAP BADODDOUT BADODDIN BADODDREF BAD3X1XRF Meaning (Where the error has occurred) Traffic Cop length Remote I/O link number Number of drops in Traffic Cop Traffic Cop checksum Drop descriptor length I/O drop number Drop holdup time ASCII port number Number of modules in drop Drop already configured Port already configured More than 1024 output points More than 1024 input points Module slot address Module rack address Number of output bytes Number of input bytes First reference number Second reference number No input or output bytes Discrete not on 16-bit boundary Unpaired odd output module Unpaired odd input module Unmatched odd module reference 1x reference after 3x register
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STAT: Status
Code 34 35 36 40 41 42 43
Error BADDMYMOD NOT3XDMY NOT4XDMY DMYREAL1X REALDMY1X DMYREAL3X REALDMY3X
Meaning (Where the error has occurred) Dummy module reference already used 3x module not a dummy 4x module not a dummy Dummy, then real 1x module Real, then dummy 1x module Dummy, then real 3x module Real, then dummy 3x module
Status of Cable A Words 173 ... 175 are Cable A error words: Word 173
Bit 1 ... 8 9 ... 16
Function Counts framing errors Counts DMA receiver overruns
Word 174
Bit 1 ... 8 9 ... 16
Function Counts receiver errors Counts bad drop receptions
Word 175
Bit 1 2 3 ... 12 13 14 15 16
Function 1 = Short frame 1 = No end-of- frame Not used 1 = CRC error 1 = Alignment error 1 =Overrun error Not used
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1011
STAT: Status
Status of Cable B Words 176 ... 178 are Cable A error words: Word 176
Bit 1 ... 8 9 ... 16
Function Counts framing errors Counts DMA receiver overruns
Word 177
Bit 1 ... 8 9 -...16
Function Counts receiver errors Counts bad drop receptions
Word 178
Bit 1 2 3 ... 12 13 14 15 16
Function 1 = Short frame 1 = No end-of- frame Not used 1 = CRC error 1 = Alignment error 1 =Overrun error Not used
Status of Global Communication (Words 179 ... 181) Word 179 displays global communication status:
Bit 1 2 3
Function 1 = Comm health 1 = Cable A status 1 = Cable B status
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STAT: Status
Bit 4 5 ... 8 9 ... 16
Function Not used Lost communication counter Cumulative retry counter
Word 180 is the global cumulative error counter for Cable A:
Bit 1 ... 8 9 ... 162
Function Counts detected errors Counts No responses
Word 181 is the global cumulative error counter for Cable B:
Bit 1 ... 8 9 ... 162
Function Counts detected errors Counts No responses
Status of Remote I/O (Words 182 ... 277) Words 182 ... 277 are used to describe remote I/O drop status; three status words are used for each drop. The first word in each group of three displays communication status for the appropriate drop:
Bit 1 2 3 4 5 ... 8 9 ... 16
Function 1 = Communication health 1 = Cable A status 1 = Cable B status Not used Lost communication counter Cumulative retry counter
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1013
STAT: Status
The second word in each group of three is the drop cumulative error counter on Cable A for the appropriate drop:
Bit 1 ... 8 9 ... 162
Function At least one error in words 173 ...175 Counts No responses
The third word in each group of three is the drop cumulative error counter on Cable B for the appropriate drop:
Bit 1 ... 8 9 ... 162
Function At least one error in words 176 ...178 Counts No responses
NOTE: For PLCs where drop 1 is reserved for local I/O, status words 182 ... 184 are used as follows: Word 182 displays local drop status:
Bit 1 2 ... 8 9 ... 162
Function 1 = All modules healthy Always 0 Number of times a module has been seen as unhealthy; counter rolls over at 255
Word 183 is a 16-bit error counter, which indicates the number of times a module has been accessed and found to be unhealthy. Rolls over at 65535. Word 184 is a 16-bit error counter, which indicates the number of times a communication error occurred while accessing an I/O module. Rolls over at 65535.
1014
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STAT: Status
Controller Status Words 1 - 11 for TSX Compact and Atrium

CPU Status (Word 1) Word 1 displays the following aspects of the CPU status:
Bit 1-5 6 7 8 9 10 11 12 13 - 16
Function Not used 1 = enable constant sweep 1 = enable single sweep delay 1 = 16 bit user logic 0 = 24 bit user logic 1 = AC power on 1 = RUN light OFF 1 = memory protect OFF 1 = battery failed Not used
Word 2 This word is not used. Controller Status (Word 3) Word 3 displays aspects of the controller status:
Bit 1 2 3 4 5 - 12 13 - 16
Function 1 = first scan 1 = start command pending 1 = scan time has exceed constant scan target 1 = existing DIM AWARENESS Not used Single sweeps
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1015
STAT: Status
CPU Stop State (Word 5) Word 5 displays the CPUs stop state conditions:
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 16
Function 1 = peripheral port stop 1 = XMEM parity error 1 = DIM AWARENESS 1 = illegal peripheral intervention 1 = invalid segment scheduler 1 = no start-of-network (SON) at the start of a segment 1 = state RAM test failed 1 = no end of logic (EOL), (bad Tcop) 1 = watch dog timer has expired 1 = real time clock error 1 = CPU failure Not used 1 = invalid node in ladder logic 1 = logic checksum error 1 = coil disabled in RUN mode 1 = bad PLC setup
Number of Segments in program (Word 6) Word 6 displays the number of segments in ladder logic; a binary number is shown. This word is confirmed during power up to be the number of EOS (DOIO) nodes plus 1 (for the end of logic nodes), if untrue, a stop code is set, causing the run light to be off:
Bit 1 - 16
Function Number of segments in the current ladder logic program (expressed as a decimal number)
1016
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STAT: Status
Address of the End of Logic Pointer (Word 7) Word 7 displays the address of the end-of-logic (EOL) pointer:
Bit 1 - 16
Function EOL pointer address
Word 8, Word 9 These words are not used. RUN/LOAD/DEBUG Status (Word 10) Word 10 uses its two least significant bits to display RUN/LOAD/DEBUG status:
Bit 1 ... 14 15, 16
Function Not used 0 0 = Debug (0 dec) 0 1 = Run (1 dec) 1 0 = Load (2 dec)
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1017
STAT: Status
I/O Module Health Status Words 12 - 15 for TSX Compact

TSX Compact I/O Module Health Words 12 ... 15 are used to display the health of the A120 I/O modules in the four racks:
Word 12 13 14 15 Rack No. 1 2 3 4
Each word contains the health status of up to five A120 I/O modules. The most significant (left-most) bit represents the health of the module in Slot 1 of the rack:
Bit 1 2 3 4 5 6 ... 16
Function 1 = Slot 1 1 = Slot 2 1 = Slot 3 1 = Slot 4 1 = Slot 5 Not used
If a module is I/O Mapped and ACTIVE, the bit will have a value of "1". If a module is inactive or not I/O Mapped, the bit will have a value of "0". NOTE: Slots 1 and 2 in Rack 1 (Word 12) are not used because the controller itself uses those two slots.
1018
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STAT: Status
Global Health and Communications Retry Status Words 182 ... 184 for TSX Compact
Overview There are three words that contain health and communication information on the installed I/O modules. If monitored with the Stat block, they are found in Words 182 through 184. This requires that the length of the Stat block is a minimum of 184 (Words 16 through 181 are not used). Words 16 ... 181 These words are not used. Health Status (Word 182) Word 182 increments each time a module becomes bad. After a module becomes bad, this counter does not increment again until that module becomes good and then bad again.
Bit 1 2 ... 9 10 ... 16
Function 1 = All modules healthy Not used "Module went unhealthy" counter
I/O Error Counter (Word 183) This counter is similar to the above counter, except this word increments every scan that a module remains in the bad state. PAB Bus Retry Counter (Word 184) Diagnostics are performed on the communications through the bus. This word should normally be all zeroes. If after 5 retries, a bus error is still detected, the controller will stop and error code 10 will be displayed. An error could occur if there is a short in the backplane or from noise. The counter rolls over while running. If the retries are less than 5, no bus error is detected.
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1019
STAT: Status
1020
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SU16: Subtract 16 Bit 31007523 8/2010
SU16: Subtract 16 Bit
170
Introduction This chapter describes the instruction SU16. What's in this Chapter? This chapter contains the following topics:
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1021
Short Description
Function Description The SU16 instruction performs a signed or unsigned 16-bit subtraction (value 1 value 2) on the top and middle node values, then posts the signed or unsigned difference in a 4x holding register in the bottom node.
1022
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Representation

Parameters Top input Bottom input value 1 (top node) value 2 (middle node) difference (bottom node) Top output Middle output Bottom output State RAM Reference 0x, 1x 0x, 1x 3x, 4x Data Type None None INT, UINT Meaning ON = enables value 1 - value 2 ON = signed operation OFF = unsigned operation Minuend, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register Subtrahend, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register Difference ON = value 1 > value 2 ON = value 1 = value 2 ON = value 1 < value 2
3x, 4x
INT, UINT
4x 0x 0x 0x
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1023
1024
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SUB: Subtraction 31007523 8/2010
SUB: Subtraction
171
Introduction This chapter describes the instruction SUB. What's in this Chapter? This chapter contains the following topics:
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1025
SUB: Subtraction
Short Description
Function Description The SUB instruction performs a signed or unsigned 16-bit subtraction (value 1 value 2) on the top and middle node values, then posts the signed or unsigned difference in a 4x holding register in the bottom node. NOTE: SUB is often used as a comparator where the state of the outputs identifies whether value 1 is greater than, equal to, or less than value 2.
1026
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SUB: Subtraction
Representation

Parameters Top input value 1 (top node) State RAM Reference 0x, 1x 3x, 4x Data Type None INT, UINT Meaning ON = enables value 1 - value 2 Minuend, can be displayed explicitly as an integer or stored in a register Max. 255 16-bit PLC Max. 999 24-bit PLC Max. 65535-785L Subtrahend, can be displayed explicitly as an integer or stored in a register Max. 255 16-bit PLC Max. 999 24-bit PLC Max. 65535-785L Difference ON = value 1 > value 2 ON = value 1 = value 2 ON = value 1 < value 2
3x, 4x
INT, UINT
difference (bottom node) Top output Middle output Bottom output
4x 0x 0x 0x
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1027
SUB: Subtraction
1028
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SWAP - VME Bit Swap 31007523 8/2010
SWAP - VME Bit Swap
172
Introduction This chapter describes the instruction SWAP. What's in this Chapter? This chapter contains the following topics:
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1029
SWAP - VME Bit Swap
Short Description
Function Description The SWAP block allows the user to issue one of three different swap commands: swap high and low bits of a 16-bit word swap high and low words of a 32-bit double word swap (reverse) bits within a register's low byte NOTE: Available only on the Quantum VME-424/X controller.
1030
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SWAP - VME Bit Swap
Representation

Parameters Top input value (top node) State RAM Reference 0x, 1x Data Type None INT, UINT, WORD Meaning ON enables SWAP operation Contains a constant from 1 to 3, which specifies what type of swap to perform: 1. Swap high and low bits of a 16-bit word. 2. Swap high and low words of a 32-bit double word. 3. Swap (reverse) bits within a register's low byte. Contains the register on which the swap is to be performed Contains a constant that indicates how many registers are to be swapped, starting with the source register. Echoes the state of the top input Error Swap completed successfully
register (middle node) # of registers (bottom node) Top output Middle output Bottom output
3x, 4x
INT, UINT, WORD INT, UINT, WORD
0x 0x 0x
None None None
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1031
SWAP - VME Bit Swap
1032
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T --> R: Table to Register 31007523 8/2010
T --> R Table to Register
174
Introduction This chapter describes the instruction TR. What's in this Chapter? This chapter contains the following topics:
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1033
T --> R: Table to Register
Short Description
Function Description The TR instruction copies the bit pattern of a register or 16 contiguous discretes in a table to a specific holding register. It can accommodate the transfer of one register per scan. It has three control inputs and produces two possible outputs.
1034
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Representation

Parameters Top input Middle input (see page 1036) Bottom input (see page 1036) source table (top node) State RAM Data Type Meaning Reference 0x, 1x 0x, 1x 0x, 1x 0x, 1x, 3x, 4x None None None ON = copies source data and increments the pointer value ON = freezes the pointer value ON = resets the pointer value to zero
INT, UINT, First register or discrete reference in the source table. A register WORD or string of contiguous discretes from this table will be copied in a scan. INT, UINT INT, UINT Pointer to the destination where the source data will be copied Length of the source table: number of registers that may be copied; range: 1 ... 999 Length: Max. 255 16-bit PLC Max. 999 24-bit PLC Echoes the state of the top input ON = pointer value = table length (instruction cannot increment any further) 1035
pointer (see page 1036) 4x (middle node) table length (bottom node)
0x 0x
None None
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Middle Input When the middle input goes ON, the current value stored in the pointer register is frozen while the DX operation continues. This causes the same table data to be written to the destination register on each scan. Bottom Input When the bottom input goes ON, the value in the pointer is reset to zero. This causes the next DX move operation to copy the first destination register in the table. Pointer (Middle Node) The 4x register entered in the middle node is a pointer to the destination where the source data will be copied. The destination register is the next contiguous 4x register after the pointer. For example, if the middle node displays a pointer of 400100, then the destination register for the TR copy is 400101. The value stored in the pointer register indicates which register in the source table will be copied to the destination register in the current scan. A value of 0 in the pointer indicates that the bit pattern in the first register of the source table will be copied to the destination; a value of 1 in the pointer register indicates that the bit pattern in the second register of the source table will be copied to the destination register; etc.
1036
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TTR - Table to Register 31007523 8/2010
TTR - Table to Register
173
Introduction This chapter describes the instruction TTR. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation: TTR - Table to Register Page 1038 1039
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1037
Short Description
Function Description The Table to Register block is one of four 484-replacement instructions. It copies the contents of a source (input or holding) register to a holding register implied by the constant in the bottom node. This source register is pointed to by the input or holding register specified in the top node. Only one such operation can be accommodated by the system in each scan. NOTE: Available only on the 984-351 and 984-455.
1038
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Representation: TTR - Table to Register


Parameters Top input source (top node) State RAM Reference 0x, 1x 3x, 4x Data Type None INT, UINT Meaning Control source The source node (top node) contains the source register address. The data located in the source register address will be copied to the destination address, which is determined by the destination offset pointer. The pointer is a 3xxxx or 4xxxx whose contents indicate the source. A value of 1 to 254 indicates a holding register (40001 40254) and a value of 801 to 832 indicates an input register (30001 - 30032). If the value is outside this range, the operation is not performed and the ERROR rail is powered. Passes power when top input receives power Pointer value out of range
destination (bottom node)
(1 ... 254) (801 ... 824)
INT, UINT
0x 0x
None None
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1039
1040
31007523 8/2010
T --> T: Table to Table 31007523 8/2010
T --> T: Table to Table
175
Introduction This chapter describes the instruction TT. What's in this Chapter? This chapter contains the following topics:
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1041
Short Description
Function Description The TT instruction copies the bit pattern of a register or of 16 discretes from a position within one table to an equivalent position in another table of registers. It can accommodate the transfer of one register per scan. It has three control inputs and produces two possible outputs.
1042
31007523 8/2010
Representation
*Available on the following E685/785 PLCs L785 PLCs Quantum Series PLCs
31007523 8/2010
1043

Parameters Top input Middle input (see page 1045) Bottom input (see page 1045) source table (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 0x, 1x, 3x, 4x Data Type None None None INT, UINT, WORD Meaning ON = copies source data and increments the pointer value ON = freezes the pointer value ON = resets the pointer value to zero First register or discrete reference in the source table. A register or string of contiguous discretes from this table will be copied in a scan. Pointer into both the source and destination table Length of the source and the destination table (must be equal in length) Range: Max. 255 16-bit PLC Max. 999 24-bit PLC Max. 65535 785L Echoes the state of the top input ON = pointer value = table length (instruction cannot increment any further)
pointer (see page 1045) (middle node) table length (bottom node)
4x
INT, UINT
INT, UINT
0x 0x
None None
1044
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Middle Input When the input to the middle node goes ON, the current value stored in the pointer register is frozen while the DX operation continues. This causes new data being copied to the destination to overwrite the data copied on the previous scan. Bottom Input When the input to the bottom node goes ON, the value in the pointer register is reset to zero. This causes the next DX move operation to copy source data into the first register in the destination table. Pointer (Middle Node) The 4x register entered in the middle node is a pointer into both the source and destination tables, indicating where the data will be copied from and to in the current scan. The first register in the destination table is the next contiguous 4x register following the pointer. For example, if the middle node displays a a pointer reference of 400100, then the first register in the destination table is 400101. The value stored in the pointer register indicates which register in the source table will be copied to which register in the destination table. Since the length of the two tables is equal and TT copy is to the equivalent register in the destination table, the current value in the pointer register also indicates which register in the destination table the source data will be copied to. A value of 0 in the pointer register indicates that the bit pattern in the first register of the source table will be copied to the first register of the destination table; a value of 1 in the pointer register indicates that the bit pattern in the second register of the source table will be copied to the second register of the destination register; etc.
31007523 8/2010
1045
1046
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T.01 Timer: One Hundredth Second Timer 31007523 8/2010
T.01 Timer: One Hundredth of a Second Timer
176
Introduction This chapter describes the instruction T.01 timer. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
1047
T.01 Timer: One Hundredth Second Timer
Short Description
Function Description The T.01 instruction measures time in hundredth of a second intervals. It can be used for timing an event or creating a delay. T.01 has two control inputs and can produce one of two possible outputs.
1048
31007523 8/2010
Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning OFF ON = initiates the timer operation: time accumulates in hundredths-of-asecond when top and bottom input are ON OFF = accumulated time reset to 0 ON = timer accumulating Preset value (number of hundredth-of-asecond increments), can be displayed explicitly as an integer or stored in a register Range: Max. 255 16-bit PLC Max. 999 24-bit PLC Max. 65535 785L Accumulated time count in hundredth-ofa-second increments. ON = accumulated time = timer preset ON = accumulated time < timer preset
Bottom input timer preset (top node)
0x, 1x 3x, 4x
None INT, UINT
accumulated time (bottom node) Top output Bottom output
4x
INT, UINT
0x 0x
None None
31007523 8/2010
1049
1050
31007523 8/2010
T0.1 Timer: One Tenth Second Timer 31007523 8/2010
T0.1 Timer: One Tenth Second Timer
177
Introduction This chapter describes the instruction T0.1 timer. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
1051
Short Description
Function Description The T0.1 instruction measures time in tenth-of-a-second increments. It can be used for timing an event or creating a delay. T0.1 has two control inputs and can produce one of two possible outputs. NOTE: If you cascade T0.1 timers with presets of 1, the timers will time-out together; to avoid this problem, change the presets to 10 and substitute a T.01 timer (see page 1047).
1052
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Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning OFF ON = initiates the timer operation: time accumulates in tenth-of-a-second when top and bottom input are ON OFF = accumulated time reset to 0 ON = timer accumulating Preset value (number of tenth-of-a-second increments), can be displayed explicitly as an integer or stored in a register Range: Max. 255 16-bit PLC Max. 999 24-bit PLC Max. 65535 785L Accumulated time count in tenth-of-asecond increments. ON = accumulated time = timer preset ON = accumulated time < timer preset
0x, 1x 3x, 4x
None INT, UINT
4x
INT, UINT
0x 0x
None None
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1053
1054
31007523 8/2010
T1.0 Timer: One Second Timer 31007523 8/2010
T1.0 Timer: One Second Timer
178
Introduction This chapter describes the instruction T1.0 timer. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
1055
Short Description
Function Description The T1.0 timer instruction measures time in one-second increments. It can be used for timing an event or creating a delay. T1.0 has two control inputs and can produce one of two possible outputs. NOTE: If you cascade T1.0 timers with presets of 1, the timers will time-out together; to avoid this problem, change the presets to 10 and substitute a T0.1 timer (see page 1051).
1056
31007523 8/2010
Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning OFF ON = initiates the timer operation: time accumulates in seconds when top and bottom input are ON OFF = accumulated time reset to 0 ON = timer accumulating Preset value (number of one second increments), can be displayed explicitly as an integer or stored in a register Range: Max. 255 16-bit PLC Max. 999 24-bit PLC Max. 65535 785L Accumulated time count in one-second increments. ON = accumulated time = timer preset ON = accumulated time < timer preset
0x, 1x 3x, 4x
None INT, UINT
4x
INT, UINT
0x 0x
None None
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1057
1058
31007523 8/2010
T1MS Timer: One Millisecond Timer 31007523 8/2010
T1MS Timer: One Millisecond Timer
179
Introduction This chapter describes the instruction T1MS timer. What's in this Chapter? This chapter contains the following topics:
31007523 8/2010
1059
Short Description
Function Description The T1MS timer instruction measures time in one-millisecond increments. It can be used for timing an event or creating a delay. NOTE: The T1MS instruction is available only on the B984-102, the Micro 311, 411, 512, and 612, and the Quantum 424 02.
1060
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Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning ON = initiates the timer operation: time accumulates in milliseconds when top and middle input are ON OFF = accumulated time reset to 0 ON = timer accumulating Preset value (number of millisecond increments the timer can accumulate), can be displayed explicitly as an integer (range 1 ... 999) or stored in a register Accumulated time count in millisecond increments. Constant value of #1 ON = accumulated time = timer preset ON = accumulated time < timer preset
Middle input timer preset (top node)
0x, 1x 3x, 4x
None INT, UINT
accumulated time (middle node) #1 (bottom node) Top output Middle output
4x
INT, UINT
INT, UINT 0x 0x None None
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1061
Example
A Millisecond Timer Example Here is the ladder logic for a real-time clock with millisecond accuracy:
The T1MS instruction is programmed to pass power at 100 ms intervals; it is followed by a cascade of four up-counters (see page 1077) that store the time respectively in hundredth-of-a-second units, tenth-of-a-second units, one- second units, one-minute units, and one-hour units. When logic solving begins, the accumulated time value begins incrementing in register 40055 of the T1MS block. After 100 one-ms increments, the top output passes power and energizes coil 00001. At this point, the value in register 40055 in the timer is reset to 0. The accumulated count value in register 40054 in the first UCTR block increments by 1, indicating that 100 ms have passed. Because the accumulated time count in T1MS no longer equals the timer preset, the timer begins to re-accumulate time in ms. When the accumulated count in register 40054 of the first UCTR instruction increments to 10, the top output from that instruction block passes power and energizes coil 00002. The value in register 40054 then resets to 0, and the accumulated count in register 40053 of the second UCTR block increments by 1.
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As the times accumulate in each counter, the time of day can be read in five holding registers as follows:
Register 40055 40054 40053 40052 40051 Unit of Time Thousandths-of-a-second Tenths-of-a-second Seconds Minutes Hours Valid Range 0 ... 100 0 ... 10 0 ... 60 0 ... 60 0 ... 24
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1063
1064
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TBLK: Table to Block 31007523 8/2010
TBLK: Table to Block
180
Introduction This chapter describes the instruction TBLK. What's in this Chapter? This chapter contains the following topics:
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1065
Short Description
Function Description The TBLK (table-to-block) instruction combines the functions of TR (see page 1033) and the BLKM (see page 93) in a single instruction. In one scan, it can copy up to 100 contiguous 4x registers from a table to a destination block. The destination block is of a fixed length. The block of registers being copied from the source table is of the same length, but the overall length of the source table is limited only by the number of registers in your system configuration.
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Representation
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1067

Parameters Top input Middle input (see page 1069) State RAM Reference 0x, 1x 0x, 1x Data Type None None Meaning ON = initiates move operation ON = hold pointer The inputs to the middle and bottom node can be used to control the value in the pointer so that size of the source table can be controlled. Important: You should use external logic in conjunction with the middle or bottom input to confine the value in the destination pointer to a safe range. When the input to the middle node is ON, the value in the pointer register is frozen while the TBLK operation continues. This causes the same source data block to be copied to the destination table on each scan. ON = reset pointer to zero
Bottom input (see page 1069) source table (see page 1069) (top node)
0x, 1x 4x
None
First holding register in the source table INT, UINT, The 4xxxx register entered in the top node is the WORD first holding register in the source table. Note: The source table is segmented into a series of register blocks, each of which is the same length as the destination block. Therefore, the size of the source table is a multiple of the length of the destination block, but its overall size is not specifically defined in the instruction. If left uncontrolled, the source table could consume all the 4xxxx registers available in the PLC configuration. INT, UINT INT, UINT Pointer to the source block, destination block
pointer (see page 1069) (middle node) block length (bottom node) Top output Middle output
4x
Number of registers of the destination block and of the blocks within the source table; range: 1 ... 100 ON = move successful ON = error / move not possible
0x 0x
None None
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Middle Input When the middle input is ON, the value in the pointer register is frozen while the TBLK operation continues. This causes the same source data block to be copied to the destination table on each scan. Bottom Input
CAUTION
Confine the value in the destination pointer to a safe range. You should use external logic in conjunction with the middle and the bottom inputs to confine the value in the destination pointer to a safe range. Failure to follow these instructions can result in injury or equipment damage. When the bottom input is ON, the pointer value is reset to zero. This causes the TBLK operation to copy data from the first block of registers in the source table.
Source Table (Top Node) The 4x register entered in the top node is the first holding register in the source table. NOTE: The source table is segmented into a series of register blocks, each of which is the same length as the destination block. Therefore, the size of the source table is a multiple of the length of the destination block, but its overall size is not specifically defined in the instruction. If left uncontrolled, the source table could consume all the 4x registers available in the PLC configuration. Pointer (Middle Node) The 4x register entered in the middle node is the pointer to the source block. The first register in the destination block is the next contiguous register after the pointer. For example, if the pointer is register 400107, then the first register in the destination block is 400108. The value stored in the pointer indicates which block of data from the source table will be copied to the destination block. This value specifies a block number within the source table.
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1069
1070
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1071
1072
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TEST: Test of 2 Values 31007523 8/2010
TEST: Test of 2 Values
181
Introduction This chapter describes the instruction TEST. What's in this Chapter? This chapter contains the following topics:
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1073
Short Description
Function Description The TEST instruction compares the signed or unsigned size of the 16-bit values in the top and middle nodes and describes the relationship via the block outputs.
1074
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Representation

Parameters Top input Bottom input value 1 (top node) value 2 (middle node) 1 (bottom node) Top output Middle output Bottom output 0x 0x 0x State RAM Reference 0x, 1x 0x, 1x 3x, 4x Data Type None None INT, UINT Meaning ON = compares value 1 and value 2 ON = signed operation OFF = unsigned operation Value 1, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register Value 2, can be displayed explicitly as an integer (range 1 ... 65 535) or stored in a register Constant value, cannot be changed ON = value 1 > value 2 ON = value 1 = value 2 ON = value 1 < value 2
3x, 4x
INT, UINT
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1075
1076
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UCTR: Up Counter 31007523 8/2010
UCTR: Up Counter
182
Introduction This chapter describes the instruction UCTR. What's in this Chapter? This chapter contains the following topics:
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1077
UCTR: Up Counter
Short Description
Function Description The UCTR instruction counts control input transitions from OFF to ON up from zero to a counter preset value.
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UCTR: Up Counter
Representation
*Available on the following E685/785 PLCs L785 PLCs Quantum Series PLCs Parameter Description Description of the instructions parameters
Parameters Top input Bottom input counter preset (top node) State RAM Reference 0x, 1x 0x, 1x 3x, 4x Data Type None None INT, UINT Meaning OFF ON = initiates the counter operation OFF = reset accumulator to 0 ON = counter accumulating Preset value, can be displayed explicitly as an integer or stored in a register Preset value: Max. 255 16-bit PLC Max. 999 24-bit PLC Max. 65535 785L Count value (actual value); which increments by one on each transition from OFF to ON of the top input until it reaches the specified counter preset value. ON = accumulated count = counter preset ON = accumulated count < counter preset 1079
accumulated count (bottom node) Top output Bottom output

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4x
INT, UINT
0x 0x
None None
UCTR: Up Counter
1080
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VMER - VME Read 31007523 8/2010
VMER - VME Read
183
Introduction This chapter describes the instruction VMER. What's in this Chapter? This chapter contains the following topics:
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1081
VMER - VME Read
Short Description
Function Description The VME Read block allows the user to read data from devices on the VME bus. If Byte Swap is active, the high byte is exchanged with the low byte of a word after it is read from the VME bus. If Word Swap is enabled, the upper word is exchanged with the lower word of a double after it is read. An error will occur if both inputs are enabled at once. NOTE: Available only on the Quantum VME-424/X controller.
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VMER - VME Read
Representation

Parameters Top input Middle input Bottom input register (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 4x Data Type None None None INT, UINT, WORD Meaning ON enables read ON = byte swap ON = word swap There are five control registers in the top node. They are allotted as follows: 4x - VME Address modifier code (39, 3A, 3D, 3E, 29, or 2D 4x+1 to 4x+4 - The VME Control Block (For expanded and detailed information please see the table named VME Control Block, page 1084.) A pointer to the first destination register. (For expanded and detailed information please see the table named Error Code Status, page 1084.) A constant specifying the number of destination registers to which data is transferred. This constant can be from 1 to 255. ON when the top input receives power ON When an error occurs On when the read is complete
pointer (middle node) value (bottom node) Top output Middle output Bottom output
4x
INT, UINT WORD INT, UINT WORD
0x 0x 0x
None None None
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1083
VMER - VME Read
VME Control Block This is the VME control block.
Register Displayed First implied Second implied Third implied Fourth implied Description VME Address modifier code Error code status Please see Error Code Status Table Length of data to be read/written VME Device address (low byte) VME Device address (high byte)
Error Code Status This is the Error Code Status table.

Error 01 02 03 04 05 06 07 08 09 10 11 Description Bad word count. Must be an even number of words Bad length, greater than 255 Bad data length. Length was 0 or greater than 255 Bad address modifier in first control block Bad command in top node of SWAP block Bad VME bus interface VME bus address doesnt exist VME 486 timeout ME bus interface has not been configured Both BYTE and WORD swap inputs have been selected Match the type implied by the AM code (A16 or A2)
1084
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VMEW - VME Write 31007523 8/2010
VMEW - VME Write
184
Introduction This chapter describes the instruction VMEW. What's in this Chapter? This chapter contains the following topics:
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1085
VMEW - VME Write
Short Description
Function Description The VME Write block allows the user to write data to devices on the VME bus. If BYTE SWAP is active, the high byte is exchanged with the low byte of a word before it is written to the VME bus. If WORD SWAP is active, the upper word is exchanged with the lower word of a double before it is written. An error will occur if both inputs are enabled at once. NOTE: Available only on the Quantum VME-424/X controller.
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VMEW - VME Write
Representation

Parameters Top input Middle input Bottom input register (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 4x Data Type None None None INT, UINT WORD Meaning
pointer (middle node) value (bottom node) Top output Middle output Bottom output
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3x, 4x
0x 0x 0x
ON enables read ON = byte swap ON = word swap There are five control registers in the top node. They are allotted as follows: 4x - High Byte: VME Address modifier code (39, 3A, 3D, 3E, 29, or 2D 4x - Low Byte: Data bus size 4x + 1 to 4x + 4 - The VME Control Block (For expanded and detailed information please see the table named VME Control Block, page 1088.) INT, UINT A pointer to the first destination register. WORD (For expanded and detailed information please see the table named Error Code Status, page 1088.) INT, UINT A constant specifying the number of destination registers to which data WORD is transferred. This can be from 1 to 255. None ON when the top input receives power Passes power when top input receives power None ON when an error occurs None ON when write is complete 1087
VMEW - VME Write
VME Control Block This is the VME control block.
Register Displayed First implied Second implied Third implied Fourth implied Description VME Address modifier code Error code status Please see Error Code Status Table Length of data to be read/written VME Device address (low byte) VME Device address (high byte)
Error Code Status This is the Error Code Status table.

Error 01 02 03 04 05 06 07 08 09 10 11 Description Bad word count. Must be an even number of words Bad length, greater than 255 Bad data length. Length was 0 or greater than 255 Bad address modifier in first control block Bad command in top node of SWAP block Bad VME bus interface VME bus address doesnt exist VME 486 timeout ME bus interface has not been configured Both BYTE and WORD swap inputs have been selected Match the type implied by the AM code (A16 or A2)
1088
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WRIT: Write 31007523 8/2010
WRIT: Write
185
Introduction This chapter describes the instruction WRIT. What's in this Chapter? This chapter contains the following topics:
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1089
WRIT: Write
Short Description
Function Description The WRIT instruction sends a message from the PLC over the RIO communications link to an ASCII display (screen, printer, etc.). In the process of sending the messaging operation, WRIT performs the following functions: Verifies the correctness of the ASCII communication parameters, e.g. the port number, the message number Verifies the lengths of variable data fields Performs error detection and recording Reports RIO interface status WRIT requires two tables of registers: a source table where variable data (the message) is copied, and a control block where comm port and message parameters are identified. Further information about formatting messages you will find in Formatting Messages for ASCII READ/WRIT Operations, page 57.
1090
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WRIT: Write
Representation

Parameters Top input Middle input Bottom input source (see page 1092) (top node) control block (see page 1092) (middle node) table length (bottom node) Top output Middle output Bottom output 0x 0x 0x State RAM Data Type Meaning Reference 0x, 1x 0x, 1x 0x, 1x 3x, 4x 4x None None None ON = initiates a WRIT ON = pauses WRIT operation ON = abort WRIT operation
INT, UINT, Source table WORD INT, UINT, ASCII Control block (first of seven contiguous holding registers) WORD (For expanded and detailed information please see the section Control Block (Middle Node), page 1092.) INT, UINT None None None Length of source table (number of registers where the message data will be stored), range: 1 ... 255 Echoes the state of the top input ON = error in communication or operation has timed out (for one scan) ON = WRIT complete (for one scan)
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1091
WRIT: Write
Source Table (Top Node) The top node contains the first 3x or 4x register in a source table whose length is specified in the bottom node. This table contains the data required to fill the variable field in a message. Consider the following WRIT message
The 3-character ASCII field III is the variable data field; variable data are loaded, typically via DX moves, into a table of variable field data. Control Block (Middle Node) The 4x register entered in the middle node is the first of seven contiguous holding register in the control block.
Register Displayed First implied Second implied Third implied Fourth implied Fifth implied Sixth implied Definition Port Number and Error Code, page 1093 Message number Number of registers required to satisfy format Count of the number of registers transmitted thus far Status of the solve Reserved Checksum of registers 0 ... 5
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WRIT: Write
Port Number and Error Code Port Number and Error Code
Bit 1 ... 4 5 6 7 8 9 10 11 12 ... 16
Function PLC error code (see table below) Not used Input from the ASCII device not compatible with format Input buffer overrun, data received too quickly at RIOP USART error, bad byte received at RIOP Illegal format, not received properly by RIOP ASCII device off-line, check cabling ASCII message terminated early (in keyboard mode Comm port # (1 ... 32)
PLC Error Code

Bit 1 0 0 0 0 0 0 0 1 1 1 1 1 1 1 2 0 0 0 1 1 1 1 0 0 0 0 1 1 1 3 0 1 1 0 0 1 1 0 0 1 1 0 0 1 4 1 0 1 0 1 0 1 0 1 0 1 0 1 1 Error in the input to RIOP from ASCII device Exception response from RIOP, bad data Sequenced number from RIOP differs from expected value User register checksum error, often caused by altering READ registers while the block is active Invalid port or message number detected User-initiated abort, bottom input energized No response from drop, communication error Node aborted because of SKP instruction Message area scrambled, reload memory Port not configured in the I/O map Illegal ASCII request Unknown response from ASCII port Illegal ASCII element detected in user logic RIOP in the PLC is down Meaning
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1093
WRIT: Write
1094
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XMIT - Transmit 31007523 8/2010
XMIT - Transmit
186
Introduction This chapter describes the instruction XMIT - Transmit. What's in this Chapter? This chapter contains the following topics:
Topic Short Description XMIT Modbus Functions Page 1096 1097
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XMIT - Transmit
Short Description
Function Description The XMIT (transmit) function block sends Modbus messages from a master PLC to multiple slave PLCs or sends ASCII character strings from the PLC's Modbus slave port#1 or port#2 to ASCII printers and terminals. XMIT sends these messages over telephone dial up modems, radio modems, or simply direct connection. For more detailed information on the XMIT function block, see the section named XMIT Modbus Functions, page 1097. XMIT comes with three modes: communication, port status, and conversion. These modes are described in the following sections. XMIT Communication Block, page 1103 XMIT Port Status Block, page 1115 XMIT Conversion Block, page 1123 XMIT performs general ASCII input functions in the communication mode including simple ASCII and terminated ASCII. You may use an additional XMIT block for reporting port status information into registers while another XMIT block performs the ASCII communication function. You may import and export ASCII or binary data into your PLC and convert it into various binary data or ASCII to send to DCE devices based upon the needs of your application. The block has built in diagnostics, which ensure no other XMIT blocks are active in the PLC. Within the XMIT block a control table allows you to control the communications link between the PLC and Data Communication Equipment (DCE) devices attached to Modbus port #1 or port#2 of the PLC. The XMIT block does not activate the port LED when it's transmitting data. NOTE: The Modbus protocol is a master/slave" protocol and designed to have only one master when polling multiple slaves. Therefore, when using the XMIT block in a network with multiple masters, contention resolution, and collision avoidance is your responsibility and may easily be addressed through ladder logic programming.
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XMIT - Transmit
XMIT Modbus Functions

At a Glance The XMIT function block supports the following Modbus function codes:. 01 ... 06 08 15 and 16 20 and 21 For Modbus messages, the MSG_OUT array has to contain the Modbus definition table. The Modbus definition table for Modbus function code: 01, 02, 03, 04, 05, 06, 15 and 16 is five registers long and you must set XMIT_SET.MessageLen to 5 for successful XMIT operation. The Modbus definition table is shown in the table below Modbus Function Codes 01...06 For Modbus messages, the MSG_OUT array has to contain the Modbus definition table. The Modbus definition table for Modbus function code: 01, 02, 03, 04, 05, 06, 15 and 16 is five registers long and you must set XMIT_SET.MessageLen to 5 for successful XMIT operation. The Modbus definition table is shown in the table below Modbus Definition Table Function Codes (01 ... 06, 15 and 16)
Content Modbus function code (MSG_OUT[1]) Description XMIT supports the following function codes: 01 = Read multiple coils (0x) 02 = Read multiple discrete inputs (1x) 03 = Read multiple holding registers (4x) 04= Read multiple input registers (3x) 05 = Write single coil (0x) 06 = Write single holding registers (4x) 15 = Write multiple coils (0x) 16 = Write multiple holding registers (4x) Enter the amount of data you want written to the slave PLC or read from the slave PLC. For example, enter 100 to read 100 holding registers from the slave PLC or enter 32 to write 32 coils to a slave PLC. There is a size limitation on quantity that is dependent on the PLC model. Refer to Appendix A for complete details on limits. Enter the slave Modbus PLC address. Typically the Modbus address range is 1 ... 247. To send a Modbus message to multiple PLCs, enter 0 for the slave PLC address. This is referred to as Broadcast Mode. Broadcast Mode only supports Modbus function codes that writes data from the master PLC to slave PLCs. Broadcast Mode does NOT support Modbus function codes that read data from slave PLCs.
Quantity (MSG_OUT[2])
Slave PLC address (MSG_OUT[3])
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XMIT - Transmit
Content Slave PLC data area (MSG_OUT[4])
Description For a read command, the slave PLC data area is the source of the data. For a write command, the slave PLC data area is the destination for the data. For example, when you want to read coils (00300 ... 00500) from a slave PLC, enter 300 in this field. When you want to write data from a master PLC and place it into register (40100) of a slave PLC, enter 100 in this field. Depending on the type of Modbus command (write or read), the source and destination data areas must be as defined in the Source and Destination Data Areas table below. For a read command, the master PLC data area is the destination for the data returned by the slave. For a write command, the master PLC data area is the source of the data. For example, when you want to write coils (00016 ... 00032) located in the master PLC to a slave PLC, enter 16 in the field. When you want to read input registers (30001 ... 30100) from a slave PLC and place the data into the master PLC data area (40100 ... 40199), enter 100 in this field. Depending on the type of Modbus command (write or read), the source and destination data areas must be as defined in the Source and Destination Data Areas table below.
Master PLC data area (MSG_OUT[5])
Source and Destination Data Areas for Function Codes (01 ... 06, 15 and 16)
Function Code 03 (Read multiple 4x) 04 (Read multiple 3x) 01 (Read multiple 0x) 02 (Read multiple 1x) 16 (Write multiple 4x) 15 (Write multiple 0x) 05 (Write single 0x) 06 (Write single 4x) Master PLC Data Area 4x (destination) 4x (destination) 0x (destination) 0x (destination) 4x (source) 0x (source) 0x (source) 4x (source) Slave PLC Data Area 4x (source) 3x (source) 0x (source) 1x (source) 4x (destination) 0x (destination) 0x (destination) 4x (destination)
When you want to send 20 Modbus messages out of the PLC, you must transfer 20 Modbus definition tables one after another into MSG_OUT after each successful operation of XMIT, or you may program 20 separate XMIT blocks and then activate them one at a time through user logic.
1098
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XMIT - Transmit
Modbus Function Code (08) The Modbus definition table for Modbus function code: 08 is five registers long and you must you must set XMIT_SET.MessageLen to 5 for For Modbus messages, the MSG_OUT array has to contain the Modbus definition successful XMIT operation. The Modbus definition table is shown in the table below. Modbus Definition Table Function Codes (08)
Content Modbus function code (MSG_OUT[1]) Diagnostics (MSG_OUT[2]) Description XMIT supports the following function code: 08 = Diagnostics Enter the diagnostics subfunction code decimal value in this filed to perform the specific diagnostics function desired. The following diagnostic subfunctions are supported: Code Description 00 Return query data 01 Restart comm option 02 Return diagnostic register 03 Change ASCII input delimiter 04 Force listen only mode 05 ... 09 Reserved 10 Clear counters (& diagnostics registers in 384, 484) 11 Return bus messages count 12 Return bus comm error count 13 Return bus exception error count 14 ... 15 Not supported 16 Return slave NAK count 17 Return slave busy count 18 Return bus Char overrun count 19 ... 21 Not supported Enter the slave Modbus PLC address. Typically the Modbus address range is 1 ... 247. Function code 8 dose NOT support Broadcast Mode (Address 0) You must enter the decimal value needed for the data area of the specific diagnostic subfunction. For subfunctions 02, 04, 10, 11, 12, 13, 16, 17 and 18 this value is automatically set to zero. For subfunctions 00, 01, and 03 you must enter the desired data field value. For more details, refer to Modicon Modbus Protocol Reference Guide (PI-MBUS-300). For all subfunctions, the master PLC data area is the destination for the data returned by the slave. You must specify a 4x register that marks the beginning of the data area where the returned data is placed. For example, to place the data into the master PLC data area starting at (40100), enter 100 in this field. Subfunction 04 does NOT return a response. For more details, refer to Modicon Modbus Protocol Reference Guide (PI-MBUS-300).
Slave PLC address (MSG_OUT[3]) Diagnostics function data field content (MSG_OUT[4])
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XMIT - Transmit
Modbus Function Codes (20, 21) For Modbus messages, the MSG_OUT array has to contain the Modbus definition table. The Modbus definition table for Modbus function codes: 20 and 21 is six registers long and you must you must set XMIT_SET.MessageLen to 6 for successful XMIT operation. The Modbus definition table is shown in the table below. Modbus Definition Table Function Codes (20, 21)
Content Modbus function code (MSG_OUT[1]) Description XMIT supports the following function codes: 20 = Read general reference (6x) 21 = Write general reference (6x)
Quantity (MSG_OUT[2]) Enter the amount of data you want written to the slave PLC or read from the slave PLC. For example, enter 100 to read 100 holding registers from the slave PLC or enter 32 to write 32 coils to a slave PLC. There is a size limitation on quantity that is dependent on the PLC model. Refer to Appendix A for complete details on limits. Slave PLC address (MSG_OUT[3]) Slave PLC data area (MSG_OUT[4]) Enter the slave Modbus PLC address. Typically the Modbus address range is 1 ... 247. Function code 20 and 21 do NOT support Broadcast Mode (Address 0). For a read command, the slave PLC data area is the source of the data. For a write command, the slave PLC data area is the destination for the data. For example, when you want to read registers (600300 ... 600399) from a slave PLC, enter 300 in this field. When you want to write data from a master PLC and place it into register (600100) of a slave PLC, enter 100 in this field. Depending on the type of Modbus command (write or read), the source and destination data areas must be as defined in the Source and Destination Data Areas table below. The lowest extended register is addressed as register "zero" (600000). The lowest holding register is addressed as register "one" (400001). For a read command, the master PLC data area is the destination for the data returned by the slave. For a write command, the master PLC data area is the source of the data. For example, when you want to write registers (40016 ... 40032) located in the master PLC to 6x registers in a slave PLC, enter 16 in the filed. When you want to read 6x registers (600001 ... 600100) from a slave PLC and place the data into the master PLC data area (40100 ... 40199), enter 100 in this field. Depending on the type of Modbus command (write or read), the source and destination data areas must be as defined in the Source and Destination Data Areas table below. The lowest extended register is addressed as register "zero" (600000). The lowest holding register is addressed as register "one" (400001). Enter the file number for the 6x registers to be written to or read from. (1 ... 10) depending on the size of the extended register data area. 600001 is 60001 file 1 and 690001 is 60001 file 10 as viewed by the Reference Data Editor.
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File number (MSG_OUT[6])
1100
XMIT - Transmit
Source and Destination Data Areas for Function Codes (20, 21)
Function Code 20 (Read general reference 6x) 21 (Write general reference 6x) Master PLC Data Area 4x (destination) 4x (source) Slave PLC Data Area 6x (source) 6x (destination)
When you want to send 20 Modbus messages out of the PLC, you must transfer 20 Modbus definition tables one after another into MSG_OUT after each successful operation of XMIT, or you may program 20 separate XMIT blocks and then activate them one at a time through user logic.
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1101
XMIT - Transmit
1102
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XMIT Communication Block 31007523 8/2010
XMIT Communication Block
187
Introduction This chapter describes the instruction XMIT Communication Block. What's in this Chapter? This chapter contains the following topics:
Topic Short Description Representation Parameter Description Parameter Description Parameter Description Page 1104 1105 1107 1111 1113
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1103
Short Description
Function Description The purpose of the XMIT communication block is to receive and transmit ASCII messages and Modbus Master messages using your PLC ports. The XMIT instruction block will not operate correctly if: The NSUP and XMIT loadables are not installed The NSUP loadable is installed after the XMIT loadable The NSUP and XMIT loadables are installed in a Quantum PLC with an out-ofdate executive (older than version 2.10 or 2.12) For an overview of the XMIT instruction please see Short Description, page 1096.
1104
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Representation

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning ON begins an XMIT operation and START should remain ON until the operation has completed successfully or an error has occurred. ON aborts any active XMIT operation and forces the port to slave mode. The abort code (121) is placed into the fault status register. The port remains closed as long as this input is ON. Note: To reset an XMIT fault and clear the fault register, the top input must go OFF for at least one PLC scan.
Middle input
0x, 1x
None
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1105
Parameters port #0001 or #0002 (top node)
Data Type INT, UINT, WORD
Meaning The top node must contain one of the following constants either (#0001) to select PLC port #1, or (#0002) to select PLC port #2. Note: The loadable version DOES accept 4xxxx registers in the top node, whereas the built-in does NOT. The 4xxxx register entered in the middle node is the first in a group of sixteen (16) contiguous holding registers that comprise the control block, as shown in the Communication Control Table. (For expanded and detailed information on this node please see the Communication Control Table, page 1107 in the Parameter Description: Middle Node - XMIT Communication Block.) Important: DO NOT modify the address in the middle node of the XMIT block or delete the address from the block while the program is active. This action locks up the port preventing communications. The bottom node must contain a constant equal to (#0016). This is the number of registers used by the XMIT instruction. ON while an XMIT operation in progress. Passes power while an XMIT operation is in progress. ON when XMIT has detected an error or was issued an abort. Passes power when XMIT has detected an error or when an XMIT operation was aborted. ON for one scan only when an XMIT operation has been successfully completed. Passes power when an XMIT operation has been successfully completed. Note: The START input must remain ON until the OPERATION SUCCESSFUL has turned OFF.
register (middle node)
4x
INT, UINT, WORD
#0016 (bottom node) Top output 0x
INT, UINT, WORD None
Middle output
0x
None
Bottom output
0x
None
1106
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Communication Control Table This table represents the first in a group of 16 contiguous holding registers that comprise the control block.
Register 4xxxx Name Revision Number Description Displays the current revision number of XMIT block. This number is automatically loaded by the block and the block over writes any other number entered into this register. This field displays a fault code generated by the XMIT port status block. (For expanded and detailed information please see the Fault Status Table, page 1111 in the Parameter Description: XMIT Communication Block section). The XMIT block does not use this register. However, it may be used in ladder logic as a pointer. An efficient way to use the XMIT block is to place a pointer value of a TBLK instruction into this register. No Valid Entries Read Only
4xxxx + 1
Fault Status
Read Only
4xxxx + 2
Available to User
Read/Write
4xxxx + 3
Data Rate
Read/Write XMIT supports the following data rates: 50, 75, 110, 134, 150, 300, 600, 1200, 1800, 2000, 2400, 3600, 4800, 7200, 9600 and 19200. To configure a data rate, enter its decimal number into this field. When an invalid data rate is entered, the block displays an illegal configuration error (error code 127) in the Fault Status (4xxxx + 1) register. Read/Write XMIT supports the following data bits: 7 and 8. To configure a data bit size, enter its decimal number into this register. Note: Modbus messages may be sent in ASCII mode or RTU mode. ASCII mode requires 7 data bits, while RTU mode requires 8 data bits. When sending ASCII character message you may use either 7 or 8 data bits. When an invalid data bit is entered, the block displays an illegal configuration error (error code 127) in the Fault Status (4xxxx + 1) register.
4xxxx + 4
Data Bits
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1107
Register 4xxxx + 5
Name Parity Bits
Description XMIT supports the following parity: none, odd and even. Enter a decimal of either: 0 = no parity, 1 = odd parity, or 2 = even parity. When an invalid parity is entered, the block displays an illegal configuration error (error code 127) in the Fault Status (4xxxx + 1) register. XMIT supports one or two stop bits. Enter a decimal of either: 1 = one stop bit, or 2 = two stop bits. When an invalid stop bit is entered, the block displays an illegal configuration error (error code 127) in the Fault Status (4xxxx + 1) register. The XMIT block does not use this register. However, it may be used in ladder logic as a pointer. An efficient way to use the XMIT block is to place a pointer value of a TBLK instruction into this register.
No Valid Entries Read/Write
4xxxx + 6
Stop Bits
Read/Write
4xxxx + 7
Available to User
Read/Write
4xxxx + 8
Command Word
Read/Write (16-digit binary number) The XMIT interprets each bit of the command word as a function to perform. If bit 7 and 8 are on simultaneously or if any two or more of bits 13, 14, 15 or 16 are on simultaneously or if bit 7 is not on when bits 13, 14, 15, or 16 are on error 129 will be generated. For expanded and detailed information please see the Command Word Communication Functions Table, page 1113 in the Parameter Description: XMIT Communications Block section.
1108
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Register 4xxxx + 9
Name Message Pointer Word
Description
No Valid Entries
Read/Write (message pointer) Values are limited by the range of 4x registers configured. The message table consists of either ASCII characters For ASCII character strings, the pointer is the register offset to the first register of the ASCII character string. Each register holds up to two ASCII characters. Each ASCII string may be up to 1024 characters in length. For example, when you want to send 10 ASCII messages out of the PLC, you must program 10 ASCII characters strings into 4xxxx registers of the PLC and then through ladder logic set the pointer to the start of each message after each successful operation of XMIT. Modbus Function Codes For expanded and detailed information please see the section XMIT Modbus Functions, page 1097 Enter a pointer that points to the beginning of the message table.
4xxxx + 10 Message Length
Read/Write (0 - 512) Enter the length of the current message. When XMIT is sending Modbus messages for function codes 01, 02, 03, 04, 05, 06, 08, 15 and 16, the length of the message is automatically set to five. When XMIT is receiving Terminated ASCII input the length of the message must be set to five or an error results. When XMIT is sending Modbus messages for function codes twenty and twenty- one, the length of the message is automatically set to six. When XMIT is sending ASCII messages, the length may be 1 through 1024 ASCII characters per message.
Read/Write 4xxxx + 11 Response (0 - 65535 milliseconds) Timeout (ms) Enter the time value in milliseconds (ms) to determine how long XMIT waits for a valid response message from a slave device (PLC, modem, etc.). In addition, the time applies to ASCII transmissions and flow control operations. When the response message is not completely formed within this specified time, XMIT issues a fault. The valid range is 0 through 65535 ms. The timeout is initiated after the last character in the message is sent.
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Register
Name
Description
No Valid Entries
4xxxx + 12 Retry Limit
Read/Write (0 - 65535 milliseconds) Enter the quantity of retries to determine how many times XMIT sends a message to get a valid response from a slave device (PLC, modem, etc.). When the response message is not completely formed within this specified time, XMIT issues a fault and a fault code. The valid range is 0 ... 65535 # of retries. This field is used in conjunction with response time-out (4xxxx + 11).
Read/Write (0 - 65535 milliseconds) 4xxxx + 13 Start of Transmission Enter the time value in milliseconds (ms) when RTS/CTS control is enabled, to determine how Delay (ms) long XMIT waits after CTS is received before it transmits a message out of the PLC port #1. Also, you may use this register even when RTS/CTS is NOT in control. In this situation, the entered time value determines how long XMIT waits before it sends a message out of the PLC port #1. You may use this as a pre message delay timer. The valid range is 0 through 65535 ms. Read/Write (0 - 65535 milliseconds) 4xxxx + 14 End of Transmission To determine how long XMIT keeps an RTS assertion once the message is sent out of the PLC Delay (ms) port #1, enter the time value in milliseconds (ms) when RTS/CTS control is enabled, After the time expires, XMIT ends the RTS assertion. Also, you may use this register even when RTS/CTS is NOT in control. In this situation, the entered time value determines how long XMIT waits after it sends a message out of the PLC port #1. You may use this as a post message delay timer. The valid range is 0 through 65535 ms. 4xxxx + 15 Current Retry The value displayed here indicates the current Read Only number of retry attempts made by the XMIT block
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Fault Status Table The following is a list of the fault codes generated by the XMIT port status block (4x + 1).
Fault Code 1 2 3 4 5 6 7 8 9 through 99 100 101 102 103 104 105 106 107 Fault Description Modbus exception -- Illegal function Modbus exception -- Illegal data address Modbus exception -- Illegal data value Modbus exception -- Slave device failure Modbus exception -- Acknowledge Modbus exception -- Slave device busy Modbus exception -- Negative acknowledge Modbus exception -- Memory parity error Reserved Slave PLC data area cannot equal zero Master PLC data area cannot equal zero Coil (0x) not configured Holding register (4xxxx) not configured Data length cannot equal zero Pointer to message table cannot equal zero Pointer to message table is outside the range of configured holding registers (4xxxx) Transmit message timeout (This error is generated when the UART cannot complete a transmission in 10 seconds or less. This error bypasses the retry counter and will activate the error output on the first error.) Undefined error Modem returned ERROR Modem returned NO CARRIER Modem returned NO DIALTONE Modem returned BUSY Invalid LRC checksum from the slave PLC Invalid CRC checksum from the slave PLC Invalid Modbus function code Modbus response message time-out
108 109 110 111 112 113 114 115 116
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1111
Fault Code 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134
Fault Description Modem reply timeout XMIT could not gain access to PLC communications port #1 or port #2 XMIT could not enable PLC port receiver XMIT could not set PLC UART User issued an abort command Top node of XMIT not equal to zero, one or two Bottom node of XMIT is not equal to seven, eight or sixteen Undefined internal state Broadcast mode not allowed with this Modbus function code DCE did not assert CTS Illegal configuration (data rate, data bits, parity, or stop bits) Unexpected response received from Modbus slave Illegal command word setting Command word changed while active Invalid character count Invalid register block ASCII input FIFO overflow error Invalid number of start characters or termination characters
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Command Word Communication Functions Table This table describes the function performed as XMIT interprets each bit of the command word.
(4x + 8) Command Word Function Terminated ASCII input (Bit 5=1) Simple ASCII input (Bit 6=1) Simple ASCII output (Bit 7=1) Modem output (Bit 7=1) Command word bits that must be set to 1 2,3,9,10,11,12 2,3,9,10,11,12 2,3,9,10,11,12 2,3,13,14,15,16 Command word bits that must be set to 0 6,7,8,13,14,15,16 5,7,8,13,14,15,16 5,6,8,13,14,15,16 5,6,8,9,10,11,12 (plus one, but ONLY one, of the following bits is set to 1: 13,14,15 or 16, while the other three bits must be set to 0) 5,6,7,9,10,11,12,13,14, 15,16 5,6,7,8,13,14,15,16
Modbus master messaging output (Bit 8=1) Enable ASCII receive input FIFO ONLY (Bit 9=1)
2,3 2,3,10,11,12
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1113
1114
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XMIT Port Status Block 31007523 8/2010
XMIT Port Status Block
188
Introduction This chapter describes the instruction XMIT Port Status Block. What's in this Chapter? This chapter contains the following topics:
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1115
Short Description
Function Description The XMIT port status block shows the current port status, Modbus slave activity, ASCII input FIFO, and flow control information that may be used in ladder logic for some applications. The XMIT port status block is totally passive. It does not take, release, or control the PLC port. For an overview of the XMIT instruction, please see Short Description, page 1096.
1116
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Representation
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1117

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning ON begins an XMIT operation and it should remain ON until the operation has completed successfully or an error has occurred. Must contain one of the following constants either (#0001) to select PLC port #1, or (#0002) to select PLC port #2. Note: The loadable version DOES accept 4xxxx registers in the top node, whereas the built-in does NOT. The 4xxxx register entered in the middle node is the first in a group of seven (7) contiguous holding registers that comprise the port status display block, as shown in the Port Status Display Table, page 1119 in the Parameter Description: Middle Node XMIT Conversion Block section. Important: DO NOT modify the address in the middle node of the XMIT block or delete the address from the block while the block is active. This action locks up the port preventing communications. Must contain a constant equal to (#0007). This is the number of registers used by the XMIT port status instruction. ON when XMIT has detected an error or was issued an abort. ON when an XMIT operation has been successfully completed.
port #0001 or #0002 (top node)
4x
INT, UINT WORD
4x
INT, UINT, WORD
constant = #0007 (bottom node) Middle output Bottom output 0x 0x
INT, UINT, WORD None None
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Overview This topic provides detailed information relevant to the middle node. There are six units in this topic. Port Status Display Table Fault Code Generation Table Status Generation Table Port Ownership Table Input FIFO Status Table Input FIFO Length Table Port Status Display Table This table represents the first in a group of seven contiguous holding registers that comprise the port status block.
Register 4xxxx Name Revision Number Description Displays the current revision number of XMIT block. This number is automatically loaded by the block and the block over writes any other number entered into this register. This field displays a fault code generated by the XMIT port status block. (For expanded and detailed information please see the Fault Code Generation Table below.) No Valid Entries Read Only
4xxxx + 1
Fault Status
Read Only
4xxxx + 2
Slave login status/ Slave port active status
Read Only This register displays the status of two items generated by the XMIT port status block. The two items are the slave login status and the slave port active status. Ladder logic may be able to use this information to reduce or avoid collisions on a multi master Modbus network. (For expanded and detailed information please see the Status Generation Table below. Read Only This register displays the number of slave transactions generated by the XMIT port status block. The counter increases every time the PLC Modbus slave port receives another command from the Modbus master. Ladder logic may be able to use this information to reduce or avoid collisions on a multi master Modbus network.
4xxxx + 3
Slave transaction counter
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1119
Register 4xxxx + 4
Name Port State
Description
No Valid Entries
This register displays ownership of the port and its Read Only state. It is generated by the XMIT port status block. (For expanded and detailed information please see the Port Ownership Table below.) The register displays the status of seven items related to the input FIFO. It is generated by the XMIT port status block. (For expanded and detailed information please see the Input FIFO Table below.) Read Only
4xxxx + 5
Input FIFO status bits
4xxxx + 6
Input FIFO length
Read Only This register displays the current number of characters present in the ASCII input FIFO. The register may contain other values based on the state of the input FIFO and if the length is empty or overflowing. It is generated by the XMIT port status block. (For expanded and detailed information please see the Input FIFO Length Table below.
Fault Code Generation Table This table describes the fault codes generated by the XMIT port status block in the (4x + 1) register.
Fault Code 118 122 123 Fault Description XMIT could not gain access to PLC communications port #1 or port #2. Top node of XMIT not equal to zero, one or two. Bottom node of XMIT is not equal to seven, eight or sixteen.
Status Generation Table This table describes the slave login status and the slave port active status generated by the XMIT port status block for the (4x + 2) register.
(4x + 2 high byte) Slave Login Status (4x + 2 low byte) Slave Port Active Status
Yes - When a programming device is currently Yes - When observed port is owned by the logged ON to this PLC slave port. PLC and currently receiving a Mod-bus command or transmitting a Mod-bus response. No - When a programming device is currently NOT logged ON to this PLC slave port. Note: A Modbus master can send commands but, not be logged ON No - When observed port is NOT owned by the PLC and currently receiving Mod-bus command or transmitting a Mod-bus response.
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Port Ownership Table This table describes the ports ownership and state for the (4x + 4) register.
Owns Port PLC XMIT XMIT XMIT XMIT XMIT XMIT XMIT XMIT XMIT Active State PLC Modbus slave Tone dial modem Hang up modem Modbus messaging Simple ASCII output Pulse dial modem Initialize modem Simple ASCII input Terminated ASCII input ASCII input FIFO is ON, but no XMIT function is active Value 0 1 2 3 4 5 6 7 8 9
Input FIFO Status Table This table describes the status bits related to the input FIFO for the (4x + 5) register.
Bit # 1-3 4 5-7 8 9 10 11 12 13 - 15 16 Definition Reserved Port owned by ... Reserved ASCII output transmission ... Blocked by receiving device ASCII input received ... ASCII input FIFO is ... ASCII input FIFO is ... ASCII input FIFO is ... Reserved ASCII input reception ... XMIT blocked sending device XMIT unblocked sending device New character Empty Overflowing (error) On Unblocked by receiving device No new character Not empty Not overflowing (error) Off XMIT PLC Yes / 1 No / 0
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1121
Input FIFO Length Table This table describes the current number of characters present in the ASCII input FIFO for the (4x + 6) register.
WHEN Input FIFO = OFF = ON and Empty = ON and Overflowing THEN Length =0 =0 = 512
1122
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XMIT Conversion Block 31007523 8/2010
XMIT Conversion Block
189
Introduction This chapter describes the instruction XMIT Conversion Block. What's in this Chapter? This chapter contains the following topics:
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1123
Short Description
Function Description The purpose of the XMIT conversion block is to take data and convert it into other usable forms based upon your application needs. The convert block performs 11 different functions or options. Some functions include ASCII to binary, integer to ASCII, byte swapping, searching ASCII strings, and others. This block allows internal conversions using 4xxxx source blocks to 4xxxx destination blocks. For an overview of the XMIT instruction please see Short Description, page 1096.
1124
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Representation
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1125

Parameters Top input State RAM Reference 0x, 1x Data Type None Meaning ON begins an XMIT operation and it should remain ON until the operation has completed successfully or an error has occurred. Note: To reset an XMIT fault and clear the fault register, the top input must go OFF for at least one PLC scan. The top node must contain a constant (#0000) since conversions do not deal with the PLCs port. The loadable version DOES accept 4xxxx registers in the top node, whereas the builtin does NOT. The 4xxxx register entered in the middle node is the first in a group of eight (8) contiguous holding registers that comprise the control block, as shown in the Conversion Block Control Table, page 1127 found in the Parameter Description: XMIT Conversion Block section. Important: DO NOT modify the address in the middle node of the XMIT block or delete the address from the program while the block is active. This action locks up the port preventing communications. The bottom node must contain a constant equal to (#0008). This is the number of registers used by the XMIT conversion instruction. ON when XMIT has detected an error or was issued an abort. ON when an XMIT operation has been successfully completed.
constant #0001 (top node)
4x
INT, UINT WORD
4x
INT, UINT, WORD
constant = #0008 (bottom node) Middle output Bottom output 0x 0x
INT, UINT, WORD
None None
1126
31007523 8/2010
Overview This topic provides detailed information relevant to the middle node. There are four units in this topic. Conversion Block Control Table Fault Code Generation Table Data Conversion Control Bits Table Data Conversion Opcodes Table Conversion Block Control Table This table represents the first in a group of eight contiguous holding registers that comprise the port status block.
Register 4xxxx Name XMIT Revision Number Description No Valid Entries
Displays the current revision number of XMIT block. Read Only This number is automatically loaded by the block and the block over writes any other number entered into this register.
4xxxx + 1 Fault Status This field displays a fault code generated by the XMIT Read Only port status block. (For expanded and detailed information please see the Fault Code Generation Table below.) 4xxxx + 2 Available to User 0 (May be used as pointers for instructions such as Read/Write TBLK.) The XMIT conversion block does not use this register. However, it may be used in ladder logic as a pointer. An efficient way to use the XMIT block is to place a pointer value of a TBLK instruction into this register. This 16 bit word relates to the Data Conversion (4xxxx + 3) word. These bits provide additional control options based on which of the eleven conversions you select. (For expanded and detailed information please see Data Conversion Control Bits Table below. Select the type of conversion you want to perform from the list of eleven options listed in the Data Conversion Opcodes Table below. After picking the type of conversion refer to Data Conversion Control Bits (4xxxx + 4) and the Data Conversion Control Bits Table for additional control options that relate to the specific conversion type selected. Read/Write
4xxxx + 3 Data Conversion Control Bits
4xxxx + 4 Data Conversion Opcodes
Read/Write
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1127
Register
Name
Description
No Valid Entries
4xxxx + 5 Source Register
Read/Write Enter the 4xxxx register desired. This is the first register in the source block that is read. Ensure you select where you want the READ to begin (high or low byte). Read/Write Enter the 4xxxx register desired. This is the first register in the source block that is read. Ensure you select where you want the READ to begin (high or low byte). The selection beside this register in the DX zoom is the same as bit16 in (4xxxx + 3). Read/Write
4xxxx + 6 Destination Register
4xxxx + 7 ASCII String Enter the search area. This register defines the search area. Character When either automatic advance source (Bit 13) or Count automatic advance destination (Bit 14) are ON and no ASCII character is detected, the block automatically adjusts the character count.
Fault Code Generation Table This table describes the fault codes generated by the XMIT conversion block in the (4x + 1) register.
Fault Code 122 123 131 135 136 137 138 139 140 141 142 143 Fault Description Top node of XMIT is not equal to zero, one or two Bottom node of XMIT is not equal to seven, eight or sixteen Invalid character count Invalid destination register block Invalid source register block No ASCII number present Multiple sign characters present Numerical overflow detected String mismatch error String not found Invalid error check detected Invalid conversion opcode
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Data Conversion Control Bits Table This table describes the control options available based upon the conversion selected in the (4x + 3) register.
Bit # 2 3 4 7 8 9 10 11 12 13 Definition CRC 16 seed Error check type Error check Conversion case Case sensitivity Format leading Output format Conversion type Conversion word Automatic advance source pointer (points to the next character after the last character purged) Automatic advance destination pointer (points to the next character after the last character purged) Begin reading ASCII at source beginning with ... Begin saving ASCII at destination beginning with ... 1= 0x0000 LRC 8 Validate Upper to Lower No Zeros Fixed Unsigned 32-bit Yes 0= 0xFFFF CRC 16 Append Lower to Upper Yes Blanks Variable Signed 16-bit No
14
Yes
No
15 16
Low byte Low byte
High byte (normal) High byte (normal)
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1129
Data Conversion Opcodes Table This table describes the 11 functions or options for performing conversions using the data conversion opcodes in the (4x + 4) register.
Opcode Illegal opcode Action Displayed when illegal opcode is detected. Converted to Data Type (4xxxx block Not applicable
(1 Hex) Received ASCII decimal character string (2 Hex) Received ASCII hex character string (3 Hex) Received ASCII hex character string (4 Hex) 16-bit or 32-bit signed or unsigned integer
16-bit or 32-bit signed or unsigned binary integer 16-bit or 32-bit unsigned binary integer 16-bit unsigned binary integer array ASCII decimal character string for transmission ASCII hex character string for transmission ASCII hex character string for transmission ASCII destination register block
Converted to Converted to Converted to
(5 Hex) Converted to 16-bit or 32-bit unsigned binary integer (6 Hex) 16-bit unsigned integer array (7 Hex) High and low bytes from saved ASCII source register block Converted to Swapped to
(8 Hex) Copied to ASCII string from source register block (9 Hex) ASCII source register block (10 Hex) ASCII source register block (11 Hex) Error check 8-bit LRC or 16-bit CRC Compared to
ASCII destination register block with or without case conversion ASCII string defined in destination register block with or without case sensitivity ASCII string defined in destination block with or without case sensitivity ASCII string in source register block
Search for
Validated or appended on
1130
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XMRD: Extended Memory Read 31007523 8/2010
XMRD: Extended Memory Read
190
Introduction This chapter describes the instruction XMRD. What's in this Chapter? This chapter contains the following topics:
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1131
Short Description
Function Description The XMRD instruction is used to copy a table of 6x extended memory registers to a table of 4x holding registers in state RAM.
1132
31007523 8/2010
Representation

Parameters Top input Middle input Bottom input State RAM Data Type Meaning Reference 0x, 1x 0x, 1x 0x, 1x None None None ON = activates read operation OFF = clears offset to 0 ON = does not clear offset OFF = abort on error ON = do not abort on error
4x control block (see page 1134) (top node)
INT, UINT, First of six contiguous holding registers in the WORD extended memory (For expanded and detailed information please see the section Control Block (Top Node), page 1134.) INT, UINT, The first 4x holding register in a table of WORD registers that receive the transferred data from the 6x extended memory storage registers INT, UINT Contains the constant value 1, which cannot be changed Read transfer active Error condition detected ON = operation complete 1133
destination (middle node) 1 (bottom node) Top output Middle output Bottom output
31007523 8/2010
4x
0x 0x 0x
None None None
Control Block (Top Node) The 4x register entered in the top node is the first of six contiguous holding registers in the extended memory control block.
Reference Displayed Register Name status word Description Contains the diagnostic information about extended memory (see Status Word of the Control Block, page 1135) Specifies which of the extended memory files is currently in use (range: 1 ... 10) Specifies which 6x storage register in the current file is the starting address; 0 = 60000, 9999 = 69999 Specifies the number of registers to be read or written in a scan when the appropriate function block is powered; range: 0 ... 9999, not to exceed number specified in max registers (fifth implied) Keeps a running total of the number of registers transferred thus far Specifies the maximum number of registers that may be transferred when the function block is powered (range: 0 ... 9999)
First implied Second implied Third implied
file number start address count
Fourth implied offset Fifth implied max registers
If you are in multi-scan mode, these six registers should be unique to this function block.
1134
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Status Word of the Control Block Status Word of the Control Block
Bit 1 2 3 4 5 6 7 8-9 10 11 12 13 14 15 16
Function 1 = power-up diagnostic error 1 = parity error in extended memory 1 = extended memory does not exist 0 = transfer not running 1 = busy 0 = transfer in progress 1 = transfer complete 1 = file boundary crossed 1 = offset parameter too large Not used 1 = nonexistent state RAM Not used 1 = maximum registers parameter error 1 = offset parameter error 1 = count parameter error 1 = starting address parameter error 1 = file number parameter error
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1135
1136
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XMWT: Extended Memory Write 31007523 8/2010
XMWT: Extended Memory Write
191
Introduction This chapter describes the instruction XMWT. What's in this Chapter? This chapter contains the following topics:
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1137
Short Description
Function Description The XMWT instruction is used to write data from a block of input registers or holding registers in state RAM to a block of 6x registers in an extended memory file.
1138
31007523 8/2010
Representation

Parameters Top input Middle input Bottom input source (top node) State RAM Reference 0x, 1x 0x, 1x 0x, 1x 3x, 4x Data Type None None None INT, UINT, WORD INT, UINT, WORD Meaning ON = activates write operation OFF = clears offset to 0 ON = does not clear offset OFF = abort on error ON = do not abort on error The first 3x or 4x register in a block of contiguous source registers, i.e. input or holding registers, whose contents will be written to 6x extended memory registers First of six contiguous holding registers in the extended memory (For expanded and detailed information please see the section Control Block (Middle Node), page 1140.) Contains the constant value 1, which cannot be changed Write transfer active Error condition detected ON = operation complete 1139
4x control block (see page 1140) (middle node)
1 (bottom node) Top output Middle output Bottom output

31007523 8/2010
0x 0x 0x
Control Block (Middle Node) The 4x register entered in the middle node is the first of six contiguous holding registers in the extended memory control block.
Reference Displayed Register Name status word Description Contains the diagnostic information about extended memory (see Status Word of the Control Block, page 1141) Specifies which of the extended memory files is currently in use (range: 1 ... 10) Specifies which 6x storage register in the current file is the starting address; 0 = 60000, 9999 = 69999 Specifies the number of registers to be read or written in a scan when the appropriate function block is powered; range: 0 ... 9999, not to exceed number specified in max registers (fifth implied) Keeps a running total of the number of registers transferred thus far Specifies the maximum number of registers that may be transferred when the function block is powered (range: 0 ... 9999)
First implied Second implied Third implied
file number start address count
Fourth implied offset Fifth implied max registers
If you are in multi-scan mode, these six registers should be unique to this function block.
1140
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Status Word of the Control Block Status Word of the Control Block
Bit 1 2 3 4 5 6 7 8-9 10 11 12 13 14 15 16
Function 1 = power-up diagnostic error 1 = parity error in extended memory 1 = extended memory does not exist 0 = transfer not running 1 = busy 0 = transfer in progress 1 = transfer complete 1 = file boundary crossed 1 = offset parameter too large Not used 1 = nonexistent state RAM Not used 1 = maximum registers parameter error 1 = offset parameter error 1 = count parameter error 1 = starting address parameter error 1 = file number parameter error
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1141
1142
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XOR: Exclusive OR 31007523 8/2010
XOR: Exclusive OR
192
Introduction This chapter describes the instruction XOR. What's in this Chapter? This chapter contains the following topics:
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1143
XOR: Exclusive OR
Short Description
WARNING
XOR will override any disabled coils within the destination matrix without enabling them. This can cause personal injury if a coil has disabled an operation for maintenance or repair because the coils state can be changed by the XOR operation. Failure to follow these instructions can result in death, serious injury, or equipment damage. The XOR instruction performs a Boolean Exclusive OR operation on the bit patterns in the source and destination matrices. The XORed bit pattern is then posted in the destination matrix, overwriting its previous contents:
1144
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XOR: Exclusive OR
Representation

Parameters Top input source matrix (top node) destination matrix (middle node) length (bottom node) Top output 0x State RAM Reference 0x, 1x 0x, 1x, 3x, 4x 0x, 4x Data Type None BOOL, WORD BOOL, WORD INT, UINT None Meaning Initiates XOR First reference in the source matrix First reference in the destination matrix
Matrix length; range 1 ... 100 registers. Echoes state of the top input
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1145
XOR: Exclusive OR
An XOR Example When contact 10001 passes power, the source matrix formed by the bit pattern in registers 40600 and 40601 is XORed with the destination matrix formed by the bit pattern in registers 40608 and 40609, overwriting the original destination bit pattern.
NOTE: If you want to reatin the original destination bit pattern of registers 40608 and 40609, copy the information into another table using a BLKIM before performing the XOR operation.
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Matrix Length (Bottom Node) The integer entered in the bottom node specifies the matrix length, i.e. the number of registers or 16-bit words in the two matrices. The matrix length can be in the range 1 ... 100. A length of 2 indicates that 32 bits in each matrix will be XORed.
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Glossary 31007523 8/2010
Glossary
A
active window The window, which is currently selected. Only one window can be active at any one given time. When a window is active, the heading changes color, in order to distinguish it from other windows. Unselected windows are inactive.
Actual parameter Currently connected Input/Output parameters.
Addresses (Direct) addresses are memory areas on the PLC. These are found in the State RAM and can be assigned input/output modules. The display/input of direct addresses is possible in the following formats: Standard format (400001) Separator format (4:00001) Compact format (4:1) IEC format (QW1)
ANL_IN ANL_IN stands for the data type "Analog Input" and is used for processing analog values. The 3x References of the configured analog input module, which is specified in the I/O component list is automatically assigned the data type and should therefore only be occupied by Unlocated variables.
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ANL_OUT ANL_OUT stands for the data type "Analog Output" and is used for processing analog values. The 4x-References of the configured analog output module, which is specified in the I/O component list is automatically assigned the data type and should therefore only be occupied by Unlocated variables.
ANY In the existing version "ANY" covers the elementary data types BOOL, BYTE, DINT, INT, REAL, UDINT, UINT, TIME and WORD and therefore derived data types.
ANY_BIT In the existing version, "ANY_BIT" covers the data types BOOL, BYTE and WORD.
ANY_ELEM In the existing version "ANY_ELEM" covers the elementary data types BOOL, BYTE, DINT, INT, REAL, UDINT, UINT, TIME and WORD.
ANY_INT In the existing version, "ANY_INT" covers the data types DINT, INT, UDINT and UINT.
ANY_NUM In the existing version, "ANY_NUM" covers the data types DINT, INT, REAL, UDINT and UINT.
ANY_REAL In the existing version "ANY_REAL" covers the data type REAL.
Application window The window, which contains the working area, the menu bar and the tool bar for the application. The name of the application appears in the heading. An application window can contain several document windows. In Concept the application window corresponds to a Project.
Argument Synonymous with Actual parameters.
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Glossary
ASCII mode American Standard Code for Information Interchange. The ASCII mode is used for communication with various host devices. ASCII works with 7 data bits.
Atrium The PC based controller is located on a standard AT board, and can be operated within a host computer in an ISA bus slot. The module occupies a motherboard (requires SA85 driver) with two slots for PC104 daughter boards. From this, a PC104 daughter board is used as a CPU and the others for INTERBUS control.
B
Back up data file (Concept EFB) The back up file is a copy of the last Source files. The name of this back up file is "backup??.c" (it is accepted that there are no more than 100 copies of the source files. The first back up file is called "backup00.c". If changes have been made on the Definition file, which do not create any changes to the interface in the EFB, there is no need to create a back up file by editing the source files (Objects Source). If a back up file can be assigned, the name of the source file can be given.
Base 16 literals Base 16 literals function as the input of whole number values in the hexadecimal system. The base must be denoted by the prefix 16#. The values may not be preceded by signs (+/-). Single underline signs ( _ ) between figures are not significant. Example 16#F_F or 16#FF (decimal 255) 16#E_0 or 16#E0 (decimal 224)
Base 8 literal Base 8 literals function as the input of whole number values in the octal system. The base must be denoted by the prefix 3.63kg. The values may not be preceded by signs (+/-). Single underline signs ( _ ) between figures are not significant. Example 8#3_1111 or 8#377 (decimal 255) 8#34_1111 or 8#340 (decimal 224)
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Glossary
Basis 2 literals Base 2 literals function as the input of whole number values in the dual system. The base must be denoted by the prefix 0.91kg. The values may not be preceded by signs (+/-). Single underline signs ( _ ) between figures are not significant. Example 2#1111_1111 or 2#11111111 (decimal 255) 2#1110_1111 or 2#11100000 (decimal 224)
Binary connections Connections between outputs and inputs of FFBs of data type BOOL.
Bit sequence A data element, which is made up from one or more bits.
BOOL BOOL stands for the data type "Boolean". The length of the data elements is 1 bit (in the memory contained in 1 byte). The range of values for variables of this type is 0 (FALSE) and 1 (TRUE).
Bridge A bridge serves to connect networks. It enables communication between nodes on the two networks. Each network has its own token rotation sequence the token is not deployed via bridges.
BYTE BYTE stands for the data type "Bit sequence 8". The input appears as Base 2 literal, Base 8 literal or Base 1 16 literal. The length of the data element is 8 bit. A numerical range of values cannot be assigned to this data type.
C
Cache The cache is a temporary memory for cut or copied objects. These objects can be inserted into sections. The old content in the cache is overwritten for each new Cut or Copy.
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Call up The operation, by which the execution of an operation is initiated.
Coil A coil is a LD element, which transfers (without alteration) the status of the horizontal link on the left side to the horizontal link on the right side. In this way, the status is saved in the associated Variable/ direct address.
Compact format (4:1) The first figure (the Reference) is separated from the following address with a colon (:), where the leading zero are not entered in the address.
Connection A check or flow of data connection between graphic objects (e.g. steps in the SFC editor, Function blocks in the FBD editor) within a section, is graphically shown as a line.
Constants Constants are Unlocated variables, which are assigned a value that cannot be altered from the program logic (write protected).
Contact A contact is a LD element, which transfers a horizontal connection status onto the right side. This status is from the Boolean AND- operation of the horizontal connection status on the left side with the status of the associated Variables/direct Address. A contact does not alter the value of the associated variables/direct address.
D
Data transfer settings Settings, which determine how information from the programming device is transferred to the PLC.
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Data types The overview shows the hierarchy of data types, as they are used with inputs and outputs of Functions and Function blocks. Generic data types are denoted by the prefix "ANY". ANY_ELEM ANY_NUM ANY_REAL (REAL) ANY_INT (DINT, INT, UDINT, UINT) ANY_BIT (BOOL, BYTE, WORD) TIME System data types (IEC extensions) Derived (from "ANY" data types)
DCP I/O station With a Distributed Control Processor (D908) a remote network can be set up with a parent PLC. When using a D908 with remote PLC, the parent PLC views the remote PLC as a remote I/O station. The D908 and the remote PLC communicate via the system bus, which results in high performance, with minimum effect on the cycle time. The data exchange between the D908 and the parent PLC takes place at 1.5 Megabits per second via the remote I/O bus. A parent PLC can support up to 31 (Address 2-32) D908 processors.
DDE (Dynamic Data Exchange) The DDE interface enables a dynamic data exchange between two programs under Windows. The DDE interface can be used in the extended monitor to call up its own display applications. With this interface, the user (i.e. the DDE client) can not only read data from the extended monitor (DDE server), but also write data onto the PLC via the server. Data can therefore be altered directly in the PLC, while it monitors and analyzes the results. When using this interface, the user is able to make their own "Graphic-Tool", "Face Plate" or "Tuning Tool", and integrate this into the system. The tools can be written in any DDE supporting language, e.g. Visual Basic and Visual-C++. The tools are called up, when the one of the buttons in the dialog box extended monitor uses Concept Graphic Tool: Signals of a projection can be displayed as timing diagrams via the DDE connection between Concept and Concept Graphic Tool.
Decentral Network (DIO) A remote programming in Modbus Plus network enables maximum data transfer performance and no specific requests on the links. The programming of a remote net is easy. To set up the net, no additional ladder diagram logic is needed. Via corresponding entries into the Peer Cop processor all data transfer requests are met.
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Glossary
Declaration Mechanism for determining the definition of a Language element. A declaration normally covers the connection of an Identifier with a language element and the assignment of attributes such as Data types and algorithms.
Definition data file (Concept EFB) The definition file contains general descriptive information about the selected FFB and its formal parameters.
Derived data type Derived data types are types of data, which are derived from the Elementary data types and/or other derived data types. The definition of the derived data types appears in the data type editor in Concept. Distinctions are made between global data types and local data types.
Derived Function Block (DFB) A derived function block represents the Call up of a derived function block type. Details of the graphic form of call up can be found in the definition " Function block (Item)". Contrary to calling up EFB types, calling up DFB types is denoted by double vertical lines on the left and right side of the rectangular block symbol. The body of a derived function block type is designed using FBD language, but only in the current version of the programming system. Other IEC languages cannot yet be used for defining DFB types, nor can derived functions be defined in the current version. Distinctions are made between local and global DFBs.
DINT DINT stands for the data type "double integer". The input appears as Integer literal, Base 2 literal, Base 8 literal or Base 16 literal. The length of the data element is 32 bit. The range of values for variables of this data type is from 2 exp (31) to 2 exp (31) 1.
Direct display A method of displaying variables in the PLC program, from which the assignment of configured memory can be directly and indirectly derived from the physical memory.
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Glossary
Document window A window within an Application window. Several document windows can be opened at the same time in an application window. However, only one document window can be active. Document windows in Concept are, for example, sections, the message window, the reference data editor and the PLC configuration.
Dummy An empty data file, which consists of a text header with general file information, i.e. author, date of creation, EFB identifier etc. The user must complete this dummy file with additional entries.
DX Zoom This property enables connection to a programming object to observe and, if necessary, change its data value.
E
Elementary functions/function blocks (EFB) Identifier for Functions or Function blocks, whose type definitions are not formulated in one of the IEC languages, i.e. whose bodies, for example, cannot be modified with the DFB Editor (Concept-DFB). EFB types are programmed in "C" and mounted via Libraries in precompiled form.
EN / ENO (Enable / Error display) If the value of EN is "0" when the FFB is called up, the algorithms defined by the FFB are not executed and all outputs contain the previous value. The value of ENO is automatically set to "0" in this case. If the value of EN is "1" when the FFB is called up, the algorithms defined by the FFB are executed. After the error free execution of the algorithms, the ENO value is automatically set to "1". If an error occurs during the execution of the algorithm, ENO is automatically set to "0". The output behavior of the FFB depends whether the FFBs are called up without EN/ENO or with EN=1. If the EN/ENO display is enabled, the EN input must be active. Otherwise, the FFB is not executed. The projection of EN and ENO is enabled/disabled in the block properties dialog box. The dialog box is called up via the menu commands Objects Properties... or via a double click on the FFB.
Error When processing a FFB or a Step an error is detected (e.g. unauthorized input value or a time error), an error message appears, which can be viewed with the menu command Online Event display... . With FFBs the ENO output is set to "0".
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Glossary
Evaluation The process, by which a value for a Function or for the outputs of a Function block during the Program execution is transmitted.
Expression Expressions consist of operators and operands.
F
FFB (functions/function blocks) Collective term for EFB (elementary functions/function blocks) and DFB (derived function blocks)
Field variables Variables, one of which is assigned, with the assistance of the key word ARRAY (field), a defined Derived data type. A field is a collection of data elements of the same Data type.
FIR filter Finite Impulse Response Filter
Formal parameters Input/Output parameters, which are used within the logic of a FFB and led out of the FFB as inputs/outputs.
Function (FUNC) A Program organization unit, which exactly supplies a data element when executing. A function has no internal status information. Multiple call ups of the same function with the same input parameter values always supply the same output values. Details of the graphic form of function call up can be found in the definition " Function block (Item)". In contrast to the call up of function blocks, the function call ups only have one unnamed output, whose name is the name of the function itself. In FBD each call up is denoted by a unique number over the graphic block; this number is automatically generated and cannot be altered.
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Function block (item) (FB) A function block is a Program organization unit, which correspondingly calculates the functionality values, defined in the function block type description, for the output and internal variables, when it is called up as a certain item. All output values and internal variables of a certain function block item remain as a call up of the function block until the next. Multiple call up of the same function block item with the same arguments (Input parameter values) supply generally supply the same output value(s). Each function block item is displayed graphically by a rectangular block symbol. The name of the function block type is located on the top center within the rectangle. The name of the function block item is located also at the top, but on the outside of the rectangle. An instance is automatically generated when creating, which can however be altered manually, if required. Inputs are displayed on the left side and outputs on the right of the block. The names of the formal input/output parameters are displayed within the rectangle in the corresponding places. The above description of the graphic presentation is principally applicable to Function call ups and to DFB call ups. Differences are described in the corresponding definitions.
Function block dialog (FBD) One or more sections, which contain graphically displayed networks from Functions, Function blocks and Connections.
Function block type A language element, consisting of: 1. the definition of a data structure, subdivided into input, output and internal variables, 2. A set of operations, which is used with the elements of the data structure, when a function block type instance is called up. This set of operations can be formulated either in one of the IEC languages (DFB type) or in "C" (EFB type). A function block type can be instanced (called up) several times.
Function counter The function counter serves as a unique identifier for the function in a Program or DFB. The function counter cannot be edited and is automatically assigned. The function counter always has the structure: .n.m n = Section number (number running) m = Number of the FFB object in the section (number running)
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G
Generic data type A Data type, which stands in for several other data types.
Generic literal If the Data type of a literal is not relevant, simply enter the value for the literal. In this case Concept automatically assigns the literal to a suitable data type.
Global derived data types Global Derived data types are available in every Concept project and are contained in the DFB directory directly under the Concept directory.
Global DFBs Global DFBs are available in every Concept project and are contained in the DFB directory directly under the Concept directory.
Global macros Global Macros are available in every Concept project and are contained in the DFB directory directly under the Concept directory.
Groups (EFBs) Some EFB libraries (e.g. the IEC library) are subdivided into groups. This facilitates the search for FFBs, especially in extensive libraries.
I
I/O component list The I/O and expert assemblies of the various CPUs are configured in the I/O component list.
IEC 61131-3 International norm: Programmable controllers part 3: Programming languages.
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Glossary
IEC format (QW1) In the place of the address stands an IEC identifier, followed by a five figure address: %0x12345 = %Q12345 %1x12345 = %I12345 %3x12345 = %IW12345 %4x12345 = %QW12345
IEC name conventions (identifier) An identifier is a sequence of letters, figures, and underscores, which must start with a letter or underscores (e.g. name of a function block type, of an item or section). Letters from national sets of characters (e.g. ,, , ) can be used, taken from project and DFB names. Underscores are significant in identifiers; e.g. "A_BCD" and "AB_CD" are interpreted as different identifiers. Several leading and multiple underscores are not authorized consecutively. Identifiers are not permitted to contain space characters. Upper and/or lower case is not significant; e.g. "ABCD" and "abcd" are interpreted as the same identifier. Identifiers are not permitted to be Key words.
IIR filter Infinite Impulse Response Filter
Initial step (starting step) The first step in a chain. In each chain, an initial step must be defined. The chain is started with the initial step when first called up.
Initial value The allocated value of one of the variables when starting the program. The value assignment appears in the form of a Literal.
Input bits (1x references) The 1/0 status of input bits is controlled via the process data, which reaches the CPU from an entry device. NOTE: The x, which comes after the first figure of the reference type, represents a five figure storage location in the application data store, i.e. if the reference 100201 signifies an input bit in the address 201 of the State RAM.
Input parameters (Input) When calling up a FFB the associated Argument is transferred.
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Input words (3x references) An input word contains information, which come from an external source and are represented by a 16 bit figure. A 3x register can also contain 16 sequential input bits, which were read into the register in binary or BCD (binary coded decimal) format. Note: The x, which comes after the first figure of the reference type, represents a five figure storage location in the user data store, i.e. if the reference 300201 signifies a 16 bit input word in the address 201 of the State RAM.
Instantiation The generation of an Item.
Instruction (984LL) When programming electric controllers, the task of implementing operational coded instructions in the form of picture objects, which are divided into recognizable contact forms, must be executed. The designed program objects are, on the user level, converted to computer useable OP codes during the loading process. The OP codes are deciphered in the CPU and processed by the controllers firmware functions so that the desired controller is implemented.
Instruction (IL) Instructions are "commands" of the IL programming language. Each operation begins on a new line and is succeeded by an operator (with modifier if needed) and, if necessary for each relevant operation, by one or more operands. If several operands are used, they are separated by commas. A tag can stand before the instruction, which is followed by a colon. The commentary must, if available, be the last element in the line.
Instruction list (IL) IL is a text language according to IEC 1131, in which operations, e.g. conditional/unconditional call up of Function blocks and Functions, conditional/unconditional jumps etc. are displayed through instructions.
INT INT stands for the data type "whole number". The input appears as Integer literal, Base 2 literal, Base 8 literal or Base 16 literal. The length of the data element is 16 bit. The range of values for variables of this data type is from 2 exp (15) to 2 exp (15) 1.
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Integer literals Integer literals function as the input of whole number values in the decimal system. The values may be preceded by the signs (+/-). Single underline signs ( _ ) between figures are not significant. Example -12, 0, 123_456, +986
INTERBUS (PCP) To use the INTERBUS PCP channel and the INTERBUS process data preprocessing (PDP), the new I/O station type INTERBUS (PCP) is led into the Concept configurator. This I/O station type is assigned fixed to the INTERBUS connection module 180-CRP-660-01. The 180-CRP-660-01 differs from the 180-CRP-660-00 only by a clearly larger I/O area in the state RAM of the controller.
Item name An Identifier, which belongs to a certain Function block item. The item name serves as a unique identifier for the function block in a program organization unit. The item name is automatically generated, but can be edited. The item name must be unique throughout the Program organization unit, and no distinction is made between upper/lower case. If the given name already exists, a warning is given and another name must be selected. The item name must conform to the IEC name conventions, otherwise an error message appears. The automatically generated instance name always has the structure: FBI_n_m FBI = Function block item n = Section number (number running) m = Number of the FFB object in the section (number running)
J
Jump Element of the SFC language. Jumps are used to jump over areas of the chain.
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K
Key words Key words are unique combinations of figures, which are used as special syntactic elements, as is defined in appendix B of the IEC 1131-3. All key words, which are used in the IEC 1131-3 and in Concept, are listed in appendix C of the IEC 1131-3. These listed keywords cannot be used for any other purpose, i.e. not as variable names, section names, item names etc.
L
Ladder Diagram (LD) Ladder Diagram is a graphic programming language according to IEC1131, which optically orientates itself to the "rung" of a relay ladder diagram.
Ladder Logic 984 In the terms Ladder Logic and Ladder Diagram, the word Ladder refers to execution. In contrast to a diagram, a ladder logic is used by engineers to draw up a circuit (with assistance from electrical symbols),which should chart the cycle of events and not the existing wires, which connect the parts together. A usual user interface for controlling the action by automated devices permits ladder logic interfaces, so that when implementing a control system, engineers do not have to learn any new programming languages, with which they are not conversant. The structure of the actual ladder logic enables electrical elements to be linked in a way that generates a control output, which is dependant upon a configured flow of power through the electrical objects used, which displays the previously demanded condition of a physical electric appliance. In simple form, the user interface is one of the video displays used by the PLC programming application, which establishes a vertical and horizontal grid, in which the programming objects are arranged. The logic is powered from the left side of the grid, and by connecting activated objects the electricity flows from left to right.
Landscape format Landscape format means that the page is wider than it is long when looking at the printed text.
Language element Each basic element in one of the IEC programming languages, e.g. a Step in SFC, a Function block item in FBD or the Start value of a variable.
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Library Collection of software objects, which are provided for reuse when programming new projects, or even when building new libraries. Examples are the Elementary function block types libraries. EFB libraries can be subdivided into Groups.
Literals Literals serve to directly supply values to inputs of FFBs, transition conditions etc. These values cannot be overwritten by the program logic (write protected). In this way, generic and standardized literals are differentiated. Furthermore literals serve to assign a Constant a value or a Variable an Initial value. The input appears as Base 2 literal, Base 8 literal, Base 16 literal, Integer literal, Real literal or Real literal with exponent.
Local derived data types Local derived data types are only available in a single Concept project and its local DFBs and are contained in the DFB directory under the project directory.
Local DFBs Local DFBs are only available in a single Concept project and are contained in the DFB directory under the project directory.
Local link The local network link is the network, which links the local nodes with other nodes either directly or via a bus amplifier.
Local macros Local Macros are only available in a single Concept project and are contained in the DFB directory under the project directory.
Local network nodes The local node is the one, which is projected evenly.
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Located variable Located variables are assigned a state RAM address (reference addresses 0x,1x, 3x, 4x). The value of these variables is saved in the state RAM and can be altered online with the reference data editor. These variables can be addressed by symbolic names or the reference addresses. Collective PLC inputs and outputs are connected to the state RAM. The program access to the peripheral signals, which are connected to the PLC, appears only via located variables. PLC access from external sides via Modbus or Modbus plus interfaces, i.e. from visualizing systems, are likewise possible via located variables.
M
Macro Macros are created with help from the software Concept DFB. Macros function to duplicate frequently used sections and networks (including the logic, variables, and variable declaration). Distinctions are made between local and global macros. Macros have the following properties: Macros can only be created in the programming languages FBD and LD. Macros only contain one single section. Macros can contain any complex section. From a program technical point of view, there is no differentiation between an instanced macro, i.e. a macro inserted into a section, and a conventionally created macro. Calling up DFBs in a macro Variable declaration Use of macro-own data structures Automatic acceptance of the variables declared in the macro Initial value for variables Multiple instancing of a macro in the whole program with different variables The section name, the variable name and the data structure name can contain up to 10 different exchange markings (@0 to @9).
MMI Man Machine Interface
Multi element variables Variables, one of which is assigned a Derived data type defined with STRUCT or ARRAY. Distinctions are made between Field variables and structured variables.
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N
Network A network is the connection of devices to a common data path, which communicate with each other via a common protocol.
Network node A node is a device with an address (164) on the Modbus Plus network.
Node address The node address serves a unique identifier for the network in the routing path. The address is set directly on the node, e.g. with a rotary switch on the back of the module.
O
Operand An operand is a Literal, a Variable, a Function call up or an Expression.
Operator An operator is a symbol for an arithmetic or Boolean operation to be executed.
Output parameters (Output) A parameter, with which the result(s) of the Evaluation of a FFB are returned.
Output/discretes (0x references) An output/marker bit can be used to control real output data via an output unit of the control system, or to define one or more outputs in the state RAM. Note: The x, which comes after the first figure of the reference type, represents a five figure storage location in the application data store, i.e. if the reference 000201 signifies an output or marker bit in the address 201 of the State RAM.
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Output/marker words (4x references) An output/marker word can be used to save numerical data (binary or decimal) in the State RAM, or also to send data from the CPU to an output unit in the control system. Note: The x, which comes after the first figure of the reference type, represents a five figure storage location in the application data store, i.e. if the reference 400201 signifies a 16 bit output or marker word in the address 201 of the State RAM.
P
Peer processor The peer processor processes the token run and the flow of data between the Modbus Plus network and the PLC application logic.
PLC Programmable controller
Program The uppermost Program organization unit. A program is closed and loaded onto a single PLC.
Program cycle A program cycle consists of reading in the inputs, processing the program logic and the output of the outputs.
Program organization unit A Function, a Function block, or a Program. This term can refer to either a Type or an Item.
Programming device Hardware and software, which supports programming, configuring, testing, implementing and error searching in PLC applications as well as in remote system applications, to enable source documentation and archiving. The programming device could also be used for process visualization.
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Programming redundancy system (Hot Standby) A redundancy system consists of two identically configured PLC devices, which communicate with each other via redundancy processors. In the case of the primary PLC failing, the secondary PLC takes over the control checks. Under normal conditions the secondary PLC does not take over any controlling functions, but instead checks the status information, to detect mistakes.
Project General identification of the uppermost level of a software tree structure, which specifies the parent project name of a PLC application. After specifying the project name, the system configuration and control program can be saved under this name. All data, which results during the creation of the configuration and the program, belongs to this parent project for this special automation. General identification for the complete set of programming and configuring information in the Project data bank, which displays the source code that describes the automation of a system.
Project data bank The data bank in the Programming device, which contains the projection information for a Project.
Prototype data file (Concept EFB) The prototype data file contains all prototypes of the assigned functions. Further, if available, a type definition of the internal status structure is given.
R
REAL REAL stands for the data type "real". The input appears as Real literal or as Real literal with exponent. The length of the data element is 32 bit. The value range for variables of this data type reaches from 8.43E-37 to 3.36E+38. NOTE: Depending on the mathematic processor type of the CPU, various areas within this valid value range cannot be represented. This is valid for values nearing ZERO and for values nearing INFINITY. In these cases, a number value is not shown in animation, instead NAN (Not A Number) oder INF (INFinite).
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Real literal Real literals function as the input of real values in the decimal system. Real literals are denoted by the input of the decimal point. The values may be preceded by the signs (+/-). Single underline signs ( _ ) between figures are not significant. Example -12.0, 0.0, +0.456, 3.14159_26
Real literal with exponent Real literals with exponent function as the input of real values in the decimal system. Real literals with exponent are denoted by the input of the decimal point. The exponent sets the key potency, by which the preceding number is multiplied to get to the value to be displayed. The basis may be preceded by a negative sign (-). The exponent may be preceded by a positive or negative sign (+/-). Single underline signs ( _ ) between figures are not significant. (Only between numbers, not before or after the decimal poiont and not before or after "E", "E+" or "E-") Example -1.34E-12 or -1.34e-12 1.0E+6 or 1.0e+6 1.234E6 or 1.234e6
Reference Each direct address is a reference, which starts with an ID, specifying whether it concerns an input or an output and whether it concerns a bit or a word. References, which start with the code 6, display the register in the extended memory of the state RAM. 0x area = Discrete outputs 1x area = Input bits 3x area = Input words 4x area = Output bits/Marker words 6x area = Register in the extended memory NOTE: The x, which comes after the first figure of each reference type, represents a five figure storage location in the application data store, i.e. if the reference 400201 signifies a 16 bit output or marker word in the address 201 of the State RAM.
Register in the extended memory (6x reference) 6x references are marker words in the extended memory of the PLC. Only 984LL user programs and CPU 213 04 or CPU 424 02 can be used.
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RIO (Remote I/O) Remote I/O provides a physical location of the I/O coordinate setting device in relation to the processor to be controlled. Remote inputs/outputs are connected to the consumer control via a wired communication cable.
RP (PROFIBUS) RP = Remote Peripheral
RTU mode Remote Terminal Unit The RTU mode is used for communication between the PLC and an IBM compatible personal computer. RTU works with 8 data bits.
Rum-time error Error, which occurs during program processing on the PLC, with SFC objects (i.e. steps) or FFBs. These are, for example, over-runs of value ranges with figures, or time errors with steps.
S
SA85 module The SA85 module is a Modbus Plus adapter for an IBM-AT or compatible computer.
Section A section can be used, for example, to describe the functioning method of a technological unit, such as a motor. A Program or DFB consist of one or more sections. Sections can be programmed with the IEC programming languages FBD and SFC. Only one of the named programming languages can be used within a section. Each section has its own Document window in Concept. For reasons of clarity, it is recommended to subdivide a very large section into several small ones. The scroll bar serves to assist scrolling in a section.
Separator format (4:00001) The first figure (the Reference) is separated from the ensuing five figure address by a colon (:).
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Glossary
Sequence language (SFC) The SFC Language elements enable the subdivision of a PLC program organizational unit in a number of Steps and Transitions, which are connected horizontally by aligned Connections. A number of actions belong to each step, and a transition condition is linked to a transition.
Serial ports With serial ports (COM) the information is transferred bit by bit.
Source code data file (Concept EFB) The source code data file is a usual C++ source file. After execution of the menu command Library Generate data files this file contains an EFB code framework, in which a specific code must be entered for the selected EFB. To do this, click on the menu command Objects Source.
Standard format (400001) The five figure address is located directly after the first figure (the reference).
Standardized literals If the data type for the literal is to be automatically determined, use the following construction: Data type name#Literal value. Example INT#15 (Data type: Integer, value: 15), BYTE#00001111 (data type: Byte, value: 00001111) REAL#23.0 (Data type: Real, value: 23.0) For the assignment of REAL data types, there is also the possibility to enter the value in the following way: 23.0. Entering a comma will automatically assign the data type REAL.
State RAM The state RAM is the storage for all sizes, which are addressed in the user program via References (Direct display). For example, input bits, discretes, input words, and discrete words are located in the state RAM.
Statement (ST) Instructions are "commands" of the ST programming language. Instructions must be terminated with semicolons. Several instructions (separated by semi-colons) can occupy the same line.
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Glossary
Status bits There is a status bit for every node with a global input or specific input/output of Peer Cop data. If a defined group of data was successfully transferred within the set time out, the corresponding status bit is set to 1. Alternatively, this bit is set to 0 and all data belonging to this group (of 0) is deleted.
Step SFC Language element: Situations, in which the Program behavior follows in relation to the inputs and outputs of the same operations, which are defined by the associated actions of the step.
Step name The step name functions as the unique flag of a step in a Program organization unit. The step name is automatically generated, but can be edited. The step name must be unique throughout the whole program organization unit, otherwise an Error message appears. The automatically generated step name always has the structure: S_n_m S = Step n = Section number (number running) m = Number of steps in the section (number running)
Structured text (ST) ST is a text language according to IEC 1131, in which operations, e.g. call up of Function blocks and Functions, conditional execution of instructions, repetition of instructions etc. are displayed through instructions.
Structured variables Variables, one of which is assigned a Derived data type defined with STRUCT (structure). A structure is a collection of data elements with generally differing data types ( Elementary data types and/or derived data types).
SY/MAX In Quantum control devices, Concept closes the mounting on the I/O population SY/MAX I/O modules for RIO control via the Quantum PLC with on. The SY/MAX remote subrack has a remote I/O adapter in slot 1, which communicates via a Modicon S908 R I/O system. The SY/MAX I/O modules are performed when highlighting and including in the I/O population of the Concept configuration.
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Glossary
Symbol (Icon) Graphic display of various objects in Windows, e.g. drives, user programs and Document windows.
T
Template data file (Concept EFB) The template data file is an ASCII data file with a layout information for the Concept FBD editor, and the parameters for code generation.
TIME TIME stands for the data type "Time span". The input appears as Time span literal. The length of the data element is 32 bit. The value range for variables of this type stretches from 0 to 2exp(32)-1. The unit for the data type TIME is 1 ms.
Time span literals Permitted units for time spans (TIME) are days (D), hours (H), minutes (M), seconds (S) and milliseconds (MS) or a combination thereof. The time span must be denoted by the prefix t#, T#, time# or TIME#. An "overrun" of the highest ranking unit is permitted, i.e. the input T#25H15M is permitted. Example t#14MS, T#14.7S, time#18M, TIME#19.9H, t#20.4D, T#25H15M, time#5D14H12M18S3.5MS
Token The network "Token" controls the temporary property of the transfer rights via a single node. The token runs through the node in a circulating (rising) address sequence. All nodes track the Token run through and can contain all possible data sent with it.
Traffic Cop The Traffic Cop is a component list, which is compiled from the user component list. The Traffic Cop is managed in the PLC and in addition contains the user component list e.g. Status information of the I/O stations and modules.
Transition The condition with which the control of one or more Previous steps transfers to one or more ensuing steps along a directional Link.
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Glossary
U
UDEFB User defined elementary functions/function blocks Functions or Function blocks, which were created in the programming language C, and are available in Concept Libraries.
UDINT UDINT stands for the data type "unsigned double integer". The input appears as Integer literal, Base 2 literal, Base 8 literal or Base 16 literal. The length of the data element is 32 bit. The value range for variables of this type stretches from 0 to 2exp(32)-1.
UINT UINT stands for the data type "unsigned integer". The input appears as Integer literal, Base 2 literal, Base 8 literal or Base 16 literal. The length of the data element is 16 bit. The value range for variables of this type stretches from 0 to (2exp16)-1.
Unlocated variable Unlocated variables are not assigned any state RAM addresses. They therefore do not occupy any state RAM addresses. The value of these variables is saved in the system and can be altered with the reference data editor. These variables are only addressed by symbolic names. Signals requiring no peripheral access, e.g. intermediate results, system tags etc, should primarily be declared as unlocated variables.
V
Variables Variables function as a data exchange within sections between several sections and between the Program and the PLC. Variables consist of at least a variable name and a Data type. Should a variable be assigned a direct Address (Reference), it is referred to as a Located variable. Should a variable not be assigned a direct address, it is referred to as an unlocated variable. If the variable is assigned a Derived data type, it is referred to as a Multi-element variable. Otherwise there are Constants and Literals.
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Glossary
Vertical format Vertical format means that the page is higher than it is wide when looking at the printed text.
W
Warning When processing a FFB or a Step a critical status is detected (e.g. critical input value or a time out), a warning appears, which can be viewed with the menu command Online Event display... . With FFBs the ENO output remains at "1".
WORD WORD stands for the data type "Bit sequence 16". The input appears as Base 2 literal, Base 8 literal or Base 1 16 literal. The length of the data element is 16 bit. A numerical range of values cannot be assigned to this data type.
31007523 8/2010
1175
Glossary
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Index 31007523 8/2010
Index
B C A
984LL 1x3x, 79 AD16, 81 ADD, 83 AND, 85 BCD, 91 BLKM, 93 BLKT, 97 BMDI, 101 BROT, 103 CALL, 107 CANT, 115 CCPF, 121 CCPV, 125 CFGC, 129 CFGF, 133 CFGI, 137 CFGR, 141 CFGS, 145 CHS, 149 CKSM, 155 closed loop control / analog values, 43 CMPR, 159 coils, 163 coils, contacts, and interconnects, 65 COMM, 167 COMP, 171 contacts, 177 CONV, 181 CTIF, 185 DCTR, 193 DIOH, 197
1177
0-9
1 millisecond timer, 1059 1 second timer, 1055 1/100th of a second timer, 1047 1/10th of a second timer, 1051 1x3x, 79 4-station ratio controller, 893
31007523 8/2010
Index
DISA, 201 DIV, 205 DLOG, 211 DMTH, 217 DRUM, 225 DV16, 231 EARS, 239 EMTH, 247 EMTH-ADDDP, 253 EMTH-ADDFP, 259 EMTH-ADDIF, 263 EMTH-ANLOG, 267 EMTH-ARCOS, 271 EMTH-ARSIN, 277 EMTH-ARTAN, 281 EMTH-CHSIN, 287 EMTH-CMPFP, 293 EMTH-CMPIF, 299 EMTH-CNVDR, 305 EMTH-CNVFI, 311 EMTH-CNVIF, 317 EMTH-CNVRD, 323 EMTH-COS, 329 EMTH-DIVDP, 333 EMTH-DIVFI, 339 EMTH-DIVFP, 343 EMTH-DIVIF, 347 EMTH-ERLOG, 351 EMTH-EXP, 357 EMTH-LNFP, 363 EMTH-LOG, 369 EMTH-LOGFP, 375 EMTH-MULDP, 381 EMTH-MULFP, 387 EMTH-MULIF, 391 EMTH-PI, 397 EMTH-POW, 403 EMTH-SINE, 407 EMTH-SQRFP, 413 EMTH-SQRT, 419 EMTH-SQRTP, 425 EMTH-SUBDP, 431 EMTH-SUBFI, 437 EMTH-SUBFP, 443 EMTH-SUBIF, 449
1178
EMTH-TAN, 453 ESI, 457 EUCA, 475 FIN, 489 formatting messages for ASCII
31007523 8/2010
Index
READ/WRIT operations, 57 FOUT, 493 FTOI, 499 G392, 553 GD92, 503 GFNX, 515 GG92, 529 GM92, 541 HLTH, 565 HSBY, 579 IBKR, 585 IBKW, 589 ICMP, 593 ID, 599 IE, 603 IMIO, 607 IMOD, 613 INDX, 621 interrupt handling, 71 ITMR, 625 ITOF, 631 JOGS, 635 JSR, 639 LAB, 643 LOAD, 647 MAP3, 651 MATH, 659 MBIT, 667 MBUS, 671 MMFB, 681 MMFE, 685 MMFI, 689 MMFS, 695 MOVE, 699 MRTM, 703 MSPX, 709 MSTR, 713 MU16, 759 MUL, 763 NBIT, 767 NCBT, 771 NOBT, 775 NOL, 779 OR, 787 PCFL, 793
31007523 8/2010
PCFL-AIN, 799 PCFL-ALARM, 805 PCFL-AVER, 815 PCFL-CALC, 821 PCFL-DELAY, 827 PCFL-EQN, 831 PCFL-INTEG, 837 PCFL-KPID, 841 PCFL-LIMIT, 847 PCFL-LIMV, 851 PCFL-LKUP, 855 PCFL-LLAG, 861 PCFL-MODE, 865 PCFL-ONOFF, 869 PCFL-PI, 873 PCFL-PID, 879 PCFL-RAMP, 885 PCFL-RATE, 889 PCFL-RATIO, 893 PCFL-RMPLN, 897 PCFL-SEL, 901 PCFL-TOTAL, 907 PEER, 913 PID2, 917 R > T, 931 RBIT, 935 READ, 939 RET, 945 RTTI, 949 RTU, 957 SAVE, 963 SBIT, 967 SCIF, 971 SENS, 975 shorts, 979 SKP, 983 SRCH, 987 STAT, 993 SU16, 1021 SUB, 1025 subroutine handling, 73 SWAP, 1029 T.01 timer, 1047 T>R, 1033 T>T, 1041
1179
Index
T0.1 timer, 1051 T1.0 timer, 1055 T1MS timer, 1059 TBLK, 1065 TEST, 1073 TTR, 1037 UCTR, 1077 VMER, 1081 VMEW, 1085 WRIT, 1089 XMIT, 1095 XMIT communication block, 1103 XMIT conversion block, 1123 XMIT port status block, 1115 XMRD, 1131 XMWT, 1137 XOR, 1143
A
abort ESI, 457 absolute move, 699 AD16, 81 ADD, 83 add 16 bit, 81 addition, 83 AD16, 81 ADD, 83 EMTH-ADDFP, 263 addition, double precision EMTH-ADDDP, 253 addition, floating point EMTH-ADDFP, 259 Advanced Calculations, 794, 794 AGA #3 G392, 553 GD92 gas flow, 503 GG92, 529 GM92, 541 AGA #3 85 GFNX, 515 AGA #8 GD92, 503 GM92, 541
1180
alarm PCFL-ALARM, 805 algorithms, PID PCFL-PID, 879 analog input PCFL-AIN, 799 Analog Output, 811 analog values, 43 AND, 85 antilogarithm, base 10 EMTH-ANLOG, 267 API 21.1 audit trail G392, 553 arcsine of an angle (in radians) EMTH-ARSIN, 277 ASCII communications COMM, 167 ASCII functions READ, 939 WRIT, 1089 ASCII message ESI, 457 auto mode, put input PCFL-MODE, 865 average weighted inputs calculate, 815 axis, imaginary CFGI, 137 axis, remote CFGR, 141 axis, SERCOS CFGS, 145
B
base 10 antilogarithm EMTH-ANLOG, 267 base 10 logarithm EMTH-LOG, 369 BCD, 91 binary to binary code, 91 bit control NBIT, 767 bit pattern comparison CMPR, 159 bit rotate, 103
31007523 8/2010
Index
BLKM, 93 BLKT, 97 block move, 93 block move with interrupts disabled, 101 block to table, 97 BMDI, 101 boolean exclusive OR, 1143 BROT, 103
C
calculated preset formula, 821 calculation, derivative rate over specified time PCFL-RATE, 889 CALL, 107 cam profile CCPF, 121 CCPV, 125 CamProfile type, 122 CANT, 115 CCPF, 121 CCPV, 125 central alarm handler, 805 CFGC, 129 CFGF, 133 CFGI, 137 CFGR, 141 CFGS, 145 changing the sign of a floating point number EMTH-CHSIN, 287 check sum CKSM, 155 CHS, 149 CKSM, 155 closed loop control, 43 CMPR, 159 coils, 65, 163 CANT, 115 COMM, 167 common logarithm EMTH-LOGFP, 375 communication block XMIT, 1103
communications MSTR, 713 communications, ASCII COMM, 167 COMP, 171 compare register, 159 complement a matrix, 171 comprehensive ISA non interacting PID, 841 contacts, 65, 177 CANT, 115 controller, 4-station ratio PCFL-RATIO, 893 CONV, 181 conversion binary to BCD, 91 conversion BCD to binary, 91 conversion block XMIT, 1123 conversion of degrees to radians EMTH-CNVDR, 305 conversion of radians to degrees EMTH-CNVRD, 323 convert data CONV, 181 coordinated set CFGC, 129 cosine of an angle (in radians) EMTH-COS, 329 cosine, floating point arc EMTH-ARCOS, 271 counter CTIF, 185 counters DCTR, 193 counters / timers T.01 timer, 1047 T0.1 timer, 1051 T1.0 timer, 1055 T1MS timer, 1059 UCTR, 1077 CTIF, 185
31007523 8/2010
1181
Index
D
data ESI, 457 data logging for PCMCIA read/write support, 211 data, convert CONV, 181 DCTR, 193 deadband, on/off values PCFL-ONOFF, 869 deferred DX function CALL, 107, 107 degrees to radians, conversion EMTH-CNVDR, 305 delay, time PCFL-DELAY, 827 derivative rate calculation over a specified time, 889 derivative, proportional integral PID2, 917 detail method GD92, 503 GM92, 541 DIOH, 197 DISA, 201 disabled discrete monitor DISA, 201 discrete monitor, disabled DISA, 201 distributed I/O health, 197 DIV, 205 divide DIV, 205 divide 16 bit, 231 division, double precision EMTH-DIVDP, 333 division, floating point EMTH-DIVFP, 343 DLOG, 211 DMTH, 217 double precision addition EMTH-ADDDP, 253 double precision division EMTH-DIVDP, 333
double precision math DMTH, 217 double precision multiplication EMTH-MULDP, 381 double precision subtraction EMTH-SUBDP, 431 down counter DCTR, 193 DRUM, 225 drum sequencer, 225 DV16, 231 DX function, deferred CALL, 107
E
EARS, 239 EMTH, 247 EMTH-ADDDP, 253 EMTH-ADDFP, 259 EMTH-ADDIF, 263 EMTH-ANLOG, 267 EMTH-ARCOS, 271 EMTH-ARSIN, 277 EMTH-ARTAN, 281 EMTH-CHSIN, 287 EMTH-CMPFP, 293 EMTH-CMPIF, 299 EMTH-CNVDR, 305 EMTH-CNVFI, 311 EMTH-CNVIF, 317 EMTH-CNVRD, 323 EMTH-COS, 329 EMTH-DIVDP, 333 EMTH-DIVFI, 339 EMTH-DIVFP, 343 EMTH-DIVIF, 347 EMTH-ERLOG, 351 EMTH-EXP, 357 EMTH-LNFP, 363 EMTH-LOG, 369 EMTH-LOGFP, 375 EMTH-MULDP, 381 EMTH-MULFP, 387 EMTH-MULIF, 391
31007523 8/2010
1182
Index
EMTH-PI, 397 EMTH-POW, 403 EMTH-SINE, 407 EMTH-SQRFP, 413 EMTH-SQRT, 419 EMTH-SQRTP, 425 EMTH-SUBDP, 431 EMTH-SUBFI, 437 EMTH-SUBFP, 443 EMTH-SUBIF, 449 EMTH-TAN, 453 engineering unit conversion and alarms EUCA, 475 equation calculator, formatted PCFL-EQN, 831 error report log, floating point EMTH-ERLOG, 351 errors, run time ESI, 457 ESI, 457 EUCA, 475 event/alarm recording system EARS, 239 exclusive OR, 1143 exponential function, floating point EMTH-EXP, 357 extended math EMTH, 247 extended memory read, 1131 extended memory write, 1137
F
fast I/O instructions BMDI, 101 ID, 599 IE, 603 IMIO, 607 IMOD, 613 ITMR, 625 FIN, 489 first in, 489 first out, 493 first-order lead/lag filter, 861 flash, load, 647
31007523 8/2010
flash, save SAVE, 963 floating point - integer subtraction EMTH-SUBFI, 437 floating point addition EMTH-ADDFP, 259 floating point addition + integer EMTH-ADDIF, 263 floating point arc cosine of an angle (in radians) EMTH-ARCOS, 271 floating point arc tangent of an angle (in radians) EMTH-ARTAN, 281 floating point arcsine of an angle (in radians) EMTH-ARSIN, 277 floating point common logarithm EMTH-LOGFP, 375 floating point comparison EMTH-CMPFP, 293 floating point conversion of degrees to radians EMTH-CNVDR, 305 floating point conversion of radians to degrees EMTH-CNVRD, 323 floating point cosine of an angle (in radians) EMTH-COS, 329 floating point divided by integer EMTH-DIVFI, 339 floating point division EMTH-DIVFP, 343 floating point error report log, 351 floating point exponential function EMTH-EXP, 357 floating point multiplication EMTH-MULFP, 387 floating point natural logarithm EMTH-LNFP, 363 floating point number to integer power EMTH-POW, 403 floating point number, changing the sign EMTH-CHSIN, 287 floating point sine of an angle (in radians) EMTH-SINE, 407
1183
Index
floating point square root EMTH-SQRFP, 413 EMTH-SQRT, 419 floating point subtraction EMTH-SUBFP, 443 floating point subtraction, integer EMTH-SUBIF, 449 floating point tangent of an angle (in radians), 453 floating point to integer, 499 floating point to integer conversion EMTH-CNVFI, 311 floating point value of Pi EMTH-PI, 397 follower set CFGF, 133 formatted equation calculator, 831 formatting messages, 57 FOUT, 493 FTOI, 499
HSBY, 579
I
I/O, health DIOH, 197 IBKR, 585 IBKW, 589 ICMP, 593 ID, 599 IE, 603 imaginary axis CFGI, 137 IMIO, 607 immediate DX function CALL, 107 immediate I/O, 607 immediate incremental move, 621 IMOD, 613 indirect block read, 585 indirect block write, 589 INDX, 621 registers, 624 input compare, 593 input selection, 901 input simulation 1x3x, 79 installation of DX loadables, 75 instruction coils, contacts, and interconnects, 65 instruction groups, 31 ASCII communication instructions, 32 coils, contacts, and interconnects, 42 counters and timers instructions, 33 fast I/O instructions, 34 loadable DX, 35 math instructions, 36 matrix instructions, 38 miscellaneous, 39 move instructions, 40 Instruction Groups Overview, 32 instruction groups skips/specials, 41
G
G392, 553 gas flow function block, 503, 515, 529 G392, 553 GM92, 541 GD92, 503 get data ESI, 457 GFNX, 515 GG92, 529 GM92, 541 gross method G392, 553 GG92, 529
H
health, distributed I/O DIOH, 197 history and status matrices, 565 HLTH, 565 hot standby, 579 CHS, 149
1184
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Index
Instruction Groups Special Instructions, 41 integer - floating point subtraction EMTH-SUBIF, 449 integer + floating point addition EMTH-ADDIF, 263 integer divided by floating point EMTH-DIVIF, 347 integer operations MATH, 659 integer subtraction, floating point EMTH-SUBFI, 437 integer to floating point, 631 integer to floating point conversion EMTH-CNVIF, 317 integer x floating point multiplication EMTH-MULIF, 391 integer-floating point comparison EMTH-CMPIF, 299 integrate input at specified interval, 837 interconnects, 65 interfaces, sequential control SCIF, 971 interrupt CTIF, 185 interrupt disable, 599 interrupt enable, 603 interrupt handling, 71 interrupt module instruction, 613 interrupt timer, 625 ISA non interacting PI, 873 ITMR, 625 ITOF, 631
J
jog move, 635 JOGS, 635 JSR, 639 jump to subroutine, 639
lead/lag filter, first-order PCFL-LLAG, 861 limiter for the Pv, 847 limiter, velocity PCFL-LIMV, 851 LL984 PCFL-AOUT, 811 LOAD, 647 load flash, 647 load the floating point value of Pi EMTH-PI, 397 loadable DX CHS, 149 DRUM, 225 ESI, 457 EUCA, 475 HLTH, 565 ICMP, 593 installation, 75 MAP3, 651 MBUS, 671 MRTM, 703 NOL, 779 PEER, 913 logarithm EMTH-LNFP, 363 logarithm, base 10 EMTH-LOG, 369 logarithm, floating point common EMTH-LOGFP, 375 logarithmic ramp to set point, 897 logging, data DLOG, 211 logical AND, 85 logical OR, 787 Lonworks NOL, 779 look-up table, 855
M
manual mode, put input PCFL-MODE, 865 map transaction, 651 MAP3, 651
1185
L
LAB, 643 label for a subroutine, 643
31007523 8/2010
Index
master instruction, 713 MATH, 659 math AD16, 81 ADD, 83 BCD, 91 DIV, 205 DV16, 231 EMTH, 247 FTOI, 499 ITOF, 631 MU16, 759 MUL, 763 SU16, 1021 SUB, 1025 TEST, 1073 math, double precision DMTH, 217 matrix AND, 85 BROT, 103 CMPR, 159 COMP, 171 MBIT, 667 NBIT, 767 NCBT, 771 NOBT, 775 OR, 787 RBIT, 935 SBIT, 967 SENS, 975 XOR, 1143 MBIT, 667 MBUS, 671 memory read, extended XMRD, 1131 memory write, extended XMWT, 1137 metering flow, totalizer PCFL-TOTAL, 907 MMFB, 681 MMFE, 685 MMFI, 689 MMFS, 695
Modbus functions XMIT, 1097 Modbus Plus MSTR, 713 Modbus Plus Network Statistics MSTR, 744 mode, auto or manual PCFL-MODE, 865 modify bit, 667 monitor, disabled discrete DISA, 201 motion framework bits block, 681 motion framework extended parameters subroutine, 685 motion framework initialize block, 689 motion framework subroutine block, 695 MOVE, 699 move BLKM, 93 BLKT, 97 FIN, 489 FOUT, 493 IBKR, 585 IBKW, 589 INDX, 621 JOGS, 635 R --> T, 931 SRCH, 987 T-->T, 1041 T>R, 1033 TBLK, 1065 MRTM, 703 MSPX, 709 MSTR, 713 Clear Local Statistics, 728 Clear Remote Statistics, 734 CTE Error Codes for SY/MAX and TCP/IP Ethernet, 758 Get Local Statistics, 726 Get Remote Statistics, 732
1186
31007523 8/2010
Index
Modbus Plus and SY/MAX Ethernet Error Codes, 751 Modbus Plus Network Statistics, 744 Peer Cop Health, 736 Read CTE (Config Extension Table), 740 Read Global Data, 731 Reset Option Module, 738 SY/MAX-specific Error Codes, 753 TCP/IP Ethernet Error Codes, 755 TCP/IP Ethernet Statistics, 749 Write CTE (Config Extension Table), 742 Write Global Data, 730 MU16, 759 MUL, 763 multi-register transfer module, 703 multiplication EMTH-MULDP, 381 multiplication, floating point EMTH-MULFP, 387 multiplication, integer x floating point EMTH-MULIF, 391 multiply, 763 multiply 16 bit, 759
P
PCFL, 793 PCFL subfunctions general, 45 PCFL-AIN, 799 PCFL-ALARM, 805 PCFL-AOUT, 811 PCFL-AVER, 815 PCFL-CALC, 821 PCFL-DELAY, 827 PCFL-EQN, 831 PCFL-INTEG, 837 PCFL-KPID, 841 PCFL-LIMIT, 847 PCFL-LIMV, 851 PCFL-LKUP, 855 PCFL-LLAG, 861 PCFL-MODE, 865 PCFL-ONOFF, 869 PCFL-PI, 873 PCFL-PID, 879 PCFL-RAMP, 885 PCFL-RATE, 889 PCFL-RATIO, 893 PCFL-RMPLN, 897 PCFL-SEL, 901 PCFL-Subfunction PCFL-AOUT, 811 PCFL-TOTAL, 907 PCMICA, data logging DLOG, 211 PEER, 913 Pi EMTH-PI, 397 PI, ISA non interacting PCFL-PI, 873 PID algorithms, 879 PID example, 49 PID, non interacting PCFL-KPID, 841 PID2, 917 PID2 level control example, 53 port status block XMIT, 1115 process control function library, 793
1187
N
natural logarithm EMTH-LNFP, 363 NBIT, 767 NCBT, 771 network option module for Lonworks, 779 networks, skipping SKP, 983 NOBT, 775 NOL, 779 normally closed bit, 771 normally open bit, 775 NX19 68 GFNX, 515
O
on/off values for deadband, 869 OR, 787 OR, boolean exclusive, 1143
31007523 8/2010
Index
process square root EMTH-SQRTP, 425 process variable, 44 proportional integral derivative, 917 put data ESI, 457 put input in auto or manual mode, 865 Pv, limiter PCFL-LIMIT, 847 Pv, velocity limiter PCFL-LIMV, 851
Regulatory Control, 794 remote axis CFGR, 141 remote terminal unit, 957 reset bit, 935 RET, 945 return from a subroutine, 945 RTTI, 949 RTU, 957 run time errors ESI, 457
R
R > T, 931 radians to degrees, conversion EMTH-CNVRD, 323 raising a floating point number to an integer power EMTH-POW, 403 ramp to set point at a constant rate, 885 ramp, logarithmic, to set point PCFL-RMPLN, 897 rate, derivative PCFL-RATE, 889 ratio, 4-station controller PCFL-RATIO, 893 RBIT, 935 READ, 939 MSTR, 724 read VME, 1081 read ASCII message ESI, 457 read, extended memory XMRD, 1131 READ/WRIT operations, 57 read/write, data logging DLOG, 211 recording, event/alarm EARS, 239 register to input table, 949 register to table, 931 register, compare CMPR, 159
1188
S
SAVE, 963 SBIT, 967 SCIF, 971 search, 987 selection, input PCFL-SEL, 901 SENS, 975 sequencer, drum DRUM, 225 sequential control interfaces, 971 SERCOS axis CFGS, 145 seriplex MSPX, 709 set bit, 967 set point variable, 44 shorts, 979 sign, floating point number EMTH-CHSIN, 287 sine, of an angle (in radians) EMTH-SINE, 407 skipping networks, 983 skips / specials RET, 945 skips/specials JSR, 639 LAB, 643 SKP, 983 special PCFL, 793
31007523 8/2010
Index
Special PCFL-, 811 special PCFL-AIN, 799 PCFL-ALARM, 805 PCFL-AVER, 815 PCFL-CALC, 821 PCFL-DELAY, 827 PCFL-EQN, 831 PCFL-INTEG, 837 PCFL-KPID, 841 PCFL-LIMIT, 847 PCFL-LIMV, 851 PCFL-LKUP, 855 PCFL-LLAG, 861 PCFL-MODE, 865 PCFL-ONOFF, 869 PCFL-PI, 873 PCFL-PID, 879 PCFL-RAMP, 885 PCFL-RATE, 889 PCFL-RATIO, 893 PCFL-RMPLN, 897 PCFL-SEL, 901 PCFL-TOTAL, 907 PID2, 917 STAT, 993 square root, floating point EMTH-SQRFP, 413 EMTH-SQRT, 419 square root, process EMTH-SQRTP, 425 SRCH, 987 STAT, 993 status, 993 SU16, 1021 SUB, 1025 SUB block CANT, 115 subroutine handling, 73 subroutine, return from RET, 945 subtract 16 bit, 1021 subtraction, 1025
subtraction, double precision EMTH-SUBDP, 431 subtraction, floating point EMTH-SUBFP, 443 subtraction, integer EMTH-SUBFI, 437 subtraction, integer - floating point EMTH-SUBIF, 449 support of the ESI module, 457 SWAP, 1029
T
T-->R, 1033 T.01 timer, 1047 T>T, 1041 T0.1 timer, 1051 T1.0 timer, 1055 T1MS timer, 1059 table to block, 1065 table to register, 1037, 1033 table to table, 1041 tangent EMTH-TAN, 453 tangent, floating point arc EMTH-ARTAN, 281 TBLK, 1065 TCP/IP Ethernet Statistics MSTR, 749 TEST, 1073 test of 2 values, 1073 time delay queue, 827 timer CTIF, 185 timers CANT, 115 DCTR, 193 T.01, 1047 T0.1, 1051 T1.0, 1055 T1MS, 1059 UCTR, 1077 totalizer for metering flow, 907 transfer module, multi-register MRTM, 703
1189
31007523 8/2010
Index
transmit XMIT, 1095 TTR, 1037
U
UCTR, 1077 up counter, 1077
V
variable increments CCPV, 125 variable instruments CCPF, 121 velocity limiter for changes in the Pv, 851 VME bit swap, 1029 VMER, 1081 VMEW, 1085
W
WRIT, 1089 Write MSTR, 722 write VME, 1085 write ASCII message ESI, 457 write, extended memory XMWT, 1137 write/read, data logging DLOG, 211
X
XMIT, 1095 XMIT communication block, 1103 XMIT conversion block, 1123 XMIT port status block, 1115 XMRD, 1131 XMWT, 1137 XOR, 1143
1190
31007523 8/2010

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31007523 8/2010

Safety Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . About the Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Part I General Information . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 2 Instruction Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 3 Closed Loop Control / Analog Values . . . . . . . . . . . . . .

Chapter 4 Formatting Messages for ASCII READ/WRIT Operations

Chapter 5 Coils, Contacts, and Interconnects. . . . . . . . . . . . . . . . .

Chapter 6 Interrupt Handling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 7 Subroutine Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 8 Installation of DX Loadables. . . . . . . . . . . . . . . . . . . . . . .

Part II Instruction Descriptions (A to D) . . . . . . . . . . . . . . .

Chapter 10 AD16: Ad 16 Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 11 ADD: Addition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 12 AND: Logical And . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 13 BCD: Binary to Binary Code . . . . . . . . . . . . . . . . . . . . . . .

Chapter 14 BLKM: Block Move . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 15 BLKT: Block to Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 16 BMDI: Block Move with Interrupts Disabled . . . . . . . . . .

Chapter 17 BROT: Bit Rotate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 18 CALL: Activate Immediate or Deferred DX Function . . .

Chapter 20 CCPF - Configure Cam Profile with Variable Instruments

Chapter 21 CCPV - Configure Cam Profile with Variable Increments

Chapter 22 CFGC - Configure Coordinated Set. . . . . . . . . . . . . . . . .

Chapter 23 CFGF - Configure Follower Set . . . . . . . . . . . . . . . . . . . .

Chapter 24 CFGI Configure Imaginary Axis . . . . . . . . . . . . . . . . . .

Chapter 25 CFGR Configure Remote Axis . . . . . . . . . . . . . . . . . . .

Chapter 26 CFGS Configure SERCOS Axis . . . . . . . . . . . . . . . . . .

Chapter 27 CHS: Configure Hot Standby. . . . . . . . . . . . . . . . . . . . . .

Chapter 28 CKSM: Check Sum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 29 CMPR: Compare Register . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 31 COMM - ASCII Communications Function . . . . . . . . . . .

Chapter 32 COMP: Complement a Matrix . . . . . . . . . . . . . . . . . . . . . .

Chapter 34 CONV - Convert Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 35 CTIF - Counter, Timer, and Interrupt Function . . . . . . . .

Chapter 36 DCTR: Down Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 37 DIOH: Distributed I/O Health . . . . . . . . . . . . . . . . . . . . . . .

Chapter 38 DISA - Disabled Discrete Monitor . . . . . . . . . . . . . . . . . .

Chapter 39 DIV: Divide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 40 DLOG: Data Logging for PCMCIA Read/Write Support .

Chapter 41 DMTH - Double Precision Math. . . . . . . . . . . . . . . . . . . . .

Chapter 42 DRUM: DRUM Sequencer . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 43 DV16: Divide 16 Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Part III Instruction Descriptions (E) . . . . . . . . . . . . . . . . . . .

Chapter 45 EMTH: Extended Math . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 46 EMTH-ADDDP: Double Precision Addition . . . . . . . . . .

Chapter 47 EMTH-ADDFP: Floating Point Addition . . . . . . . . . . . . .

Chapter 48 EMTH-ADDIF: Integer + Floating Point Addition . . . . . .

Chapter 49 EMTH-ANLOG: Base 10 Antilogarithm . . . . . . . . . . . . . .

Chapter 50 EMTH-ARCOS: Floating Point Arc Cosine of an Angle (in Radians) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 51 EMTH-ARSIN: Floating Point Arcsine of an Angle (in Radians). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 52 EMTH-ARTAN: Floating Point Arc Tangent of an Angle (in Radians) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 53 EMTH-CHSIN: Changing the Sign of a Floating Point Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 54 EMTH-CMPFP: Floating Point Comparison. . . . . . . . . . .

Chapter 55 EMTH-CMPIF: Integer-Floating Point Comparison . . . . .

Chapter 56 EMTH-CNVDR: Floating Point Conversion of Degrees to Radians . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 57 EMTH-CNVFI: Floating Point to Integer Conversion . . .

Chapter 58 EMTH-CNVIF: Integer to Floating Point Conversion . . .

Chapter 59 EMTH-CNVRD: Floating Point Conversion of Radians to Degrees. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 60 EMTH-COS: Floating Point Cosine of an Angle (in Radians) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 61 EMTH-DIVDP: Double Precision Division. . . . . . . . . . . .

Chapter 62 EMTH-DIVFI: Floating Point Divided by Integer . . . . . . .

Chapter 63 EMTH-DIVFP: Floating Point Division. . . . . . . . . . . . . . .