IEC LAB ASSIGNMENT-1

NAME:MADHUKAR AGARWAL ENTRY NO-2011EEN2477

Question-1: For minimum length =.18micron and width=.24 micron of NMOS ,the graph of log10(i) vs VDS for NMOS is shown at values of VDS=0.5, 1 ,1.5 and 1.8.
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Question-2: 1) Boundary point between the exponential and quadratic regions for NMOS At the boundary point of exponential and quadratic regions we have VGS=Vt(threshold voltage) and the corresponding value of drain current Id=Id(st).These points are clearly depicted on the graph.

Question-2: Slope of curve in the exponential region

We find that slope in units of volts/decade is equal to .089498(approx).

Question-2: Finding n- factor S=n(KT/q)ln(10)

Here the slope is measured in mV/decade. For an ideal transistor (KT/q)ln(10) equals to 60 mV/decade. By Using this formula We find that the approximate value of n-factor =1.5

Question-2: Plot of Vt vs VDS BY using MATLAB tool

Question-2: Identifying the boundary between the linear and quadratic regions
Boundary point between the regions(linear,exponential and quadratic) can be easily identified by the plot of derivative of drain current (Id) versus VGS for different values of VDS=0.5,1.0,1.5 and 1.8.Boundary points are shown in the figure below.

TABULATION OF VOLTAGE RANGES FOR DIFFERENT OPERATIONS OF NMOS

LINEAR REGION VDS 1.8V 1.5V 1.0V 0.5V VGS 1.284-1.8V 1.164-1.8V .9508-1.8V .7995-1.8V

QUADRATIC REGION

VDS 1.8V 1.5V 1.0V 0.5V

VGS .510-1.284V .520-1.164V .529-.9508V .5311-.7995V

EXPONENTIAL REGION

VDS 1.8V 1.5V 1.0V 0.5V

VGS 0-.510V 0-.520V 0-.529V 0-.5311V

Question-2: For minimum length =.18micron and width=.24 micron of PMOS ,the graph of log10(i) vs VDS for PMOS is shown at values of VDS=0.5, 1 ,1.5 and 1.8.

Question-2: 1) Boundary point between the exponential and quadratic regions for PMOS At the boundary point of exponential and quadratic regions we have VGS=Vt(threshold voltage) and the corresponding value of drain current Id=Id(st).These points are clearly depicted on the graph.

Question-2: Slope of curve in the exponential region

We find that slope in units of volts/decade is equal to .09730(approx).

Question-2: Finding n- factor S=n(KT/q)ln(10)

Here the slope is measured in mV/decade. For an ideal transistor (KT/q) ln(10) equals to 60 mV/decade. By Using this formula We find that the approximate value of n-factor =1.62.

Question-2: Plot of Vt vs VDS BY using MATLAB tool

Question-2: Identifying the boundary between the linear and quadratic regions
Boundary point between the regions(linear,exponential and quadratic) can be easily identified by the plot of derivative of drain current (Id) versus VGS for different values of VDS=0.5,1.0,1.5 and 1.8.Boundary points are shown in the figure below.

TABULATION OF VOLTAGE RANGES FOR DIFFERENT OPERATIONS OF PMOS

LINEAR REGION

VDS 1.8V 1.5V 1.0V 0.5V

VGS 1.42-1.8V 1.297-1.8V 1.143-1.8V 1.0-1.8V

QUADRATIC REGION

VDS 1.8V 1.5V 1.0V 0.5V

VGS .5954-1.42V .5973-1.297V .5917-1.143V .5918-1.0V

EXPONENTIAL REGION

VDS 1.8V 1.5V 1.0V 0.5V

VGS 0-.5954V 0-.5973V 0-.5917V 0-.5918V

Question-3: Plot Id vs VDS Charchtersticks for VGS=2Vt,VGS=3Vt,VGS=VDD

Taking Vt=0.5Volts, we have plotted the Id versus VDS charachtersticks for NMOS corresponding to the values of VGS=1 , 1.5 , 1.8.

Taking again Vt=0.59 Volts, we have plotted the Id versus VSD charachtersticks for PMOS corresponding to the values of VSG=1.18 , 1.77 , 1.8.

Question-3: Developing a unified model and plotting with the help of matlab
For PMOS the correspondence between the simple model and SPECTRE simulation is shown in the figure...

For NMOS the correspondence between the simple model and SPECTRE simulation is shown in the figure...

FOR NMOS: VGS=Vt 6.58625*10^4 2.99*10^4 VGS=2*Vt 5.062*10^4 1.0276*10^4 VGS=VDD=1.8 4.629*10^4 7.3702*10^3

SIMULATOR MATLAB

FOR PMOS: VGS=Vt 4.63*10^4 1.733*10^4 VGS=2*Vt 4.54*10^4 7.5846*10^3 VGS=VDD=1.8 1.88*10^4 7.370*10^3

SIMULATOR MATLAB

Question-4:Modelling of ON resistance:
1) Keeping VGS=VDD, We have to draw a plot of 1/(derivative of Id with respect to VDS) versus VDS for different values of VDD=1V, 1.5V, 1.8V for NMOS.

2) Keeping VGS=VDD, We have to draw a plot of 1/(derivative of Id with respect to VDS) versus VDS for different values of VDD=1V, 1.5V, 1.8V for PMOS.

Question-4: Computing average resistance (Req2) for the above plot from VDS=VDD/2 to VDS=VDD for NMOS

Question-4: Computing average resistance (Req2) for the above plot from VDS=VDD/2 to VDS=VDD for PMOS

TABLE FOR REQ2:

VDD NMOS PMOS 1 65.8625K 310K 1.5 50.622K 189.48K 1.8 46.295K 164.38K

Question-5: Computation of the capacitances CGS and CGD

After reading from the model file for the section tt the parameters are as follows: Thickness of the oxide=4.2*10^-9 Permittivity of oxide=3.9*8.85*10^-12 CGS0=CGD0=2.35*10^-10*(Width)= 2.35*10^-10*.24*10^-6 W=.24*10^-6 L=.18*10^-6

Now computing capacitance of oxide per unit area=3.9*8.85*10^-12/4.2*10^-9 Now computing the value of CGCS in all the three regions In cutoff mode CGCS=0 In resistive mode CGCS= capacitance of oxide per unit area*W*L/2 In saturation mode CGCS=(2/3) *capacitance of oxide per unit area*W*L Now computing the value of CGCD in all the three regions In cutoff mode CGCD=0 In resistive mode CGCD= capacitance of oxide per unit area*W*L/2 In saturation mode CGCD=0 Now we can easily comput the value of capacitances CGS and CGD as follows: CGS=CGCS + CGS0 CGD=CGCD + CGD0 Region of Operation Cut-off Resistive Saturation CGS 0.564 x 10^-16 0.2334 x 10^-15 0.2924 x 10^-15 CGD 0.564 x 10^-16 0.2334 x 10^-15 0.564 x 10^-16

Question-5: Plot of Cg vs VGS charachtersticks for NMOS

Taking current source at gate = .1 mili ampere and the voltage at the gate terminal to be -3 volts, So for the given test method and circuit the plot of VGS versus time (transient response) and also the plot of Cg versus VGS Charachtersticks will look like as shown in the figure.

Question-5: Plot of Cg vs VGD charachtersticks for PMOS

Taking current source at gate = .1 mili ampere and the voltage at the gate terminal to be -3 volts, So for the given test method and circuit the plot of VGD versus time (transient response) and also the plot of Cg versus VGD Charachtersticks will look like as shown in the figure.

Question-5: Plot of Cd vs VDS charachtersticks for NMOS

In order to find out the value of aCd, taking the help of test method so for VGS=0 and by applying a current source between drain and source. Taking current source at drain = .1 mili ampere and the voltage at the drain terminal to be -3 volts, So for the given test method and circuit the plot of VDS versus time (transient response) and also the plot of Cd versus VDS Charachtersticks will look like as shown in the figure.

Question-5: Plot of Cs vs VSD charachtersticks for PMOS

In order to find out the value of Cs, taking the help of test method so for VGD=0 and by applying a current source between drain and source. Taking current source at source terminal = .1 mili ampere and the voltage at the source terminal to be -3 volts, So for the given test method and circuit the plot of VSD versus time (transient response) and also the plot of Cs versus VSD Charachtersticks will look like as shown in the figure.