Você está na página 1de 19

Conferences papers

1 hLLp//wwwleLanorg/conferencehLml
2 hLLp//amrlLaedu/cosma/sponsorshLml
3 http://cee.engineersnetwork.org/2011/
4. http://www.regencyengg.com/pdf/ncacee2011.pdf
5. http://www.interscience.ac.in/CCNS/iccns.html
6. http://www.icdecs2011.in
7. http://www.icca.org.in
8. http://icacsee.uacee.org
9. http://www.scit.edu/eites/home.htm
10. http://www.karunya.edu/ece/icdcs12/
11. http://ncetacs.anthonys.ac.in
12. http://icaceee.uacee.org
13 http://www.mgmt.iisc.ernet.in/ictm/CTM/Home.html
14. http://cee.engineersnetwork.org/2011/index.htm
13 hLLp//wwwleeewcncorg/CalllorapershLml
WCSN 2011 : Seventh International ConIerence on Wireless
Communication and Sensor Networks

lnk hLLp//wcsnlllLaacln/

When
ec 5, 2011 - ec 9, 2011
Where
Panna National Park, MP, ndia
Submission DeadIine
Sep 1, 2011
Notification Due
Oct 5, 2011
FinaI Version Due
Oct 20, 2011




Call For Papers
Wireless Communication and Sensor Networks (WCSN) occupy a very important place in
creating pervasive environment that would have profound influence on the society. The
wireless communication technologies and devices have reached a point that would allow
the creation of large and pervasive services in a reliable manner. Wireless Sensor and
Actor Networks (WSAN) would thus influence the world through their pervasive presence
in even the remotest locations and permit distributed monitoring and control with the
advantage of the developments in Wireless Communication, Embedded Processors,
Semantic Web and Smart Surroundings. The breakthroughs in power aware designs and
the availability of adequate wireless channel bandwidths enable building large and
sustainable systems that would benefit the society. However, since currently no practical
application systems of any significant size exist, there would be major challenges in
developing intelligent, distributive, collaborative and multimodal networks that would
sense and act in wide areas in an unattended manner and in deployment of such large
network that function in a reliable manner would be a major challenge.
The Seventh International WCSN Conference is planned to facilitate exchanging
information in regard to the development of technologies, applications and experiences
with focus on large deployable applications. The conference would have special focus on
wildlife and forest protection, health care and mine safety using WSAN.

The themes of the conference are as under, but are not limited to:

1. Wireless Communications
2. Wireless Sensor Networks
3. Sustainable Pervasive WSAN Applications
4. Devices, Tools and Techniques Relevant to Wireless Sensor Networks
3
ICC 2012 : IEEE International ConIerence on
Communications

lnk hLLp//wwwleeelccorg/2012/cfphLml

When
un 10, 2012 - un 15, 2012
Where
Ottawa, Canada
Submission DeadIine
Sep 6, 2011
Notification Due
an 9, 2012
FinaI Version Due
Feb 10, 2012

Categories networking communication wireIess networks sensor networks



Call For Papers
============== ICC 2012 | Call for Papers amd Proposals
===============

CALL FOR PAPERS, TUTORIALS, WORKSHOPS, and INDUSTRY FORUM PROPOSALS

ICC 2011: IEEE International Conference on Communications

June 10-15, 2012 - Ottawa Canada

General page: http://www.ieee-icc.org/2012

Call for Papers: http://http://www.ieee-icc.org/2012/cfp.html

Workshop Proposal: 16 May 2011 (extended to 31 July 2011)
Contact email: Marcus Brunner (brunner@nw.neclab.eu) or
Lisandro Granville (Granville@inf.ufrgs.br)
Tutorial Proposal: 6 September 2011
Contact email: Azzedine Boukerche (boukerch@site.uottawa.ca) or
Abbas Jamalipour (a.jamalipour@ieee.org)
Industry Forum Proposal: 29 August 2011
Contact email: Adam Drobot (Adam.Drobot@2M.com) or
Chi-Ming Chen (chimingchen@att.com)

Paper Submission: 6 September 2011
Submit the paper to a particular sympossia listed below.
Note: EDAS submissions will be available soon

Accept. Notification: 9 January 2012
Camera-Ready Paper: 10 February 2012

Selected Areas in Communications Symposium
Contact email: Yacine Ghamri-Doudane (ghamri@ensiie.fr)
SAC - Access Networks
http://www.edas.info/newPaper.php?c=10449&track=14405
SAC - E-Health
http://www.edas.info/newPaper.php?c=10449&track=14351
SAC - Powerline Communications
http://www.edas.info/newPaper.php?c=10449&track=14349
SAC - Satellite and Space Communications
http://www.edas.info/newPaper.php?c=10449&track=14357
SAC - Smart Grid
http://www.edas.info/newPaper.php?c=10449&track=14353
SAC - Tactical Communications and Operations
http://www.edas.info/newPaper.php?c=10449&track=14355

Wireless Communications Symposium
Co-Chairs: Ying Chang Liang, Paul Fortier, Simon Pun,Jingxian Wu, Sonia Aissa, Jerry
Gibson
Contact email: Ying Chang Lian (ycliang@i2r.a-star.edu.sg)
EDAS Link: http://www.edas.info/newPaper.php?c=10427&track=14307

Wireless Networking Symposium
Co-Chairs: Nidal Nasser, Vojislav Misic, Youssef Iraqi, Nei Kato
Contact email: Nidal Nasser (nasser@cis.uoguelph.ca)
EDAS Link: http://www.edas.info/newPaper.php?c=10429&track=14311

Communication Theory Symposium
Co-Chairs: Jeff Andrews, Martin Haenggi, Wei Yu, Min Chen
Contact email: Jeff Andrews (andrews@ece.utexas.edu)
EDAS Link: http://www.edas.info/newPaper.php?c=10431&track=14315

Signal Processing for Communications Symposium
Co-Chairs: Arumugam Nallanathan, Said Boussakta, Reza Soleymani, Yu Cheng
Contact email: Arumugam Nallanathan (arumugam.nallanathan@kcl.ac.uk)
EDAS Link: http://www.edas.info/newPaper.php?c=10433&track=14319

Optical Networks and Systems Symposium
Co-Chairs: Lena Wosinska, Vinod Vokkarane, Pin Han Ho, Martin Maier
Contact email: Lena Wosinska (Wosinska@kth.se)
EDAS Link: http://www.edas.info/newPaper.php?c=10435&track=14323

Next-Generation Networking Symposium
Co-Chairs: Mohammad Atiquzzaman, Cedric Westphal, Kurt Tutschku, Sidi-Mohammed
Senouci
Contact email: Mohammad Atiquzzaman (atiq@ou.edu)
EDAS Link: http://www.edas.info/newPaper.php?c=10437&track=14327

Communication QoS, Reliability & Modeling Symposium
Co-Chairs: Charalabos (Harry) Skianis, Mike Devetsikiotis, Nirwan Ansari, Hideaki
Yoshino
Contact email: Charalabos (Harry) Skianis (cskianis@aegean.gr)
EDAS Link: http://www.edas.info/newPaper.php?c=10439&track=14331

Ad-hoc and Sensor Networking Symposium
Co-Chairs: Cheng Li, Rami Langar, Jalel Ben Othman, Lei Shu, Sonia Waharte
Contact email: Cheng Li (licheng@mun.ca)
EDAS Link: http://www.edas.info/newPaper.php?c=10441&track=14335

Communication Software Services, and Multimedia Applications Symposium
Co-Chairs: Joel Rodrigues, Noura Limam, Toufik Ahmed, Abdelhamid Melouk, Bin Wei
Contact email: Joel Rodrigues (joeljr@ieee.org)
EDAS Link: http://www.edas.info/newPaper.php?c=10443&track=14339

Communication and Information Systems Security Symposium
Co-Chairs: Abderrahim Benslimane, Olivier Festor, Rose Qingyang Hu, Wen Tao Zhu,
Contact email: Abderrahim Benslimane (abderrahim.benslimane@univ-avignon.fr)
EDAS Link: http://www.edas.info/newPaper.php?c=10445&track=14343

Cognitive Radio and Networks Symposium
Co-Chairs: Ekram Hossain, Rajarathnam Chandramouli, Rajeev Shorey, Charles Clancy
Contact email: Ekram Hossain (ekram@ee.umanitoba.ca)
EDAS Link: http://www.edas.info/newPaper.php?c=10447&track=14347

WCNC 2012 : IEEE Wireless Communication and
Networking ConIerence

lnk hLLp//wwwleeewcncorg

When
pr 12, 2012 - pr 12, 2012
Where
Paris, France
Submission DeadIine
Sep 12, 2011
Notification Due
ec 9, 2011
FinaI Version Due
an 16, 2012

Categories communications wireIess teIecom internet



Call For Papers
WCNC 2012, IEEE Wireless Communication and Networking Conference, Paris April 2012

WCNC is one of the world's foremost international technical conferences for engineers
and researchers at the forefront of development and deployment of wireless
technologies.

IEEE WCNC is the premier wireless event for wireless communications researchers,
industry professionals, and academics interested in the latest development and design of
wireless systems and networks. Sponsored by the IEEE Communications Society, IEEE
WCNC has a long history of bringing together industry, academia, and regulatory
bodies.

Paper submission deadline:
12 September 2011
Notification of acceptance:
9 December 2011
Final papers due:
16 January 2012

Tutorial proposals:
12 September 2011
Workshop proposals:
24 June 2011
Panel proposals:
12 September 2011
3
COM 2011 : Communications Journal

lnk hLLp//wwwacLapresscom/ConLenL_of_!ournalaspx?!ournallu132#lnfo2

When
N/
Where
N/
Submission DeadIine
ec 1, 2011

Categories communications communication wireIess networks wireIess
communications



Call For Papers
The International Journal of Communications is an interdisciplinary journal focusing on
theories, systems, methods, algorithms, modelling and simulation, and applications in
communications. The interdisciplinary approach of the publication ensures that the
editors draw from academic researchers, industrial professionals, engineers, consultants
and educators worldwide working in a diverse range of fields to contribute and spread
innovative work on communications. The scope of Communications includes: all areas of
wired and wireless information communications technology including:, wide- and local-
area networks, Wi-Fi, cellular systems, mobile ad-hoc networks, communication systems
and networks, wireless personal communication, modulation and signal design, speech,
image and video communications, coding theory and applications, media access
techniques, synchronization, channel equalization, detection and estimation, multiplexing
and carrier techniques, software-defined radio, switching systems, routers, protocols,
standards, network management, mobility management, spectrum management,
resource allocation, network reliability and survivability, performance, quality of service,
network design and optimization.

For more information on submitting a paper, please look at the following link:
http://www.actapress.com/submissioninfo.aspx

IJERTCS 2012 : Int. J. Embedded and Real-Time
Communication Systems

lnk hLLp//wwwlglglobalcom/l!L81CS

When
N/
Where
N/
Submission DeadIine
ug 31, 2011
Notification Due
Sep 30, 2011
FinaI Version Due
Oct 31, 2011

Categories embedded systems communications reaI-time systems computer
architecture



Call For Papers
*********************************************************************
SUBMISSION DEADLINE for manuscripts targeting 2012 volume:
Aug 31st, 2011
*********************************************************************

International Journal of Embedded and Real-Time Communication Systems (IJERTCS)
http://www.igi-global.com/ijertcs

*NOW INDEXED BY DBLP!*
(http://www.informatik.uni-trier.de/~ley/db/journals/ijertcs/ijertcs1.html)

Official publication of the Information Resources Management Association

Editor-in-Chief: Dr. Seppo Virtanen, University of Turku, Finland
Published: Quarterly (both in Print and Electronic form)

Find us on LinkedIn: (http://www.linkedin.com/groups?home=&gid=2348857)

FREE SAMPLE COPY OF THE JOURNAL:
(http://www.igi-global.com/ijertcs) -- "Free Sample Copy" (menu on left)
Abstracts of the inaugural issue articles are provided at the end of this CFP.

MISSION OF IJERTCS:
Prospective authors are invited to submit manuscripts for possible publication in the
International Journal of Embedded and Real-Time Communication Systems.

The journal has an interdisciplinary scope, encompassing research from computer
science, computer engineering and telecommunication/communication engineering with
focus on how these disciplines interact in the field of embedded and real-time systems
for communication. The subject coverage is broad, serving its readership both theoretical
and practical research results facilitating the convergence of embedded system, real-
time computing and communication system technologies and paradigms. The journal
brings together researchers and scientists from various disciplines with similar research
interests.

The primary objective of IJERTCS is to disseminate high-quality research, recent
advancements and innovations in this interdisciplinary research area. The rapid
development of embedded communication systems, such as handheld mobile devices,
towards feature-rich multimedia computers has brought major challenges to the system-
level design process as well as to the design of hardware and software components of
the system: despite the small size and reliance on battery power, the devices need to be
able to perform ever more complex operations and tasks while maintaining a low enough
size and pricing scheme to ensure adequate market interest. There is a constant need to
find a balance between adequate performances of the device, low enough design and
manufacturing costs and short time-to-market. Dealing with these challenges is in the
focal point of the research published in this journal.

RECOMMENDED TOPICS:
IJERTCS extensively covers research in the area of embedded and real-time
communication systems. Topics within this field to be discussed in the journal include,
but are not limited to:

- Hardware/software co-design
- Embedded networks (built-in networks in embedded communication devices)
- Design methods
- Modeling and verification methods
- On-chip communication in SoC and NoC
- Hardware platforms and technologies
- Security issues and technologies
- Software design
- Platform based design
- Single-chip SDR (Software defined radio) solutions
- OWA (open wireless architecture)
- Hardware and software solutions for protocol processing
- Fault-tolerant hardware and software technologies
- Asynchronous and synchronous circuit techniques
- Reconfigurable systems
- Real-time computing
- Hardware and software solutions for real-time systems
- Performance modeling
- Testing techniques
- Formal design and verification methods
- Emerging new topics

SUBMITTING TO IJERTCS:
Prospective authors should note that only original and previously unpublished articles will
be considered. INTERESTED AUTHORS MUST CONSULT THE JOURNALS GUIDELINES
FOR MANUSCRIPT SUBMISSIONS at (http://www.igi-
global.com/development/author_info/guide.asp) PRIOR TO SUBMISSION. All article
submissions will be forwarded to at least 3 members of the Editorial Review Board of the
journal for double-blind, peer review. Final decision regarding
acceptance/revision/rejection will be based on the reviews received from the reviewers.
All submissions must be forwarded electronically to seppo.virtanen@utu.fi.

PUBLISHER:
The International Journal of Embedded and Real-Time Communication Systems is
published by IGI Global (formerly Idea Group Inc.), publisher of the "Information
Science Reference (formerly Idea Group Reference) and "Medical Information Science
Reference imprints. For additional information regarding the publisher, please visit
(http://www.igi-global.com).

All inquiries and submissions should be directed to the attention of:

Dr. Seppo Virtanen
Editor-in-Chief
International Journal of Embedded and Real-Time Communication Systems
E-mail: seppo.virtanen@utu.fi
(http://www.igi-global.com/IJERTCS)

=======================================================
====================
Editorial Board of International Journal of Embedded and Real-Time Communication
Systems:

Editor in Chief:
Seppo Virtanen, U. of Turku, Finland

Associate Editors:
Sergey Balandin, Nokia Research Center, Finland
Jouni Isoaho, U. of Turku, Finland
Gul Khan, Ryerson U., Canada
Dake Liu, Linkping U., Sweden
Jari Nurmi, Tampere U. of Technology, Finland
Juha Plosila, U. of Turku, Finland
Zili Shao, Hong Kong Polytechnic U., Hong Kong
Hannu Tenhunen, Royal Institute of Technology (KTH), Sweden
Andrey Terekhov, Saint-Petersburg State U./Lanit-Tercom Inc., Russia
Dragos Truscan, bo Akademi U., Finland

International Editorial Review Board:

Tapani Ahonen, Tampere U. of Technology, Finland
Jinian Bian, Tsinghua U., China
Michael Blumenstein, Griffith U., Australia
Dimitri Boulytchev, Saint-Petersburg State U./Lanit-Tercom Inc., Russia
Claudio Brunelli, Nokia Research Center, Finland
Zhixin Chen, ILX Lightwave, USA
Raja Datta, Indian Institute of Technology (IIT) Kharagpur, India
Peeter Ellervee, Tallinn U. of Technology, Estonia
Abdeslam En-Nouaary, Concordia U., Canada
Kees Goossens, Eindhoven U. of Technology, The Netherlands
Christos Grecos, U. of West of Scotland, UK
Liang Guang, U. of Turku, Finland
Kimmo Jrvinen, Aalto University, Finland
Gert Jervan, Tallinn U. of Technology, Estonia
Pasi Liljeberg, U. of Turku, Finland
Ethiopia Nigussie, U. of Turku, Finland
Christian Poellabauer, Notre Dame U., USA
Paul Pop, Technical U. of Denmark, Denmark
Martin Schoeberl, Vienna U. of Technology, Austria
Tiberiu Seceleanu, ABB Corporate Research, Sweden
Leandro Soares Indrusiak, U. of York, United Kingdom
Tero Sntti, U. of Turku, Finland
Tomi Westerlund, U. of Turku, Finland
Colin Willcock, Nokia-Siemens Networks, Germany
Liu Zhenyu, Tsinghua U., China

=======================================================
===========================
Recent IJERTCS Articles from 2010 volume
International Journal of Embedded and Real-Time Communication Systems
(IJERTCS)
Official Publication of the Information Resources Management Association
Published: Quarterly in Print and Electronically
ISSN: 1947-3176 EISSN: 1947-3184
Published by IGI Publishing, Hershey-New York, USA
http://www.igi-global.com/ijertcs

Editor-in-Chief: Seppo Virtanen, University of Turku, Finland

*1. Current Challenges in Embedded Communication Systems*
Jouni Isoaho, University of Turku, Finland
Seppo Virtanen, University of Turku, Finland
Juha Plosila, University of Turku, Finland

This article defines and analyses key challenges met in future embedded
systems in networked multimedia and communication applications.
Self-awareness, interoperability and embedded security are used to
characterize different aspects of designing and implementing next
generation embedded systems. The dynamic nature of applications and
implementations as well as possible technological faults and variations
need to be considered in system verification and modeling. A new design
layer needs to be added to current NoC platforms in order to build
procedures that take into account dynamic system reconfigurations,
fault-tolerance aspects and flexible portability. Increased modularity
and networked implementations create a need for trust management
mechanisms between system components and technology for analyzing
validity and correctness of received application and system
configuration information.

To obtain a copy of the entire article, click on the link below.
(http://www.igi-global.com/Bookstore/Article.aspx?TitleId=40930)

*2. Embedded Networks in Mobile Devices*
Sergey Balandin, Nokia Research Center, Finland
Michel Gillet, Nokia Devices, Finland

The concept of a mobile phone has recently transformed into a new
concept of mobile multimedia devices capable of performing multiple
complex tasks and integrating multiple functionalities. It has resulted
in a significant increase of device integration costs and complicated
deployment of new technologies. Device integrator companies favor
modularity everywhere possible, which results in a new trend toward
networked architectures for the mobile devices. However, comparing to
the best-known embedded network solutions, e.g., SoC and NoC, these
architectures have unique constraints and requirements, which also are
significantly different from the wide area networks. The main
constraints are power consumption and having a modular architecture to
allow reuse of the components. Transition to the new architectures for
mobile devices is a time consuming task that requires the analysis of
many solutions applied in other contexts, especially for embedded
protocols, QoS and resource management. This article reviews the state
of the art in embedded networks research and the key assumptions,
restrictions and limitations faced by designers of embedded networks
architectures for mobile devices.

To obtain a copy of the entire article, click on the link below.
(http://www.igi-global.com/Bookstore/Article.aspx?TitleId=40931)

*3. Generating Process Network Communication Infrastructure for Custom
Multi-Core Platforms*
Peter Srensen (Technical University of Denmark, Denmark)
Jan Madsen (Technical University of Denmark, Denmark)

We present an approach for generating implementations of abstraction
layers implementing the communication infrastructure of applications
modeled as process networks. Our approach is unique in that it does not
rely on assumptions about the capabilities and topology of the
underlying platform. Instead, a generic implementation is adapted to the
particular platform based on information retrieved from analyzing the
platform. At the heart of the approach is a novel method for analyzing
the capabilities of custom execution platforms composed of components.
The versatility and usefulness of the approach and analysis method is
demonstrated through a case study.

To obtain a copy of the entire article, click on the link below.
(http://www.igi-global.com/Bookstore/Article.aspx?TitleId=40932)


*4. Parallel Programming and Its Architectures Based on Data Access
Separated Algorithm Kernels*
Dake Liu, Linkping University, Sweden
Joar Sohl, Linkping University, Sweden
Jian Wang, Linkping University, Sweden

A novel master-multi-SIMD architecture and its kernel (template) based
parallel programming flow is introduced as a parallel signal processing
platform. The name of the platform is ePUMA (embedded Parallel DSP
processor architecture with Unique Memory Access). The essential
technology is to separate data accessing kernels from arithmetic
computing kernels so that the run-time cost of data access can be
minimized by running it in parallel with algorithm computing. The SIMD
memory subsystem architecture based on the proposed flow dramatically
improves the total computing performance. The hardware system and
programming flow introduced in this article will primarily aim at
low-power high-performance embedded parallel computing with low silicon
cost for communications and similar real-time signal processing.

To obtain a copy of the entire article, click on the link below.
(http://www.igi-global.com/Bookstore/Article.aspx?TitleId=40933)

*5. Joint Validation of Application Models and Multi-Abstraction
Network-on-Chip Platforms*
Sanna Mtt, Tampere University of Technology, Finland
Leandro Mller, Technische Universitt Darmstadt, Germany
Leandro Indrusiak, University of York, UK
Luciano Ost, Catholic University of Rio Grande do Sul, Brazil
Manfred Glesner, Technische Universitt Darmstadt, Germany
Jari Nurmi, Tampere University of Technology, Finland
Fernando Moraes, Catholic University of Rio Grande do Sul, Brazil

Application models are often disregarded during the design of
multiprocessor Systems-on-Chip (MPSoC). This is due to the difficulties
of capturing the application constraints and applying them to the design
space exploration of the platform. In this article we propose an
application modelling formalism that supports joint validation of
application and platform models. To support designers on the trade-off
analysis between accuracy, observability, and validation speed, we show
that this approach can handle the successive refinement of platform
models at multiple abstraction levels. A case study of the joint
validation of a single application successively mapped onto three
different platform models demonstrates the applicability of the
presented approach.

To obtain a copy of the entire article, click on the link below.
(http://www.igi-global.com/Bookstore/Article.aspx?TitleId=40934)

*6. Schedulability Analysis for Real Time On-Chip Communication with
Wormhole Switching*
Zheng Shi, University of York, UK
Alan Burns, University of York, UK
Leandro Indrusiak, University of York, UK

In this paper, the authors discuss a real-time on-chip communication
service with a priority-based wormhole switching policy. The authors
present a novel off-line schedulability analysis approach, worst case
network latency analysis. By evaluating diverse inter-relationships and
service attributes among the traffic flows, this approach can predict
the packet network latency for all practical situations. The simulation
results provide evidence that communication latency calculated using the
real time analysis approach is safe, closely matching the figures
obtained from simulation.

To obtain a copy of the entire article, click on the link below.

http://www.igi-global.com/Bookstore/Article.aspx?TitleId=42983

*7. Modeling Communication in Multi-Processor Systems-on-Chip Using Modular
Connectors*
Leonidas Tsiopoulos, bo Akademi University, Finland
Kaisa Sere, bo Akademi University, Finland
Juha Plosila, University of Turku, Finland

Formal methods of concurrent programming can be used to develop and
verify complex Multi-Processor Systems-On-Chip in order to ensure that
these systems satisfy their functional and communication requirements.
The authors use the Action Systems formalism and show how asynchronous
communication of Multi-Processor Systems-on-Chip can be modeled using
generic connectors composed out of simple channel components. The paper
proposes a new approach to modeling generic and hierarchical connectors
for handling the complexity of on-chip communication and data flow. The
authors goal is to avoid overloaded bus-based architectures and give a
distributed framework. A case study presents the authors modeling
methodology.

To obtain a copy of the entire article, click on the link below.

http://www.igi-global.com/Bookstore/Article.aspx?TitleId=42984

*8. Towards Sustainable Development of Energy-Aware Systems*
Luigia Petre, bo Akademi University, Finland
Kaisa Sere, bo Akademi University, Finland

Smart devices have pervaded our society and encouraged lifestyles that
depend on them. One of the fundamental requirements for a successful
dependency is that the general public be aware of the energy limitations
of these devices and to stay in control of energy consumption. In this
paper, the authors propose a formal specification method that takes
energy into account. They propose two development approaches that can
use these specifications to develop energy-aware systems in a
sustainable manner.

To obtain a copy of the entire article, click on the link below.

http://www.igi-global.com/Bookstore/Article.aspx?TitleId=42985

*9. Service-Oriented Development of Fault Tolerant Communicating Systems:
Refinement Approach*
Linas Laibinis, bo Akademi University, Finland
Elena Troubitsyna, bo Akademi University, Finland
Sari Leppnen, Nokia Research Center, Finland

Telecommunication systems must have a high degree of availability, that
is, a high probability of correct and timely provision of requested
services. To achieve this, correctness of software for such systems
should be ensured. Application of formal methods helps increase
confidence in building correct software. However, to be used in
practice, formal methods should be well integrated into existing
development process. In this paper, the authors propose a formal
model-driven approach to development of communicating systems. The
authors formalize and extend the Lyra approach-a top-down
service-oriented method for development of communicating systems. Lyra
is based on transformation and decomposition of models expressed in
UML2. The authors formalize Lyra in the B Method by proposing a set of
formal specification and refinement patterns reflecting the essential
models and transformations of the Lyra phases. Moreover, this paper
extends Lyra to integrate reasoning about fault tolerance in the entire
development flow.

To obtain a copy of the entire article, click on the link below.

http://www.igi-global.com/Bookstore/Article.aspx?TitleId=42986

*10. Hierarchical Agent Monitored Parallel On-Chip System: A Novel Design
Paradigm and its Formal Specification*
Liang Guang, University of Turku, Finland
Juha Plosila, University of Turku, Finland
Jouni Isoaho, University of Turku, Finland
Hannu Tenhunen, University of Turku, Finland


In this paper, the authors present a formal specification of a novel
design paradigm, hierarchical agent monitored SoCs (HAMSOC). The
paradigm motivates dynamic monitoring in a hierarchical and distributed
manner, with adaptive agents embedded for local and global operations.
Formal methods are of essential importance to the development of such a
novel and complex platform. As the initial effort, functional
specification is indispensable to the non-ambiguous system modeling
before potential property verification. The formal specification defines
the manner by which the system can be constructed with hierarchical
components and the representation of run-time information in modeling
entities and every type of the monitoring operations. The syntax follows
the standard set theory with additional glossary and notations
introduced to facilitate practical SoC design process. A case study of
hierarchical monitoring for power management in NoC (Network-on-chip),
written with the formal specification, is demonstrated.

To obtain a copy of the entire article, click on the link below.

http://www.igi-global.com/Bookstore/Article.aspx?TitleId=42987

*11. Automatic Generation of Memory Interfaces for ASIPs*
David Kammler, RWTH Aachen University, Germany
Ernst Witte, RWTH Aachen University, Germany
Anupam Chattopadhyay, RWTH Aachen University, Germany
Bastian Bauwens, RWTH Aachen University, Germany
Gerd Ascheid, RWTH Aachen University, Germany
Rainer Leupers, RWTH Aachen University, Germany
Heinrich Meyr, RWTH Aachen University, Germany

With the growing market for multi-processor system-on-chip (MPSoC)
solutions, application-specific instruction-set processors (ASIPs) gain
importance as they allow for a wide tradeoff between flexibility and
efficiency in such a system. Their development is aided by architecture
description languages (ADLs) supporting the automatic generation of
architecture-specific tool sets as well as synthesizable register
transfer level (RTL) implementations from a single architecture model.
However, these generated implementations have to be manually adapted to
the interfaces of dedicated memories or memory controllers, slowing down
the design-space exploration regarding the memory architecture. To
overcome this drawback, the authors extend RTL code generation from ADL
models with the automatic generation of memory interfaces. This is
accomplished by introducing a new abstract and versatile description
format for memory interfaces and their timing protocols. The feasibility
of this approach is demonstrated in real-life case studies, including a
design space exploration for a banked memory system.

To obtain a copy of the entire article, click on the link below.
(http://igi-global.com/Bookstore/Article.aspx?TitleId=45870)

*12. Implementation of FFT on General-Purpose Architectures for FPGA*
Fabio Garzia, Tampere University of Technology, Finland
Roberto Airoldi, Tampere University of Technology, Finland
Jari Nurmi, Tampere University of Technology, Finland

This paper describes two general-purpose architectures targeted to Field
Programmable Gate Array (FPGA) implementation. The first architecture is
based on the coupling of a coarse-grain reconfigurable array with a
general-purpose processor core. The second architecture is a homogeneous
multi-processor system-on-chip (MP-SoC). Both architectures have been
mapped onto two different Altera FPGA devices, a StratixII and a
StratixIV. Although mapping onto the StratixIV results in higher
operating frequencies, the capabilities of the device are not fully
exploited. The implementation of a FFT on the two platforms shows a
considerable speed-up in comparison with a single-processor reference
architecture. The speed-up is higher in the reconfigurable solution but
the MP-SoC provides an easier programming interface that is completely
based on C language. The authors approach proves that implementing a
programmable architecture on FPGA and then programming it using a
high-level software language is a viable alternative to designing a
dedicated hardware block with a hardware description language (HDL) and
mapping it on FPGA.

To obtain a copy of the entire article, click on the link below.
(http://igi-global.com/Bookstore/Article.aspx?TitleId=45871)

*13. System Architecture for 3GPP-LTE Modem using a Programmable Baseband
Processor*
Di Wu, Linkping University, Sweden
Johan Eilert, Linkping University, Sweden
Rizwan Asghar, Linkping University, Sweden
Dake Liu, Linkping University, Sweden
Anders Nilsson, Coresonic AB, Sweden
Eric Tell, Coresonic AB, Sweden
Eric Alfredsson, Coresonic AB, Sweden

The evolution of third generation mobile communications toward
high-speed packet access and long-term evolution is ongoing and will
substantially increase the throughput with higher spectral efficiency.
This paper presents the system architecture of an LTE modem based on a
programmable baseband processor. The architecture includes a baseband
processor that handles processing time and frequency synchronization,
IFFT/FFT (up to 2048-p), channel estimation and subcarrier de-mapping.
The throughput and latency requirements of a Category four User
Equipment (CAT4 UE) is met by adding a MIMO symbol detector and a
parallel Turbo decoder supporting H-ARQ, which brings both low silicon
cost and enough flexibility to support other wireless standards. The
complexity demonstrated by the modem shows the practicality and
advantage of using programmable baseband processors for a single-chip
LTE solution.

To obtain a copy of the entire article, click on the link below.
(http://igi-global.com/Bookstore/Article.aspx?TitleId=45872)

*****************************************************

For full copies of the above articles, check for this issue of the
International Journal of Embedded and Real-Time Communication Systems
(IJERTCS)

(IJERTCS) in your institution's library. This journal is also included
in the IGI Global aggregated "InfoSci-Journals database:

WiCOM 2012 : 8th International ConIerence on Wireless
Communications, Networking and Mobile Computing

lnk hLLp//wwwwlcommeeLlngorg/2012/

When
Sep 21, 2012 - Sep 23, 2012
Where
Shanghai, China
Submission DeadIine
Mar 15, 2012
Notification Due
May 10, 2012

Categories wireIess communications networking mobiIe



Call For Papers
WiCOM serves as a forum for wireless communications researchers, industry
professionals, and academics interested in the latest development and design of wireless
systems. In 2012, WiCOM will be held in Shanghai, China. You are invited to submit
papers in all areas of wireless communications, networking, mobile computing and
applications.

Topics:

Wireless Communications
Space-Time, MIMO and Adaptive Antennas
OFDM, CDMA and Spread Spectrum
Modulation, Coding and Diversity
Signal Processing for Wireless Communications
B3G/4G Systems, WiMAX, WLAN and WPAN
Channel Model and Characterization
Multi-Hop and Cooperative Communications
Interference Cancellation and MUD
Radio Resource Management and Allocation
Cognitive Radio and Software Defined Radio
Satellite & Space Communications
Multimedia Communications
Multiple Access Techniques
Optical Communications
Network Technologies
Wireless & Mobile Networking
Wireless Sensor Networks
Cognitive Radio Networks
Ad Hoc, Sensor and Mesh Networking
Next-Generation Networking and Internet
Wireless Network Security and Privacy
Networking and Information Security
Network Protocol and Congestion Control
QoS, Reliability & Performance Modeling
Mobility, Location and Handoff Management
Capacity, Throughput, Outage and Coverage
Multimedia in Wireless Networks
Optical Networks and Systems
Services and Application
Emerging Wireless/Mobile Applications
Context and Location-Aware Wireless Services
Wireless Telemedicine and E-Health Services
Intelligent Transportation Systems
RFID Technology and Application
Cognitive Radio and Sensor-Based Applications
Content Distribution in Wireless Home Environment
Wireless Emergency and Security Systems
Service Oriented Architectures, Service Portability
SIP Based Services, Multimedia and Middleware
Innovative User Interfaces for Multimedia Services
Regulations, Standards and Spectrum Management
Communications Software and Services
Mobile Computing Systems

IWCMC 2012 : 8th International Wireless Communications
and Mobile Computing ConIerence

lnk hLLp//lwcmcorg/2012

When
ug 27, 2012 - ug 31, 2012
Where
Limassol, Cyprus
Submission DeadIine
ec 25, 2011
Notification Due
Mar 15, 2012
FinaI Version Due
pr 30, 2012

Categories wireIess communications mobiIe



Call For Papers
9 hLLp//wwwsdlwcneL/publlc/lndexphp
10 hLLp//wwwsdlwcneL/Lhl/pagephp?ld2

Você também pode gostar