High Performance Boost PFP (Power Factor Pre-regulator) with an improved ZVT (Zero Voltage Transition) converter

Jin-Hyoe Kim, D.Y. Lee, H.S. Choi and B.H. Cho

Power Electronic System Lab, School of Electrical Engineering, Seoul National University Tel: +82-2-880-1785, Fax: +82-2-878-1452 E-mail :jinhvoe@,chollian.net

Abstract In this paper, the conventional ZVT PWM Boost converter is improved to minimize the switching loss of the auxiliary switch using the minimum number of the components. To reduce the switching loss and EM1 noise, the saturable core and the parallel capacitor across the clamp diode (D2)are used in the auxiliary switching network. llsing this technique, soft-switching for the auxiliary switch is guaranteed at wide line and load ranges. Since the active switches are turned on and off softly, the switching losses are reduced significantly and the higher efficiency of the system is achieved. This paper proposes the improved ZVT PWM Boost PFP. The prototype of 200kHz 1kW system was implemented to show the improved performance.

1. INTRODUCTION

Recently international regulations governing the amount of harmonic currents (e.g. IEC 1000-3-2) became mandatory and active power factor correction pre-regulator (PFP) circuit became inevitable for the ACDC converters. In order to minimize the penalty of using additional PFC circuit such as increase of overall system size and deterioration of efficiency, various kinds of soft switching techniques have been proposed for the past several years [l-121. These techniques reduce the switching losses and EM1 noise enabling high frequency operation and consequently reduce the overall system size. In general, the soft switching approaches can be classified into two groups; zero voltage switching (ZVS) approaches [1,2] and zero current switching (ZCS) approaches [3,4]. The ZVS approaches are desirable for the majority carrier semiconductor devices such as MOSFETs, since the turn-on loss caused by the output capacitance is more dominant. Unfortunately, switching losses in the ZVS approaches can be reduced only at the expense of much increased voltage/current stresses of the switches, which make these approaches not suitable for the PFC pre-regulator. In order to achieve ZVS for both the active and passive switches without increasing their voltage and current stress, various kinds of ZVT approaches have been proposed
[6-121.

There have been many attempts to solve these problems [7lo]. To improve the conventional ZVT circuit, the circuit in [7] uses a regenerative snubber employing a magnetically coupled cell to reduce the tum-off switching loss of the auxiliary switch. However, too many components are added to improve the auxiliary network. The circuit in [SI uses an active snubber and the current stress of the main switch and the voltage stress of the auxiliary diode are increased. The circuit in [IO] uses two auxiliary switches and snubber capacitors. This increases the overall cost and system complexity. In this paper, the conventional ZVT PWM Boost converter is improved to reduce the switching loss of the auxiliary switch using the minimum number of the components. To minimize the switching loss and EM1 noise, the saturable core and the parallel capacitor across the clamp diode (D2) are used in the auxiliary switch. The saturable core prevents the oscillation at the anode of D2 and the reverse recovery current of D2. The parallel capacitor controls the dv/dt of the auxiliary switch S2. The ZVT is guaranteed at wide line and load ranges. A 1 kW ZVT PWM Boost PFP prototype has been implemented to verify the improved performance of the proposed method and a detailed design procedure of the proposed technique is also presented in this paper.
L

The Boost converter employing the ZVT technique was first introduced in [6]shown in Fig. 1. This converter provides ZVS condition for the main switch without increasing voltage stress of the active switches. However it has a disadvantage such as the hard-switching of the auxiliary switch which deteriorates the overall efficiency and increases the EM1 noise.

Fig. I . The conventional ZVT Boost PFP circuit diagram

0-7803-6618-2/01/$10.00 0 2001 IEEE

331

diode D1 is conducting the full load current and the voltage of Cr2 equals zero. At To, S2 is tumed on. At this moment, the voltage Cr2 is charged to Vo. The peak value of the current which charges Cr2 is as ( 2 ) . With S2 on, the current in Lr ramps up linearly to the input current Ii and the current in D1 ramps down. When the current of the diode D1 reaches zero, the diode D1 tums off softly due to the inductor Lr. The time when this mode lasts and the peak current, i, , , which charges the capacitor, Cr2, are as follows:

t
Fig. 2. The proposed ZVT Boost PFP circuit diagram

--

I i

S'

s2
VSI

s ly n
. . , .. .. . . . , . . .. , . . . . . . . . . .
~

where f.sz is the rising time of S2.

., .. .. ..

. . .. .. .... . . . ,. .... . . .. . . ... .. .. .. .

v,, *. .
. .. .

0 :

v5-2

. . .. . .. ..

, , ,

. . , ... .... , . , . . ..

. ;

.. . .. . . . ..

, . . . ....

. . . . . . , .

. . . ... . .

(b) Mode 2 (TI-T,) : At T I , the Lr current reaches Ii and Lr and Crl begin to resonate. During this cycle, the voltage of Crl is discharged until the voltage of Crl reaches zero. Crl is composed of the external capacitance and the drain-source capacitance (Coss) of S1. Crl controls the dv/dt of the drain voltage of SI. The time required for the drain voltage reaches zero is 114 of the resonant period of Crl and Lr. At the end of this period, the body diode of SI begins conducting. The time interval of this mode is as follows.

. . .... . . . . . .. .. .. . . . . .. , .. . , , . . . , . . .. .. .. .. .

.. .., .. , . . . . .,
,

. .. . ..

4 'r2
ID2

.. . . . . . ,

. , . . .. .. . . . .... . ,
.r.

i,

a.,:

. . T T , ,

. .. . .. . . . . . ... , , . , . . . . . . . ..

... . .. ..

f
T,,

Fi

g. 3 . The theoretical key waveforms of the proposed circuit.

Mode 3 (T2-T3): At T,, the body diode begins conducting and the drain voltage of S1 reaches zero. The voltage across Lr is zero so the inductor current freewheels through the body diode of SI. During this interval, S1 must be turned on to achieve the zero-voltage turn-on of S1, that is, (6) must be satisfied. The time for ZVT, tZVT, is less than a tenth of the switching period, Ts, so that the auxiliary network may be active only during a short switching-transition time to create the ZVT condidiont for the main switch. Lt and Crl determine the peak current of S2, is2,pk as (4). ,
(4)

11. PRINCIPLES OF OPERATION

The circuit diagram and theoretical key waveforms of the improved ZVT Boost PFP are shown in Fig. 2 and Fig. 3, respectively. One small saturable core and one parallel capacitor across the diode D2 are added to the conventional ZVT circuit. In the steady state, eight operating modes exist within one switching cycle. In the analysis, all devices used are assumed to be ideal and the Boost inductor L and output capacitor CO are assumed to be large enough to treat as a current source and a voltage source, respectively. The eight equivalent circuits are shown in Fig. 4. (a) Mode 1 (To-Tl): Before To, the main switch is off and the

where

(d) Mode 4 (T3-T4): Before T3, the voltage of Cr2 equals Vo. At T3, SI tums on and S2 tums off and Lr

338

mode 1 (to - t l ) (a)

mode 2 (tl

- t2)

mode 3 (t2 - U)

(b)

(C)

mode 4 (t3 t4)

mode 5 (t4 - t5)

mode 6 (t5 - t6)

(4

(e)

(0

mode 8 (t7 - to) (g) (h) Fig. 4. Equivalent circuits during one switching cycle. (a) mode I . (b) mode 2. (c) mode 3. (d) mode 4. (e) mode 5. ( f ) mode 6. (9) mode 7. (h) mode 8. mode 7 (t6 t7)

and Cr2 resonate and the energy stored by Lr begins discharging Cr2. This interval lasts until Cr2 is fully discharged, that is, the voltage of Cr2 equals zero.

turn-off losses are significantly reduced.

(h) Mode 8 (T7-To)

t,, = -arcsin(1 * w
@=-

6,)

: This stage is also the same with the conventional Boost converter. The input current flows through the main diode supplying the load.

z,.

(7)
1 1 DESIGN 1. PROCEDURE AND EXAMPLE

2 L p k

1
I . Determine the value of the auxiliary inductor, Lr. Since Lr controls the di/dt of the current of D1, it reduces the reverse recovery current of D1. Thus the time interval of the mode 1 given by (1) must be at least three times longer than the reverse recovery time of D 1.

(e) Mode 5 (T,-T,) : The current that remains after discharging Cr2 flows through the diode D2. Later a detailed mode will be explained.
LrrS2 p k t,, = ___ cos(arcsin-

v,

v,
',,IS2
pk

(9)

2. Select the auxiliary capacitor Crl

The following two conditions must be satisfied. First, S1 must be turned on while D1 is conducting for ZVT as in (6). In order to minimize the circulating energy of the auxiliary network, the on-time of S2 must be shorter than one tenth of the switching period. Eq. (6) is modified as (1 0). 1 (10) tzvr = - t s < to, + 4 2

(f) Mode 6 (Ts-Td : At T5, the current of S1 equals 11. During this period, the converter operation i s the Same with the

conventional Boost converter.

(8) Mode 7 (T6-T7) At T6, the main switch turns off. At this time, the S1 drain-to-source capacitance charges to Vo. Since the Crl initially holds the drain voltage to zero, the

10

Second, Crl should be chosen to minimize this peak value.

339

Crl together with Lr determine the peak value of the current of S2 as can be seen in (4) and (5).
3. Design the auxiliary capacitor, Cr2.

TABLE 1. Utilized components and parameters

Components
~~ ~

I
~~ ~

Parameters
~~~

L
Lr
Ls

Dongbu M157-168A, 240uH Magnetics 55586,8pH Toshiba MS 15*10*4.5W 2nF / 3nF, polypropylenecapacitor 3*220pF/450V, electrolytic capacitor 2SK2837 (SOOV, 20A) IRF840 (SOOV, 8A) FML36S (600V, 20A) MUR860 (600V, 8A)
I

Cr2 plays a key role to the soft-switching of S2. The peak of the current, icr2.pk, charges the Cr2 voltage to Vo at To and that the time that the Cr2 voltage discharges to zero during T34 are in proportion to the value of Cr2. To minimize the current peak, the value of Cr2 must be small, but to guarantee the ZCS tumoff of S2, the value of Cr2 must be large. The objective function is as follows: T34is longer than tf,sz (1 1) minimization of ic,.2.,,k where t,. s2 is the falling time of S2.
Fig. 5 (a) shows the upper limit of the value of Cr2 according to (1 1). The value of T34 depends on the characteristics of the MOSFET. And Fig. 5 (b) shows the lower limit of the value of Cr2 according to (12). The standard value of this peak value depends on the current rating of the MOSFET for S2. The selection of the value of Cr2 is arbitrary in the gray zone of Fig. 5 (a) and (b). This is the guideline of selecting the value of Cr2 and through the hardware test we can find the optimal value of Cr2 in this range.

Crl, Cr2
CO

. SI

s2
D1

D2, D3 Bridge diode

RBV 1506

Other components and parameters are shown in Table I. IV. EXPERIMENTAL VERIFICATION . For comparison, three experimental prototype circuits of single-phase CCM (continuous conduction mode) Boost PFP ; the hard-switching Boost PFP, the conventional ZVT Boost PFP, and the improved ZVT Boost PFP are built. The switching frequency of the hard-switching Boost PFP is 9OkHz and that of ZVT Boost PFP is 200kHz. The output voltage of all circuits is 400V and the output power is 1kW. In the breadboarded converter, the main power switch is implemented by a highspeed and highcurrent switching MOSFET, 2SK2837. Since the auxiliary switch handles only a small resonant transition energy, a small MOSFET, IRF 840, is employed. I . Ef$ciency Measurement Fig. 8 shows the efficiency measurements of the improved ZVT, the conventional ZVT and hard-switching Boost PFP circuits. The efficiency was measured using PM3300 (Voltech). It can be seen that the improved ZVT technique significantly improves the efficiency. The maximum efficiency at fill1 load was 97.6%. Due to the heat caused by this switching loss of the auxiliary switch S2, it is practically impossible to operate the conventional ZVT circuit in the power level above 800W.
100
99 5 99

50

%40(/ 35

I
lower limit
2

30
25
20

6 0 2 InF)

10

Vin vs. Efficiency

95 5

95
170

180

190

200

210

220

230

240

250

260

Vin NAC)
1 2

10

CrZ (nF)

(b)

Fig.10. Comparison of the Boost PFP, the conventional M Boost PFP and the improved ZVT Boost PFP.

Fig.5 (a) Cr2 vs. T34 (b) Cr2 vs. Ipk

340

Input Voltage (250V/div)

Voltage of SI (200V/div)

Input Current (SNdiv)

Curmet of S 1 (SA/div)

Voltage of S2 (4OOV/div)

Voltage of S2 (400V/div)

Curmet of S2 (5A/d iv)

Curmet of S2 (SA/div)

(c) (d) Fig 9 Experimental result (a) the input current and voltage waveforms (b) the current and voltage waveforms of SI (c) the current and voltage waveforms of S2 i n the improved ZVT PFP (d) the current and voltage waveforms of S2 in the conventional ZVT PFP

The improved circuit can be used in above IkW system since the switching loss and the heat of the auxiliary switch is significantly reduced.

3. Input Harmonic Current Measurement

Fig. 10 shows the line harmonic currents of the improved ZVT circuit. The output power is 1kW and the input AC voltage is 220Vrms. It shows that this circuit meets the EN60 555-2 requirement as well as IEC 1000-3-2. The regulation of EN60 555-2 is applied to the display appliances, such as TV.
2.5 2

2. Experimental Waveforms
Fig. 9 (a) shows the input voltage and the input current waveforms of the improved ZVT Boost PFP operating at 220V input and 1kW output. The PF (Power Factor) of the improved circuit is almost unity (0.993) and THD (Total Harmonic Distortion) is 4.7%. As can be seen in Fig. 9 (a), the input current is in phase with the line voltage. Fig 9. (b) shows the zero voltage switching waveforms of the main switch S 1. As can be seen, before S 1 turns on the current flows through the body diode of SI and SI turns on under zero voltage condition. Fig. 9 (c) shows the current and the voltage waveforms of the auxiliary switch S2 of the proposed circuit. Compared with waveforms of the conventional ZVT circuit in Fig. 9 (d) operating under the same conditions, it can be seen that the switching loss and the switching noise of S2 is severe. On the other hand, the improved circuit has good switching performance, that is, the switching noise and switching loss are significantly reduced.

9 c
! ? i

1.5 1

0.5
1

0
.____

_____
Fig. IO Input Harmonic Currents at P e l k W

34 1

V. CONCLUSION

In this paper, the high performance PFP with an improved ZVT converter was proposed. The switching loss of the auxiliary switch is minimized using the minimum number of the components. To reduce the switching loss and EM1 noise, one small saturable core and one parallel capacitor across the clamp diode (D2) are used in the auxiliary switch. Using this technique, soft-switching for the auxiliary switch is guaranteed at wide line and load ranges. Since the active switches are tumed on and tumed off softly, the switching losses are reduced significantly and the higher efficiency of the system is achieved. The prototype of 200kHz 1kW system was implemented to experimentally show the improved performance improvement.

REFERENCES
[l] K.H. Liu, F.C. Lee, Zero-voltage switching technique in DC/DC converters, IEEE Transactions on Power Electronics, Vo1.53, pp.293 -304, Jul 1990. [2] G. Hua, F.C. Lee, A new class of ZVS-PWM converter, High Frequency Power Conversion Conf. Rec. pp. 244-251, 1991. [3] G. Hua, F.C. Lee, Wove1 full-bridge zero-current-switched PWM converter, 4Ih European Conference in Power Electronics and Applications, Vol. 2, pp. 29-34, 1991. [4] Rodrigo Cardozo Fuentes, Helio Leaes Hey, An Improved ZCS-PWM Commutation Cell for IGBTs Application, IEEE Transaction on Power Electronics, Vol. 14, pp. 939-948, September 1999. [SI G. Hua, F.C. Lee, Novel zero-current-transition PWM converter, Invention Disclosure, 1993. [6] G. Hua, C.S. Leu, Y. Jiang, F.C. Lee, Novel zero-voltage-transition PWM converters, IEEE transactions on Power Electronics, Vo1.9, pp.2 13-219, Mar. 1994. [7] Paulo J.M. Menegaz, Marcio A. Co,Domingos S.L. Simonettietti, Jose L.F. Vieira. Imurovine the ODeration of ZVT DC-DC converters. Power Electronics Specklists Conference, PESC 99. 30th Annual IEEE Vol. 1, pp. 293 -297, 1999. 181 ChineJune Tsene. Chem-Lin Chen. Novel ZVT-PWM Converters with Active SnuTbbers,IEEE transaction on power electronics, Vol. 13, pp. 861869, September 1998. [9] R.L. Lin, Y. Zhao, F.C. Lee, Improved soft-switching ZVT converters with active snubber Applied Power Electronics Conference and Exposition, Thirteenth Annual, Vol. 2, pp. 1063 -1069, 1998. [lo] Gurunathan. R. Bhat, A.K. S , A soft-switched Boost converter for highfrequency operation, Power Electronics Specialists Conference, PESC 99. 30th Annual IEEE, Vol. I, pp. 463 -468, 1999. [ 1 I ] Guichao Hua, F.C. Lee, Soft-Switching Techniques in PWM Conveters, IEEE IECON, pp. 637-643, 1993. [12] Ching-Jung Tseng, Chem-Lin Chen, A novel ZVT PWM Cuk powerfactor corrector, Industrial Electronics, IEEE Transactions on ,Vol. 46, pp. 780 -787, Aug. 1999. [I31 James P. Noon, UC3855HIGH PERFORMANCE POWER FACTOR PREREGULATOR, Application note U-1 53, Unitrode Corporation. [I41 Philip C. Todd, UC3854 Controlled Power Factor Correction Circuit Design, Application note U-134, Unitrode Corporation. [ 151 Lloyd Dixon, Average Current Control of Switching Power Supplies, Application note U-140, Unitrode Corporation.
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