REGISTER - A small storage area in the CPU used to store intermediate values or special data GENERAL-PURPOSE REGISTERS 1.

AX, BX, CX, DX = 16-bit 2. ah, al / bh, bl etc = 8-bit 3. used for arithmetic operations and data movements Accumulator (AX) performs arithmetic operations equivalent to the calculator Base Address (BX) used to set an initial address value provides a starting address Count (CX) used as a counter for loop instructions Data deals with multiplication and division POINTER AND INDEX REGISTERS 1. used to determine the effective offset address of memory location Source Index (SI) holds the address of the source Destination Index (DI) holds the address of the destination Stack Pointer (SP) points to the top of the stack Base Pointer (BP) holds the address of memory location that corresponds to the beginning of current procedure's stack Instructions Pointer (IP) holds the offset of the next instruction to be executed CS + IP = points to instructions currently being executed SEGMENT REGISTERS 1. used to divide program into segments Code Segments (CS) points to the active code segment Data Segments (DS) points to the active data segment Stack Segments (SS) points to the active stack segment Extra Segments (ES) points to the active extra segments

PROGRAM COUNTER (PC) : Holds the address of the current instruction or the next instructions to be executed. CONTROL UNIT (CU) : controls and interprets the execution of instructions controls the movement of internal CPU data from one part of CPU to another determines the certain instruction to be executed by reading the contents of a PC MEMORY ADDRESS REGISTERS (MAR) : holds the address in the memory that is to be 'opened' for data. Connected to a decoder that interprets the address and activates a single address line into the memory. Used for accessing memory. MEMORY DATA REGISTERS (MDR) : aka Memory Buffer Register (MBR) hold a data value that is being stored to or retrieved from memory location currently addressed by MAR. INSTRUCTION REGISTER (IR) : holds the actual instruction being executed currently by the computer ACCUMULATOR (ACC) : aka the calculator contains AX, BX, CX and DX (General-Purpose Register) does the assembly language thingy (calculations and shit) DECODER : identifies the opcodes to determine the type of the instructions ADDRESS BUS : Whenever the CPU needs to read (or write) a byte of data to/from the memory, it specifies the address of the byte on a set of wires called the address bus unidrectional - meaning that the CPU specifies addresses, but the memory doesn't Address Bus Ready Line : which is set to 1 by the processor whenever there is a valid address on the address bus (it is the signal that says to the memory "Address is ready - come and get it!") DATA BUS : The data itself is placed on a set of wires called the data bus bidirectional - both the CPU and the memory can place information on it Data Bus Ready Line : which either the memory or the CPU can set

CONTROL BUS : specify whether the memory is being read or written to and send signals from the CPU to the memory (or vice-versa) that the data is ready on the various buses One wire in the control bus is referred to as Read/Write or (R/W) set to binary "1" to indicate that the memory is to be read, and to binary "0" to indicate that the memory is to be written to. VIRTUAL MEMORY : With virtual memory, what the computer can do is look at RAM for areas that have not been used recently and copy them onto the hard disk. This frees up space in RAM to load the new application. THRASHING : the operating system has to constantly swap information back and forth between RAM and the hard disk inefficient processing caused by constant page swapping. A condition of performance collapse in a multiprogramming system when the number of active programs gets too large. Resolve : Increase the amount of RAM in the computer (generally the best long-term solution). Decrease the number of programs being concurrently run on the computer. PAGING: The area of the hard disk that stores the RAM image holds pages of RAM on the hard disk, and the operating system moves data back and forth between the page file and RAM. Processes are divided into fixed-size pages and stored in memory (page) frames when loaded. Page Frame : a fixed-size portion of main memory that holds a process page. DYNAMIC RAM (DRAM) : a transistor and a capacitor are paired to create a memory cell, which represents a single bit of data capacitor holds the bit of information -- a 0 or a 1 The transistor acts as a switch that lets the control circuitry on the memory chip read the capacitor or change its state. A capacitor is like a small bucket that is able to store electrons. To store a 1 in the memory cell, the bucket is filled with electrons. To store a 0, it is emptied. The problem with the capacitor's bucket is that it has a leak Dynamic RAM has to be dynamically refreshed all of the time or it forgets what it is holding. The downside of all of this refreshing is that it takes time and slows down the memory.

STATIC RAM (SRAM) : used to create the CPU's speed-sensitive cache holds its data without external refresh, for as long as power is supplied to the circuit Static random access memory uses multiple transistors, typically four to six, for each memory cell but doesn't have a capacitor in each cell. It is used primarily for cache. FLIP-FLOPS (BOOLEAN) If you arrange the gates correctly, they will remember an input value. FEEDBACK the output of a gate is fed back into the input MEMORY CACHE :
Your Internet connection is the slowest link in your computer. So your browser (Internet Explorer, Netscape, Opera, etc.) uses the hard disk to store HTML pages, putting them into a special folder on your disk. The first time you ask for an HTML page, your browser renders it and a copy of it is also stored on your disk. The next time you request access to this page, your browser checks if the date of the file on the Internet is newer than the one cached. If the date is the same, your browser uses the one on your hard disk instead of downloading it from Internet. In this case, the smaller but faster memory system is your hard disk and the larger and slower one is the Internet.

used to hold a small subset of the main memory Fast memory, located between the CPU and main storage, that stores the most recently accessed portions of memory for future use developed in static random access memory (SRAM), which is faster than DRAM, but is more expensive, more power-hungry, and less dense. to provide instructions and data to the processor faster than would be possible if only main memory were used. CACHE CONTROLLER checks the tags to determine if the memory location of the request is presently stored within the cache (almari cache) LEVEL 2 MEMORY CACHE (L2 CACHE) : build a special memory bank in the motherboard, small but very fast (around 30 nanoseconds)? That's already two times faster than the main memory access. also implemented in SRAM. typically comes in two sizes, 256KB or 512KB to supply stored information to the processor without any delay (wait-state) the bus interface of the processor has a special transfer protocol called burst mode LEVEL 3 cache that exists between the microprocessor and main system memory -becomes level 3. LEVEL 1 MEMORY CACHE (L1 CACHE) : this memory will be accessed at the speed of the microprocessor and not the speed of the memory bus Fastest form of storage

 it's built in to the chip with a zero wait-state (delay) interface to the processor's execution unit, it is limited in size implemented using Static RAM (SRAM) traditionally 16KB in size, 64Kb has remained the standard L1 cache size, though various multiple-core processors may utilise it differently WIDE PATH MEMORY ACCESS : to widen the data path so as to read/write several bytes/words between CPU and memory with each access MEMORY INTERLEAVING : to divide memory into parts so that can access more than one location at a time Technique for connecting multiple memory modules together in order to improve the bandwidth of the memory system. n-WAY INTERLEAVING a way to break up memory (n is a value odd/even) IMPROVED CPU PERFORMANCE SEPARATE FETCH UNIT / EXECUTION UNIT : two separate unit : fetch unit (to retrieve and decode instruction) and an execution unit (perform the actual execution process) fetch unit : to fetch several instructions at a time in parallel PIPELINING : to speed up processing even more, modern computers overlap instructions more than one instruction is being worked on at a time when the first instruction is completed, the next one is already one stage short of completion allows several instructions to be executed at the same time, but they have to be in different pipeline stages at a given moment HAZARDS situations that prevent the next instruction in the instruction stream from executing during its designated clock cycle When an instruction is stalled, all instructions later in the pipeline than the stalled instruction are also stalled Structural : attempt to use the same resource two different ways at the same time Data : attempt to use item before it is ready Control : attempt to make a decision before condition is evaluated SCALAR AND SUPERSCALAR PROCESSOR SCALAR single execution unit ignoring holes in the pipeline, the CPU can average instruction execution approximately equal to the clock speed of the machine.

 SUPERSCALAR the ability to process more than one instruction per clock cycle include all features of pipelining but, in addition, there can be several instructions executing simultaneously in the same pipeline stage several instructions can be initiated simultaneously and executed independently MULTIPROCESSING : multiple CPUs within a single computer, sharing some of system's memory and I/O facilities (multiprocessor systems) multiple CPU processors are supplied within a single IC (multicore processors) DualCore etc

Advantages: equivalent processing power can be achieved at much lower clock speeds, reducing power consumption, heat and stress within computer components programs divided into independent pieces and is executed simultaneously on multiple CPUs increasing computational power allows the computer to continue instruction execution in the other CPUs Multiprocessing configuration: Master-slave Multiprocessing : the master manages the system and controls all the resources and scheduling other CPUs are slaves, performing work assigned to them by the master. Symmetrical Multiprocessing (SMP) : each CPU has identical task ; access to the operating systems including memory each CPUs schedules it own work Advantages : every CPU has equal access any CPU can execute any task and can process any interrupt the workload is well balanced critical operations are simply dispatched to all CPUs simultaneously Disadvantages : a failure in a single CPU may reduce overall system performance, but it will not cause system failure Simultaneous Thread Multiprocessing (STM) : A number of CPUs using parallel execution units within a single CPU to process two or more threads simultaneously VON-NEUMANN ARCHITECTURE: The memory unit that holds both data and Instructions. The content of the memory is addressable by location The arithmetic/logic unit that is capable of performing arithmetic and logic operations on data The input unit that moves data from the outside world into the computer The output unit that moves results from inside the computer to the outside world Instructions are executed sequentially

 MULTIPROGRAMMING : The technique of keeping multiple programs in main memory at the same time, competing for the CPU so that they can execute.

MEMORY MANAGEMENT : The act of keeping track of how and where programs are loaded in main memory. Logical address : A reference to a stored value relative to the program making the reference A value that specifies a generic location, relative to the program but not the reality of main memory. When a program is compiled, a reference to a variable is changed to this address. Physical address : An actual address in the main memory device when the program is eventually loaded into memory, each logical address corresponds to a specific physical address. Address binding : the mapping from a logical address to a physical address PROCESS : The dynamic representation of a program during execution. Process Management : the act of keeping track of information for active processes. THREAD : - small pieces of a program that can be executed independently - such as the spell checker in Word CPU SCHEDULING : the act of determining which process in memory is given access to the CPU so that it may execute COMPLEX INSTRUCTION SET COMPUTER (CISC) the CPU uses microcode to execute very comprehensive instruction set These may be variable in length and use all addressing modes, requiring complex circuitry to decode them slow per instructions, use little (less than RISC) instruction REDUCED INSTRUCTION SET COMPUTER (RISC) keep instruction size constant, ban the indirect addressing mode and retain only those instructions that can be overlapped and made to execute in one machine cycle or less. more instructions are needed to accomplish a task Advantages : they can execute their instructions very fast because the instructions are so simple RISC chips require fewer transistors, which makes them cheaper to design and produce

READ / WRITE OPERATION : Read Operation : If the address line and activation line are both on and the read/write line is set to read, then the READ SWITCH connects the output of the cell to the MDR line To read data/instruction from a memory cell, the CPU puts a memory address in the MAR via the address bus it is send to the memory At the same time, CPU sets the control signals to READ The memory cell then puts the requested item on the data bus Write Operation : If the address line and activation line are both on and the read/write line is set to write, then the WRITE SWITCH connects the MDR line to the input of the cell, which transfers the data bit on the MDR line to the cell for storage. The CPU puts the data to be written on the data bus and the address to be stored into on the address bus and then it asserts WRITE. Then the data is send from the accumulator register to the MDR via the data bus to a memory cell. MEMORY HIERARCHY : A system of memory devices of different speeds and capacities;allows for trading off between capacity and speed, and between volatility and persistence. PROGRAMMED I/O : - I/O module is connected to a pair of I/O registers via a bus - Input from the peripheral device is transferred from I/O module to the I/O data register, from there to ACC register - Each instruction produces a single input or output - Obviously slow since a full instruction fetch-execute cycle must be performed for every I/O data word to be transferred - Used primarily with keyboards - Used by programs in the CPU to send the necessary commands to the I/O modules to set up parameters for the transfer and to initiate I/O operations INTERRUPT : - The messages sent to the computer on interrupt line. - Cause the computer to suspend the program being executed and jump to a special interrupt processing program (module) - Interrupt Line : o Special control lines to the CPU o 32 interrupt lines ; IRQ0 to IRQ32 (IRQ = Interrupt ReQuest) INTERRUPT SERVICE :
suppose you were giving a speech in a class and someone interrupts by asking a question. Ill hold my speech and answer the question first. After answered I will continue my speech as though no interrupt had occurred

Before interrupt message arrived, a program is executing. When an interrupt is received the current instruction is completed and the registers are saved in the stack area

Process Control Block (PCB): o The special area (stack area) Then the PC is loaded with starting location of the interrupt handler program (aka interrupt routine or the module) Interrupt Handler Program o Determines the appropriate course of action (servicing an interrupt) o Aka device drivers The routine is becomes the executing program now After it is completed, the registers (in PCB) are restored and the original program resumes.

USES OF INTERRUPT : - External event notifier o A keyboard interrupt handler first inputs the character and determines what character has been received o Then it will determine if the input requires special action so it would perform it. o When it is complete, the computer normally restores the register values and perform the suspended program - Completion signal o the computer sends one block of data at a time to the printer. o When the printer is ready to accept more data, it sends an interrupt to the computer o This shows that the printer has completed printing and is ready for moar. - Means of allocating CPU time o Allocate CPU time to different programs or threads that are sharing the CPU o Since the CPU can only execute one instruction at a time, the ability to time share multiple programs implies that the computer system must share the CPU by allocating small segments of time to each program in rapid rotaion. o Quantum : The time between interrupt pulses - An abnormal event indicatot o To handle events that affect the operation of the computer system o External event such as power failure A power line monitor that connects to the interrupt facility provides this capability The interrupt routine will save the status of programs that are in memory o Other abnormal event : Divide by 0 oshi Nonexistent opcode Hardware error detected o When the error occurs it is not possible to complete the executing program. o It is important that the system to recover from the error and the user to be notified. o Traps or exceptions: Internal interrupts Interrupts are actually generated from the inside the CPU

Big question : how does the computer determine the order in which the interrupts get serviced? How
does the computer identify the interrupting device?

VECTORED INTERRUPT: - Which the address of the interrupting device is included as part of the interrupt - Obviously faster - Requires additional hardware to implement - Steps macam kat atas yang interrupt routine akan dipanggil apabila interrupt received. POLLING INTERRUPT: - Provides a general interrupt that is shared by all devices - The computer identifies the interrupting device by polling each device MULTIPLE INTERRUPT: - By assigning priorities to each interrupts - Daisy-chaining : o Places the interrupts onto a single interrupt line to the CPU o Highest priorities are recognized first INTERRUPT-DRIVEN : the CPU has separate circuits on which a device requesting I/O service can post a request. The CPU periodically checks the circuits for an interrupt request (IRQ) it can send a query to each device on a list until the correct one is found. DIRECT-MEMORY ACCESS (DMA) : - the I/O system writes directly into main memory without the involvement of the processor. - To transfer blocks of data - Conditions: o Must be a method to connect together the I/O interface and memory o The I/O module associated with a device must be capable of reading and writing to memory o Must be a means to avoid conflict between the CPU and the I/O module. Memory can only be used by one device at a time. - CPU is not actively involved during the transfer, CPU can be used to perform other tasks during the I/O transfers are taking place.

I/O MODULES: - That serve to control the I/O devices - Act as an interface between the peripheral devices, the CPU and memory - Receives message from CPU, control the device, initiate and control DMA and produce interrupts. - Also serve to direct I/O requests to the proper channel and provide control of the I/O operation

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STACK: - a special memory buffer used as a holding area for addresses and data - the programmer sets aside one or more blocks of regular memory for the stack - location on the stack is pointed to by the stack pointer - Stack pointer o holds the address of the last data element to be added to (pushed on the stack) o last value added to the stack is also the first one to be removed (popped from the stack) - LIFO (Last In, First Out) - PUSH o Adding to stack o Push instruction does not change the content of AX, instead it copies the contents of AX onto the stack - POP o removing from stack o removes a value from the stack and places it in a register or variable o After popped out, the stack pointer is incremented to point to the previous value on the stack o AX contains the number that was at the top of the stack. - Uses o makes an excellent temporary save area for register o use the registers as scratch area and restore them when finished o When a subroutine is called, the program saves a return address on the stack BUS : a network topology or circuit arrangement in which all devices are attached to a line directly and all signals pass through each of the devices Each device has a unique identity and can recognize those signals intended for it data path on the computer's motherboard that interconnects the microprocessor with attachments to the motherboard in expansion slots BUS ARBITRATION : The process of determining which competing bus master should be granted control of the bus. Centralized Arbitration : Centralized bus arbitration requires hardware that will grant the bus to one of the requesting devices. This hardware can be part of the CPU or it can be a separate device on the motherboard. This scheme is fast because there are direct connections between any bus master and the arbiter Decentralized Arbitration : No arbiter (Bus master) each bus master has its own arbitration and allocation logic The responsibility of deciding who has control of the bus is distributed among the bus masters

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 Disadvantage : it requires relatively complex arbitration logic in each bus master and several arbitration lines on the bus Advantages : this scheme allows very fast bus allocation and a flexible assignment of priorities to the bus masters more fault-tolerant than the centralized schemes in that the failure of a single bus master does not necessarily affect the operation of the bus. BUS PROTOCOL : The set of rules which define precisely the bus signals that have to be asserted by the master and slave devices in each phase of a bus operation. Asynchronous Protocol : does not have an explicit clock signal to coordinate the sender and receiver sender and receiver can proceed to the next step in the bus operation only if both of them are ready ; both parties have to shake hands and agree to proceed before they can do so. Advantages : self-timing nature also allows data to be transferred between devices of any speed, giving asynchronous designs the flexibility to handle new and faster devices as they appear can be physically longer than their synchronous counterparts Disadvantage : handshaking protocol adds significant overhead to each data transfer and is thus slower than a synchronous protocol. Synchronous Protocol : coordination of devices on the bus is achieved by distributing an explicit clock signal throughout the system. clock signal is used as a reference to determine when the various bus signals can be assumed to be valid. used where there is a need to connect a small number of very tightly coupled devices used to connect the processor and the memory subsystem Advantages : it is fast requires relatively few bus lines and simple interface logic, making it easy to implement and test Disadvantages : requires all the devices to support the same clock rate this clock rate is fixed and cannot be raised compatibly to take advantage of technological advances. Length is limited by the difficulty of distributing the clock signal to all the devices at the same time

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HANDSHAKE: process of one computer establishing a connection with another computer or device the steps of verifying the connection, the speed, and/or the authorization of the computer trying to connect to it An example of handshaking is when a modem connects to another modem; the tones heard after the dialing is the handshake and can be thought of as the computers greeting each other VLSI: - Very Large Scale Integrated Circuit. - A semiconductor device that integrates millions of transistors on a single chip. - VLSI chips are typically very high speed and have very high power dissipation TO IMPROVED DISK PERFORMANCE: - disk arm prepositioning - disk reorganization and defragmentation - log-structured file systems - active disks and free-block disk scheduling STORAGE MEDIUM: - physical material on which a computer keeps data, instructions, and information STORAGE DEVICE: - computer hardware that records and/or retrieves items to and from storage media WRITING AND READING: - Writing - the process of transferring items from memory to a storage medium - Reading - the process of transferring these items from a storage medium into memory INTERNAL HARD DISK: - also called a hard disk drive or hard drive (storage device) - contains one or more inflexible, circular platters that use magnetic particles to store data - Capacity ; determined from whether it uses longitudinal or perpendicular recording, the number of platters it contains, and the composition of the magnetic coating on the platters - Each platter has two read/write heads - Formatting ; the process of dividing the disk into tracks and sectors - Sectors ; The disk's storage locations are divided into pie-shaped sections, which break the tracks into small arcs - Transfer rate ; the speed with which data, instructions, and information transfer to and from a storage device

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TYPES OF STORAGE NETWORK ATTACHED STORAGE (NAS): - server connected to a network - often use a RAID configuration - RAID: - Redundant Array of Inexpensive Disks - An array of disks organized to provide higher availability, through faulttolerance, and higher performance through parallel processing EXTERNAL HARD DISK: - separate free-standing hard disk that connects with a cable to a USB port on the system unit or communicates wirelessly REMOVABLE HARD DISK: - can be inserted or removed from a built-in or external drive DISK CONTROLLER: - consists of a special-purpose chip and electronic circuits that control the transfer of data from a disk to and from the system bus - may be part of the hard disk on the motherboard, or it may be a separate adapter card FLASH MEMORY CHIPS: - a type of solid state media - consist entirely of electronic components and contain no moving parts SOLID STATE DRIVE (SSD): - uses flash memory to store data, instructions, and information MEMORY CARD: - removable flash memory device that you insert and remove from a slot in a computer USB FLASH DRIVES: - called a thumb drive - flash memory storage device that plugs in a port on a computer

EXPRESSCARD MODULE: - removable device that fits in an ExpressCard slot - can add memory, storage, communications, or other capabilities to a computer OPTICAL DISC (CD): - type of storage media - that consists of a flat, round, portable disc made of metal, plastic, and lacquer - written and read by a laser - store items in a single track that spirals from the center of the disc to its edge

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CD-ROM: - optical disc that uses laser technology to store items - can read the contents but cannot erase or modify their contents CD-R: - multisession disc on which users can record their own items - can be written on only one time but contents cannot be erased CD-RW: - an erasable disc - can be written on multiple times DVD-ROM: - high capacity optical disc - can read but not write on or erase BD-ROM: - higher capacity and better quality than standard DVDs TAPE: - magnetically coated ribbon of plastic - storing large amounts of data - low cost TAPE DRIVE: - reads and writes data and information on tape - for long-term storage and backup MAGNETIC STRIPE CARD: - card with a stripe - contains information identifying you and the card - Card Reader reads the information stored on the stripe SMART CARD: - similar in size to a credit or ATM card - stores data on a thin microprocessor embedded in the card MICROFICHE & MICROFILM - Microfilm - 100- to 215-foot roll of film - Microfiche - small sheet of film - reduce the amount of paper firms - inexpensive - the longest life of any storage media

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DATA COMPRESSION - to reduce redundancy in stored or communicated data - Increasing effective data density. - How? - involves transforming a string of characters - into a new string of bits which contains the same information but whose length is as small as possible - reduces storage and/or communication costs - increasing the capacity of the communication channel - compressing a file to half of its original size is equivalent to doubling the capacity of the storage medium - Lossy Compression : - discards (loses) some of the data - result is different from the original, though similar enough to be useful in some way - Greater compression ration but poorer image - to compress multimedia data - Lossless Compression : - required for text and data files - technique identify repeating words and assign them a code DATA INTEGRITY - quality of correctness, completeness, wholeness, soundness and compliance with the intention of the creators of the data - May related to : - Human errors - Errors that occur when data is transmitted - bugs or viruses - Hardware malfunction - Natural disasters - Ways to minimize it : - Backing up data - Controlling access to data - Designing user interfaces that prevent the input of invalid data - Using error detection software

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COMPUTER GENERATIONS: - ZERO-TH GENERATION - Mechanical - Mechanical calculating computer Blaise Pascal Only addition and subtraction - Step-Reckoner Gottfried von Leibniz Add, subtract, multiply, divide and square roots Uses binary numbering systems - Loom Joseph Marie Jacquard used punched cards to control the pattern woven into cloth - Difference Engine Charles Babbage could only subtract and add designed to compute tables of numbers useful for naval navigation - Analytical Engine Charles Babbage Successor of Difference Engine FOUR components: the store (memory), the mill (computation unit), the input section (punched card reader) and the output section (punched and printed output). able to carry out different instructions/ computations Ada Augusta Byron worked with Babbage - ABC - Atanasoff and Berry Computer John V. Atanasoff and Clifford Berry to solve physics equations first binary-based machine Has an arithmetic/logic unit with thirty units that can do addition/subtraction, a rotating drum memory that held thirty binary numbers of fifty digits each, and punched card input - MARK I Howard H. Aiken and associates at Harvard University Used thousands of relays Input and output used punched paper tape FIRST GENERATION Vacuum Tube - The ENIAC (Electronic Numerical Integrator and Computer) John W. Mauchly and J. Presper Eckert It contained 18,000 vacuum tubes and 1500 relays Had 20 registers, each capable of holding a 10-digit decimal number Programs could not be stored internally but were hard wired with external patch panels and toggle switches.

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considered as the first all-electronic digital computer led directly to the development of UNIVAC I, the worlds first commercially available computer

The EDVAC (Electronic Discrete Variable Automatic Computer) Mauchly and Eckert based on Von Neumann Machine It stored its instructions electronically, using the binary system for instruction coding and input First two-stored program computers The IAS Machine John Von Neumann Binary computer with a 40-bit word, storing two 20-bit instructions in each word Negative numbers were represented in "two's complement" format the first design to mix programs and data in a single memory the combination of instructions and data in one memory could be used to implement loops, by modifying branch instructions when a loop was completed It used about 2300 tubes in its circuitry an asynchronous machine, meaning that there was no central clock regulating the timing of the instructions The EDSAC (Electronic Delay Storage Automatic Calculator). Maurice Wilkes and his team at the University of Cambridge Mathematical Laboratory the world's first practical stored program electronic computer

SECOND GENERATION Transistors - by John Bardeen, Walter Brattain and William Shockley - made of a semi-conducting material and control the flow of electricity through the circuits - less expansive and smaller, required less electricity and emitted less heat than the vacuum tubes - not fragile as vacuum tubes, and they lasted longer - The TX-0 first transistorized computer built at M.I.T intended as a device to test the much fancier TX-2. - PDP-1 Manufactured by DEC It had 4K of 18-bit words and a cycle time of 5 microsec One of the PDP-1s many innovations was a visual display (CRT) and the ability to plot points anywhere on its 512 x 512 screen Also programmed the PDP-1 to play spacewar, and the world had its first video game the PDP-8 which uses a single bus, the omnibus - IBM 7090 the fastest computer in the world at that time

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Both 7090 and 7094 marked the end of ENIAC type machines CDC 6600 Introduced by CDC highly parallel machine It had several functional units for and all of them could run in parallel The Borroughs B5000 Programmed in Algol 60

THIRD GENERATION - Integrated Circuits (IC) - single, complete electronic semiconductor circuits contained on pieces of silicon - manufactured by machinery, which ultimately resulted in a lower cost - Memory technology improved - Magnetic disks were improved and were used more for storage - Monitors and keyboards were introduced for data input and output FOURTH GENERATION Personal Computers and VLSI - the development of very large scale integration (VLSI) produced a chip containing a microprocessor - prices of computers had dropped so low that it was feasible for a single individual to have his own computer - CPUs architecture were upgraded the birth of Intels 80x86 CPU line FIFTH GENERATION - AI, Neural Networks, Digital/Analog Hybrids, Web Computing - Belum di kembangkan lol

THIS EPIC TINY NOTES OF EPIC TERMS IN COMPUTER SCIENCES WAS MADE BY - AIMAN 10

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