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Lecture 7: Lecture 7:

Datapath Datapath
COS +71a, COS +71b f ELE 375
Computer Architecture and Organization
Princeton University
Fall 200+
Prof. David August

1. Write -2.5 in our !EEE 75+ Wimpy Precision (8 bits


total, +-bit exponent, 3-bit mantissa).
(-1.01x2
1
bias = 7 11000010)
2. How is two's-complement subtraction typically
implemented in HW?
(carry_in
0
= 1, invert subtrahend)
3. Give one reason why floating point is better than fixed
point.
(greater range)
The Quiz We Might Have Had The Quiz We Might Have Had

Datapath Datapath
Datapath
The component of the processor that performs
arithmetic operations" - H8P
Datapath
The collection of state elements, computation elements,
and interconnections that together provide a conduit for
the flow and transformation of data in the processor
during execution. - D!A

Datapath Datapath - - Part of the Part of the Microarchitecture Microarchitecture
Architecture
- The !SA - the programmer's view of the machine
- !mplementation independent, an interface
Nicroarchitecture
- The lower-level implementation of the !SA
- Design specific, an implementation
Example use of terminology
- Architectural state: Register r5
- Nicroarchitectural state: Carry bit on the 5
th
1-bit ALU

Datapath Datapath Elements Elements


- ALUs are just one datapath building block
- What about the other elements?
Computational Elements
- Combination Circuits
- Outputs follow inputs
- Familiar Example: ALU
State Elements
- Sequential Circuits
- Outputs change on clock edge
- Familiar Example: A Register
- Combinational - you had better know how to design it by now!!!
- Refine for N!PS
- Zero equality test on all results - why?
- Set on less than for slt instruction
Computation Element: ALU Computation Element: ALU
ALU control
3
ALU
Result
Zero
add 010
OR 001
set on less than 111
subtract 110
AND 000
Function ALU Control
- 16 32 bit Sign extender
- Why is this necessary in N!PS?
- Hint:
Computation Element: Sign Extender Computation Element: Sign Extender
16 32
Sign
Extend
Implementation?
- Not an ALU, just add
- Why would we need this in N!PS to execute instructions?
Computation Element: Adder Computation Element: Adder
Add Sum

Computational Element: The Magical Computational Element: The Magical Mux Mux
- Nux is short for Nultiplexer (Think: selector)
- n input lines (of any common width)
- m control wires to select
- n = 2
m
M
u
x
Control
in
0
in
n
out
m
Implementation?
- Nicroarchitecture to implement architectural state
- Built using D flip-flops
- N!PS:
- Need to be able to read two operands at once
- 2 source operands per instruction
State Element: Register File State Element: Register File
RegWrite
Registers
Write
register
Read
data 1
Read
data 2
Read
register 1
Read
register 2
Write
data
Data
Data
Register
numbers
5
5
5
5-bits? 2 Reads? 1 Write?

State Element: Register File State Element: Register File


Register Implementation Register Implementation
Falling edge triggered D flip-flop
D latch
State Element: Register File State Element: Register File
Read Implementation Read Implementation
RegWrite
Registers
Write
register
Read
data 1
Read
data 2
Read
register 1
Read
register 2
Write
data
Data
Data
Register
numbers
5
5
5
State Element: Register File State Element: Register File
Write Implementation Write Implementation
RegWrite
Registers
Write
register
Read
data 1
Read
data 2
Read
register 1
Read
register 2
Write
data
Data
Data
Register
numbers
5
5
5
Know decoders

State Element: Data and Instruction Memory State Element: Data and Instruction Memory
- Nicroarchitectural element to hold the architectural
memory state
- See Appendix B for implementation details
MemRead
MemWrite
Data
memory
Write
data
Read
data
Address
Instruction
memory
Instruction
address
Instruction

State Element: The Program Counter State Element: The Program Counter
- To hold the architectural PC state
- Just like a single register
P C
Our Complete Line of Products! Our Complete Line of Products!
There may be others, but this is good for MIPS There may be others, but this is good for MIPS
ALU control
RegWrite
Registers
Write
register
Read
data 1
Read
data 2
Read
register 1
Read
register 2
Write
data
ALU
result
ALU
Data
Data
Register
numbers
Zero
5
5
5 3
PC
Instruction
memory
Instruction
address
Instruction Add Sum
16 32
Sign
extend
MemRead
MemWrite
Data
memory
Write
data
Read
data
Address
M
u
x
Control
in
0
in
n
out
m

Fetching Instructions (no branching) Fetching Instructions (no branching)

The ALU (R The ALU (R- -Type) Instructions Type) Instructions


Consider: r1 = r2 - r3

Load and Store Instructions Load and Store Instructions


Consider: r1 = M[ r2 - 3 ]

Composition of Memory and R Composition of Memory and R- -Type Type Datapath Datapath
The Magic of the The Magic of the Mux Mux

Recall Fetch Recall Fetch

Now Add Instruction Fetch Now Add Instruction Fetch

Now Add Instruction Fetch Now Add Instruction Fetch


(ALU + MEM + Fetch) (ALU + MEM + Fetch)
Data and Instruction memory?

Branch Instructions Branch Instructions


Consider: Branch r1 == 0, TARGET
Why shift left by 2?

Add Branch to Add Branch to Datapath Datapath


(ALU + MEM + Fetch + Branch) (ALU + MEM + Fetch + Branch)
What will zero be connected to?

MIPS Instruction Quirk MIPS Instruction Quirk


- The Destination Register may be in different locations
- 11-15: Loads use rt
- 16-20: All R-Types use rd

Again, The Magic of the Again, The Magic of the Mux Mux! !

Ugh, what is going on here!?! Ugh, what is going on here!?!

Control vs. Control vs. Datapath Datapath (Blurring the Line) (Blurring the Line)

What is Control? What is Control?


Control
The component of the processor that commands the
datapath, memory, and !fO devices according to the
instructions of the program." - H8P
Control
The component of the processor that commands the
datapath, memory, and !fO devices according to the
instructions of the program. - D!A

Full Full Datapath Datapath with Control with Control



Summary and Next Steps Summary and Next Steps
- The book doesn't define datapath well
- Computation and State elements compose datapath
- Look for reuse across instruction types
- Build minimal HW datapath with the magic of the mux
Next Steps
- Need to define control
- Understand Timing
- Single cycle
- Nulti-cycle
- Understand how to implement control

For Next Time For Next Time


- Be sure to know material in Appendix B
- Know how to make a finite state machine

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