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vast majority of the electrons are locked into the crystal lattice and unable to move.
Therefore inthis state there is a high LDR resistance.As light falls on the semiconductor, the light photons are absorbed by the semiconductor latt
ice and some of their energy is transferred to the electrons. This gives some of them sufficientenergy to break free from the crystal lattice
so that they can then conduct electricity. This resultsin a lowering of the resistance of the semiconductor and hence the overall LDR resistance.
The process is progressive, and as more light shines on the LDR semiconductor, so more electronsare released to conduct electricity
nitCell Resistance
1000 LUX 400 Ohm10 LUX 9 kOhm Rise Time 1000 LUX 2.8 ms10 LUX 18 ms Fall Time 1000 LUX 48 ms10 LUX 120 ms
between the light falling on thedevice and the resulting output signal. In the case of a photocell, one is dealing with therelationship between the
The 555 monolithic timing circuits is a highly stable controller capable of producingaccurate
time delays, or oscillation. In the time delay mode of operation, the time is preciselycontrolled by one external resistor and capacitor. For a
controlled with two external resistorsand one capacitor. The circuit may be triggered and reset on falling waveforms, and the outputstructure
Working
Contrary to its normal use as an astable or monostable multivibrator the Type 555 IC inthis
circuit functions as a comparator. To explain this rather unusual application. It is necessaryto note that the operation of a 555 is normally as
follows: the output goes high upon receipt of atrigger (start) pulse on input pin2. This pulse is a voltage whose level is lower than 1/3 of thesupply voltage.
The output goes low again when the voltage at the second input, pin 6, has briefly exceeded 2/3 of the supply level. In the present design, the second input is
not used, butthe output of the chip can none the less revert to the low state, since pin6 is connected direct tothe positive supply rail. This set up is accounted
for by the accompanying table taken from the555s data sheets.In principle the supply voltage for the circuit must equal the coil voltage of the
relay. Donot apply more than 16V however, as this may damage the 555. The current consumption of thecircuit is 4mA, exclusive of the relay, at a supply
level of 12V. Components R2 and C1 ensure adelay of about 10s before the relay is energized, so that the circuit is rendered insensitive to
rapidchanges in the light intensity.Basically, the circuit has no hysteresis effect. However, when the supply is not regulatedthe actuation of the
relay will lower the supply level somewhat. This lowers the internalthreshold of the IC since the trigger point
is defined as 2/3 of the hysteresis of the circuit can bedimensioned as required by fitting a resistor in series with the supply. It is also possible to fit aresistor
between pins 5 & 7 of the 555, as shown in the circuit diagram. The amount of hysteresisis inversely proportional to the value of the
resistor, and 100k is a reasonable starting point for experiments. The sensitivity of the trigger circuit can be controlled if R1 is replaced with a
VI. Implementation
Initially the board outlines and connectors are marked on a sheet of paper followed
by sketching the component outlines with connecting points and the conductor patterns.Prepare the layout as viewed from the component side so
as to avoid confusion. The layout isdeveloped in the direction of signal flow, as far as possible. This reduces the number of interconnection
s.Among the components, the larger ones are placed first and the space in between is filledwith smaller ones. Components requiring
input/output connections come near the connectors. Allthe components are placed in such a way that desoldering of other components
is not necessary,if they have to be replaced.While designing the conductors, the minimum spacing requirements for the final artwork should be
known. It depends on a number of factors and it is based on the breakthrough voltage.But, in any case, the minimum spacing is applied only where it
cannot be avoided. The yield inPCB fabrication will otherwise come down, with minimum spacing. Reset(4)TriggerVol tage(2)ThresholdV oltage
(6)OutputDischarg eSwitchLow Irrelevent Irrelevent Low ON High <1/3VDD Irrelevent High Off High
The final copper pattern is formed by selective removal (ETCHING) of the unwantedcopper, which is not protected by an electric resist
(ferric chloride).Many factors are considered while choosing the most suitable etchant system for a PCB process. The etch resist should
be compatible with the etchant. Besides, the etching speed,copper showing capacity, etchant price and pollution characteristics
come into the picture of theoverall economy of the etchant. Some commonly used etchants are ferric chloride, cupricchloride,
chromic acid and alkaline ammonia. After etching is completed, FeC13 is washed fromthe board and is cleaned dry. The paint is removed using suitable
solvents. Holes are now drilledinto the appropriate positions. Drill bits of correct dimensions are then soldered into the PCBcarefully. Care should be
PCB Layout
Fig 6.PCB Layout
Result
On connecting 9V battery to input terminals of signal circuit starts working. When highintensity of light like sunlight or lamp light is fall on LDR (Light
Dependent Resistor) relay setin zero position or initial position and when it is place in dark place in night relay switches intoActive
Conclusion
When light fall on LDR of high intensity LDR decreases its resistance value.
As decreasein resistance the voltage at Trigger pin of IC555 starts decreasing. IC555 is act as comparator in
compared with the supply voltage. And if it is lessthan the 1/3 of supply voltage output is active high. And if trigger voltage is greater than 1/3
of supply voltage and less than 2/3 of supply voltage at pin6 then output is active low .
Light Sensitive Trigger
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Mihir Patelleft a comment is reading Light Sensitive Trigger. 06 / 01 / 2011 Upload a Document
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