Thin Solid Films 427 (2003) 422426

Polycrystalline silicon thin films for MEMS applications

H. Mahfoz-Kotba,*, A.C. Salauna, T. Mohammed-Brahima, F. Le Bihana, M. El-Marssib
b a GM-IETR, Universite RENNES I, Campus de Beaulieu, 35042 Rennes, Cedex, France LPMC, Universite de Picardie Jules Verne, 33 Rue Sain-Leu, 80039 Amiens, Cedex, France

Abstract Thanks to its interesting mechanical and electrical properties, silicon represents the first candidate as a structural material in the Micro Electro Mechanical Systems field. Doped polycrystalline silicon films are generally used, particularly when electrostatically movable mechanical structures are needed. Here, we investigate the effects of the doping type as well as the postdeposition thermal treatments on the mechanical behaviour of in situ doped polycrystalline silicon films deposited by low pressure chemical vapour deposition from a mixture of silane SiH4 and phosphine or diborane. Stress measurements, performed using micro-Raman spectroscopy, are related to the behaviour of micro fixedfixed beams as determined from optical and scanning electron microscopy observations. The films, regardless of their doping type, are found tensely stressed when the amorphous deposited films are solid phase crystallised at 600 8C. The tensile stress is reduced becoming compressive when the crystallization temperature is increased. An optimum tensile stress value, corresponding to the maximum of the beam free length, is determined. Finally, air-gap thin film transistors (TFTs) using these doped fixedfixed beams are realised. Electrical parameters of these TFTs (field effect mobility, threshold voltage, and subthreshold slope) may be considered as good. Particularly the low value of the threshold voltage, 2.5 V, is very interesting for handling devices where the power consumption saving is crucial. 2002 Elsevier Science B.V. All rights reserved.
Keywords: Polysilicon; Residual stress; Air-gap TFTs

1. Introduction Micro Electro Mechanical Systems, (MEMS), is a promising field expected not only to introduce new applications but also to develop ones which already exist. Because of its interesting mechanical and electrical properties, both doped and undoped silicon films represent the first candidate as a structural material in MEMS applications. However, doped silicon films are more advantageous when the structural layer must be an electrically conductor material. Yet there are still some problems that limit the development of MEMS applications. One problem is the stiction of MEMS microstructures during the final step of rinsing and drying. Several technological solutions have been proposed w13x. Even if each of these solutions can increase the process yield, few drawbacks occur sometimes due to either the incompatibility with the IC technology or the need of complicated set-up.
*Corresponding author. Tel.: q33-2-23-23-60-71; fax: q33-2-2323-56-57. E-mail address: hkotb@univ-rennes1.fr (H. Mahfoz-Kotb). 0040-6090/03/$ - see front matter PII: S 0 0 4 0 - 6 0 9 0 0 2 . 0 1 2 0 1 - 4

Another problem is the residual mechanical stress and its gradient. It is in one part due to the mismatch of lattice constants and thermal expansion coefficients between the substrate and the thin film material. In another part it is due to the effect of the impurities on the grain growth during the deposition or the thermal annealing. Residual stress introduce some problems as film cracking in the case of high tensile stress (positive) or film buckling in the case of compressive stress (negative). The stress gradient leads to out-of-plane deflection of the one-side fixed elements in a MEMS device. Generally, films that are slightly tensely stressed with a minimum stress gradient are more convenient for MEMS applications. In this work, we study the effect of in situ doping and that of different thermal annealing cycles on the average residual stress of low pressure chemical vapour deposition (LPCVD) polysilicon films amorphously deposited using SiH4 precursor gas in a conventional CVD hot-wall reactor. Even if the measurements of mechanical stress in thin films are usually performed using wafer curvature w4x or X-ray diffraction (XRD) w5x techniques, we have chosen to use the micro-Raman

2002 Elsevier Science B.V. All rights reserved.

H. Mahfoz-Kotb et al. / Thin Solid Films 427 (2003) 422426

423

Fig. 1. Fabrication process of fixedfixed beams using surface micromachining. (a) Sacrificial oxide is patterned, (b) silicon structural layer is deposited and patterned, (c) structures are released.

spectroscopy because of its higher spatial resolution, rapidity and non-destructive nature compared to the other techniques. Using surface micromachining technique, fixedfixed micro-beams with a wide range of lengths and widths were fabricated using polysilicon films prepared under different conditions. The relation between the stress values and the maximum free-length of microstructures was probed using scanning electron microscopy (SEM), observations. Therefore using our best results we have realised thin film transistors (TFTs) with a suspended gate structure. The transistors were characterised under different environments with the goal of using it as a potential ambience sensor. 2. Experimental details Five-hundred nanometer of low thermal silicon oxide (LT-SiO2) is deposited on 2 inch silicon wafers and then patterned using standard photolithography techniques (Fig. 1a). Consequently, three types of 500 nm thick films namely, undoped, boron and phosphorous in situ doped, are deposited in the amorphous phase by LPCVD at 550 8C and a pressure of 90 Pa using silane precursor gas. The three types of films are annealed according to three annealing cycles: under vacuum inside the LPCVD reactor (in situ) at 600 8C during 12 h, at 1100 8C during 1 h in N2 ambient, in situ at 600 8C during 12 h and then at 1100 8C during 1 h. After each cycle the polysilicon film is patterned to form the fixedfixed beams (Fig. 1b). By this way, an array of fixedfixed beams with lengths between 10 and 250 mm and widths between 5 and 30 mm is realised on each substrate. Then, each substrate with the patterned polysilicon is diced into two parts. One part is used to perform micro-Raman stress measurements on the patterned polysilicon before the removal of the sacrificial oxide. For the other part of the same substrate, micro-structures are released by etching LT-SiO2 in 49% diluted HF and then rinsed abundantly in DI water followed by a surface tension weakening solution, ethanol (Fig. 1c). The substrates are dried inside an oven at 140 8C during 15 min and finally observed in a scanning electron microscope to determine the maximum free length for each couple of doping and annealing condition.

Micro-Raman measurements are made using a triple spectrometer T-64000 (Jobin Yvon) in triple additive mode equipped with a liquid nitrogen cooled CCD detector. The spectrometer works in the backscattering geometry and a micro-Raman spectrum is recorded at room temperature. The excitation light is the 514.5 nm line of an Arq laser. The diameter of the laser beam spot on the sample is 1 mm. To avoid any undesirable thermal effects on the sample, we use a laser beam power of approximately 0.5 mW, a value measured at the sample. Under the same experimental conditions, Raman spectrum of a single crystalline silicon (c-Si) wafer is recorded as reference. Raman spectrum (Stokes Raman component) of pure single c-Si is a Lorentzian shape peak centred at 520.6 cmy1 with a full width at half maximum (FWHM) of 3 cmy1. For polycrystalline silicon it is found that the position and the FWHM of its Raman peak depend on the amount of residual stress in the material, the grains size and the density of intragrains defects. The grain size in our samples was previously determined from XRD analysis. For the sake of briefness, we do not include the details of these results; more information about the method can be found elsewhere w6x. All samples have shown a grain size that is larger than 100 nm which enables one to exclude any redshift of the first order optical phonon Raman line due to phonon confinement w7,8x. In these conditions, the stress can be evaluated from the relation w9x: s (MPa)sy250vSyv0. where vS and v0 are the wave numbers of the first order phonon Raman line for the stressed polysilicon and the non-stressed c-Si, respectively. More details about the Raman spectroscopy technique can be found in Ref. w10x. Finally, air-gap TFTs w11x with the structure shown in Fig. 2 are realised. The fabrication process includes 4 masques and the maximum temperature was 600 8C that is compatible with glass substrates. Transistors are characterised before the removal of the sacrificial oxide for the first time. Then the sacrificial oxide is etched. The steps of etching, rinsing and drying are made in the same way used to release the microbridges and cantilevers. Transistors are newly characterised, but this time in the presence of the air between the suspended gate and the undoped silicon.

424

H. Mahfoz-Kotb et al. / Thin Solid Films 427 (2003) 422426

Fig. 2. Structure of an air-gap TFT. Table 1 Residual stress as a function of dopingannealing couples Films Undoped Annealing conditions 12 h, 600 8C 1 h, 1100 8C 12 h, 600 8C q1 h, 1100 8C 12 h, 600 8C 1 h, 1100 8C 12 h, 600 8C q1 h, 1100 8C 12 h, 600 8C 1 h, 1100 8C 12 h, 600 8C q1 h, 1100 8C Raman peak position (cmy1) 519.19 521.56 521.67 518.55 520.48 520.2 518.18 519.49 520.14 Stress (MPa) 361 y230 y257 518 40 110 615 287 125 Maximum free length (mm) 200 All buckled All buckled 150 55 75 100 20 30

Phosphorous doped

Boron doped

Fig. 3. Maximum free length of the bridges as a function of the stress values for undoped (U), phosphorus (P) and boron (B) doped films annealed at 600 8C during 12 h (solid squares), at 1100 8C during 1 h (opened squares) and at 600 8C during 12 h followed by 1 h at 1100 8C (triangles). The 2 negative stress undoped films correspond to buckled bridges.

3. Results and discussion 3.1. Stress results Table 1 summarises the results of stress measurements for the different conditions of doping and thermal annealing. It can be important to recall that all films have the same thickness that is 500 nm. The given stress

values can be compared relatively according to their doping and thermal annealing conditions. All films annealed under vacuum at 600 8C during 12 h are tensely stressed which can be accounted for by the shrinkage of film volume during the annealing. Undoped films seem to be low tensely stressed in comparison with the doped films that highlights the additional stress introduced by both substitutional and interstitial impurities. On the other hand, boron doped films are the most stressed films. This higher stress can be explained by the enhancement of silicon self-diffusion induced by the boron atoms compared to the phosphorous atoms w12x. Therefore, for the same annealing conditions, the volume shrinkage is more pronounced for boron doped films. Besides, the small size of boron atoms compared to the silicon atoms can be a contributing factor in the higher tensile stress of boron doped films. The annealing at 1100 8C seems to be effective to reduce the average tensile stress. However, it is not compatible with IC technology due to its high temperature. Moreover, we think that the reduction of average stress occurs by an introduction of a compressive stress in the most-upper layer of the films. This can happen because of the easiness of oxygen atoms incorporation into silicon films at high temperature. The buckled micro-bridges fabricated using films annealed at 1100 8C support this assertion. Table 1 gives the maximum free length, before bucking, of fixedfixed beams, realised using these films.

H. Mahfoz-Kotb et al. / Thin Solid Films 427 (2003) 422426

425

Fig. 4. SEM micrographs show the structure of an air-gap transistor (suspended gate dimensions: 15 mm length and 15 mm width).

Fig. 5. Transfer characteristics of an air-gap transistor with 15 mm channel length and 7 mm channel width, before (opened markers) and after (solid markers) releasing the gate for 1 V (squares) and 5 V (triangles) drainsource voltage.

Fig. 6. Transfer characteristics of an air-gap transistor (with 15 mm channel length and 7 mm channel width) in air (solid squares) and oxygen (opened squares) ambience.

Finally, the maximum free length of the bridges is reported in Fig. 3 as a function of the measured stress for all films and annealing conditions. An optimum stress value to produce the longer free bridge is highlighted in this figure whatever the process conditions. Then, considering only the mechanical characteristics, we can claim that an optimal tensile stress value of approximately 400 MPa is needed to obtain the longest free bridge. This value is obtained for polycrystalline films, 500 nm thick, amorphously deposited at 550 8C by LPCVD and then solid phase crystallised. Depending
Table 2 Summary of air-gap TFT parameters before and after releasing IonyIoff Before releasing After releasing 1.7=104 7.8=104

on the doping, we have to find the conditions of the thermal annealing to obtain this stress value. 3.2. Suspended gate transistors The structure of the transistors (air-gap transistors) is shown in Fig. 4 after removing the gate oxide. The micrograph on the left highlights the suspended gate in the channel region. Fig. 5 shows the transfer characteristics of an air-gap transistor before and after the removal of the 500 nm sacrificial oxide layer. Transistors are characterised at two values of the drainsource voltage

S (Vydecade) 7.5 0.5

Vth (V) 20.3 2.5

m (cm2 Vy1 sy1) 19.3 95.6

426

H. Mahfoz-Kotb et al. / Thin Solid Films 427 (2003) 422426

Table 3 Summary of air-gap TFT parameters measured in air and oxygen environments Measurement in air Ion (A) Vth (V) gm (S) 1.2=10y6 3.7 1.2=10y8 Measurement in oxygen 5.7=10y7 4.4 4.8=10y9

Vdss1 and 5 V. Ion yIoff current ratio, subthreshold voltage S, threshold voltage Vth, and field effect mobility m parameters, before and after releasing, are given in Table 2. An obvious improvement is observed after releasing the sacrificial oxide. It is due to the less defected airySi interface compared to the SiO2 ySi one. Air-gap transistors are also characterised in oxygen environment. Transfer characteristics plotted in air-room ambient and oxygen ambient are compared in Fig. 6. The deduced transistor parameters are given in Table 3. A decrease of the on-current and an increase of the threshold voltage occur in oxygen ambience. These variations cannot be explained by a change in the dielectric constant since it is nearly similar in air and in oxygen. The decrease of the transconductance and then the on-current is due to the oxygen adsorption at the surface of the polysilicon active layer as previously measured and modeled w13x. This promising result shows the possibility of using this type of transistor as an ambiance sensor. A quantitative study of the effect of oxygen on the transistor characteristics is now under investigation. 4. Conclusion Microscopic stress was measured by micro-Raman analysis in undoped as well as phosphorous and boron doped polysilicon films under different annealing con-

ditions. It was linked to the mechanical behaviour of micro-bridges made from these films. An optimum stress was highlighted whatever the doping and the annealing conditions. Phosphorous doped films were used as gate in air-gap polysilicon TFTs. A spectacular improvement of all the transistor parameters is obtained after the release of the polysilicon gate (removal of the gate oxide). Particularly, the very low threshold voltage obtained gives hope to use these air-gap TFTs as ambience sensors when low power consumption is needed. References
w1x M.A. Benitez, J.A. Plaza, S.Q. Sheng, J. Esteve, J. Micromech. Microeng. 6 (1996) 3638. w2x Y. Youngjoo, C. Kkjin, D.L. Jong, K. Chang-Jin, Sensors Actuat. A 52 (1996) 145150. w3x C.H. Masterangelo, Mater. Res. Soc. Symp. Proc. 605 (2000) 105116. w4x R.W. Hoffman, in: G. Hass, T.E. Thun (Eds.), Physics of Thin Films, third ed., Academic Press, New York, 1966, p. 211. w5x I.C. Noyan, T.C. Huang, B.R. York, Solid State Mater. Sci. 20 (2) (1995) 125177. w6x T. Mohammed-Brahim, M. Sarret, D. Briand, K. Kis-Sion, L. Haji, O. Bonnaud, D. Louer, A. Hadjadj, Phil. Mag. B 76 (1997) 193. w7x I.H. Campbell, P.M. Fauchet, Solid State Commun. 58 (1986) 739. w8x V. Paillard, P. Puech, M.A. Laguna, R. Carles, B. Kohn, F. Huisken, J. Appl. Phys. 86 (1991) 1921. w9x V. Paillard, P. Puech, M.A. Laguna, P. Temple-Boyer, B. Caussat, J.P. Couderc, B. Maudit, Appl. Phys. Lett. 73 (12) (1998) 17181720. w10x M.S. Bennrakkad, M.A. Benitez, J. Esteve, J.M. Lopez-Villegas, J. Samitier, J.R. Morante, J. Micromech. Microeng. 5 (1995) 132135. w11x M. Boucinha, V. Chu, J.P. Conde, Appl. Phys. Lett. 73 (1998) 502. w12x J.M. Fairfield, B.J. Masters, J. Appl. Phys. 38 (1967) 3148. w13x M. Aoucher, T. Mohammed-Brahim, B. Fortin, J. Appl. Phys. 79 (1996) 7041.