TRIBHUWAN UNIVERSITY

INSTITUTE OF ENGINEERING
PULCHOWK CAMPUS

A REPORT ON:

FIELD PROGRAMMABLE GATE ARRAY

TABLE OF CONTENTS

1. Introduction .3

2. FPGA Architecture ..3

3. Types of FPGA ...7

4. System design in FPGA ..8

5. Comparison with other programmable devices ....8

6. Applications ..10

7. FPGA in Future digital world .................12

8. REFERENCES..12

1. INTRODUCTION
Field Programmable Gate Array (FPGA) is a semiconductor device that can be programmed to realize basic logic functions like AND, XOR etc or some complex combinational and sequential functions. It consists of a matrix of reconfigurable gate array logic circuitry. When a FPGA is configured, the internal circuitry is connected in a way that creates a hardware implementation of the software application. Unlike processors, FPGAs use dedicated hardware for processing logic and do not have an operating system. FPGAs are truly parallel in nature so different processing operations do not have to compete for the same resources. As a result, the performance of one part of the application is not affected when additional processing is added. Also, multiple control loops can run on a single FPGA device at different rates. FPGA-based systems can enforce critical interlock logic and can be designed to prevent I/O forcing by an operator. However, unlike hard-wired printed circuit board (PCB) designs which have fixed hardware resources, FPGA-based systems can literally rewire their internal circuitry to allow reconfiguration after the system is deployed to the field. FPGA devices deliver the performance and reliability of dedicated hardware circuitry. A single FPGA can replace thousands of discrete components by incorporating millions of logic gates in a single integrated circuit (IC) chip. FPGA technology provides the reliability of dedicated hardware circuitry, true parallel execution and lightning fast closed loop control performance.

1.1 HISTORICAL BACKGROUND

The historical roots of FPGAs are in complex programmable logic devices (CPLDs) of the early to mid 1980s. A Xilinx co-founder invented the field programmable gate array in 1984. CPLDs and FPGAs include a relatively large number of programmable logic elements. CPLD logic gate densities range from the equivalent of several thousand to tens of thousands of logic gates, while FPGAs typically range from tens of thousands to several million. The popularity of FPGAs and CPLDs over other programmable logic devices like Programmable Logic Array (PLA) and Programmable Array Logic (PAL) is because of the size of complex functions that can be put in single FPGA. With the complexity of digital systems, PALs and PLAs become too small to satisfy the designers needs.

2. FPGA ARCHITECTURE
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Different manufacturing companies can have subtle variation in FPGA architecture. However, the basic architecture consists of a matrix of configurable logic blocks (CLBs) surrounded by a periphery of I/O blocks. Signals are routed within the FPGA matrix by programmable interconnect switches and wire routes of logic cells and configurable logic blocks.

Logic-cell FPGAs are built from one basic logic-cell, duplicated hundreds or thousands of time. A logiccell is basically a small lookup table (LUT), a D-flip-flop and a 2-to-1 mux (to bypass the flip-flop if desired).

Figure 1: Logic cell The LUT is like a small RAM and has typically 4 inputs, so can implement any logic gate with up to 4-inputs. For example an AND gate with 3 inputs, whose result is then OR-ed with another input would fit in one LUT. Interconnect Each logic-cell can be connected to other logic-cells through interconnect resources (wires/muxes placed around the logic-cells). Each cell can do little, but with lots of them connected together, complex logic functions can be created.

Figure 2: Interconnect

The interconnect wires also go to the boundary of the device where I/O cells are implemented and connected to the pins of the FPGAs.

Figure 3: I/O cells and interconnect

Dedicated routing/carry chains In addition to general-purpose interconnect resources, FPGAs have fast dedicated lines in between neighboring logic cells. The most common type of fast dedicated lines are carry chains. Carry chains allow creating arithmetic functions (like counters and adders) efficiently (low logic usage & high operating speed).

Figure 4: Carry chains Older programmable technologies (PAL/CPLD) don't have carry chains and so are quickly limited when arithmetic operations are required.

Internal RAM In addition to logic, all new FPGAs have dedicated blocks of static RAM distributed among and controlled by the logic elements.

Figure 5: Interconnect with RAM

FPGA pins
FPGA pins fall into 2 categories: dedicated pins and user pins. a. Dedicated pins: About 20% to 30% of the pins of an FPGA are dedicated pins, which mean that they are hard-coded to a specific function. The dedicated pins fall into the 3 following sub-categories.

Power pins: They are ground or power pins (core or IO). Configuration pins: They are used to "download" the FPGA. Dedicated inputs, or clock pins: These are able to drive large nets inside the FPGA, suitable for clocks or signals with large fan-outs.

b. User Pins or I/O Pins: The rest of the pins of an FPGA are user pins for input-output operations. These pins are totally under the control of programmer. They can be programmed to be inputs, outputs, or
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bi-directional (tri-statable buffers). Each I/O pin is connected to an I/O cell inside the FPGA. The I/O cells are powered by the VCCIO pins (IO power pins).

IO banks
An FPGA has many VCCIO pins (IO power pins), usually all connected to the same voltage. But new generations of FPGAs have a concept of user I/O banks. In this case I/Os are spitted into groups, each having its own VCCIO voltage. This allows using the FPGA as a voltage translator device, useful for example if one part of our board works with 3.3V logic, and another with 2.5V.

FPGA power
FPGAs usually require two voltages to operate: a core voltage and an I/O voltage. Each voltage is provided through separate power pins.

The internal core voltage (VCCIN) is used to power the logic gates and flip flops inside the FPGA. The voltage can range from 5V for older FPGA generations, to 3.3V, 2.5V, 1.8V, 1.5V and even lower for the latest devices! The core voltage is fixed which depends upon the model of FPGA. The IO voltage (VCCIO) is used to power the I/O blocks (= pins) of the FPGA. That voltage should match what the other devices connected to the FPGA expect.

Actually, FPGA devices themselves allow VCCINT and VCCIO to be the same (i.e. the VCCINT and VCCIO pins could be connected together). But since FPGAs tend to use lowvoltage cores and higher voltage I/Os, the two voltages are usually different.

3. TYPES OF FPGA
Based on different process technologies, FPGA may be of following types: i). SRAM: This is based on static memory technology. SRAM-based FPGAs are the most popular FPGAs in present world market. The design is relatively simple; it is In-system programmable and re-programmable. Its major disadvantage is that it requires external boot devices and it has to be reconfigured each time power is turned on. ii). Antifuse: Antifuse refers to a programmable chip technology that creates permanent, conductive paths between transistors. In contrast to "blowing fuses" in the fusible link method, which opens a circuit by breaking apart a conductive path, the antifuse method closes the circuit by "growing" a conductive path. Two metal layers sandwich a layer of nonconductive, amorphous silicon. When voltage is applied to this middle layer, the
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amorphous silicon is turned into polysilicon, which is conductive. programmable technology but retains configuration after power off.

This is one time

iii). EPROM: Erasable Programmable Read-Only Memory technology. Usually, they are one-time programmable in production because of plastic packaging. Windowed devices can be erased with ultraviolet (UV) light. iv). EEPROM: Electrically Erasable Programmable Read-Only Memory technology. They can be erased, even in plastic packages. Some, but not all, EEPROM devices can be insystem programmed. vi). Flash: This type of FPGAs are based on Flash-erase EPROM technology. They can be erased, even in plastic packages. Some, but not all, flash devices can be in-system programmed. Usually, a flash cell is smaller than an equivalent EEPROM cell and is therefore less expensive to manufacture.

4. SYTSTEM DESIGN IN FPGA

First of all any digital system must be visualized and the digital hardware of that system can be worked out. Then the hardware can be described in hardware description language (HDL) or a schematic design. Common HDLs are VHDL and Verilog. Then, using an electronic design automation tool, a technology-mapped netlist is generated. The netlist can then be fitted to the actual FPGA architecture using a process called place-and-route, usually performed by the FPGA Companys proprietary place-and-route software. The user will validate the map, place and route results via timing analysis, simulation, and other verification methodologies. Once the design and validation process is complete, the binary file generated (also using the FPGA company's proprietary software) is used to (re)configure the FPGA. In an attempt to reduce the complexity of designing in HDLs, which have been compared to the equivalent of assembly languages, there are moves to raise the abstraction level of the design. Companies such as Cadence, Synopsys and Celoxica are promoting SystemC as a way to combine high level languages with concurrency models to allow faster design cycles for FPGAs than is possible using traditional HDLs.

5. COMPARISION WITH OTHER PROGRAMMABLE DEVICES

I. FPGAs vs. CPLDs The primary differences between CPLDs and FPGAs are architectural. A CPLD has a somewhat restrictive structure consisting of one or more programmable sum-of-products logic arrays feeding a relatively small number of clocked registers. The result of this is less flexibility, with the advantage of more predictable timing delays and a higher logic-to8

interconnect ratio. The FPGA architectures, on the other hand, are dominated by interconnect. This makes them far more flexible (in terms of the range of designs that are practical for implementation within them) but also far more complex to design for.

FPGAs are "fine-grain" devices. That means that they contain a lot (up to 100000) of tiny blocks of logic with flip-flops. CPLDs are "coarse-grain" devices. They contain relatively few (a few 100's max) large blocks of logic with flip-flops. Mostly FPGAs are RAM based. They need to be "downloaded" (configured) at each power-up. CPLDs are EEPROM based. They are active at power-up (i.e. as long as they've been programmed at least once...). CPLDs have a faster input-to-output timings than FPGAs (because of their coarsegrain architecture, one block of logic can hold a big equation), so are better suited for microprocessor decoding logic for example than FPGAs. FPGAs have special routing resources to implement efficiently binary counters and arithmetic functions (adders, comparators...) and RAM. CPLDs do not. FPGAs can contain very large digital designs, while CPLDs can contain small designs only.

Some FPGAs have the capability of partial re-configuration that lets one portion of the device be re-programmed while other portions continue running.

II. FPGAS VS ASICS Compared with ASICs, FPGAs offer very low non recurrent engineering (NRE) costs. This is often a more important factor than the fact that FPGAs have higher units costs and applications like in robotics normally do not have the very high volumes required to make ASICs a cheaper proposition. As integrated circuit feature sizes continue to decrease, the NRE costs associated with ASICs continue to escalate, making the volume at which it becomes cheaper to use an ASIC much higher (see Figure 6). FPGAs will be used in increasingly more applications, ASICs only being cost effective for the highest performance or highest volume applications. Additional benefits of FPGAs are that its technology provides a shorter time to market than ASICs since the associated fabrication time is essentially zero, making many fabrication iterations within a single day possible. This allows more advanced algorithms to be deployed and makes possible problem-specific customizations of designs. FPGA based designs are inherently less risky in terms of technical feasibility and cost since shorter design times and lower upfront costs are involved.
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Figure 6 : Cost of technology vs. Production

COST

90nm / 300mm ASICs

150nm / 200mm ASICs

150nm / 200mm FPGAs

90nm / 300mm FPGAs

Production Volume

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III. FPGA VS MICROPROCESSOR

Microprocessors offer an easy to use, powerful and flexible implementation medium for digital systems. Their utility in embedded applications makes them an overwhelming first choice for embedded systems since they come in a wide variety of models which can cater to different cost and performance requirements. Moreover, it is relatively easy to find software developers and they are widely supported by development systems, compilers, debuggers, libraries and operating systems. Unfortunately, their generality does not make them the best choice for a large class of applications which need to be optimized for performance, power or board space. FPGAs are able to arrange computations in a spatial rather than temporal fashion and greater levels of parallelism than a microprocessor can be achieved. The absence of caches and instruction decoding can result in the same amount of work being done with less chip area and lower power consumption.

6. APPLICATIONS
Traditionally, FPGAs were widely used for prototyping an ASIC before the chips were designed. Today, the densities and speed of FPGAs are such that they began to take over larger and larger functions to the state where some are now marketed as full systems on chips (SOC). Applications of FPGAs include digital signal processor DSP, software-defined radio, aerospace and defense systems, ASIC prototyping, medical imaging, computer vision, speech recognition, cryptography, bioinformatics, computer hardware emulation and a growing range of other areas. The overall applications can be categorized as A. Logic Replacement FPGAs were firstly used as logic replacement devices, having the benefit of being able to replace a number of small and medium scale integration devices. Another benefit comes from being able to reprogram the devices, so design changes and bug fixes can be made by changing the bit stream without modifying the printed circuit board. An example of this type of application might be to interface peripheral devices to a microprocessor system, the required address decoders, memory controllers, bus interfaces and motor controllers being implemented in a single FPGA. With modern devices, large amounts of logic can be incorporated on a single device, resulting in large savings in time to market, footprint and power consumption. Furthermore, board complexity is greatly reduced through tighter integration. FPGAs are also commonly used to prototype ASICs. B. Reconfigurable Computing Since FPGAs are general purpose logic devices, they can be used to develop high performance implementations of computational tasks. A direct implementation of an algorithm in hardware can achieve higher levels of parallelism than a microprocessor based design, and are often several orders of magnitude faster use less area and have lower power consumption. One other defining feature of FPGAs is the ability to reconfigure the device in the field or even at runtime. Field programmability allows hardware designs to be modified by downloading a bit stream, and the bit stream itself can be delivered via many different means including the internet or a telemetry system. Runtime reconfigurability is a feature which perhaps has not yet been exploited to 11

its full potential and opens the way for customized hardware subsystems to be generated and downloaded to the FPGA only when needed. In the future, this may allow for systems which use the FPGAs logic in a manner similar to virtual memory and where portions of the design are downloaded to the device on a demand-based fashion. This would allow much smaller devices to be used, resulting in cost and power savings while at the same time freeing designers from logic limitations of the device. C. True parallel execution FPGA provides the true parallel execution. So it is natural that it especially finds applications in any area or algorithm that can make use of the massive parallelism offered by its architecture. One such area is code breaking, in particular brute-force attack, of cryptographic algorithms. The inherent parallelism of the logic resources on the FPGA allows for considerable compute throughput even at a sub-500 MHz clock rate. For example, the current (2007) generation of FPGAs can implement around 100 single precision floating point units, all of which can compute a result every single clock cycle. The flexibility of the FPGA allows for even higher performance by trading off precision and range in the number format for an increased number of parallel arithmetic units. This has driven a new type of processing called reconfigurable computing, where time intensive tasks are offloaded from software to FPGAs. The adoption of FPGAs in high performance computing is currently limited by the complexity of FPGA design compared to conventional software and the extremely long turn-around times of current design tools, where 4-8 hours wait is necessary after even minor changes to the source code.

7. FPGA IN FUTURE DIGITAL WORLD

FPGA technology has gained immense popularity and widespread application in modern digital world. This trend seems to ever increase with the advances in silicon technology, reduction of chip size and power consumption. The inherent parallelism associated with FPGAs means it will find its way in applications where speed and parallel operations are important. Its rising use in the field of robotics, embedded systems, communication systems, imaging technology, space technology etc indicates it can expand its market in digital world finding newer application areas. The amount of logic that can be implemented in FPGAs have increased to such a amount that even processors can be implemented in FPGAs along with other hardware to give a complete system on a single chip. These processors (called as soft-core processors) like Microblaze of Xilinx, can be described with hardware description languages, introducing new era of processor design and its implementation in FPGAs. The development of the languages like SystemC, Handel-C shows growing interest of software people in working on FPGA based system where hardware people used to work with languages like VHDL and Verilog. The University program of Xilinx, the largest FPGA manufacturing company, manifests the growing demand of FPGA based system experts in industries. With the present scenario, FPGAs are certain to find newer application field and there importance will grow such that in near future one may not be able to imagine a digital world without FPGAs.

8. REFERENCES
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www.wikipedia.org

www.fpga4fun.com P.H.W. Leong and K.H. Tsoi, Department of Computer Science and Engineering, Chinese University of Hong Kong Shatin, NT Hong Kong www.cse.iitb.ac.in/~cs330/FPGA-Arch.ppt Digital Circuit Analysis and Design with Simulink Modeling and introduction to CPLDs and FPGAs, 2nd edition, by Steven T. Karris The

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