Escolar Documentos
Profissional Documentos
Cultura Documentos
D D D D D D
Low rDS(on) . . . 5 Typical Avalanche Energy . . . 30 mJ Eight Power DMOS-Transistor Outputs of 150-mA Continuous Current 500-mA Typical Current-Limiting Capability Output Clamp Voltage . . . 50 V Low Power Consumption
description
The TPIC6B273 is a monolithic, high-voltage, medium-current, power logic octal D-type latch with DMOS-transistor outputs designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads. The TPIC6B273 contains eight positive-edgetriggered D-type flip-flops with a direct clear input. Each flip-flop features an open-drain power DMOS-transistor output. When clear (CLR) is high, information at the D inputs meeting the setup time requirements is transferred to the DRAIN outputs on the positivegoing edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input (CLK) is at either the high or low level, the D input signal has no effect at the output. An asynchronous CLR is provided to turn all eight DMOS-transistor outputs off. When data is low for a given output, the DMOS-transistor output is off. When data is high, the DMOS-transistor output has sink-current capability. Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous sink-current capability. Each output provides a 500-mA typical current limit at TC = 25C. The current limit decreases as the junction temperature increases for additional device protection.
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
logic symbol
CLR CLK D1 D2 D3 D4 D5 D6 D7 D8 1 11 2 3 8 9 12 13 18 19 R C1 1D 4 5 6 7 14 15 16 17 DRAIN1 DRAIN2 DRAIN3 DRAIN4 DRAIN5 DRAIN6 DRAIN7 DRAIN8
This symbol is in accordance with ANSI/IEEE Standard 91-1984 and IEC Publication 617-12. FUNCTION TABLE (each channel) INPUTS CLR L H H H CLK X L D X H L X OUTPUT DRAIN H L H Latched
The TPIC6B273 is characterized for operation over the operating case temperature range of 40C to 125C.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
CLR D1 CLK
CLR 1D C1 5
DRAIN2
CLR D2 3 1D C1 6
DRAIN3
CLR D3 8 1D C1 7
DRAIN4
CLR D4 9 1D C1 14
DRAIN5
CLR D5 12 1D C1 15
DRAIN6
CLR D6 13 1D C1 16
DRAIN7
CLR D7 18 1D C1 17
DRAIN8
CLR D8 19 1D C1 10
GND
DRAIN 50 V
Input 25 V 12 V 20 V
GND
GND
absolute maximum ratings over recommended operating case temperature range (unless otherwise noted)
Logic supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Logic input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V Power DMOS drain-to-source voltage, VDS (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V Continuous source-to-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA Pulsed source-to-drain diode anode current (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A Pulsed drain current, each output, all outputs on, ID, TC = 25C (see Note 3) . . . . . . . . . . . . . . . . . . . 500 mA Continuous drain current, each output, all outputs on, ID, TC = 25C . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA Peak drain current single output, IDM,TC = 25C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA Single-pulse avalanche energy, EAS (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mJ Avalanche current, IAS (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C to 150C Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C to 125C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to GND. 2. Each power DMOS source is internally connected to GND. 3. Pulse duration 100 s and duty cycle 2%. 4. DRAIN supply voltage = 15 V, starting junction temperature (TJS) = 25C, L = 200 mH, IAS = 0.5 A (see Figure 4). DISSIPATION RATING TABLE PACKAGE DW N TC 25C POWER RATING 1389 mW 1050 mW DERATING FACTOR ABOVE TC = 25C 11.1 mW/C 10.5 mW/C TC = 125C POWER RATING 278 mW 263 mW
VDS(on) = 0.5 V, IN = ID, See Notes 5, 6, and 7 VDS = 40 V, VDS = 40 V, ID = 100 mA, ID = 100 mA, TC = 125C ID = 350 mA, VCC = 5.5 V VCC = 5.5 V, VCC = 4.5 V VCC = 4.5 V, VCC = 4.5 V
rDS(on)
NOTES: 3. 5. 6. 7.
Pulse duration 100 s and duty cycle 2%. Technique should limit TJ TC to 10C maximum. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts. Nominal current is defined for a consistent comparison between devices from different sources. It is the current that produces a voltage drop of 0.5 V at TC = 85C.
thermal resistance
PARAMETER RJA Thermal resistance, junction-to-ambient resistance junction to ambient DW package N package TEST CONDITIONS All 8 outputs with equal power MIN MAX 90 95 UNIT C/W
5V D 5V 1 CLR ID D DUT 4 7, 14 17 235 Output Output 10% tr CL = 30 pF (see Note B) CLK TEST CIRCUIT D tsu 50% tw INPUT SETUP AND HOLD WAVEFORMS SWITCHING TIMES 5V 50% 0V th 50% 0V 5V 24 V CLK 50% tPLH 90% 90% 10% tf 50% 0V tPHL 24 V 0.5 V 0V 5V
11 CLK
DRAIN GND 10
NOTES: A. The DRAIN terminal under test is connected to the TP K test point. All other terminals are connected together and connected to the TP A test point. B. The VGG amplitude and RG are adjusted for di/dt = 20 A/s. A VGG double-pulse train is used to set IF = 0.1 A, where t1 = 10 s, t2 = 7 s, and t3 = 3 s.
11
200 mH 4 7, 14 17
DRAIN
VDS VDS
TEST CIRCUIT
NOTES: A. The word generator has the following characteristics: tr 10 ns, tf 10 ns, ZO = 50 . B. Input pulse duration, tw, is increased until peak current IAS = 0.5 A. Energy test is defined as EAS = IAS x V(BR)DSX x tav/2 = 30 mJ.
TYPICAL CHARACTERISTICS
PEAK AVALANCHE CURRENT vs TIME DURATION OF AVALANCHE
r DS(on) Drain-to-Source On-State Resistance 10 TC = 25C IAS Peak Avalanche Current A 4 18 16 14 12 10 8 6 4 2 0 0 100 200 300 400 500 ID Drain Current mA 600 700 TC = 40C TC = 25C TC = 125C
2 1
0.4
0.2
0.1 0.1
0.2
0.4
10
Figure 5
Figure 6
tr
150
tPLH
100
tPHL
25
125
Figure 7
NOTE C: Technique should limit TJ TC to 10C maximum.
Figure 8
THERMAL INFORMATION
MAXIMUM CONTINUOUS DRAIN CURRENT OF EACH OUTPUT vs NUMBER OF OUTPUTS CONDUCTING SIMULTANEOUSLY
I D Maximum Peak Drain Current of Each Output A 0.45 I D Maximum Continuous Drain Current of Each Output A VCC = 5 V 0.4 0.35 0.3 0.25 TC = 25C 0.2 0.15 0.1 TC = 125C 0.05 0 1 2 3 4 5 6 7 8 N Number of Outputs Conducting Simultaneously TC = 100C 0.5 0.45 0.4 0.35 d = 50% 0.3 0.25 d = 80% 0.2 0.15 0.1 0.05 0 1 2 3 4 5 6 7 8 N Number of Outputs Conducting Simultaneously VCC = 5 V TC = 25C d = tw/tperiod = 1 ms/tperiod d = 10% d = 20%
MAXIMUM PEAK DRAIN CURRENT OF EACH OUTPUT vs NUMBER OF OUTPUTS CONDUCTING SIMULTANEOUSLY
Figure 9
Figure 10
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMERS RISK. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TIs publication of information regarding any third partys products or services does not constitute TIs approval, warranty or endorsement thereof.