Ezdsp5535 TechRef RevC

TMS320C5535 eZdspTM Technical Reference
2011
DSP Development Systems
TMS320C5535 eZdspTM Technical Reference
514585-0001 Rev. A August 2011
SPECTRUM DIGITAL, INC. 12502 Exchange Drive, Suite 440 Stafford, TX. 77477 Tel: 281.494.4505 Fax: 281.494.5310 sales@spectrumdigital.com www.spectrumdigital.com
IMPORTANT NOTICE Spectrum Digital, Inc. reserves the right to make changes to its products or to discontinue any product or service without notice. Customers are advised to obtain the latest version of relevant information to verify that the data being relied on is current before placing orders. Spectrum Digital, Inc. warrants performance of its products and related software to current specifications in accordance with Spectrum Digitals standard warranty. Testing and other quality control techniques are utilized to the extent deemed necessary to support this warranty. Please be aware that the products described herein are not intended for use in life-support appliances, devices, or systems. Spectrum Digital does not warrant nor is Spectrum Digital liable for the product described herein to be used in other than a development environment. Spectrum Digital, Inc. assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does Spectrum Digital warrant or represent any license, either express or implied, is granted under any patent right, copyright, or other intellectual property right of Spectrum Digital, Inc. covering or relating to any combination, machine, or process in which such Digital Signal Processing development products or services might be or are used. WARNING This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures necessary to correct this interference. TRADEMARKS Windows 2000, Windows XP, Windows Vista are registered trademarks of Microsoft Corp Code Composer Studio IDE is a trademark of Texas Instruments eZdsp is a trademark of Spectrum Digital, Inc.
Copyright 2011 Spectrum Digital, Inc.
Contents
Introduction to the TMS320C5535 eZdsp .................................. 1-1 Provides a description of the TMS320C5535 eZdsp, and key features. 1.0 Overview of the TMS320C5535 eZdsp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Key Features of the TMS320C5535 eZdsp ................................ 1-3 1.3 C5535 eZdsp Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 1.4 C5535 eZdsp Memory Map ............................................. 1-4 1.5 C5535 eZdsp I2C Addressing ............................................ 1-5 2 Operation and Physical Specifications ...................................... 2-1 Describes the operation and physical layout of the TMS320C5535 eZdsp and its connectors. 2.0 Board Layout ....................................................... 2-2 2.1 Connector Index .................................................... 2-3 2.1.1 J1, C5535 USB Connector .......................................... 2-4 2.1.2 J2, XDS100 USB Connector ........................................ 2-4 2.1.3 J3, Audio In Connector ............................................. 2-5 2.1.4 J4, Audio Out Connector ............................................ 2-6 2.1.5 J5, LCD Interface .................................................. 2-7 2.1.6 J6, Micro SD Card Connector ....................................... 2-7 2.1.7 P1, P3, Wireless Interface .......................................... 2-8 2.1.6 P2, Expansion Connector ........................................... 2-9 2.2 System LEDs ..................................................... 2-11 2.3 Switches ......................................................... 2-11 2.3.1 SW1, SW2, Momentary Push Button Switches ........................ 2-11 2.3.2 SW3, 4 Position DIP Switch ....................................... 2-12 2.4 Jumpers ......................................................... 2-13 2.5 Test Points ........................................................ 2-14 A Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 Contains the schematics for the TMS320C5535 eZdsp B Mechanical Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1 Contains the mechanical information about the TMS320C5535 eZdsp
About This Manual This document describes the board level operations of the TMS320C5535 eZdsp. The eZdsp is based on the Texas Instruments TMS320C5535 Digital Signal Processor. The TMS320C5535 eZdsp is a USB based printed circuit board (PCB) that allows engineers and software developers to evaluate certain characteristics of the TMS320C5535 DSP. Notational Conventions
This document uses the following conventions. The TMS320C5535 eZdsp will sometimes be referred to as the C5535 eZdsp, or eZdsp. Program listings, program examples, and interactive displays are shown is a special italic typeface. Here is a sample program listing. equations !rd = !strobe&rw;
Information About Cautions This book may contain cautions. This is an example of a caution statement. A caution statement describes a situation that could potentially damage your software, or hardware, or other equipment. The information in a caution is provided for your protection. Please read each caution carefully. Related Documents Texas Instruments Code Composer Studio IDE Users Guide Data sheet for the TMS320C5535
Chapter 1 Introduction to the TMS320C5535 eZdsp
This chapter provides you with a description of the C5535 eZdsp along with the key features.
Topic
1.0 1.1 1.2 1.3 1.4 Overview of the TMS320C5535 eZdsp Key Features of the TMS320C5535 eZdsp C5535 eZdsp Block Diagram C5535 eZdsp Memory Map C5535 eZdsp I2C Addressing
Page
1-2 1-3 1-4 1-4 1-5
1-1
Spectrum Digital, Inc

1.0 Overview of the C5535 eZdsp The C5535 eZdsp is an evaluation tool for the Texas Instruments TMS320C5535 Digital Signal Processor (DSP). This USB bus powered tool allows the user to evaluate the following items: The TMS320C5535 processor along with its peripherals The TLV320AIC3204 codec The Code Composer Studio IDETM software development tools
C5535 DSP XF LED USB connector Wireless Interface SPI Flash USB Emulation Connector LEDs Display Pushbuttons
Expansion Connector AIC3204 Stereo In Stereo Out
Figure 1-1, Key Features of the C5535 eZdsp (top)
Expansion Connector
Display Connector
Figure 1-2, Key Features of the C5535 eZdsp (bottom)
MIcro SD Card Connector
1-2
TMS320C5535 eZdsp Technical Reference Manual

1.1 Key Features of the C5535 eZdsp The C5535 eZdsp has the following features: Texas Instruments TMS320C5535 Digital Signal Processor Texas Instruments TLV320AIC3204 Stereo Codec (stereo in, stereo out) Micro SD card connector USB 2.0 interface to C5535 processor 8 Mbytes SPI flash I2C OLED display 5 user controlled LEDs 2 user readable push button switches 3 INA219 I2C Current/Power Monitors Embedded USB XDS100 JTAG emulator Wireless interface Expansion edge connector Power measurement test points Power provided by USB interface Compatible with Texas Instruments Code Composer Studio v4 USB cable
1-3

1.2 C5535 eZdsp Block Diagram The block diagram of the C5535 eZdsp is shown below.
USB
P1
USB
USB Embedded XDS100 JTAG
P2
JTAG UART
LDO
TMS320 C5535
I2S2
P3
IO 3.3V
SPI
GPIO
LEDs
SPI Flash
INA219
AIC 3204
96 x 16 pixel OLED Display SW1 Analog Input 1 MicroSD (on back) SW2
I2C Bus
Stereo Out
Figure 1-3, C5535 eZdsp Block Diagram
Stereo in
1.3 C5535 eZdsp Memory Map The C5535 eZdsp supports on chip DARAM, SARAM, and off chip SPI Flash. The addressing for each of these memory blocks is shown in the figure below.
CPU Byte Address
000000h 0000C0h 00FFFFh 010000h 04FFFFh 050000h 7FFFFFh 800000h BFFFFFh C00000h DFFFFFh E00000h E03FFFh F00000h FDFFFFh FE0000h FFFFFFh
MEMORY BLOCKS (MMR Reserved) Internal DARAM Internal SARAM
RESERVED
ROM (in MPNMC=0)
RESERVED (if MPNMC=1)
Figure 1-4, C5535 eZdsp Memory Map
Note: MPNMC bit in ST3 Status Register is cleared(0) at RESET so the C5535 will attempt to execute its boot load sequence.
1-4

1.4 C5535 eZdsp I2C Addressing The C5535 eZdsp has multiple I2C devices for different purposes. The table below shows the addresses of these devices on the I2C bus. Table 1: C5535 eZdsp I2C Addresses
eZdsp I2C Device TLV320AIC3204 OSD9616GLBBG01 U16, INA219IDCN U15, INA219IDCN U3, INA219IDCN I2C Address 0x18 0x3C 0x40 0x44 0x48 Function Audio CODEC OLED Display USB 3.3V Power Monitor VDD_IO 3.3V Power Monitor VDD Core Power Monitor
1-5
1-6
Chapter 2 Physical Description
This chapter describes the physical layout of the TMS320C5535 eZdsp.
Topic
2.0 2.1 2.1.1 2.1.2 2.1.3 2.1.4 2.1.5 2.1.6 2.1.7 2.1.8 2.2 2.3 2.3.1 2.3.2 2.4 2.5 Board Layout Connector Index J1, C5535 USB Connector J2, XDS100 USB Connector J3, Audio In Connector J4, Audio Out Connector J5, LCD Interface J6, Micro SD Card Connector P1, P3, Wireless Interface P2, Expansion Connector System LEDs Switches SW1, SW2, Momentary Push Button Switches SW3, 4 Position DIP Switch Jumpers Test Points
Page
2-2 2-3 2-4 2-4 2-5 2-6 2-7 2-7 2-8 2-9 2-11 2-11 2-11 2-12 2-13 2-14
2-1

2.0 Board Layout The C5535 eZdsp is a 3.35 x 2.65 inch six (6) layer printed circuit board which is powered off the USB bus of personal computer or laptop computer. This means this board does not require an external power supply.
DS1 DS2 J1 P1 SW3 P2
J2
DS3-DS6 P3 Display J3 SW2 SW1 J4
Figure 2-1, C5535 eZdsp (top)
J6 J5
Figure 2-2, C5535 eZdsp (bottom) 2-2 TMS320C5535 eZdsp Technical Reference Manual

2.1 Connector Index The C5535 eZdsp has nine (9) connectors which provide the user access to various signals on the eZdsp. These connectors are shown in the table below. Table 1: C5535 eZdsp Connectors
Connector J1 J2 J3 J4 J5 J6 P1 P2 P3 # Pins 25 6 2 2 14 8 20 30 x 2 20 Function C5535 USB Emulation USB Audio In Audio Out LCD Interface Micro SD Card Interface Wireless Interface Expansion Connector Wireless Interface Schematic Page 2 13 10 10 11 7 6 12 6 Board Side Top Top Top Top Bottom Bottom Top Top/Bottom Top
The following manufacturer and parts numbers can be used to interface to the connectors on the C5535 eZdsp: Table 2: C5535 eZdsp Mating Connectors
Connector J1 J2 P1 P2 P3 Manufacturer PC or laptop PC or laptop CUI Inc Samtec CUI Inc CUI SP-3501, Digi-Key CP-3502-ND Samtec MEC1-120-02-S-D-A, Digi-Key SAM8117-ND CUI SP-3501, Digi-Key CP-3502-ND Part #
2-3

2.1.1 J1, C5535 USB Connector The USB connector, J1, is attached the C5535 processor for use by C5535 software applications. The signals on the pins of this connector are shown below. Table 3: J1, USB Connector
Pin # 1 2 3 4 5 6,7,8,9 Signal Name USBVDD DD+ ID / NC USBVSS/GND GND (shield)
2.1.2 J2, XDS100 USB Connector The USB connector, J2, is used to attach the C5535 eZdsp to a personal computer or laptop. This allows the user to develop and debug software on the C5535 eZdsp. The signals on the pins of this connector are shown below. Table 4: J2, XDS100 USB Connector
Pin # 1 2 3 4 5 6 Signal Name U7, Pin 1 (VCC), VCCUSB, 5V_USB U7, Pin 5 (IO4), U6, Pin 7(DM), DU7, Pin 3(IO1), U6, Pin 8(DP), D+ GND GND, shield GND, shield
2-4

2.1.3 J3, Audio In Connector The Stereo In connector, J3, is used to bring signals into the TLV320AIC3204 codec, U17. The signals on the pins of this connector are shown below. Table 5: J3, Audio In Connector
Pin # 1 2 3 4 5 Signal Name GND-AIC AIC_LINE2L AIC_LINE2R No connect No connect U17, Pin 15 U17, Pin 16 AIC3204 Pin #
The figure below shows a typical stereo jack.
Ground Right Line In Left Line In Figure 2-3, Audio In Jack
2-5

2.1.4 J4, Audio Out Connector The Audio Out connector, J4, is used to bring signals from the TLV320AIC3204 codec, U17. The signals on the pins of this connector are shown below. Table 6: J4, Audio Out Connector
Pin # 1 2 3 4 5 Signal Name GND-AIC HEADPHONE_LOUT HEADPHONE_ROUT No connect No connect U17, Pin 25 U17, Pin 27 AIC3204 Pin #
The figure below shows a typical headphone jack.
Ground Right Line In Left Line In Figure 2-4, Audio Out Jack
2-6

2.1.5 J5, LCD Interface Connector, J5, is used to interface to an LCD character display. The signals on the pins of this connector are shown below. Table 7: J5, LCD Interface Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 2.1.6 J6, Micro SD Card Connector The Micro SD connector, J6, is used to interface the C5535 processor to a micro SD card. The signals on the pins of this connector are shown below. Table 8: J6, Micro SD Card Connector
Pin # 1 2 3 4 5 6 7 8 9 10 11,12,13,14 Signal Name DAT2, SD_DATA2 DAT3, SD_DATA3 CMD, SD_CMD VDD, VCC_3V3 CLK, SD_CLK GND DAT0, SD_DATA0 DAT1, SD_DATA1 INSERT, VCC_3V3 INSERT_COM, GND NC
Signal Name C2P C2N C1P C1N VBAT VBREF VSS, GND VDD, VCC_3V3 RESn, TARGET_PWR_GOOD SCL, I2C_SCL SDA, I2C_SDA IREF VCOMH VCC, V13
2-7

2.1.7 P1, P3, Wireless Interface Connectors P1 and P3 are used to provide an interface to Texas Instruments Wireless Interface modules. The signals on the pins of these connectors are shown in the tables below. Table 9: P1, Wireless Interface Connector
Pin # 1 3 5 7 9 11 13 15 17 19 Signal Name GND UART_RTS RTC_CLKOUT UART_TX UART_RX I2C_SDA I2C_SCL SD_CLK SD_CMD GND Pin # 2 4 6 8 10 12 14 16 18 20 Signal Name SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3 GPIO10 GPIO11 SPI_CS2 SPI_CLK SPI_TX SPI_RX
Table 10: P3, Wireless Interface Connector

Pin # 1 3 5 7 9 11 13 15 17 19 Signal Name NC NC NC VCC_3V3 VCC_3V3 I2S1_FS GPIO12 GPIO14 I2S1_CLK GPIO14 Pin # 2 4 6 8 10 12 14 16 18 20 Signal Name GND NC NC I2S1_RX I2S1_DX NC NC NC UART_CTS GPIO13
2-8

2.1.8 P2, Expansion Connector The expansion edge connector, P2, provides the C5535 serial interface signals to limitless user expansion boards. This edge connector has all of the odd number (1,3,...,59) tabs on the top side of the board and all of the even number tabs (2,4,...,46) on the bottom side of the board. The diagram below shows the position of these tabs. Top Side View
Pin 59
Bottom Side View

Pin 60
Pin 23 Pin 19
Key
Pin 24 Pin 20
Pin 1
Pin 2
Figure 2-5, P2 Connector Tab Positions
2-9

The table below lists the signals that appear on each of the tabs of connector P2. The signals on the pins of this connector are shown below. Table 11: P2, Expansion Connector
Pin # Top 1 3 5 7 9 11 13 15 17 19 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 Signal Name GND SPI_CS1 SPI_CLK SPI_TX SPI_RX GND GND GND I2C_SDA I2C_SCL Key I2S2_CLK I2S2_RX I2S2_DX I2S2_FS GND I2S1_CLK I2S1_RX I2S1_DX I2S1_FS VCC_3V3 VCC_3V3 I2S0_CLK I2S0_RX I2S0_DX I2S0_FS SPI_CS2 SPI_CS0 VCC_3V3 VCC_3V3 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 Pin # Bottom 2 4 6 8 10 12 14 16 18 20 Signal Name GND GPIO13 GPIO12 GPIO14 GPIO15 GND GND GND GPIO16 GPIO17 Key GPIO11 GPIO10 GPIO5 GPIO4 GND UART_RTS UART_CTS UART_RX UART_TX VCC_USB_DUAL VCC_USB_DUAL SPI_CS3 VCC_USB_DUAL GPAIN3 GPAIN2 GPAIN1 GPAIN0 VCC_USB_DUAL VCC_USB_DUAL
2-10

2.2 System LEDs The C5535 eZdsp has 6 Light Emitting Diodes (LED). LEDs DS2- DS6 are under the application software control running on the C5535 processor. The C5535 eZdsp LEDs are shown in the table below. Table 12: System LEDs
LED # DS1 DS2 DS3 DS4 DS5 DS6 Color Green Green Green Red Yellow Blue Schematic Page 13 2 11 11 11 11 Signal Name U6, Pin 60, PWREN# U4, Pin J3, XF U4, Pin P8, GPIO17 U4, Pin P3, GPIO16 U4, Pin N7, GPIO15 U4, Pin P2, GPIO14
2.3 Switches The C5535 eZdsp has three switches, two push button switches, and one DIP switch. These switches are shown in the table below. Table 13: Switches
Switch # SW1 only closed SW2 only closed SW3 Schematic Page 11 11 5 Signal Name/Reading GPAIN1, approximately 1.2 volts GPAIN1, approximately 0.9 volts 4 position DIP switch
2.3.1 SW1, SW2, Momentary Push Button Switches Switches SW1, and SW2 are momentary push button switches read by the application software running on the C5535 processor using the GPAIN1 port.
2-11

2.3.2 SW3, 4 Position DIP Switch Switch SW3 is a 4 position DIP switch. The signals attached to each position are shown in the table below. Table 14: Switch SW3
Position 1 2 3 4 Signal Name CLK_SEL UART_BUFF_EN AIC3204I2C_ENn SPI_CS0 Default Setting OFF ON OFF ON
The figure below shows switch SW3 default settings.

Raised Actuator
1st position
Figure 2-6, Switch SW3, Default Settings
The table below shows the functions of the setting in each position of SW3. Table 15: Switch SW3 Functions
Position 1 2 3 4 Setting ON OFF ON OFF ON OFF ON OFF Function Select external 12 MHz. clock Select internal 32 MHz. RTC clock * Enable UART via J2 for VCP * Disable UART via J2 Disable AIC3204 interface Enable AIC3204 interface Enable SPI Flash CS Disable SPI Flash CS
SW3
* Note: GPIO15 can overwrite
2-12

2.4 Jumpers The C5535 eZdsp has 7 jumpers. The location of the jumpers are shown in the figure below.
JP2
JP1 JP3 JP4 JP6
JP5 JP7
Figure 2-7, C5535 eZdsp Jumpers The function of these jumpers is shown in the table below. Table 16: Jumpers
Jumper JP1 JP2 JP3 JP4 JP5 JP6 JP7 # of positions 2 2 3 2 2 2 2 Schematic Page 4 13 9 4 8 10 10 Jumper Function Allows measurement of VCore Power source select. Allows connection of VCCUSB to VBUS_C5515 I2C Headers Allows measurement of VDD_IO1 voltage Allows measurement of USB 3.3V Allows measurement of VCC_3V3 for AIC3204 Allows measurement of V3.3A for AIC3204
Jumper JP2 is the power source select jumper. When this jumper is shorted the C5535 eZdsp can be powered from the C5535 USB interface (J1). This jumper is shipped in the shorted state from the factory.
2-13

2.5 Test Points The C5535 eZdsp has seven (7) test points for the monitoring of signals. The location of the test points are shown in the figure below.
TP2 TP3
TP5 TP4
TP6 TP7
TP1
Figure 2-8, C5535 eZdsp Test Points The signals on the test points are shown in the table below. Table 17: Test Points
TP # TP1 TP2 TP3 TP4 TP5 TP6 TP7 Schematic Page 4 8 2 2 8 10 9 Signal Name GND VCC_1V8_TP U4, Pin I14, VBUS/VBUS_C5535 U4, Pin A2, CLKOUT VCC_3V3_TP GND U11, Pin 7,8, VCC_1V3, VCC_1V3_TP
2-14
Appendix A Schematics
This appendix contains the schematics for the TMS320C5535 eZdsp.
A-1
REV
A
DESCRIPTION Initial schematic for layout BETA UPDATES PRODUCTION UNITS 7/19/2011 6/19/2011 1/10/2011 RRP RRP RRP
DATE
APPROVED
A-2
B C
D
NOTES, UNLESS OTHERWISE SPECIFIED:
1.
RESISTANCE VALUES IN OHMS.
2.
CAPACTITANCE VALUES IN MICROFARADS.
3.
REFERENCE DESIGNATORS USED:
4. ALL 0.1 uF AND 0.01uF CAPACITORS ARE DECOUPLING CAPS UNLESS OTHERWISE NOTED. THEY ARE SHOWN ON THE PAGE WITH THE INTEGRATED CIRCUITS THEY SHOULD BE PLACED NEAR.
SCHEMATIC CONTENTS 01 - TITLE PAGE 02 - TMS320C5535 IO 03 - UART BUFFER 04 - TMS320C5535 POWER 05 - SPI FLASH 06 - CC BOARD INTERFACE 07 - MICRO SD INTERFACE 08 - POWER SUPPLIES 09 - AUDIO CODEC 10 - LCD/USER LEDS/SWITCHES 11 - EXPANSION CONNECTOR 12 - XDS100-v2 INTERFACE
REVISION STATUS OF SHEETS
REV DWN R.R.P. CHK T.W.K. ENGR R.R.P. ENGR-MGR R.R.P. QA C.M.D. MFG A A RLSE 7 10
4
SHEET
SPECTRUM DIGITAL INCORPORATED Title: Page Contents: Size:B Date:

3 2
REV
SHEET
TMS320C5535 EZDSP MODULE TITLE SHEET DWG NO 514582-0001 Tuesday, July 26, 2011
1
REV
SHEET A 8 9 APPLICATION R.R.P. A NEXT ASSY USED ON R.R.P.
11
12
Revision: C Sheet 1 of 13
REV
SHEET
DATE 10/15/2009 DATE 10/15/2009 DATE 10/15/2009 DATE 10/15/2009 DATE 10/15/2009 DATE 10/15/2009 DATE 10/15/2009
VCC_3V3_USB TP3 VBUS C6 10uF 0.1uF 1000pF C77 C66 U4-1
FB7
VBUS_C5535 J1
BLM18AG601SN1D
1206
E13 USB_VDDOSC USB_M12XI USB_M12XO USB_R1 USB_VSSOSC USB_VSSREF

12 11,12 12 12 GPAIN0 GPAIN1 GPAIN2 GPAIN3 GPAIN0 GPAIN1 GPAIN2 GPAIN3 R29 0 USB_XI
USB_VBUS USB_DM USB_DP G14 J14 H14

USB_DM USB_DP
L14
USB_VBUS
USBVDD
10 USB_CLK_12MHZ R56 NO-POP
R55
E14 D14
2 3 4 5
R18
DD+ ID
R54
D12 F12
10K 1%
SHIELD1 SHIELD2 SHIELD3 SHIELD4 USBVSS

D2 6.2V C25 10uF C24 0.1uF USBMINI_B 100K
6 7 8 9
A8 B8 A9 A10 GPAIN0 GPAIN1 GPAIN2 GPAIN3
33pF
C91
A7 RTCXI 4 3 2
32.768KHz Y1
TP4 CLKOUT
RSV12 RSV9 RSV8 RSV7 RSV11 RSV10
G2 G1 F1 E1 E2 H1
SD_CLK SD_CMD SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3
R68 R69 R128 R129 R130 R131
0 0 0 0 0 0
I2S0_CLK 12 I2S0_FS 12 I2S0_DX 12 I2S0_RX 12 GPIO4 12 GPIO5 12
R117 10K
33pF
C90
A6 RTCXO VSS_RTC C5
MMC0_CLK/I2S0_CLK/GP[0] MMC0_CMD/I2S0_FS/GP[1] MMC0_D0/I2S0_DX/GP[2] MMC0_D1/I2S0_RX/GP[3] MMC0_D2/GP[4] MMC0_D3/GP[5]
M8 M10 J1 P6 N13 P7
SD_CLK SD_CMD SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3
SD_CLK 6,7 SD_CMD 6,7 SD_DATA0 6,7 SD_DATA1 6,7 SD_DATA2 6,7 SD_DATA3 6,7
CLKOUT
A2 CLKOUT CLKIN CLK_SEL C1
10 CPU_CLK_12MHZ R34 NO-POP 5 CLK_SEL CLK_SEL
R38
CLKIN
D1
MMC1_CLK/I2S1_CLK/GP[6] MMC1_CMD/I2S1_FS/GP[7] MMC1_D0/I2S1_DX/GP[8] MMC1_D1/I2S1_RX/GP[9] MMC1_D2/GP[10] MMC1_D3/GP[11]
M14 L11 M13 P10 L12 M12
I2S1_CLK I2S1_FS I2S1_DX I2S1_RX GPIO10 GPIO11
I2S1_CLK 6,12 I2S1_FS 6,12 I2S1_DX 6,12 I2S1_RX 6,12 GPIO10 6,12 GPIO11 6,12
13 TARGET_TRSTn
P4 TRSTN TMS TDI TDO TCK EMU0 EMU1 DVDD_RTC N6 K2 N1 N3

TARGET_EMU1
VDD_IO1 13 TARGET_TMS 13 TARGET_TDI 13 TARGET_TDO 13 TARGET_TCK
R22
10K
R25 10K
LCD_D[0]/SPI_RX LCD_D[1]/SPI_TX LCD_D[2]/GP[12] LCD_D[3]/GP[13] LCD_D[4]/GP[14] LCD_D[5]/GP[15] LCD_D[6]/GP[16] LCD_D[7]/GP[17]
N4 K1 J2 N5 P2 N7 P3 P8
SPI_RX SPI_TX GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17
SPI_RX 5,6,12 SPI_TX 5,6,12 GPIO12 6,11,12 GPIO13 6,12 GPIO14 6,11,12 GPIO15 3,11,12 GPIO16 11,12 GPIO17 11,12
L2 M1 C3
VDD_IO1 TARGET_EMU0
VCC_1V3
C82 0.1uF
LCD_D[8]/I2S2_CLK/GP[18]/SPI_CLK LCD_D[9]/I2S2_FS/GP[19]/SPI_CS0 LCD_D[10]/I2S2_RX/GP[20]/SPI_RX LCD_D[11]/I2S2_DX/GP[27]/SPI_TX LCD_D[12]/UART_RTS/GP[28]/I2S3_CLK LCD_D[13]/UART_CTS/GP[29]/I2S3_FS LCD_D[14]/UART_RXD/GP[30]/I2S3_RX LCD_D[15]/UART_TXD/GP[31]/I2S3_DX B4 B5 CVDD_RTC CVDD_RTC A3 A5 RTC_CLKOUT WAKEUP LCD_EN_RDB/SPI_CLK
P5 N10 P9 P11 N12 P12 P13 M11 L3
I2S2_CLK I2S2_FS I2S2_RX I2S2_DX UART_RTS UART_CTS UART_RX UART_TX SPI_CLK
I2S2_CLK 10,12 I2S2_FS 10,12 I2S2_RX 10,12 I2S2_DX 10,12 UART_RTS 3,6,12 UART_CTS 3,6,12 UART_RX 3,6,12 UART_TX 3,6,12 SPI_CLK 5,6,12
VDD_IO1
6 RTC_CLKOUT WAKEUP R59 10K R37 100K R41 100K
RTC_CLKOUT
C83 1uF
C84 0.1uF
VDD_IO1
LCD_CS0_E0/SPI_CS0 LCD_CS_E1/SPI CS1 LCD_RW_WRB/SPI_CS2 LCD_RS/SPI_CS3 B1 C2 D2 J3 INT1 INT0 RESETN XF

C5535
L1 M2 N2 M5 C4 A4 I2C_SCL I2C_SDA
SPI_CS0 SPI_CS1 SPI_CS2 SPI_CS3
SPI_CS0 SPI_CS1 SPI_CS2 SPI_CS3
5,12 12 6,12 12 I2C_SCL I2C_SDA
R13 10K
R14 10K I2C_SCL 6,9,10,11,12 I2C_SDA 6,9,10,11,12 SPECTRUM DIGITAL INCORPORATED Title: Page Contents: TMS320C5535 EZDSP MODULE GPIO,MMC-SD,SPI,I2C,I2S Size:B Date: DWG NO 514582-0001 Friday, July 22, 2011 Sheet 2 of Revision: B 13
A
9,10,11,13 TARGET_PWR_GOOD DS2 LED_GRN
R17
220
A-3
2,6,12 UART_RX
5
TRGT_UART_RX 13
6 1 7
U5A 74CBTLV3125PWR
2,6,12 UART_CTS
14
10
13
A-4
4 3 2 1 D
VCC_3V3 C39 0.1uF
TRGT_UART_CTS 13
U5B 74CBTLV3125PWR
2,11,12 GPIO15
2,6,12 UART_TX VCC_3V3 74CBTLV3125PWR U5C
9
TRGT_UART_TX 13 2,6,12 UART_RTS
12
11
TRGT_UART_RTS 13 74CBTLV3125PWR U5D

B
R24 10K
5 UART_BUFF_EN
R133

4 3 2
TMS320C5535 EZDSP MODULE UART BUFFER DWG NO Friday, July 22, 2011
1
514582-0001 Sheet 3 of
Revision: A 13
VCC_1V3 R123 NO-POP

NO-POP
DSP_LDO_OUT_REG VCC_1V8 R124 ANA_LDO_OUT 0 R20
JP1 2
1
1 1%
DSP_LDO_OUT
VCC_3V3_USB U4-2 LDO_EN
FB5
R63 NO-POP
USB_VDDA3P3 VSSA_PLL A1
R64 0
VDDA_PLL
C73 0.01uF
VS
SDA SCL
A0 A1
GND
V_PWR_MON
USB_LDO_OUT
BLM18AG601SN1D 1206
C4 10uF
C63 0.1uF
C56 1000pF
VIN+
VIN-
G12
C7
U3 INA219IDCN
H13 USB_VSSA3P3 DSP_LDO_EN H12 USB_VDDA1P3 USB_VSSA1P3 DSP_LDOO

C2 1uF AGND AGND 0.1uF 0.01uF C49 C43
I2C ADDRESS 100 0000

4 6 5 7 8
C27 0.1uF
FB4
C13 A13
DSP_LDO_OUT_REG
AGND LDO_EN
1 2 BLM18AG601SN1D J12
1206
FB6
I2C_SCL_PWR I2C_SDA_PWR DSP_LDO_OUT C67 0.1uF C65 0.1uF C46 0.1uF C52 1uF C89 0.01uF C42 1uF C55 0.01uF C54 1uF
1
C5 1uF 0.1uF 1000pF C60 C74
2 K14 USB_VSS1P3
E12 F14 K13 USB_VDD1P3 USB_VDD1P3 USB_VDD1P3
I2C_SCL_PWR 8,9 I2C_SDA_PWR 8,9
BLM18AG601SN1D 1206
VCC_3V3_USB
L3
CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD RSV1 RSV2 K12 L13
C59 0.1uF C62 0.1uF
C11 D3 D11 F2 G3 H2 K11 M6 M9 N9
1 2 BLM18AG601SN1D USB_VDDPLL
C3 10uF 0.1uF 1000pF C57 C50
G13
C48 0.1uF
C40 0.1uF
C69 0.1uF
C38 0.01uF
C53 1uF
C41 0.01uF
C64 1uF
C51 0.01uF VCC_3V3_PWR VDD_IO1_CPU JP4 1 1 1%

NO-POP
1206
F13 USB_VSSPLL
AGND
VCC_1V8 AGND
B14 LDOI LDOI LDOI C14 B10

USB_LDO_OUT R122 0 USB_LDO_OUT_REG
2
R97
C75
DVDDIO DVDDIO DVDDIO DVDDIO DVDDIO DVDDIO DVDDIO
C6 L4 M3 M4 N8 N11 N14
C87 0.1uF
C71 0.1uF
0.1uF
U15 INA219IDCN
VIN-
ANA_LDO_OUT
VIN+
R121
NO-POP
D13 USB_LDOO
VCC_1V3
V_PWR_MON

RSV4 RSV5 A11 B11
GND
A1 A0
SCL SDA
ANA_LDOO
VS
B9
C102 0.1uF
8 7
5 6
VDD_IO1_CPU C30 C29 C32 C72
A12 RSV0 RSV3 RSV6 B12 B13
RSV6
4
I2C_SDA_PWR I2C_SCL_PWR C28
R61 0 ANA_LDO_OUT
R60 0
R62 NO-POP
C1 10uF
C45
B7
VDDA_ANA
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C86 1uF 0.1uF
C85
C10
BG_CAP
C88 0.1uF AGND AGND AGND
B6 C9
VSSA_ANA VSSA_ANA
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
C5535 FB1
A14 B2 B3 C8 C12 D4 D5 D10 E3 E4 E11 F3 H3 J13 K3 K4 L5 L10 M7 P1 P14
SPECTRUM DIGITAL INCORPORATED Title: Page Contents: TP1 TMS320C5535 EZDSP MODULE TMS320C5535 POWER
1 2 BLM18AG601SN1D
GND AGND
4 3 2
Size:B Date:
DWG NO
514582-0001 Tuesday, July 26, 2011

1
Revision: A Sheet 4 of 13
A-5
A-6
4 3 2 1
VDD_IO1
R72 NO-POP VDD_IO1 2,6,12 SPI_CLK 2,6,12 SPI_TX R52 10K U9 SPI_HOLD SPI_CLK SPI_TX
R73 NO-POP
SPI_CS_SW_IN
SPI_CS_SW_OUT
R51 NO-POP
R50 NO-POP
1 HOLD VCC NC.3 NC.4 NC.5 NC.6 CS DO

W25X64VSFIG
OR M25P64-VMF6TP
SCLK DIO NC.14 NC.13 NC.12 NC.11 GND WP 9

SPI_WP 10K R74
16 15 14 13 12 11 10
VDD_IO1
VCC_3V3
2 3 4
R16 0 C81 0.1uF
R71 0
5 6
NO-POP SPI_CS0_DEVn
2,12 SPI_CS0 SPI_RX
R31
7 8
2,6,12 SPI_RX
R120 NO-POP
VDD_IO1 SW3
ON
B
2 3 4
R132 SPI_CS_SW_IN DIP_SWITCH R33 10K
1K
8 7 6 5
1 2 3 4 SPI_CS_SW_OUT
CLK_SEL 2 UART_BUFF_EN 3 AIC3204I2C_ENn 10
DIP Switch Defaults: CLK_SEL = OFF (pulled down) UART_BUFF_EN = ON (pulled down) AIC3204I2C_ENn = OFF (pulled down)

4 3 2
TMS320C5535 EZDSP MODULE SPI FLASH DWG NO 514582-0001 Tuesday, July 26, 2011
1
NOTE: DIMENSIONS AND LOCATIONS OF THESE CONNECTORS
MUST MEET SPECIFICATION FOR INTERFACE MODULES
P1 VCC_3V3
P3
GPIO10 GPIO11 2,12 I2S1_FS 2,11,12 GPIO12 2,11,12 GPIO14 2,12 I2S1_CLK R66 R67 33 33
R79 R80
33 33
I2S1_RX 2,12 I2S1_DX 2,12

C
2,3,12 UART_RTS 2 RTC_CLKOUT 2,3,12 UART_TX 2,3,12 UART_RX 2,9,10,11,12 I2C_SDA 2,9,10,11,12 I2C_SCL 2,7 SD_CLK 2,7 SD_CMD HEADER 10X2
1 3 5 7 9 11 13 15 17 19
SD_DATA0 2,7 SD_DATA1 2,7 SD_DATA2 2,7 SD_DATA3 2,7 GPIO10 2,12 GPIO11 2,12 SPI_CS2 2,12 SPI_CLK 2,5,12 SPI_TX 2,5,12 SPI_RX 2,5,12
2 4 6 8 10 12 14 16 18 20
1 3 5 7 9 11 13 15 17 19
2 4 6 8 10 12 14 16 18 20
HEADER 10X2
R81 R82
33 33
UART_CTS 2,3,12 GPIO13 2,12

4 3 2
TMS320C5535 EZDSP MODULE CC BOARD INTERFACE DWG NO Friday, July 22, 2011
1
514582-0001 Sheet 6 of
Revision: A 13
A-7
14
13
14
13
15 15
SD_DATA2 SD_DATA3 SD_CMD SD_CLK SD_DATA0 SD_DATA1
2,6 SD_DATA2 2,6 SD_DATA3 2,6 SD_CMD
INSERT
12
12
MicroSD_CARD
11
11
A-8
4 3 2 1
VCC_3V3 VCC_3V3 VCC_3V3

D
C15
+
R103 10K C106 0.1uF 10uF
R102 10K
R101 NO-POP
R100 10K
R99 10K
R98 10K
R109 10K
9 J6
2,6 SD_CLK
2,6 SD_DATA0 2,6 SD_DATA1
1 2 3 4 5 6 7 8 DAT2 DAT3 CMD VDD CLK VSS DAT0 DAT1
INSERT_COM
10

4 3 2
TMS320C5535 EZDSP MODULE MICRO SD CONNECTOR DWG NO 514582-0001 Friday, July 22, 2011
1
TP2 VCC_1V8_TP U1 VCC_1V8
VCC_USB_DUAL
1 VIN1 GND EN
C124 .1uF R11 3.60K 1% 2200pF TPS62260DDCT
SW
L6
2.2uH
R118
0
D
2
C22 .1uF
C23 4.7uF
3 FB
C21 10uF
C123
C20 4.7uF
R15 1.80K 1%
Vout = Vref x ( 1 + Rtop/RBottom ) ;
VREF = 0.6
Vout = 0.6 x ( 1 + 2 )
FTDI_3V3 R1 0
VDD_IO1 TP5 VCC_3V3_TP R119 0 VCC_3V3
VCC_USB_DUAL U12
VCC_3V3_PWR
1 VIN1 GND EN
TPS62260DDCT R65 8.06K 1%
SW
L7
2.2uH
R2
2
C97 .1uF
C99 4.7uF
C100 4.7uF
3 FB
C125 2200pF
C94 10uF JP5 2 R96

NO-POP
1
1 1%
VCC_3V3_USB
B
R70 1.80K 1%
VIN+
VIN-
Vout = 0.6 x ( 1 +4.47 )

VS
V_PWR_MON
Vout = Vref x ( 1 + Rtop/RBottom ) ;
VREF = 0.6
U16 INA219IDCN

SDA SCL A0 A1 4 6 5 7 8
C101 0.1uF
GND
I2C_SCL_PWR I2C_SDA_PWR
I2C_SCL_PWR 4,9 I2C_SDA_PWR 4,9

4 3 2
TMS320C5535 EZDSP MODULE POWER MANAGEMENT DWG NO 514582-0001 Tuesday, July 26, 2011
1
A-9
A-10
4 3 2 1 D
TP7 VCC_1V3_TP VCC_3V3_PWR U11 VCC_1V3
5 6 IN1 IN2 EN GND

TPS76601 R126 R127 220K
RF1 = ( Vout/Vref - 1) * RF2 RF1 = ( 1.3/1.224 - 1) * 169K
OUT1 OUT2 FB PG
VCC_3V3_PWR
7 8 1 2
10.7K R125
+ +
C98 4.7uF
4 3
C95 4.7uF
C26 4.7uF
169K 1%
TARGET_PWR_GOOD 2,10,11,13
VCC_3V3_PWR R87 0
V_PWR_MON
R85 NO-POP I2C_SCL_PWR I2C_SDA_PWR JP3 I2C_SCL_PWR 4,8 I2C_SDA_PWR 4,8 I2C_SDA 2,6,10,11,12 I2C_SCL 2,6,10,11,12 NO-POP
R83
1 2 3
HEADER 3
0 0
R86 R84
Power Monitor I2C Probe Point Headers

4 3 2
TMS320C5535 EZDSP MODULE POWER MANAGEMENT DWG NO 514582-0001 Friday, July 22, 2011
1
VCC_1V8 R106 C11 10uF JP6 JP7 0.1uF 0.1uF 10uF C108 C116 C19 NO-POP R107 NO-POP
VCC_1V8
VCC_3V3
1
R5 C8 10uF 0.1uF 0.1uF 10uF C105 C111 C12 0 R108 0
GND-AIC
V3.3A
D
VCC_3V3 U17 GND-AIC
VCC_3V3 C122
STEREO IN 1
TLV320AIC3204IRHBT R141 no-pop 220K R8 0 R137 .1uF
R110 1K
6 29
24 26
IOVDD DVDD
C17 0.47uF C16 0.47uF AIC_LINE2L AIC_LINE2R
AVDD LDO_IN
J3
U18
20
VCC
2 4 5 3 1 RESET 31
AIC_RST R111 1K
GND-AIC SJ1-3515-SMT, 5PJACK STEREO
19 13 14 15 16 20 21 MICBIAS IN1_L IN1_R IN2_L IN2_R IN3_L IN3_R BCLK WCLK DIN DOUT MCLK SCL/SSZ SDA/MOSI 9 10 1
VCC_3V3
2 3 4 5
AIC_IISCLK AIC_IISFS AIC_IISD0 AIC_IISD1
R92 R93 R94 R95
0 0 0 0
18 17 16 15 14 13 12 11
1B 2B 3B 4B 5B 6B 7B 8B
1A 2A 3A 4A 5A 6A 7A 8A
2 3 4 5 6 7 8 9 1 19 10
R138 SN74CBTLV3245APWR 10K
I2C_SCL I2C_SDA
TARGET_PWR_GOOD 2,9,11,13 I2S2_CLK 2,12 I2S2_FS 2,12 I2S2_DX 2,12 I2S2_RX 2,12 I2C_SCL 2,6,9,11,12 I2C_SDA 2,6,9,11,12
GND-AIC
HEADPHONE_LOUT HEADPHONE_ROUT
25 27 22 23 HPL HPR LOL LOR
GND
NC OE
HEADPHONES OUT
C14 100uF
30 32 LDO_SEL GPIO SPI_SEL MISO SCLK/MIC_DET

R104 4.7K
J4
CONN_HP_LOUT
12 11 8
AIC_MODE_SEL
R134 10K
R135 10K
18 REF
C18 10uF 0.1uF C117
CONN_HP_ROUT
+
IOVSS DVSS
AVSS PPAD
2 4 5 3 1
C13 100uF
I2C_SCL_AIC I2C_SDA_AIC 5 AIC3204I2C_ENn
7 28
GND-AIC VCC_3V3 R10 4.7K GND-AIC
GND-AIC VCC_3V3
SJ1-3515-SMT, 5PJACK STEREO
17 33
R136 10K
R9 NO-POP

R7 100
C104 0.1uF
U14
VCC OFFn 3 CLK GND
1 2
ASDM1-12.000MHZ-LC-T 0 R91 0 0 R90 R89 CLK_12MHZ 13 USB_CLK_12MHZ 2 CPU_CLK_12MHZ 2
Select Internal LDO
VCC_3V3 FB3
V3.3A
1 2 BLM21AG151SN1D
SPECTRUM DIGITAL INCORPORATED Tie Analog Power to Digital Power through single point connection or Ferrite Bead. Title: FB2 Page Contents: CODEC Size:B GND-AIC Date:
4 3 2
TP6
TMS320C5535 EZDSP MODULE
GND
1 2 BLM21AG151SN1D
DWG NO Friday, July 22, 2011
1
514582-0001 Sheet 10 o f
Revision: A 13
A-11
J5 ANA_LDO_OUT C109 1uF
0SD9616GLBBG01
14
1 7
10
13
A-12
1 C2P 2
R113 10K VCC_3V3 C110 R105 1uF 20K GPAIN1 C112 1uF C113 .1uF 2,12 R114 100 NO-POP
C2N
3 C1P
SW1
1 3 4 C1N
C121 NO-POP
2 4 5 VBAT VBREF 6
VCC_3V3 C115 10K .022uF C118 .1uF C114 1uF
R116
USER1
SW2
1 3 VSS 8
2 R115 4 7
USER2
VDD
2,9,10,13 TARGET_PWR_GOOD
RESn
VCC_3V3 2,6,9,10,12 I2C_SCL C96 .1uF VCC_3V3 2,6,9,10,12 I2C_SDA
10
SCL
U10A SN74LV125
11
SDA
2,6,12 GPIO14 R112 R76 R77 R78 220 C119 2.2uF DS3 LED GRN 220 DS4 LED RED 220 DS5 LED YELLOW
LED0
R75
220
DS6
LED BLUE 392K 1%
12
IREF
13
V13
VCOMH
U10B SN74LV125
14
VCC
2,3,12 GPIO15
LED1
C120 2.2uF
FCI_10051922-1410ELF
B
U10C SN74LV125 R88 0
VCC_USB_DUAL
2,12 GPIO16 L2 2.2uH
LED2
LCD POWER 13V

D1 MBR0520 U13 C107 1uF R6 1.6M 1% C103 10pF
U10D SN74LV125
5 Vin SW GND 4 EN FB
TPS61041 2,6,12 GPIO12 R3
1 2
R4
C9 10uF,16V
2,12 GPIO17 10uF
12
11
LED3
C10
180K 1%
SPECTRUM DIGITAL INCORPORATED Title: 10K Page Contents: Size:B Date: LCD INTERFACE DWG NO Friday, July 22, 2011
3 2 1
TMS320C5535 EZDSP MODULE
514582-0001 Sheet 11 o f
Revision: A 13

4
VCC_USB_DUAL
VCC_3V3
EDGE CONN 30X2
2 2,11 2 2 2 SPI_CS3 2,3,6 UART_TX 2,3,6 UART_RX 2,3,6 UART_CTS 2,3,6 UART_RTS I2S1_FS 2,6 I2S1_DX 2,6 I2S1_RX 2,6 I2S1_CLK 2,6 UART_TX UART_RX UART_CTS UART_RTS I2S1_FS I2S1_DX I2S1_RX I2S1_CLK SPI_CS3
GPAIN0 GPAIN1 GPAIN2 GPAIN3
SPI_CS0 SPI_CS2 I2S0_FS I2S0_DX I2S0_RX I2S0_CLK SPI_CS0 2,5 SPI_CS2 2,6 I2S0_FS 2 I2S0_DX 2 I2S0_RX 2 I2S0_CLK 2
2 GPIO4 2 GPIO5 2,6 GPIO10 2,6 GPIO11 GPIO10 GPIO11 GPIO17 GPIO16 I2C_SCL 2,6,9,10,11 I2C_SDA 2,6,9,10,11 I2C_SCL I2C_SDA 2,11 GPIO17 2,11 GPIO16
60 58 56 54 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24
I2S2_FS I2S2_DX I2S2_RX I2S2_CLK I2S2_FS 2,10 I2S2_DX 2,10 I2S2_RX 2,10 I2S2_CLK 2,10
59 57 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23
2,3,11 2,6,11 2,6,11 2,6
GPIO15 GPIO14 GPIO12 GPIO13
GPIO15 GPIO14 GPIO12 GPIO13
20 18 16 14 12 10 8 6 4 2
SPI_RX SPI_TX SPI_CLK SPI_CS1 SPI_RX 2,5,6 SPI_TX 2,5,6 SPI_CLK 2,5,6 SPI_CS1 2 P2
19 17 15 13 11 9 7 5 3 1

4 3 2
TMS320C5535 EZDSP MODULE EXPANSION CONNECTORS DWG NO Friday, July 22, 2011
1
514582-0001 Sheet 12 o f
Revision: A 13
A-13
VCCUSB
PLACE BY EMU USB CONNECTOR

D4 JP2 D3
VBUS_C5535
BLM21P221SN
C93 10nF 10uF C70 100nF C36 100nF C33 10nF C58 10nF C79 100nF C80 100nF C68 100nF C35 100nF
C92 100nF
J2 C44 U7 C47 100nF 4.7uF 100nF 4.7uF
S2
5V_USB DD+ GND 5 IO4 VCC

C76
1 2 3 4 1 2
FT1.8V C61 FT1.8V
S1
NC 4 GND IO1
TPD2E001
C37
USB-A PLUG
BLM21P221SN
4 9
10nF FTDI_3V3 TDI TDO TMS
12 37 64
20 31 42 56
VREGIN VREGOUT
VCORE.1 VCORE.2 VCORE.3
50 49
TRSTN RTCK 47-NOPOP
VCCIO.1 VCCIO.2 VCCIO.3 VCCIO.4
C34
VPHY VPLL
AGND
GND.1 GND.2 GND.3 GND.4 GND.5 GND.6 GND.7 GND.8
10
U6
1 5 11 15 25 35 47 51
A-14
1
FTDI_3V3 MBR0520 MBR0520 VCC_USB_DUAL L1 VCCUSB BLM21P221SN C7 FTDI_3V3 L4 L5 CON2
PLACE BY C5535 USB CONNECTOR
T CK
R39 R49 R48 R47 R58 R46
47 47 47 47 47
TARGET_TCK
TARGET_TDI TARGET_TDO TARGET_TMS
TARGET_TCK 2 TARGET_TDI 2 TARGET_TDO 2 TARGET_TMS 2
100nF
7 8 DM DP
SRST_N_OUT R45 PWR_DET PWR_RST R28 12K 1%
ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7
16 17 18 19 21 22 23 24
EMU_EN EMU0
TARGET_TRSTn
R57 47-NOPOP FTDI_3V3
TARGET_TRSTn 2 10K
SRST_N_IN
R44
10K
6 REF
R36 10K
EMU1
14 RESET#
ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7
26 27 28 29 30 32 33 34
DIS
R43
10K FTDI_3V3
10 CLK_12MHZ
R23
XTIN
2 XTIN XTOUT 3
R26 NO-POP R35 R32 R30 R27 0 0 0 0
TRGT_UART_RX 3 TRGT_UART_TX 3 TRGT_UART_CTS 3 TRGT_UART_RTS 3
C78 R42 .1uF U8 R53 47 10K
Mounting holes 0.250 pad 0.125 drill
63 EECS EESK EEDATA TEST 62 61 13
BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7
38 39 40 41 43 44 45 46
1 2 3
CLK GND D
CLR VCC Q
6 5 4
74LVC1G175-DBV6 R40 NO-POP
Z1
Z2
Z3
Z4
BCBUS0 BCBUS1 BCBUS2 BCBUS3 BCBUS4 BCBUS5 BCBUS6 BCBUS7 PWREN# SUSPEND# 60 36
48 52 53 54 55 57 58 59
2,9,10,11 TARGET_PWR_GOOD
FT2232HL R12 DS1 220
OPTIONAL: IF NOT USED CONNECT PWR_GOOD TO PWR_DET.

VCC_USB_DUAL
FTDI_3V3 U2 EECS EESK EEDATA
GREEN
SPECTRUM DIGITAL INCORPORATED Title: Page Contents: Size:B TMS320C5535 EZDSP MODULE XDS100-V2 INTERFACE DWG NO Date: Friday, July 22, 2011 514582-0001 Sheet 13 o f Revision: A 13
C31 100nF 93C46_56_66 R19 10K R21 2K2

8 7 6 5 VCC NC1 NC2 GND CS SK DIN DOUT 1 2 3 4
LOCATE LED ALONG A BOARD EDGE SO IT WILL BE MORE VISIBLE.
Appendix B Mechanical Information
This appendix contains the mechanical information about the TMS320C5535 eZdsp produced by Spectrum Digital.
B-1
B-2
ALL MEASUREMENTS ARE IN INCHES
THIS DRAWING IS NOT TO SCALE
Printed in U.S.A., August 2011 514585-0001 Rev. A

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TMS320C5535 eZdspTM Technical Reference

DSP Development Systems

TMS320C5535 eZdspTM Technical Reference

514585-0001 Rev. A August 2011

Copyright 2011 Spectrum Digital, Inc.

Chapter 1 Introduction to the TMS320C5535 eZdsp

Spectrum Digital, Inc

Expansion Connector AIC3204 Stereo In Stereo Out

Figure 1-1, Key Features of the C5535 eZdsp (top)

Figure 1-2, Key Features of the C5535 eZdsp (bottom)

MIcro SD Card Connector

TMS320C5535 eZdsp Technical Reference Manual

Spectrum Digital, Inc

Spectrum Digital, Inc

Figure 1-3, C5535 eZdsp Block Diagram

MEMORY BLOCKS (MMR Reserved) Internal DARAM Internal SARAM

ROM (in MPNMC=0)

RESERVED (if MPNMC=1)

Figure 1-4, C5535 eZdsp Memory Map

TMS320C5535 eZdsp Technical Reference Manual

Spectrum Digital, Inc

Spectrum Digital, Inc

TMS320C5535 eZdsp Technical Reference Manual

Chapter 2 Physical Description

This chapter describes the physical layout of the TMS320C5535 eZdsp.

Spectrum Digital, Inc

DS3-DS6 P3 Display J3 SW2 SW1 J4

Figure 2-1, C5535 eZdsp (top)

Spectrum Digital, Inc

Spectrum Digital, Inc

TMS320C5535 eZdsp Technical Reference Manual

Spectrum Digital, Inc

The figure below shows a typical stereo jack.

Ground Right Line In Left Line In Figure 2-3, Audio In Jack

Spectrum Digital, Inc

The figure below shows a typical headphone jack.

TMS320C5535 eZdsp Technical Reference Manual

Spectrum Digital, Inc

Spectrum Digital, Inc

Table 10: P3, Wireless Interface Connector

TMS320C5535 eZdsp Technical Reference Manual

Spectrum Digital, Inc

Bottom Side View

Figure 2-5, P2 Connector Tab Positions

Spectrum Digital, Inc

TMS320C5535 eZdsp Technical Reference Manual

Spectrum Digital, Inc

Spectrum Digital, Inc

The figure below shows switch SW3 default settings.

Figure 2-6, Switch SW3, Default Settings

* Note: GPIO15 can overwrite

TMS320C5535 eZdsp Technical Reference Manual

Spectrum Digital, Inc

JP1 JP3 JP4 JP6

Spectrum Digital, Inc

TMS320C5535 eZdsp Technical Reference Manual

This appendix contains the schematics for the TMS320C5535 eZdsp.

NOTES, UNLESS OTHERWISE SPECIFIED:

RESISTANCE VALUES IN OHMS.

CAPACTITANCE VALUES IN MICROFARADS.

REFERENCE DESIGNATORS USED:

Spectrum Digital, Inc