SHRI RAMDEOBABA KAMLA NEHRU ENGINEERING COLLEGE

VEDIC MULTIPLIER

PROJECT GUIDE : MR.R.S.BALPANDE

PROJECT MEMBERS

:
KUNAL PAHUNE KAUSTUBH KHATKHEDKAR GAURAV KHANDELWAL

NISHANT PANDEY DURGESH HEDAU SAURABH RATHI

ABSTRACT:
With the increasing complexity of the projects, structural presentation on a logical elements level, becomes a hard, even impossible. Therefore, a higher abstraction level description would allow optimal results to be reached, such as consummation, characteristics, size and price. The hardware description language VHDL is quite suitable for purposes of that kind. It can be used for a high-level behavioral description, as well as for detailed structural description. This language provides: a standard way for documenting the project; means for creation of abstract simulation models, which can be used by each VHDL- simulator; possibility for an automatic synthesis of the electrical scheme from the projects abstract description. The VHDL language allows the elaboration of a complete functional structural model of the specialized integral scheme, which can be simulated in order to assess its adequacy in terms of the specifications requirements. Thus, a higher quality of the project is guaranteed, because errors and problems are found out shortly after the start of the designing process.

What is Vedic Mathematics?

Vedic Mathematics is the name given to the ancient system of Mathematics which was rediscovered from the Vedas between 1911 and 1918 by Sri Bharati Krsna Tirthaji (1884-1960). According to his research all of mathematics is based on sixteen Sutras or word-formulae. For example, 'Vertically and Crosswise` is one of these Sutras. These formulae describe the way the mind naturally works and are therefore a great help in directing the student to the appropriate method of solution. Perhaps the most striking feature of the Vedic system is its coherence. Instead of a hotch-potch of unrelated techniques the whole system is beautifully interrelated and unified: the general multiplication method, for example, is easily reversed to allow one-line divisions and the simple squaring method can be reversed to give one-line square roots. And these are all easily understood. This unifying quality is very satisfying, it makes mathematics easy and enjoyable and encourages innovation. In the Vedic system 'difficult' problems or huge sums can often be solved immediately by the Vedic method. These striking and beautiful methods are just a part of a complete system of mathematics which is far more systematic than the modern 'system'. Vedic Mathematics manifests the coherent and unified structure of mathematics and the methods are complementary, direct and easy. The simplicity of Vedic Mathematics means that calculations can be carried out mentally (though the methods can also be written down). There are many advantages in using a flexible, mental system. Pupils can invent their own methods, they are not limited to the one 'correct' method. This leads to more creative, interested and intelligent pupils. Interest in the Vedic system is growing in education where mathematics teachers are looking for something better and finding the Vedic system is the answer. Research is being carried out in many areas including the effects of learning Vedic Maths on children; developing new, powerful but easy applications of the Vedic Sutras in geometry, calculus, computing etc. But the real beauty and effectiveness of Vedic Mathematics cannot be fully appreciated without actually practising the system. One can then see that it is perhaps the most refined and efficient mathematical system possible.

Why Vedic Mathematics?

It helps a person to solve problems 10-15 times faster. It reduces burden (Need to learn tables up to nine only) It provides one line answer. It is a magical tool to reduce scratch work and finger counting. It increases concentration. Time saved can be used to answer more questions.

Improves concentration. Logical thinking process gets enhanced.

The Vedic Mathematics Sutras

The Main Sutras

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The Sub Sutras

By one more than the one before. All from 9 and the last from 10. Vertically and Cross-wise Transpose and Apply If the Samuccaya is the Same it is Zero If One is in Ratio the Other is Zero By Addition and by Subtraction By the Completion or NonCompletion Differential Calculus By the Deficiency Specific and General The Remainders by the Last Digit The Ultimate and Twice the Penultimate By One Less than the One Before The Product of the Sum All the Multipliers

Proportionately The Remainder Remains Constant The First by the First and the Last by the Last For 7 the Multiplicand is 143 By Osculation Lessen by the Deficiency Whatever the Deficiency lessen by that amount and set up the Square of the Deficiency Last Totalling 10 Only the Last Terms The Sum of the Products By Alternative Elimination and Retention By Mere Observation The Product of the Sum is the Sum of the Products On the Flag

Vertically and cross wise (URDHVA TIRYAGBHYAM)

The Sutra (formula)
URDHVA TIRYAGBHYAM means :

Vertically and cross wise

This the general formula applicable to all cases of multiplication and also in the division of a large number by another large number. The sutra "vertically and crosswise" has many uses. One very useful application is helping children who are having trouble with their tables above 5x5. For example 7x8. 7 is 3 below the base of 10, and 8 is 2 below the base of 10.

The whole approach of Vedic maths is suitable for slow learners, as it is so simple and easy to use. The sutra "vertically and crosswise" is often used in long multiplication. Suppose we wish to multiply 32 by 44. We multiply vertically 2x4=8. Then we multiply crosswise and add the two results: 3x4+4x2=20, so put down 0 and carry 2. Finally we multiply vertically 3x4=12 and add the carried 2 =14. Result: 1,408.

We can extend this method to deal with long multiplication of numbers of any size. The great advantage of this system is that the answer can be obtained in one line and mentally. By the end of Year 8, I would expect all students to be able to do a "3 by 2" long multiplication in their heads. This gives enormous confidence to the pupils who lose their fear of numbers and go on to tackle harder maths in a more open manner.

Three digit multiplication

Vedic Method

103 X 105 1 0, 8 1 5

INTRODUCTION VHDL stands for very high-speed integrated circuit hardware description language. Which is one of the programming language used to model a digital system by dataflow, behavioral and structural style of modeling. This language was first introduced in 1981 for the department of Defense (DoD) under the VHSIC programe. In 1983 IBM, Texas instruments and Intermetrics started to develop this language. In 1985 VHDL 7.2 version was released. In 1987 IEEE standardized the language. The VHSIC Hardware Description Language (VHDL) is an industry standard language used to describe hardware from the abstract to concrete level. The language not only defines the syntax but also defines very clear simulation semantics for each language construct. It is strong typed language and is often verbose to write and Provides extensive range of modeling capabilities, it is possible to quickly assimilate a core subset of the language that is both easy and simple to understand without learning the morecomplex features.

What is VHDL?

Why Use VHDL?

Quick Time-to-Market Allows designers to quickly develop designs requiring tens of thousands of logic gates Provides powerful high-level constructs for describing complex logic Supports modular design methodology and multiple levels of Hierarchy One language for design and simulation Allows creation of device-independent designs that are portable to multiple vendors. Good for ASIC Migration Allows user to pick any synthesis tool, vendor, or device

VHDL ADVANTAGES :
VHDL offers the following advantages for digital design: Standard: VHDL is an IEEE standard. Just like any standard (such as graphics X-window standard, bus communication interface standard, high-level programming languages, and so on), it reduces confusion and makes interfaces between tools, companies, and products easier. Any development to the standard would have better chances of lasting longer and have less chance of becoming obsolete due to incompatibility with others.
Government support: VHDL is a result of the VHSIC program; hence, it is

clear that the US government supports the VHDL standard for electronic procurement. The Department of Defense (DOD) requires contractors to supply VHDL for all Application Specific Integrated Circuit (ASIC) designs. Industry support: With the advent of more powerful and efficient VHDL tools has come the growing support of the electronic industry. Companies use VHDL tools not only with regard to defense contracts, but also for their commercial designs. Portability: The same VHDL code can be simulated and used in many design tools and at different stages of the design process. This reduces dependency on a set of design tools whose limited capability may not be competitive in later markets. The VHDL standard also transforms design data much easier than a design database of a proprietary design tool. Modeling capability: VHDL was developed to model all levels of designs, from electronic boxes to transistors. VHDL can accommodate behavioral constructs and mathematical routines that describe complex models, such as queuing networks and analog circuits. It allows use of multiple architectures and associates with the same design during various stages of the design process. . Reusability: Certain common designs can be described, verified, and modified slightly in VHDL for future use. This eliminates reading and marking changes to schematic pages, which is time consuming and subject to error. For example, a parameterized multiplier VHDL code can be reused easily by changing the width parameter so that the same VHDL code can do either 16 by 16 or 12 by 8 multiplication. Technology and foundry independence: The functionality and behavior of the design can be described with VHDL and verified, making it foundry and technology independent. This frees the designer to proceed without having to wait for the foundry and technology to be selected.

CONCLUSION :
The key advantage of VHDL when used for systems design is that it allows the behavior of the required system to be modeled and simulated before synthesis tools translate the design into real hardware (gates and wires). VHDL allows the description of a concurrent system (many parts, each with its own sub-behavior, working together at the same time). This is unlike many of the other computing languages such as BASIC, Pascal, C, or lower-level assembly language which runs at machine code level, which all run sequentially, one instruction at a time on Von Neumann architecture. A final point is that when a VHDL model is translated into the "gates and wires" that are mapped onto a programmable logic device such as a CPLD or FPGA, then it is the actual hardware being configured, rather than the VHDL code being "executed" as if on some form of a processor chip.