ECE 5321, Design and Analysis of Analog IC, Final Project Report, December 8th 2010

Low Voltage Smart Temperature Sensor Front End

Shreyas Rao (R10357881), Satyabh Mishra (R10322331), ECE 5321

AbstractIn this brief, a Low Voltage Low Power CMOS based Temperature Sensor is presented. It is based on subthreshold MOSFETs and on compensating a PTAT based source with a gate-source voltage of a subthreshold MOSFET. The circuit is designed using a standard 0.5-m CMOS technology, exhibiting an average voltage of 106mV with an average temperature coefficient of 511ppm/C in the range of 0 to 120 C, and voltage sensitivity of 666Kppm/V. A brief study of PTAT based current Source and subthreshold MOSFET is also reported. Index TermsPTAT, Compensation, Reference, Subthreshold MOSFET.

In Subthreshold Region the Vgs equation in terms of Kg [1] and Temperature can be written as Vgs (T) =Vgs (To) +Kg {(T/To)-1} (2) The quantity Kg is negative [1] and hence Vgs decreases by temperature. We can observe that by combining equation (1) and (2) a constant voltage independent of temperature can be obtained.
B. PTAT Current Source

I. INTRODUCTION

N THIS document a Low Voltage Low Power Temperature Sensor is realized exploiting the behavior of subthreshold MOSFETs. Temperature Sensors are important in monitoring the effective working of many electronic devices. Earlier BJT based references were used requiring large area and large power. Hence use of Subthreshold MOSFETs came into picture, which helps to get a voltage reference independent of temperature and power supply, reducing power dissipation and chip area. The voltage reference used to design this temperature sensor is similar to [1].The former uses 0.5-m CMOS process and the later 0.35-m CMOS. Fig.1. PTAT current source varying linearly with temperature. II. DESIGN PRINCIPLES A. Subthreshold MOSFETs The basic principle of working of a subthreshold MOSFET is Vgs<Vth. When Vgs<Vth a small amount of Drain Current flows. Its relationship with respect to Vgs is exponential. The PTAT current source is designed using two NMOS in Subthreshold region and two PMOS in active region. The Vgs is kept less than Vth to design the Subthreshold NMOS. The MOSFETs are diode connected to mirror the current to be used in later half of the circuit. PTAT is designed by minimizing the dependence with respect to power supply. The output of a PTAT current source represents a f(x)=kx straight line, where the y varies linearly with temperature. The Slope of PTAT vs T between (20,490) and (60,505) is Slope={(505-490)/(60-20)}= 3/8=0.375

Id=Ioexp (Vgs/Vt).
Where >1 is a Non-ideal factor and Vt=KT/q. The equation as a function of drain current can be written as

Vgs= Vtln (Id/Io).

(1)

If (Id/Io) remains constant then Vgs is a positive temperature co-efficient.

ECE 5321, Design and Analysis of Analog IC, Final Project Report, December 8th 2010

Fig.2. Output of PTAT Current Source. C. The Compensation Circuit. Fig.4. Output of Compensation Circuit.

III. PROPOSED CIRCUIT, LAYOUT AND ANALYSIS

Fig.3. Compensation Circuit The temperature compensation circuit is designed and tested using a Constant Current Source of 1.022A. The current Mirrored Transistor from Fig.3 mirrors the PTAT current to set Vgs of the NMOS without external resistance, which is used to produce Icom= Vgs/R1. (3) The point to be noted is this transistor works in subthreshold region. From equation (2) and (3) we can see that Icom has a negative temperature co-efficient, and hence as temperature increases this subthreshold transistor produces a Compensating Current Icom. The testing is done using the constant current source because this amount of current was required to cancel out the PTAT effect while designing the Constant Voltage Reference. In the Final Design the Constant Current Source is replaced by the Current Mirror of PTAT circuit.

Fig.5. Final Design Schematic

Fig.6. Final Layout (167.250m * 56.850m)

ECE 5321, Design and Analysis of Analog IC, Final Project Report, December 8th 2010

Vref
5 4 3 2 1 0 Temperature Vref

Fig.10. Desired Final Vref Output Fig.7. Extracted View The final circuit is designed using the PTAT and Compensation Circuit. The Layout area is minimized by doing several iteration. The Final and best possible Layout area is 9508.1625m. The following three sample figure demonstrates the basic design principle and desired output at various stages of design. It shows that we need two basic output waveform which when added gives the final constant output with respect to temperature. PTAT 10 8 6 4 2 0 Temperature PTAT The above graph demonstrates the desired final output which we will compare and see with the actual output of the circuit in the following section. The challenge for designing this type of circuit is proper configuration of MOSFETs, i.e., their (W/L) ratios and Resistance Value. By applying the concept of subthreshold MOSFETs most of the transistor size is determined, but to make it temperature and power supply independent lot of design iteration has been done. IV. OUTPUT WAVEFORMS

Fig.8. Desired PTAT output Fig.11. Vref vs. Temperature

Compensation

The average value of Vref is 106.5mV

10 5 Voltage 0 Temperature

Fig.9. Desired Compensation Output

ECE 5321, Design and Analysis of Analog IC, Final Project Report, December 8th 2010

Fig.12. Vref vs. VDD. The Voltage swing from 0V to 2V is shown with maximum swing equal to 79mV, which is the point of concern of the design. Various alternative where tried but decrease of variation over VDD resulted in Increase of Variation over Temperature.

Fig.14. PTAT vs. Temp at 0.8V

Fig.15. Vref vs. Temp at 3V

V. PERFORMANCE AT WORST CORNERS

Fig.15. PTAT vs. Temp at 3V Fig.13. Vref vs. Temp at 0.8V

ECE 5321, Design and Analysis of Analog IC, Final Project Report, December 8th 2010

VII. CONCLUSION A Low Voltage Front End Temperature Sensor is realized exploiting the subthreshold characteristics of MOSFETs. The Voltage Reference obtained is of 106.5mV with voltage variation of 79mV over the range of 1.2V to 2V and 4mV peak to peak for temperature variation over 0 C to 120 C in the chip area of 9508.1625m. A Temperature Sensitivity of 511ppm/C and Voltage Sensitivity of 666K ppm/V are obtained. ACKNOWLEDGMENT Fig.16. Vref vs. Temp at 5V The authors acknowledge Dr Changzhi Li, Dept. of ECE TTU, Lubbock, Texas-USA for valuable design input and constant support throughout the course Design and Analysis of Analog IC. REFERENCES
[1] Po-Hsuan Huang, Hongchin Lin and Yen-Tai Lin, A Simple Subthreshold CMOS Voltage Reference Circuit with ChannelLength Modulation Compensation, IEEE Transactions on Circuits and Systems-II, September 2006. B. Razavi, Design and Analysis of CMOS Integrated Circuits. (Text Book) G.Giustolisi, G.Palumbo, M.Criscione and F. Cutri,A LowVoltage Low-Power Voltage Reference Based on Subthreshold MOSFETs, IEEE Journal of Solid State Circuits, VOL.38, January 2003.

[2] [3]

Fig.17. PTAT vs. Temp at 5V

VI. LVS MATCH The following figure shows the net-list match of schematic and Layout.