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# 9 Why such an easy problem?

To illustrate the time frame that logic gates in a hIgh-speed dIgital system must operate. As we will see in Part 2. fast circuits (short logIc delays) can be difficult to design. .
4

[2.18]

## The smallest clock frequency is

fmtn = ~ 1

hold

1 = 2 ( 0120
.

) = 4Hz

While this is very slow. it does show that the clock cannot be idled.

Chapter 3
13.1] The resistance of the line is given by RUne Rsn where the number of squares can = be divided into "nonnal" straight line contJibutions and corners. Let nc be the contribulion of a corner square. The number of square is given by tracing the line from A to B as n = 15+nc+12+nc+14+nc+4+nc+22+nc+9
so R = 25(79.125) = 1,978.125.Q.

= 76+56nc

= 79.125

R1ine = 25

(275) = M

1375Q.

## [3.3](a) The sheet resistance is

Rs = p t = ( 4XIO-6) ( 1200xlO-8) = O.33.Q

## so that the line resistanceis

10
R1ine = (6.33)(156.25) = 52.08.Q

[3.5]

formula

## (b) The line capacitance is

Cline = ~ T ox {c) The I1ne time constant Is or = RUneC1ine = (2000)(6.906xlO-15) = 13.81 ps
-(3.9)(8.854XIO-14)(0.5xlO-4)(40xlO-4) -1000xlO-8 = 6.906 iF

## [3.6] (a) For n-type mate1ial.

rlno = N d = 4xlO11 cm -3

2 n{ PnO ---nn -

( 1.45xlO1O)

..-=

525.6 cm

-3

~n = 92+
1+

IV -sec

JJ.p = 47.7(92)+
= 135.9cm2/V-sec

11

= 27.71

(.Q-cm]

[3.7]

## , Na > Nd. so the material is p-type. The majority

ppo=Nd-Nd = 5.98xlO

carrier density is
18 cm -3

## and the minority

caITier density is

[3.8]

densities of

## so that the conductivity

is

0" = ( 1.6xlO-19)[(5.26xlO5)](1373.36)

+ ( 4XIO14)( 485.6)

This gives
0" = 0.31

lOOX1O-4(~2.17
.lxlO

32.17.Q

## [3.9] (a) Start with

(b) Differentiate:
2 dp = ~ ( ~np+~pP dp n( ~

) = -~n2+~p n; P

= O

so we require
n -nl> nl ~p (c) The last equation shows that the highest resistively material is slightly p-type. p=
~

VDD

P+ Nwell VOUT

N+

GND

VDD

P+ Nwell VOUT

N+

GND