Architecture Software and 8086 of rhe B0BB Microprocessors

._RODUCTION
and our Thischapter begins studyofthe 8088rnd 8086micfoprocessors thejrassembly we l3nguage, usingassembly To either 8088or 8086 rhe :iguage programming- program 'nustunderstand the microprocessor ir! mcrnory subsystems and input/output and how in we point of view.For this reason. this chapter. will eramine rDerate from a sofiware '.1:loltwarcdrchitecture that The ofthe 8088ind 8086microprocesso.s material follou's for thal but only to the 8088microprocessor, evefything is described lhe :=quentlyrefers architecture the 8086is of the to :,188alsoapplies lhe 8086.This is because softwarc here: :1.'iical lo thatof the 8088.Thefollowingtopicslre covered Microprocessor of 2-1 Microarchitecture the 8088/8086 Miffoproceslor Modelofthe 8088/8086 2.2 Software Space DataOrganization and 2.3 Memory Addrcss 2.4 DataTypes ' 1.5 \egnenrRe-i..e-JrJ \4eno^ Sermen':'r' and 2.6 Dedicated,Reserved, GeneralUse Memory 2.7 InstructionPointer 2.8 Drta Regislels and 2.9 Poinrer IndexRegisters Registcr 2.10 Status

27

2.ll Generating Menory Address a 2.12 The Stack 2.13 lnput/Output Address Space

OF THE 2.I MICROARCHITECTURE 8088/8086 MICROPROCE5S0R

of The microarchitecture a Focessoris its intemal architecture-ihat is, dle circuit building blocks that implement the softwlre and hardware archiiecturesof ihe 8088/8086 Due to the need for additional fbaturesand higher perfbrmance,the microprocessor's. microarchitecture a microprocessor of family evolvesover time, In facl, a new microarchitecnrre introducedfor Intel's 8086fanily everyfew yea$. Eachnew genemtion is of (rhe 8088/8086, processo$ processors) represenrs 80286,80386,80846,and Penrium signi6cant changes the microarchilecture the u086. in of The microarchitectures the 8088 and 8086 icroprocessors simildr.They of arc parallel tmcerrirg-that is, they rre iDrple e ted with several simullaeboth el|.ploy processing ouslyoperaling units.Figure2-l(a) illustrates iDtemal lhe architecture the of 8088and 8086mjcroprocssors. They containtwo pro.essing]ux,ils: bus interlaceunh the uril funclions bothoperate and at \BIU) andlhe execution (EU).Eachunit hasdedicated the same time,ln essence, palallelprocessing this elTeclively makgs fetchandexecuthe lion of instruclions indepeodenl operations, results efficient ofthe system This in use bus performance 8088/8086 higher for microcomputer systems. and The businterface is ihe 8088/8086's unit connection theoutside to world.By intermeanthe pathby whiohh connects external to The BIU is responsibl face,we devices. fetching, reading w,itfor performing external operations, as instruction all bus such and peiing of dataoperands memoryandinputting outputtlng for or datafor input/output pberals, placeovertbesystem These inlbrmadon translers lake bus,This busincludes an 8-bit bidirectional buslor the 8088(16 bitsfor the 8086),a 20-bitaddress and data bus, lhe signals needed contloltansfersoverthe bus.The BIU is not only responsible to for perlbrmingbus operations, alsoperformsofier lunctions relatedto instructionand data it queuing address gederaiion, acquisidon, instance, is responsible instruction For it for and To implemenrthesefirnctions. the BIU containsthe segment registers,fie instrucgeneration queue. tion pointer, address the adder, controilogic,and an instruction bus Figwe2 l(b) shows businterface ofthe 8088/8086 moredetail. the unit in TheBIU uses knownas an inttruction que e ta lmplement pipelined a architecture. This a mechanism queuepermits the 8088 to prefetch up to 4 bytes (6 bytes for the 8086) of instmction code.Whenever queue not firl-that is, it hasroomfor at least2 morebytes, the is and. ai the sametime, the executionunit is not askingit to reador write datafrom memorythe BIU is free to iook aheadin the programby Fefbtching the next sequential instrucwhenever tions.Prefetched instructions held in the first-infirst out (FIFO)queue. are a byte is loadedat the input end of the queue.it is autonaticdily shifted up through the FIFO to the empty location nearestthe output. Here the code is held until dre execution unit is ready to acceptit. Sinceinstructionsare nomally waiting in the queue,the time neededto felch n1snyinstructionsof the microcompuier'sprogam is etiminated.If the queue full andthe EU is not requesting is access datain memory, BIU doesnot to the

28

Software Architectureof the 8088 and 8086 MicroDrocessors Chao. 2

INSTRUCTION PIPELIIIE

AUS SYSTEM (a)

uxrr lus ||{iEaFlcc lrru)

{bt Figurc 2-1 (a) Pipelined echitecture of the 8088/8086microlrocessors (RePrtuted wiih pemi$ion of l;tel Corloration. Copltisht/Intel Corp 1981)(b) E\ecution dd bus interlaceuits. (Reprintedwith permissionof Intl Corp . ColyriShvlntel Corp l98t)

2l)

rcd 10 prform atry bus opflations. These intervals of no bus activity, which occur btwenbus opemtions,are k'rc.itn as idle states. The executionunit is responsible decodingandexecutinginstructions.Notice in fo. Fig. 2-1(b) that it consistsof ile arithmetic loqic unit (ALID, statusand control flags, general-purpose registers,andtemporary-operand registers. The EU accesses instuctions ftom the output end of the instuction queueand datafrom the general-purpose registers or memory.lt reads one instuction byte after the other liom the output of the queue, decodes them,generales passes dataaddresses necessary, if ihem to ihe BIU andrequests it to perform the reador write operations memory or I/O, and pefolms the operation to specifiedby the instruction-The AIU perfoms the arithmetic,logic, and shift opemrions requircd by an instruction.During executionof the instruction,ihe EU may test the sta tus andcontlol flags,md updates theseflagsbasedon the resultsof exe.uting ihe instruc tion. If the queueis emptt the EU wairs for ihe nexr instrucrionbyte to be fetchedand shifted to the toDof the oueue.

l' 2,2 SOFTWARE MODEL OF THE 8088/808 6 MTCROPROCESSOR

The pwpose of developinga soltuate model is to aid the Fograrnmer in understanding the operationof the mioocomputer systemfrom a softwarepoint of view To be able to Fogram a microprocesso!one does not need to krow all of its hardwarearchitectural features.For instance,we do not necessarily needto know the functjon of the signalsat its vrrio s pjns, their electrical connections, their electrical switching characterisrics. or The function. interconnection, opemtionof the intemal circuits of the microFocessor and also may not nedto be considered. Wlat is importantto the progammer is to know the variousregisterswithin rhe device and to undefitand their purpose,functions, operating capabiiiries,and linitations. Fudhemore, it is essential that the Fogrammer knows how extemalmemoryand input/outpurperipheralsareorganized, how info.mation is ananged in registers, memory andinput/ouFul andhow mernoryand I/O are addressed obram to instuctions and data.This informationrepresents softwarearchilectureof the proces the sor. UDlike the miffoarchitecture, the softwarearchitectdrechangesonly sllghtly liom generation generaiionof processor to The softwarenodel in Fig. 2 2 illusaa&s the software archiiecrureof rhe 8088 microprccessorLooking at this diagam, we seerhat it includes 13 16-bit intemal reg1ste'the instruction pointer(lP), fow tta fgisten (AX, BX. CX, andDX), twopdl"re. r'sirt?r'r(BP and SP), two inder leqistets (SI nd DD, and four r"grnt resisreff (CS. DS, SS,andES). In addition,thereis anotherregistercalledthe rtdrrr /e8trt / (SR), with nine of its bits implemented statusand control flags. as Figure 2-2 showsthat the 8088 architect$e implemenfsindependent memory and inpui/ouQut addressspaces. Notice that the memory addrcssspaceis 1,048,576bytes (lMbyte) in length and the I/O address spaceis 65,536byres(64Kbyret in length. Our concemhereis what canbe donewith this softwarearchitecture how to do it duough and sofrware.For this purpose,we wil now begin a derailedsrudy of the elementsof rhe model andtheir relationshipto software.

30

Software Architectureor the 8088 and 8086 Microorocessors Chao. 2

------__-lrp

D5

_l

ss

SI OI

Figurc 2-2

Sotrde model of the 8088/8086 microprocesor

:rtl]

I.'EMORY ADDRESS SPACE ]ATA ORGANIZATION

lar; ':harwe have inhoducedthe idea of a softwa nodel. let us look at how infomaioftware :,:. iu.h as numbers, characters, instrucnon is storedin mernoryAs shownin and nctions -j: l-j. fie 8088microcomputer suppodslMb) of extemal memory.This memory lMbyte ra: rr orgrnizedfrom a softwarepoint of view as individual byies of datastoredat coniew <--:r. addresses the address over range 00016to FFFFFL,j. 0000016 Therefore,memory in an lltlrared nicrocomputer actually is orsanized 8-bitbyies, as 16-bitwords. izedal as not jve by as a i,o.d of data.ln this case,ihe T.e 8088 can access two consecutive any bytes ,--.: ,lJr(..edb)re . rhelea.r-gnih.!1r bJIe, the word, andthe higheraddressed byte of ,.:-: r! ::! mosl significmt byle. Figure2 4(a) show how a word of datais storedin mem ) shows r-, \.ace that &e storagelocation at the lower address. 0072,16. conrainsdre value , -higher-ad&essed :.1r.' ' r0- : 0216The contents the next-highe of srorage locatiqn. 0072516. = = 550216. : iLl101r 5516 These bytes two represent word0101010100000010, rentth the
: : MemoryAddressSpaceand Data

3l

Figure 2-3 Menory addrss space of ure 8088/8086nimprocsor

To permit efncient useof memory words of alatacan be sroredar what are caleal even-or odd-adalressed boundaries. leastsignificanrbit of the address wod The derermines the type of word boundary. this bit is 0, the wod is at an eyen-addrcss ff boundary_thar is. a word at an evenaddles bounddry corresponds r\ o con5ecurjve ro tye.. wifi rte leastsignificantblte locatedar an evenaddress. example,the word in Fig. 2 4(a) has For its least signilicanr byte ar addrcss0072416. Therefore,ir is srorcd ar an even_adalrcss A word of data stored ar an even-address boundary,such as 0000016, 0000216, 0000416, so on, is said tobe an atigned word-aat is. af aigned woras are locatJ and at an address that is a multiple of 2. On the other hand,a woralof datastoredar an odd_ address bourdary, suchas0000116, 0000316, 0000516 or and so on, is caled a rrtrati{rral wrfd. figure 2-5 shoq somealigned misaligned s dnd wordq dara. of Hereword. 0. 2. 4. and 6 ate examplesof aligned-dara words, while words I and 5 are misaliqnedworts. \oaice fiar misaligned word i consisr. blle I lrom atigned of uord 0 andblre 2 from alignedword 2. wllen expressing addresses datain hexadecimal and form, it is cofiunon ro usethe letter H io specify the base.For insrance,the nunber 00A816 can atso be writien as OOABH-

00725i6

I *" .ool

F--o1o'1

r;;-]
ll

T--_:-=-1

ll
l|r1r10r I oor2B,6l 1 0 r o 1 o 1 o I
0072c8 |
{bJ

Fkure 2-4

(a) Sto.ins a word of darain memory.(b) A! eiarnple. Chap. 2

32

SoilwareArchitectureor the 8088 and g086 Mjcropfocessors

00008H 00007H 00006H 00005H 00004H 00003H 00002H

Byre I
B!1e7

;.
6

_l I
5

Byre 6
Byls 5

;.

4 Byre 3 Byre
Blt 2 Bis 1 By,le 0 ;,.

il. -l
2 1

oooolH
00000H

_l
t\4isaligned Figure 2-5 Examplesof alignedand wods misaligneddatawords

2.I EXAMPLE
form ls Wlat is the dataword shownin FiS 2 4(b)? ExFess the result in hexadecimal Is boundary? it an alignedor misalignedword word it storedat an even-or odd-addressed of data?

Solution
0072Cr6and equals The most significantbyte of the word is storedat address 111r1101,=FDr6=FDH and 0072816 is Its least signifiantbyte is storedat address 10101010r=AA16=AAH Togetherthe two b''tes give the word : = FDAAT6 FDAAH 1111110110101010, of Expressingthe address the least signiicant byte in binary form gives 0072BH: 00728t6= 0000000001110010101l'z boundthe Because dghtmost bjt (lJB) is logic I' the word is storcdat an odd-address ary in memory;therefore,it is a misalignedword of data'

5ec.2.3

and Space DataOrganization Address Memory

33

Aigned

00008H 00007H 00006H 00005H 00004H 00003H 00002H 00001H 00000H

Byte8

-l

l
Doubl

Byre 7
Byts6
Byle 5

Doubl"g'd

--l
| Ddbre

i-|

Byle 4

I oo,ur"s
Doubie 2

Byre 3
Byle2 By,le1 By,te 0 0

I __l
l
Figure 2-6 Examplesof atgned md missligneddoublewords of daia.

T\e double wod is af'ofier data form that can be Focessedby the 8088 miclobytes of data storedin memto A computer. doubleword conesponds four consecutrve pointeris a two-wordaddress element ory; an exampleof double-worddatais a /oint,: A pointer that is sroredat dataor code in rnemory The word of this that is usedto access is baseaddres8 and the word at the lower address the higher address cale.d the se7ment is called the o.frt Justlile for words,a doubleword of datacanbe alignedor misaligted. An aligned and 0000016, 0000416, that doubleword is located an address is a multipleof4 (e.g., at A 0000816). number of aligned and misaligned double words of data are shown in only doublewords0 and 4 are aligneddoublewords. Fig. 2 6. Of tbesesix examples, An exampleshowingthe storageof a pointer in memory is given in Fig. 2-7(a). is the wo.d. which represents segmentbase adalress, stored Here the higher-addressed

38

t-. fi-

"--l 5_l

oooor,. ool frroooos,"l---il ooooe,"f--;_l

0 0 0 0 8 ,|6

ao

Figure 2-7

(a) Storilg a 32-bit pointei in nenory. (b) An examlle.

34

software Architecture of the 8088 and 8086 Microprocessors

Chap. 2

The most significant byte of tbis word is at boundry 0000616. :iaiing at even-ad&ess : byte is at address and 00111011, 38!6. lis leastsig.iGcanl :ddress 0000716 equals = we r]10616 equals ihese two valucs, getlhe segment Combining and 01001100, 4C16. rlrle addrcss. whjchcqmls0011101101001100,3B4Cr6 word. Its leasl significant The o$set paft of the pointer is the lower addressed 01100i01,= 6516The nost 0000416; locationconiains ihis r\re is storedat address : The 00000000' 0016. resulting 000056, which contains !:gnificanr byteis at address = doubleword is 384C006516. The complete is 0000000001100101, 006516. rr'-ser double of 0000.116,is an example an aligned it this double word stadsar address S:nce

.XAMPLE2.2
ir{ should the pointer with segmentbaseaddressequal to A00016and o11ietaddrcss Is ::FFr6 be siored at an even-ad&essbounday starling at 0000816? the double wod r::ned or nisalisned?

:Jlution in sta( byte requires consecutive locations memory, four ::.ageof fie two wordpointer
:: al address0000816.The ler.st signilicant byte of the offset is stored at address0tl008r,j r: ii shownas FF16 Fig. 2 7(b). The most significantbyle ofiheoffset,5516, is stored in Thesetwo bytes ffe folowed by the lcast significantbyte of lie seg. =idress 0000916. -.:ri base address,0016.at address0000A16,and its most signilicant byte, A016, qt 0000816, :i-3,s 0000816. Since lhe double word is slored in memory startingai address : r- Jrgned.

-=ATA ryPES
::E ti..eding section identified the fundanental data fonnats of the 8088 as the byte I :'j,. $ord (16 bits). a.d double word (32 bits). lt also showedhow eachof theseele-i.-i ii llored in memory. The next step is to examile the rypes of dalr ihat can be coded
n r?rP f^m 'R lnr nrn.Pccino

in data exprcssed a number of differThe 8088 rnicroFocessordirdtly processes riprs. Let us begin with the inteser ttuta tlpe. The 8088 can processdaia as :E :r -::::c:. ahsigned ot signed trtg?r' numbeN; each type of integcr can be either byte'wide :' :::i-\\ide. Figure 2 8(a) reFesents an unsignedb$e irteger; this data type can be r-: :'represent decimal numbersin the range 0 tkough 255 The unsignedword inie decinlal numbersin the range 0 E r: .ir)$ n in Fig. 2 8(b); il cm be used to represent 6:.535. F:!=

Dat Types

35

MSe Figure 2-8 (a) Ursisnod byte wordiDtcgi integer(b) Unsigned

EMMPLE2.3
regesent? wordinteger100016 the Whatvaluedoes unsigned

Solution
integeris convcrtedio binary fom: Fint, the hexadecimal = 100016 0001000000000000, Nex1.we tind the valuelor the binary number:

: 2''z 000r000oooooo0001 : 4096

in and word inteser Fiss.2-9(a)and(b) aresimilar byteinteger signed The signed bit integer dataiypesjust intoducedihoweverhererhe mostsignilicant to the unsigned fie numberFor this reason, identifies positive a is a signbit. A zeroin this bit position signedintegerbyte can reFesent decimal nunbers in the range + 127 to 128.and ihe For respe.tively. numbers tbe range+32,767to 32,768, in inleger wordpcrmits signed On byteis 0000001l,(0316). ihe as integcr the example. nnmber+3 exprcssed a signed notation in negaiive numbers 2's-complemenl otherhand,the 8088 alwaysexpresses as Theretbe. 3 is coded 11lll10l, (FDLJ.

I'igure 2-9 (a) Siged byrei.teger (b) Signedword integer

36

softwareArchitectureof the 8088 and 8086 Mjcroprccessors chap. 2

qAMPLE 2.4
-{ ngned word integerequalsFEFFT6 W}at decimalnumberdoesit represent? .

Solution
E\pre-mg fie he(adecimal numbe'in binaryfonn gives = FEFFT6111111101111111l'? Sincethe most significantbit is 1, the numberis negativeand is in 2.s complemenr form. Convertingto its binary equivalentby subracting 1 ftom rhe leastsignificantbit andrhen complementing bits gives all = FEFFT6 - 0000000100000001'z

The 8088can also processdatalhat is codedas ,l ary-codeddecinal (BCD) num,"ru. Figure 2-10(a) lists the BCD valuesfor decimal numbers0 thmush 9. BCD data
BCO 1 2 3

00{x) 0001 0010 0011 0100 0101 0111 r000 100!

6 I 3

MSB

BCO Oigh

D, 1 BcDDisit (c) BcDDieiro FiguE 2-I0 (a)BCDnubers. (b)An Unpacked BCD digit. (c) PactedBCD digirs.

Sec.2.4

Data Types

37

can be storedin eithrunpacked packedform. For instance, unpacked or the BCD bvie in Fig 2. r0{brihowi lhara ,ingle BCD digir \ jroredin rhefour teasr significanr and bir:. the upperfoul bits are setro 0. Figure2-t0(c) showsa byte wirh pa"LeanCl atgitr. H-retwo BCD numbersare sroredin a byre. The upper four bits repiesentthe mostiig_ nificantdigjt of a rwo-digir BCD number.

EMMPLE 2.5
The packed BCD datastored byreaddress at 0100016 equal10010001r. Whatis the rwo_ digit decirnalnumber?

Solution
Wdting value the 10010001, sepamte digits as BCD gives
= 10010001, 100lBcD000lBcD = glro

Information expressed ASC (Ane can StandadCode Inlothlation in InterJbr . c/r.up?) alsobe direcrly can phcessed fie 80ggmicroprocessor. cbanin Fig. b) ihe z-rla) snoushownumbers. letters. control and characters coded AscI. For are in inslance, number is coded the 5 as = H r H o 0 1 1 0 1 0= 3 5 H 1, where denotes theAscll-coded H that number in hexadecimal As shown Fig. is form. in 2-ll(b), ASCIId6ta stored onecharactef Dvre. are as Der

EXAMPLE 2,6
Byreaddresses 0110016 through 0110416 contain ASCIIdata the 0tOOO001, Ol010Oll, 01000011. 01001001, 01001001, rnd rspecrively, dothedata Wha! stand for?

Solution
Usingthecharrin Fig. 2-11(a),the dataareconverted ASCII asfollowsl to (01100H): 01000001Asc! A : (01101H) 0101001l^scll s = : (01102H) 0100001lAscl c : (01103H) 01001001Ascr - I (01r04H)= 0100100lAsctr I =

3A

software Architecture the 8088 and 8096 Microprocessors Chao. of Z

1 0

0000
0001

N
2 3

0
DLE

s o N DCT
STX a c 2 ETX EOT 2 B

0011
0101 0t 10

s
T E

ENO

BEL

r 0oo
HT

E]VI SUB
ESC

1ol0

z
L

1101 1110 1111 E SI

GS

OEL

MSB

ASCII0 s r {b) Figue 2-11 (a) ASCI lable. (b) ASCII digir.

: 5 SEGMENT REGISTERS AND ..,iMORY SEGMENTATION

Eventhough 8088hasa lMbyre addrels the space, alt this memory activear one not is une. Actually. the lMbytes of memory are paririoned into 64Kbyte (65,536)segnents. { segment represenls independently an addressable of memoryconsisring 64K unit ot .onsecutrvebyte wide storagelocarions.Each segrnentis assigned l7ardddr,rrthar a identifies st:rtingpoint-rhal is, ih lowest its address byte-storage tocation.
Sec 2.c <,egmenr RFg\ er. <,ndVFmor) leg-err.r'on

t9

stack are Only four of these64Kbyte segments active at a tinet the codesegmenL of and ertu segmen' The segments memory that are active, as segmenL d1ta segment, showninFig.212,areidentifiedbythevaluesofadalressesheldinthe80S8'sfo rS and SS nal segment registers:CS (codesegment). (stacksegment), (dala segment), EJ that points to the (extra segment). containsa 16-bit baseaddress Each of theseregisters give a ma-\imum of byte of the segmentin memory Four segments lowest addressed for p tognn storuqe(code),64KBres 256Kbytesof activememory Of this, 64Kbytesare are fo{ a rtarl, and l28Kbytes arc for data storage. regktet wl' held in theseregistersarereferredto asthe carrcnt-segment The values locationin the cur,l$ for example,the valuein CS points to the fust word-widestoBge Codeis alwaysfelched from memory as words, not as bytes. rcnt code segment. of Figure 2 13 iluslJates the se?mentation memory In this diagram,the 64Kbyte are segments identified with letters suchas A, B. and C. The datasegment(DS) register containsthe value B. Therefofe,the second64Kbyte segmentof memory liom the top, in This is one of the segments which segment. labeledB, actsas ille curcnt data-storage by daaa that are to be pmcessed the miqocomputer are stored.For this rcason,this part

cs ss
DS

__r J-L-

Slack

8088/8086

Enra

00000H
of Figurc 2-12 Active segments memory

40

2 softwareArchitectureof the 8088 and 8oa6 Microprocessors ChaD.

-^-E1---* *l--}-r

"^'" "EF*- "Eh

-E H -E F Fl"
-n E -E
adjeent, Figure 2-13 ContiSuous. disjoirted, and overlappingsegnells. (Reprintedby permissionof Intel Corp., Copyright/hiel Corp. 1979)

L-

spacemusr containread/writestoragelocations of the midocomputer's memory address by dat can be accessed instructions as storage locations for sou.ce and destination of E operands. selectssegment as the code segmentlt is lhis segment memoryfrom CS qhich instuctions of ihe programare currently being fetched for execution.The stack labeled,s H for iegnlent (SS)registercontainsH, therebyselectingthe 64Kbvtesegment llr as a stack.Finally, the extra segment(ES) registeris loaded with value J such that .egmentJ of memory functionsas a second64Kblae datastonge segment. This meanstbal the programto registersare sedd be useraccessible. The segment rer can changetheir contentsthroughsoftware.Tberefore.for a programto gzrn access _ro anotherpart of memory one simply hasto changethe valueof the apFopriateregister .r rcgisters.For instance.a new data space,with up to l28Kbytes, is broughtin simply i'! changingthe valuesin DS and ES. it as to Thereis onereslrictionon tl alueassigned a segment a baseaddrcss: must ircreasingthe 16-bit v,lue in a segThis is because boundary. 6ide on a l6-blte address of by memoryaddress 16i examples the by r.rr register I actuallyincreases conesponding other thanthis restriction.segments ru.lidbaseaddresses 0000016, 000101 and00020i6. are 6, for disjointed,or ever overlapping; example'm adjacent, :a be sel up to be contiSuous. B whereas segments andC are overlappitrg' 2 13, segnents andB are contiguous, A FS.

RESERVED, I Z6 DEDICATED, MET,4ORY I'{D GENEML-USE

space be implenentedlbr the can rnl p3rt of the 8088miclocomputer'slMbl'te address have dedicated ctions utd sharld not locations howeve( someaddress r's access: f !E u-ed as generalmemory for storageof dataor instmclions of a progam. Let us now parts of memory. use,and general-use dedicated il\.t ar thesereserved,
:t 26 and Genfafuse Memory Dedicated,Reserved,

4l

rigue 2-14 Dedicateduse, eseredi and general-use memory (Repdntedby lermission of Intel Corp., Copyrightl el Corp.1979)

Figure 2-14 shows the ,'ererye4 dedicated-use,afi seneruI-useparts of the 8088/8086\ dddrff space. Norice rhat storage locationsliom address 0000016 0001316 to arededicated, thoseftom address and 0001416 0007Fr6 reserved. io are These128bytes of memory are usedfor siorageof pointersto inielrupt sgrviceroutines.The dedicared pait is usedto storethe pointersfor the 8088'sintemal intenupts and exceptions. the On oiher hand, the reservedlocations are savedto srorepointers rhat are used by the userdefined interruprs.As indicated earlier, a pointer is a rwo-word addresselemqnt and requires4 byies of memory.The word of this pointer at rhe higher address caled the is segment baseadahess the word ar rhe lower ad&essis rhe otrset.Therefore.rhis seu and tion of memorycontainsup ro 32 pointers. The part of the address spacelabeleddp?,? Fig. 2 11 is general- :e memoryr in ar:d is where dataor instructionsof the programare srored.Notice that ihe genefal usearea of memoryis the rangehom addresses lhroughFFFEFT6. 8016 At thehigh endof the nemory address space anorher is reserved pointerarea,tocated fromaddrcss FFFFCr6 through FFFFFT6. These memory four locations rese edforuse are widr tuture productsard shouldnor be used.Inrel Corporarion, original manufacturer rhe of the 8088,hasidentifiedthe 12 storage locationsfrom address FFFF0 throughFFFFB,., r6 as dedicatedfor functions such as storageof the hardwareresetjump instruction. For instance, addrcss FFFF0I6is $here the 8088/8086 beginsexecurion aJterreceivinga reser.

2.7 INSTRUCTION POINTER

The rcgisterthat we will considernext in the 8088'ssoftwa.re model shownin Fie. 2-2 is theinntu.t;un rhe rviatertlPr.LP\ rr*, lb oitsIn lelgrh,nd idenrjhe5 ocario; Lhe o, nextword of instfuctioncodeto be fetchedfrom rhecunentcodesegment memory.The of IP is similar to a progran counter: however,it containsaheoffset of the nexr word of instructioncodeinsteadofits actualaddress. This is because andCS are both 16 birs in tp length,but a 20-bit address needed access is to memory.Inremal to the 8088.the offset jn IP is conbined with the currenrvaiuein CS to generate address the insrrucrioncode. ihe of Therefore,the valueof the address the next codeaccess ofte, deDoted CS:I?_ for is as

42

softwareA/chitecturcof the 8088 and 8086 MicroDrocessors ChaD.2

During nom1aloperation,the 8088 fetchesinstructionsfiom the code sesmenr of memor). nore. rhemIn iL5 uclior qL,eue. e\ecuLe\ inst and Inemonealler theolh;r Eve^ rjnred $ord ol codei\ lelchedtrom memo,).rtre8088upddres lalue i" Ip.,.h r}le r;; it points to the firsr byte of the nexr sequenriat word of c;de_that is, Ip is incrememed by 2. Actilally, Lhe8088 preferches to four b],tesof insrruction code into up its intemal codequeueandholds them therewaiting for execution. A1teran instrucrionis readirom ihe outpurof the ins!.udion queue,it is decoded: if necessaq. operand. readrom eithefL}edfla.egn.n, or..rno.1 or i emalregisrers. are Next,the operationspeciliedin the instrucrionis performedon f]le operands thirasult and ls written back b either an intemal regisreror a srorage tocatiodin memory The 808g is now readyto execute nexi instructionin the codequeue. the fxecurin8an in,rrl,crior$ar toad"a neu ratui inro rhe CS regisler chatrges rhe active code segmenLrhus, any 64Kb],,resegmenrof memory can Ulsea to stire rne msruc[on code,

. 8 DATAREGISTERS
As Fig. 2-2 shows,the 8088 has fow generat_purpose data registers. During plogram irecution. they hold temporaryvaluesof frequently usedintermediate results. joftivare .an read..load,or modii, rheir conrents. Any of the general-purpose regisre$ can be data usdas rhe souce or destinationof an opemndduring an arithmeti; operarion such as {DD or a logic operarionsuch as AND. For instance,the valuesof tw; piecesof data, a and B. could be movedtron memory into separate dataregistersand operationssuch asaddition, subtraction, and muttiplicationperformedon them.The advaniage storing of iiese data in internal regisrersinsreadof memory during processing that they is can b! accessed much fasrer The four rcgisterc,known as the data rcgiste$, are shown in more detail in Fig. l-15(a). Notice lhat they are rcfenedto as theaccumulatorre|ister (A). the base regis;;r B),thecountregister ^\dtt)e datarcgister (C), (D).These names imply speciat firnJriors

t5
Word nultipl,, *ord divid.,

ax
BH
CHiCL

BI BX
DX

Byt. oulriplr, bytgdivjd.,byt. I/O, translate, al uirhmcric d.cj Byt. muhiply. byredivid.

ct DX DI

Word hujtiply,yo.d dirid.,

DH

Figum^2-15 oora.egr.LeF ,Repinredb) prmNjo) ^l _ra, Ceremt-purpo\e I n f , ( o r p . C o p ) r i g h . / t n r c o r p t a - o r , b , D e J i ; a r er e g i , L r r : m r o n . et d r < e o r e d b ) p e m r . o r o , I n l e tc o r p . . o o y r S h r / tr,e ta o r p n ( r ta-ol :?_ 28 Data Regisrers

43

these Figure 2 15O) summarizes they aremeantto perform for the 8088rnicropmcessor the use For slring andloop operations the C register. example, vatue Notice tbal operations. This is thereain in the C registeris the numberof bytesto be processed a stringoperation. use giventhe nane co&nr.e3drrerAnotherexampleof the dedicated of dataregissonit is registerAL or AX lbr dala. must useaccumulalor tersis drat all input/outputoperations a whole ( 16bits) fot word dalaopercan eitheras Eachof theseregisters be accessed An ationsor astwo 8-bit registersfor byte-widedataopemtions. X alter the registerletter is ol identifiesthe reference a registeras a word; for inslance,the l6-bit accumulator refBX, CX, andDX. erenced AX. Similady,the otherthreword registen arereferredto a-s as On the other hand, when referencingone of theseregisterson a byte wide basis, identifies the high byte following the registernamewith ihe letter H or L. respectively. and low byte. For the A register the most significantbyte is refered to as AH and the least significantbyte as AL: the otber byte-wide registerpairs are BH and BL, CH and CL, and DH and DL. When softwareplaces a new value in one byte of a register,lbr instanceAL. rhe vatue in the other byte (AH) doesnot change.This ability to process information in either byte location permits more efficient use of the limited register of rcsources the 8088 microprocessor Actually, someof the dataregistersmay also store addressinformanon such as a BX or baseaddress an input/outputaddress;forexample, could hold a 16-bitbaseaddress.

AND INDEXREGISTERS 2.9 POINTER

two/o,r?ter'l8 The softwarenodel in Fig. 2-2 hasfour othergenemlpurposeregisters: irte6 and two index resisters.They siore what are called olfiz dddrei.!?r.An offset of represents displacement a sioragelocation in meruoryhom ihe segment the address in register that is, it is usedas a pointero. index to selecta spebaseaddress a segment of ci{ic storage locatronwithin a 64Kbytesegment memory.Softwareusesthe valueheld datain memoryrelativeto the datasegmeft or extra segin an index registerto reference memorylocationsrelative to the siack segmert registet and a pointer registerto access ment register.Just as for the dataregisters,ihe valuesheld in theseregisterscan be read, This is doneprior to executingthe instructioDihat loaded,or nodilied ttuough softwaredata regisie|s,ihe references reglsterfor addressoffset. Unlike the general-pui?ose the in pointer andindex rcgistersare only accessed words.To usethe offset address a reg as istet the instruclion simply specifiesthe rcgister that containsthe v21ue. Figure216showsthatthetwopointerregistersarethestoxkpointer(SP)N poirter (BP). The valuesin SP and BP are d as offsets from the currenrvalue of SS of during the executior of instructionsthat involve lhe stacksegment memory andpermit access storage to locationsin the stackpart of memory.The valuein SP alwaysrcpeasy That is, combiningSP resentsthe offset of the next stacklocation that is lo be accessed. (SS:SP) resultsin an address pointsto the top ,/tftc rtdct (TOS). that with the valuein SS data an BP alsorepresenls offsetrelativeto theSS;howevetit is usedto access within mode To do this, it is employed the offsetin an addressing as the siacksegment memory of parametenthat ,?,ode. commonuseof BP is to reference One calledthe b6ed aAiressinq to by arepassed a subroutine way of the stack.ln ihis case,instructionsareincludedin the from the stack. to the that addressing access valuesof parameters subroutine usebased

44

Software Architectureof the 8088 and 8086 Microprocessors chap. 2

BP
SI

DI

D4tinarion indlr

Figur 116 Poinler and index regjs, re^. (Rcpdnred pemi$ion ofhrel by Corp.,Copyright/ tntelCorp.r979,

Tle indexregisren used holdoffsetaddresses insructions access are to for rhar data i-..d in thedatasegment memory of andareautomatically combined with the vatuein - DS or ES register duringaddress calculation. instrucrions involvethe rxrlaed In thal rJ;ressing, sauft:e the index(Sl) register holdsan offsraddress identifies toca_ rhat the r:. oi a source operand, thedertination and index(DI) register holdsan offsetfor a des:::!on operand, Earlierw poinledoul thal dny of the dataregisters be usdas th source can or .r..inarionof an operand ng an aritbmetic du operation suchasADD, or a locic oDera, r:o rucha. AND. However. someoperuuon.. operand i5 Lobe pruc;sed ma) tbr dn thar :e:trared in memory instead ofthe inlernal register thlscase, indexaddress used In an is i: :.i.nlify thelocdtion ofthe operand memory; example, in fol stringinstructions the use r:1r\ regtsters access to operands memory. andDI. fespeclively, thepointers in SI 4re to e .ou.ceanddestination locations memorv. in Theindxregisters alsobe source destination can or regis;rs in arithmetic logand r:a opralions. example, instructjon For an may add2 10the o1L\ct valuein Sl to incre_ rc.r iN valuelo pointto the nextword-wide storage location memory. in

E :' 'IATUS REGISTER

js ::e ,rdrrlr reSirle4 calledrhe also i6-bit rcsister fa1s rcgister, another withinthe8088. =.i-t :- l7 .ho$srheorgrnrauon oflh15 regi\rer morc in derajl. Iiorice ru,rnine that oi r. irl. are .mplemenled. oi lhesebir, repre.enr Sir r,arrAy'r(J: the .ttry fo| tCF,. :c-:, .flas GF), autiliary &ftr fas (AF). zen fas (ZF). sisnfaT (SF), nJ ove tfow fa| -1a The logic srat thesestatus oI flagsindioate conditlons that a.e produced th; as

t-l
Figure 2-U Slatusand controt iiags. (Reprintcd pemissioD InLel by of Corp., Copyright/Intel Cory.1979)

:e: 2 l0

Sraars Register

4S

resuli of executingan instruction-that is. after executingan instruction, such as ADD, specificflag bits are resel (logic 0) or ser(logic 1) basedon the result that is produced. the l,et us fifft summarize operationof theseflags: l. Thecarry fa| GF): CF is setif thereis a carry-ouror a bonow-in for the most sig' CF nificantbit of the resultduring theexecutionof aninstruction.Otherwise. is reset by ihe instruction has even 2. Thepaity fag (PF): PF is set il the result Foduced pariry-that is, if it containsan evennumberof bils at dre I logic level If pariry is odd.PF is reset. 3. TheauaiLia,Jca a frag (AF)r AF is set if thereis a cany-out from the low nibble iDto the high nibble or a bolrow-in ftom the high nibble into the iow nibble of dre AF lower byte in a l6-bit word. Otherwise, is resel. 4, Thezerofag (ZF): ZF is setif the resulrproducedbv an instructionis zero Otherwise.ZF is reset. 5. The sign ltag 6F): The MSB of the result is copiedinto SF Thus, SF is set if the resuh is a negativenumberor rcset jf it is positrve 6, The owdow fag (OF): When OF is set.it indicatesthat the signedresult is out of rcset range.If the result is not out of range,OF rernains instruction,rhe carry For example,at the completionof executionof a b)'te_additlon a flag (CF) could be setto indicatethat lhe sumof the operurdscaused carry out condition The auxiliary crry flag (AF) could also set due to the executionof the instruction This on depends whetheror not a carry-outoccunedfrom the leastsignificantnibbleto the most The sign flag (SD'is alsoaffected'and significantnibblewhenthe byte operardsareadded. of it reflectsthe logic 1evel the MSB of the result The oYerflowflag (OF) is serif thereis bii a carry-ourof the sign bit, but no carry into the si8:n (an indicationof overltow). The 8088 providesinstructionswlthin its instruclion sei ihat are able to nse these in flags to alter lhe sequence which the program is executedifor inslance. a jump to anothei palt of lhe programcould be conditionally initiated bv testing for ZF equal to pnp aa .cto i' logic.Thi. operarion ca\led flag The otherthreeimplemented bits-the diz.rion fraB (DF), ttje intempt enabte 'I'nesethrce flagsprovide contol funcad thetrapfias GFFarc untrol fags f"tLs 0F), tionsof the 8088asfollows: l. The trap fag (TF): If TF is set,the 8088 goesinto the rinSl r/ep ,rod? of operaan mode,it executes instruction and thenjumps to a tion. When in the single-step seflice routine that may deter rine the effect of executingthe instruction specjal This type of operationis very useful ror debugging Fograms Forrhe8088rorecogni/ena\\ablc,nrcr'uPt'c,|uc\t\atit' 2. Th?intetru!f"B tl at interrupl (INT) input, the IF flag must be set.When IF is reset,requests INT are interupi intedaceis disabled ignoredand the maskable The logic level of DF detemines the direction in which 3. The dircctinnfag @F)r srring operaiionswill occur When set, the slring instruction automaticallydecrementsthe address;therefore,the string data transfersFoced from high address to low address.On the other hand, resetting DF causesthe string addressto be to incremented thal is. daia transfersproceedfrom low address high ad&ess

46

Soft\rareArchitectureof the 8088 and 8086 [4icroprocessoG Chap. 2

The instruction set of the 8088 includeslnstruclionsfor saving,loading, or manipspecialinstuctions areprovidedto pemit usersoftwareto ulating the flags;for instance, of setor rcset CF,DF, aDdIF at anypoint in the program(e.g.,just pdor to the beginnin-q inffements). automatically a slring operation,DF is resetso that the string address

ADDRESS A 2,iI GENEMTING IV]EMORY

sysbaseand an offset descibe a logicaLaddlessin the 8088 microcomputer A segment baseand offset are 16-bit quantities,sinceall As Fig. 2-18 shows,both the segment tem. registersand memory locationsused in addresscalculationsare 16 bits long. However, of memory is 20 bils in length.The generation rhepbsical a&lrcss that is usedto access physicaladdress involvescombininga 16-bit offset valuethat is locatedin the instructhe iion pointet a baseregister,an index register,or a pointer registerand a 16-bit segment registers. basevaluethat is Iocatedin one of the segment valuedepends which type of memoryreferenceis tal_ on The sourceof ihe offset ing p1ace. can be the basepointer (BP) rcgisier, stackpointer (SP) register,base(BX) It regisrer,sourceindex (SI) register,destinationindex (DI) regjster,or instructionpoinrer (IP). An offset can evenbe fonned from the contentsof severalof theseregisren On the basevaluealwaysresidesin oneof the segnentregisten: CS,DS, oiherhand,the segment SS.or ES. For instance. when an instruciion acquisitiontsLesplace,ihe sourceof the segment (CS) register and tbe sourceof the offset value is basevalue is alwaysthe code segment

15

f@orrser

SEGMENT ADOEESS

a FigE 2-18 Generatine lhysical addres.(Repnnbd by pemissionof Intel Cory.,Copyrighl/Iltel Corp. 1981)

37

Address ceneratjng Memory a

47

alwaysthe instructionpointer (IP). This physicaladdrcss be denotedas CS:IP.On the can otherhand,il the valueof a variableis written to memorydurirg executior of an insirucbasevalue is specifiedby the data segnent (DS) registerand tion, typicaly the segment the offset value by the destinationindex (DI) register-that is. the physical addressis given as DS:DI. A provision c^lled the seqment-o)e//ide plerr is usedto changethe segfor ment ftom which ihe variableis accessed; example,a prefix could be usedto make a occm in which the segment drra access baseis in the ES rcgister. Another exampleis the stackad&essthat is neededwhenpushingparameters onto the srack.This physicaladdress lbrned fton dle valuesof the segment is basein the stack (SS)registerandoffsetin dre stackpointer(SP)rcgisterandis described SS:SP. sgment as Rememberthat the segmenibase addressreFesents the starting location of the in Figure2 19 64Kb''te segrnent menory-that is, the lowestaddress byte in the segment. showsthat the offset identifies dre distancein b)1esthat the storagelocation of interest rcsidesftoln dis startingaddress. Therefore,the lowest add.ess bl4e in a segment an has byte hasan offset of FFFFI6. offset of000016,and the highestaddrcss Figure 2-20 showshow a segmentbasevalue in a segment registerand an offset The registeris shifted valuearecombinedto form a physicaladdress. valuein the segment left by four bit positions,with its LSBSfilled with zeros.This givesa regnrt dddrrr the location where the segmentstarts.The offset value is then added.o the 16 LSBS of the sbifte.d segment value.The result of this addition is the 20-bit physicaladdress. TIIe examplein Fis. 2-20 rcpresents sesmetrt a basevalue of 123416 an offset and value of 002216. First, let us exFess the segment basevalue in binary folm. This gives 123416 0001001000110100,

Highgsr addressed byle 8088/8086

Bx-

DS:BX

Data

;c

lDSr0000H Lowstaddrssd byl

Figure 2-19

Boundariei of a sgnent. Chap. 2

48

Afchitecture of rhe 8088 and 8086 l',4icroprocessors Soih,fr'are

i t33i",i,
Figure 2-20 Physicaiaddress calcu rauon exam!ie. (Reprinred pemrs br $on oftntet Corp.. Copyngbrtnlel

Sbifting lefr four positionsand fiiling wirh zerosresuttsln rhe segment address 00010010001 = 101000000, 12340i6 The offser in binary form is : 002216 0000000000100010, \dditrg the segmenr address the offset gives and

0o010010001 101000000,00000000001000102 + = 00010010001101100010, - 1236216 : 12362H

11i. addrcss calcularionis doneautomaricallywithin the 8088microprocesso. eachtine : :.Fmory access initiared. is

axA IPLE2.7
*::,,equired {o mapto physicat address locarion 002c3r6 rhecon_ .I:,-:"-:lo correspo.ding _' if =:'j oi .he !" ". segment register 002A,"? are
-- nrT.t talue cdnbe oblajned .hrlriogrheconlerr\ot rhe b) segment registerlefr by '.'- Ffl po\ '^n\ andthensubLracring lhe phy,icaiaddre*. Shifting frum left gives 002A0,6 \:-- i{5racdng. we ger the valueof rhe offset: 002c3r6- 02A016 002316 = ,\.ruly, many dilTerentlogical addresses map rc me sameplysical address loca_ :.:!: - m.nory. Simply changingthe segment base*1"" i, Ar" ,.g-*t *gi"r", _; il
zi :. 1 Generating a Memory Addfess

49

corresponding offset doesthis. The diagramin Fig. 2-21 demonsrrares idea. Norice this that segment base002B16 with otrset 001316 mapsto physical address 002C3r6in memory. However if rhe segment baseis changedro 0O2Cr6 wirh a new offset of 000316, rhe physicaladdress stin 002C316. seerharrle physical address is We 002BH:0013His equal to the physicaladdress 002CH:0003H.

A 2, 12 THE SIACK
As indicaiedearlier,the rrac* is implenented in the memory of the 8088 micfoprocessor. and it is used for temporary storageof information such as dara or adajresses. For instance,when a call njfd.r'oa is execured, 8088 automaricallypusbesthe currenr rhe valuesin CS and IP onto the stack.Ar pan of rhe subrourirc,rhe contentsof oiher regis, ters may alsobe saved the stackby execuritrg otr p6ft insfucrrorr (e.g.,when the inst uction PUSH SI is executed, causes conGntsof SI to be pushedonto the stack).Near it the the end of the subroutine, pop i'Ltttucnonsarcircftded.o pop vatues{iom the stackback into then conesponding intemal registers(e-g.,POPSI causes value at the rop of the the stackto b poppedback into SI). At rheendof the subrouine, a retum instructio catfses the valuesof CS and IP to be poppedoff $e srackandput back into ihe intemal register where they ofiginaly resided.

i I

____l
Figurc 2-21 Reladonship betw@D logical dd phyrical addresses(Repriniedby pmisior of Imel Corp., Copldeht/Inrel Corp. t9?9)

50

Software Architecture of the 8088 and 80a6 Microprocessors

Chap. 2

The stackis 64Kbyteslong and is organizedfrom a softwarepoint of view as 32K words. Figure 2-22 showsthat the segmentbasevalue in the SS registerpoints to rhe lowest address word in the cunent stack.The contentsof rhe Sp and Bp registerofiser into the stacksegment memory. of Looking at Fig. 2 22, we seethat SP containsan offset vatueihar points ro a sroragelocation ir the cunent siack segmenr. The address obtaindfrom the contenrsof SS and SP (SSTSP) the physical adihessof the last stonge location in the stack ro which is datawere pushed.This memory address known as the top d the stoxk.At 6e ricrois computer'sstartup,the valuein SPis initialized to FFFq6. Conbining this valuewith the currentvaluein SSgivesthe highest-addressed word locarionin the srack(SS:FFFEHF l]:.atis.6e bottomof the stack. The 8088 can push data and addressinfomation onto rhe srackfrom its inremal registersor a storage locationin memory Datatransferred and{iom the srackare wordto wide, not byte-wide.Eachtime a word is to be pushedonrothe top of rhe stack,rhe value itr SP is first automaticallydecremented two, and then the contentsof the registerare by written into the stackpart of memory.Therefore,rhe srackgrows down in memory fiom the bottom of the stack,which conesponds the physicaladdress to SS:FFFEH, rowardthe end of the stack,which corresponGto the physical address obtainedfrom SS and offser fiXjor6(SS:0000H). When a value is poppedfiom the rop of rhe stack. the revene of this sequence occuls.The physicaladdress definedby SS andSP points ro the locarionof the last value pushedonto the stack.Its contentsare first poppedoff rhe stackand put inro ihe specific registerwithin the 8088; then SP is automaticallyindemented by two. The top of the nack then corresponds the address the previousvaluepushedonro ihe stack. to of

SS:FFFEH 4088/8046 T_ ^: --_l SS:SP

^-----SS:0000H

Figu.e 2-22

StacksegEentofmemory.

-*.

Z.l2

ihe stack

5l

^'trE-r
,l I

tF! | ;-e ) 23

Pnorto Figure L23 (r) SLacklust (Reprintod t)erms' bv operation. Dush ;ion oilnlel corp . CoPYright/lnrel Corp. 1979)(b) Stacl aftei executioD .r thePUSHAX instiuction (RepnnreLl |ermsr.n !f Jnrel b CorI1lqT{)J Corf. CuP)lrght/Iokl

of a registerarc pusnedonlo The examplein Fig 2 23(a) showshow the contents of the PUSHAX instruc*. sract. He,e we tind *re stateof the stackpriof to execurion As indicated.the bottomot tne registerconrains10516. iion. Norice tt at ttre stacl segment and c'ffseiFFFET6ThiF gjves the *.t .".id"'-"i*" ilt"rcaiaddress derivedfrom SS ABos'as stackaddrcss. bottom-of Anos:105014+FFFEro I t04t . from the beginningof ihe stack the the Fudhermore, stackpointct which rcpresenls offset the rherefore' cur eq ss to thetop of $e stack' als0008L6 -*;' ;;;;;;t;" "f Arcs' whichequals address is renrtop otitre srack at phvsical Aros=105016+000816 : r 05816

Addresseswithhighervaluesfiantha!ofthetopofthestack'105816'containv stick data Notice that the la'st Uo data.Thosewith lower addresses not yet containvalid BBAAT6 to valuepushed the stackin Fig-2 23(a).is rs whenthe PUSHAX instruct'on exe whathtppens iisure 2 23(b)demonstates of execution tr" number1234 Nolicethat L6 i"itiulv .*u.'.i"]. *" i"JiiJi "ontuln" be decremented two but doesnot aftbct by **"s lhe siackpoinier to *. *J i"u-".. is register Therefore'the next stackaccess to the loca,egrnent tr," i""-"rts pushed "r:,r'. "i*t t0se,6 rnis tocationis where the valuein Ax is ," .,i"i ii""-."".'o""ii"g in nemory "uorJss now rcsides *" -i" 'ie"ificant bvre of Ax which equals I 216' N"i;i" is bvte ofAX' which is 34r'J' held in memorv significant and th; least ,aJ..' iosi ", 10s6,6. address 52 2 or Architecture the 8088 'nd 8086 Microprocessors Chap software

Figure 2-24(b) showswhat happenswhen thelnsmction; pop AX and pop Bx are executed that order Executionof the first instrucrioncauses in dre 80g8 to read the yaluefrom rhe top of the stackandput ir into theAX ..gir,", * f Z:+,". r.l"rr, Sp i, ln"*menred gi\e0008 6 anddnolber ro readoperar;on in;riarea i\ rromLteyact. fn. reao con^espond,lhe pop BX in5rucrioo. ir causes !alueBB{A-6 "efoni lo and rhe ro be loaded tnto the BX regisrer. is incremented Sp oncemoreandlr"* eqr"ts 00OA,r.ih";f;;; new rop of stackis at address105A,.. In Fig.2-24rbrwe.ee rhartre latues rerdour ot addre.ses lO5o,.and 1058," Rmainat rhese tocalions, osy, 1s";6.u, locdlionc aredbove iq;""il. bur rhal !h. ;;i: derefore, they no longer representvatid stackdara.tf new infonnation is^pusteaioG siack.thesevaiuesare written over,

ff"T il.ch r pushed. .p.,"i,""--r" I:r g .l..l:cl:'.. L n e ( l aIc k i ' c!he] nere e i a r hFigr,.:_z+it,ioa|* d*,. e r o o u r p r i o i p t S H r l-14t,) boq rob e,tleLlarre.utre ou '' .q,n. 0006,". equal, ss t0s fie lddre$ar,hei,p or,r,..".r llTlli:].h" andthe ". equals_ru)6rb- l" wordat the lop ol Ue suck equaL l2J4r6.

.kt

us next look ar an examplein which srackdataare poppedIiom

the stackback

axfi-fi]..--.
exl-iT3.l-1
1062

s'f;T;l-r -ii
r062
?060 l05E

i
I I I I I I

00

r060 i 0 5 c 66 105A a8 105l

99

106C

12
89

AB

c0

Figure2-X .., Srd.t iJstpnor!o popopetulion. IReDrinred pemi$ion or b) InrelCorp-Coplriehutnr, Corp tets;ft)Srskafte, rheercu;i;norlllepop

m,?'.ffi"3i
:E 2 t2 fte Stack

^*"*^

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l:qol Figure 2-2s Ioaodre"""pee

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Any numberof stacksmay exist in an 8088 nicrocomputer.Simply changingthe value in the SS registerbrings in a new stack. For instance,executingthe instruction manystacks exist,only MOV SS,DX loadsa newvaluefiom DX into SS.Although can one can be activeat a time.

A 2.I3 INPUT/OUTPUT ADDRESS SPACE

The 8088 has separate memory and inpuroutput (UO) ad&essspaces. The 1/o adl"Jj it the place where I/O interfaces,such as pdnter and nonitor ports, are implerydce mentd. Figure 2-25 shows a map of dle 8088's I/O ad&ess space.Notice that ihis just 64Kbyte addresses; address range is from 000016 FFFFI6.This represents to therefore, unlike memory,I/O addresses only 16 bits long. Eachof theseaddresses are corresponds one byte wide I/O port. to The part of the map from address 000016 through 00FFr6is referredto aspdSe0. Ce.tain of the 8088's I/O instructioDscan perform only input or outpul data-tansfer operations l/O deviceslocatedin this part of rhe I/O ad&essspace. to Other I/O instructions caninput or outpul datafor deviceslocatedanywherein the I/O address I/O space. data transfers can be byte-wide or $,ord wide. Notice that the eight locations from address 00F816 through00FFr6are specifiedasreservedby lntel Corporationand should

REVIEW ROBLEMS P Section 2.I

1. 2. 3. 4, 5. Namethe two intemal Focessingunits of the 8088. Wlich processing unit of the 8088 is the interfaceto the outsideworld? wllat arc ihe length of the 8086'saddress and databus? bus How large is the instructionqueueof the 8088?The 8086? List the elements the executionunit. of

2.2 Section
6, Wlat is the pur?oseof a softwaremodel for a microprocessor? 7. Wllat must an assembly-language Fograr ner know aboui the rcgisren within the 8088miffoprocessor?

54

SoftwarcArchitecture the 8088 and 4086 MicroDfocessors Chao. 2 of

8. How rnanyregistersare locatedwidrin the 8088? 9. How largeis the 8088's memory address space? 10. How largeis the 8086's address I/O space?

Section 2.3
11. What is the highestaddress rhe 8088'smemoryaddress in space? lowesraddress? The D. fs memoryin the 8088 microprocessor organizedasbyts,words. or doublewords? 13, The contenls memory of locarion 8000016 FFr6,andrhosear 8000116 0016. are are wllat is .he dataword storeda1address 8000016? the word ali$ed or misaligned? Is 11. Wlat is the value ol the doubleword sroredin nemory starting at address 8000316 if the contents mernory of ioca.ions B0003r5, 8000416, 80005 6, and 8000616 are 1116, 2216, 3316, 4416, and respectively? thisan exampie an aligned Is of double lvord or a misaligneddoubleword? 15. Showhow thewordABCD16 srored memory is in starring address at 0A00216. the Is wordaligned misaljgned'i or 16. Showhow the doubleword 123,1567816sroredin memorystarring address is at A00l16. thedoublewordaligned misaligned? Is or i:ction 2.4 :-. Lisi fivedatatypesFocessed directlyby rhe 8088. :( E\press each of the signed decimal integersthat fo1low as eirher a blre- or word le\adecimal number(use2\-complemenrnotationfor negativenurnbers). ,at + 121 ,br 10 'c) -128 'dr +500 :r. io\. would the integerin problem18(d)be sioredin memorystarring address ar \r:llor6? L :rn soutd the decimal number 1000 expressed processing the 8088? be for by ::, :!:rejs the decimalnurnbers that follow as unpacked packedBCD bytes. and a, t9 b. !s : i-; liould the BCD numberin problen 21(a)be sroredin memorysrarring al (Assune that the leasi significant .i-..-, 0800016? digir is storeda1 rhe lower = :-::i srarement coded is inASClI by thefollowingbinarysrrings? t00l1l0 1000101 1011000 1010100 0100000 i00t001

t5

24. How would the decirnalnumber1234be codedin ASCII andstoredin memorystart_ (Assumethat the leastsignificantdigit is storcdat the lower 0C00016? ing at address memorylocation.) addressed

2.5 Section
in How large is a memorysegment the 8088 midoprocessor? W}ich of the 8088'sintemal registe$ are usedfor memory segmentation? in Whar registerdefinesthe beginningof the cunent code segment memory? Wtat is the ma-dmumamountof memory that can be active at a given trme in the 8088 microprocessor? data 29. How much of the 8088'sactivememoryis availableas general-purpose storage 25. 26. 27. 28.

2.6 Section
30. Wlut is the dedicateduse of the part of the 8088's addressspacefton 0000016 though 0007F16? part space? rangeof the general-use of the memory adahess 31. What is the address space be usedto siore the instruciions can Which part of the 8088'smemory address 32. of a Plogram? F!FF0r6? 33. what is storedat address

2.7 Section
34. What is the function of the instructionpointer register? 35. Providean ovefliew of the fetch and the executionof an instructionby the 8088. to 36. What happens the value in IP eachtime the 8088 completesan insruction fetch?

2.8 Section
data 37. Make a list of the general-pur?ose registersof the 8088. labeled: Ho\ ie $e word valueof a dataresister Al8. - dnoledl of andlowerbyres a dalaregister 39. Hou ire the upper assigned the CX register. to operations 40. Nametwo dedicated

2.9 Section
Wlat kind of inforrnationis sloredin the pointer and index registers? Nameihe two pointerregisters. of registerare the contents the pointerregisten usedas an offset? For which segment registerare the contentsof fhe index registen usedas an offset? For which segment what do Sl andDI standfor? 45, 46. Wlat is the differencebetweenSI and Dl? 41. 42. 43. ,l4.

S e c t i o2 . 1 0 n
eachflag bit of the 8088 aseither a contol flag or a flag that monitorsthe 47. Categorize statusdue to executionof an insiluctlon. 48. Describethe function of eachstatusflag.

s6

Architecture the 8088 and 8086 Microprocessors chap. Z of Software

49. How doessoftwareuse a statusflag? 50. W}lat doesTF standfor? 51. Which flag determines whetherthe adairess a srring operationis incremented for or 52. Can the stateof the flags be modified rhroughso{tware?

Section I I 2.
53, Whatis the wordlengthofthe 8088's physical address? 54. Wlat rwo adalrcss elements combinedio form a physicatadahess? are 55. Calculatethe value of eachof the physicataddresses fo ows. Assumealt num, thar bersare hexadecimal numbe$. (a) 1000:i234 (b) 01oo:ABCD (c) A200|12CF (d) B2C0:FAI2 56. Find the unknown value for each of the following physical addresses. Assume all numbersare hexadecimal numben. (a) A000:?: A0123 (b) ?:r4DA = 23sDA (c) D765:?= DABCo (d) ?tCD2l : 32D21 5t. If ihe current values in the code segmentregister and rhe instrucrion pointer are 0200i6and0lAC16.respectively, wharphysicalad&essis usedin the next instrucrion fetch? 3 A datasegmenr ro be locatedftom address is A000016 AFFFFT6. to Wh;i vatuemust b loadedinto DS? 3). If the datasegment registercontainsthe valuefound in problem 58, what valuemust be toadedinto DI if it is to point ro a destinarion operand storedin memoryat address r.12346'l

Section I 2 2.
aa- What is the function oi the stack? aL lf the curent vatuesin the stack segmenr registerand srackpointer are C000r6and FF00r6,respectively, what is the address the currenttoDof the srack? of C1 For the baseand offser addresses p.oblem 61, how many words of data are cur, in Eotly held in the s.ack? af. Show how the value EEl I r6 ftom registerAX would be pushedonto the rop of rhe sack as it exists Foblem 61. in

Section2.13
al kr fte 8088 microprocessorare the inpu/ourput and memory addrcssspaces com, ffi or sepamte? G- Haa lnge is the 8088'syO address space? E tE n3meis given ro rhepan of ihe I/O add.ess 5, space ftom 000016 tbrough00IrF16?

57