Wav File Playback System

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wav FILE PLAYBACK SYSTEM
1.1 Digital audio player

A digital audio player, or DAP, is a consumer electronic device that has the primary function of storing, organizing and playing audio files. Some DAPs are also referred to as portable media players as they have image-viewing and/or video-playing support.
1.2 History
The immediate predecessor in the market place of the digital audio player was the portable CD player, or "portable audio device." Kane Kramer designed one of the earliest digital audio players, which he called the IXI. His 1979 prototype was capable of approximately 3.5 minutes of audio playback but it did not enter commercial production. Apple Inc. hired Kramer as a consultant and presented his work as an example of prior art in the field of digital audio players during their litigation with Burst.com almost two decades later. The world's first company to announce a portable MP3 player and the attendant system for uploading MP3 audio content to a personal computer and then downloading it onto a personal MP3 player was Audio Highway. One of the chips making it possible to create portable MP3 players before the market for mass produced devices took off was the Micronas MAS3507D ASIC MP3 Decoder chip. Several electronics DIY projects used this circuit. As software based approach would have limited battery time severely. This chip allowed the microcontroller to read data from a flash memory and feed the decoder chip, creating a low power solution. In 1998, Compaq developed the first hard drive based DAP using a 2.5" laptop drive. It was licensed to HanGo Electronics (now known as Remote Solution), which first sold the PJB100 (Personal Jukebox) in 1999. The player had an initial capacity of 4.8 GB, with an advertised capacity of 1200 songs. In 2000, Creative released the 6GB hard drive based Creative NOMAD Jukebox. The name borrowed the jukebox metaphor popularized by Remote Solution and also used by Archos. Later players in the Creative NOMAD range used micro drives rather than laptop drives. In October 2001, Apple Computer (now known as Apple Inc.) unveiled the first generation iPod, a 5 GB hard drive based DAP with a 1.8" Toshiba hard drive. In July 2002,
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.wav FILE PLAYBACK SYSTEM
Apple introduced the second generation update to the iPod. It was compatible with Windows computers through Musicmatch Jukebox. The iPod series, which grew to include flash memory-based players, has become the market leader in DAPs. In 2002, Archos released the first "portable media player" (PMP), the Archos Jukebox Multimedia. Manufacturers have since implemented abilities to view images and play videos into their devices.
1.3 Operation
Digital sampling is used to convert an audio wave to a sequence of binary numbers that can be stored in a digital format, such as MP3. Common features of all MP3 players are a memory storage device, such as flash memory or a miniature hard disk drive, an embedded processor, and an audio codec microchip to convert the compressed file into an analogue sound signal. Most DAPs are powered by rechargeable batteries, some of which are not userreplaceable. They have a 3.5 mm stereo jack; music can be listened to with earbuds or headphones, or played via an external amplifier. Some devices also contain internal speakers, through which music can be listened to, although these built-in speakers are typically of very low quality. Nearly all DAPs consists of some kind of display screen, although there are exceptions, such as the iPod Shuffle, and a set of controls with which the user can browse through the library of music contained in the device, select a track, and play it back. The display, if the unit even has one, can be anything from a simple one or two line monochrome LCD display, similar to what are found on typical calculators, to large full-colour displays capable of displaying photographs or viewing video content on. The controls can range anywhere from the simple buttons as are found on most typical CD players, such as for skipping through tracks or stopping/starting playback to full touch-screen controls, such as that found on the iPod Touch or the Zune HD. One of the more common methods of control is some type of the scroll wheel with associated buttons. This method of control was first introduced with the Apple iPod and many other manufacturers have created variants of this control scheme for their respective devices. Content is placed on DAPs typically through a process called "syncing", by connecting the device to a personal computer, typically via USB, and running any special software that is often provided with the DAP on an enclosed CD-ROM, or downloaded from the manufacturer's
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website. Some devices simply appear as an additional disk drive on the host computer, to which music files are simply copied like any other type of file. Other devices, most notably the Apple iPod or Microsoft Zune, require the use of special management software, such as iTunes or Zune Software. The music, or other content such as TV episodes or movies, is added to the software to create a "library". The library is then "synced" to the DAP via the software. The software typically provides options for managing situations when the library is too large to fit on the device being synced to. Such options include allowing manual syncing, in that the user most manually "drag-n-drop" the desired tracks to the device, or allow for the creation of play lists. Some of the more advanced units are now starting to allow syncing through a wireless connection, such as via WiFi or Bluetooth.
1.4 Types
Digital audio players are generally categorized by storage media: 1. Flash-based Players: These are non-mechanical solid state devices that hold digital audio files on internal flash memory or removable flash media called memory cards. Due to technological advancements in flash memory, these originally low-storage devices are now available commercially ranging up to 64 GB. Because they are solid state and do not have moving parts they require less battery power and may be more resilient to hazards such as dropping or fragmentation than hard disk-based players. Basic MP3 player functions are commonly integrated into USB flash drives. 2. Hard drive-based Players or Digital Jukeboxes: Devices that read digital audio files from a hard disk drive (HDD). These players have higher capacities currently ranging up to 250 GB. At typical encoding rates, this means that tens of thousands of songs can be stored on one player. 3. MP3 CD Players: Portable CD players that can decode and play MP3 audio files stored on CDs. 4. Networked audio players: Players that connect via (WiFi) network to receive and play audio.
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2.1 ARM CORES Following are the different types of ARM CORE PROCESSORS that are used for various applications. ARM Cortex Application Processors Cortex-A Series - High performance processors for open Operating Systems. ARM Cortex Embedded Processors Cortex-R Series - Exceptional performance for real-time applications. Cortex-M Series - Cost-sensitive solutions for deterministic microcontroller applications. Classic ARM Processors ARM11 Series- Performance processors based on the ARMv6 architecture. ARM9 Series- Popular processors based on the ARMv5 architecture. ARM7 Series- Classic processors for general purpose applications. ARM Specialist Processors SecurCore - Processors for high security applications FPGA Cores - Processors for FPGA We chose Cortex-M series because these processors have been developed primarily for the microcontroller domain where the need for fast, highly deterministic, interrupt management is coupled with the desire for extremely low gate count and lowest possible power consumption. The STM32F103VET6 board uses the ARM CORTEX-M3 as the core processor. [1], [2] 2.2 AUDIO FORMATS These are the audio formats that are used in various popular media players.
MP3- MPEG Layer-3 format is the most popular format for downloading and storing music. By eliminating portions of the audio file that are essentially inaudible, mp3 files
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are compressed to roughly one-tenth the size of an equivalent PCM file while maintaining good audio quality.

WAV- Commonly used for storing uncompressed (PCM), CD-quality sound files MP4- MPEG-4 audio most often AAC but sometimes MP2/MP3, MPEG-4 SLS, CELP, HVXC and other audio object types defined in MPEG-4 Audio
FLAC- A lossless compression codec. WMA- The popular Windows Media Audio format owned by Microsoft. Designed with Digital Rights Management (DRM) abilities for copy protection. We chose WAV format because WAV format has more to do with its familiarity, its
simplicity and simple structure, which is heavily based on the RIFF file format. [7], [8] 2.3 METHODOLOGICAL APPROACH We made a study of various methods to present our report and we chose this method which suits best to our idea. [14] Requirement Analysis Requirements o System Requirements Design o High Level Design (HLD) o Low Level Design (LLD) Coding Testing o Module Testing o Integration Testing
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Hardware Requirements Software Requirements
o System Testing
2.4 PLATFORMS Many semiconductor companies manufacture ARM CORTEX-M3 based evaluation and application development platforms. Here are a few examples: Hardware TIs STELLARIS AURDINOs XDUINO STMs STM32 PRIMER2
We chose STMs PRIMER2 as it was economical, portable and compact compared to other hardware. Software We made a study of various operating systems to understand their goals and their scheduler algorithms which helps us in making our application portable and generic. Operating system -Free RTOS -VXworks -EMBos
-Windows CE -PHARLAP -Circle OS
IDE (Integrated Development Environment) -IAR -RIDE 7 -STELLARIS WARE -XDUINO
We chose Circle OS as our RTOS and RIDE 7 as our IDE, both of these come as freeware with the PRIMER2 .Also the small footprint of CircleOS allows you to keep up to 104 KB for the applications. The list of the available applications is stored in a table at the top of the memory used by CircleOS. Each application is run by CircleOS when selected, has the full
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availability of the CPU and can use the entire RAM which is not used by CircleOS. It will be scheduled by the CircleOS with full privileges on the device, until it explicitly quits. [4], [15] .2.5 OTHER STATISTICS AND GRAPHS The following comparison, statistics and graphs helps in defending our choices made in all the fields. [4], [9] ARM Processor family
Fig2.1.ARM Processor family Features of ARM7TDMI-S vs. CORTEX-M3
Table 2.1.Features of ARM7TDMI-S vs. CORTEX-M3 Performance of ARM7TDMI-S vs. CORTEX-M3
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Fig2.2.Relative Performance of ARM7TDMI-S vs. CORTEX-M3
Fig2.3.Relative Code size of ARM7TDMI-S vs. CORTEX-M3
Performance compared to other family of processors
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Fig2.4. Performance compared to other family of processors
3.1
REQUIREMENT ANALYSIS
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USE CASE is a description of a systems behavior as it responds to a request that originates from outside of that system. In other words, a use case describes "who" can do "what" with the system in question. The use case technique is used to capture a system's behavioral requirements by detailing scenario-driven threads through the functional requirements.
.WAV FILE
SELECTION
VOLUME CONTROL
PLAY CONTROL
OUTPUT
DISPLAY
DISPLAY OF FILES
UP
DOWN
MUTE
PLAY
STOP
QUIT
POWER OFF
SPEAKER
Fig3.1. Use-Case analysis of Requirements
3.2
System requirements specification (SRS)
SRS is a structured collection of information that embodies the requirements of a system. A .wav player with the following specifications: .wav files are stored on a micro sd card. The application should select from a list of files on the card and play the valid .wav files. Upon selection and while playing the .wav files the screen should display options to play, stop, quit and power off. These options on screen should act as input elements i.e. they should be enabled through touch.
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The application should display options to increase or decrease volume.

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The application should display the name of the file being played.
1. On switching the device on the following screen shall appear. (Fig 3.2) 2. Upon pressing the centre button of the joystick the device shall display a menu containing all the applications on the device. (Fig 3.3) The .wav player application shall appear as wmp on the menu. 3. On selecting the wmp application through touch or joystick, a menu shall appear displaying sd card and quit. If the sd card is not inserted it shall display a message as sd card not inserted. (Fig 3.4) 4. Upon selection ofsd card option through or joystick, a screen shall appear displaying the list of files on the sd card. The screen shall display a list of 5 files at a time. The touch screen or the centre button of joystick can be used to select a file. If the quit option is selected the control shall go back to the previous menu. (Fig 3.5) 5. Upon selecting a valid .wav file from the list through or joystick, the screen shall display the format as shown in figure 1.5.If the selected file is invalid then an error message shall appear as invalid file. (Fig 3.6)
Fig3.2. Start Up Screen.
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Fig3.3. Menu Screen.
Fig3.4. SD Check Screen.
Fig3.5. Explorer Screen.
Fig3.6. Run Screen.
3.2 User Controls

Sub ID Com.1 Com.2 Screen element Mute icon Volume increase icon
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Input/output Input Input
Action on single touch Shall mute the volume. Shall increase the volume by a certain fixed db .Upon multiple touches can go to a maximum
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predetermined value. Com.3 Volume decrease icon Input Shall decrease the volume by a certain fixed db .Upon multiple touches can mute the volume. Com.4 Configuration icon Com.5 Play icon Input Shall issue a RUN command and it plays the selected file and the name of the file being played shall be displayed. Com.6 Stop icon Input Shall issue a STOP command which stops the playback of the current running file and goes to idle mode with the same screen status. Com.7 Quit icon Input Shall issue an EXIT command which brings the control out of the application and device goes back to exploring state. Com.8 Shut Down icon Input Shall stop playing the file and shall display the initial Start Up Idle screen. Com.9 Running text/Still text Table3.1. User controls. Output Input Opens the configuration menu.
4.1
BLOCK DIAGRAM
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The figure above shows the architecture of the STM32-Primer2,equipped with an STM32F103VET6, one of the new ST, Cortex-based, 32-bit microcontrollers. The main characteristics of this system are:
ARM 32-bit Cortex-M3 CPU, 72 MHz, 90 DMips with 1.25 DMips/MHz, 512KB of Flash program memory, 64KB SRAM.
Fig4.1. Block Diagram of the System

Embedded communication peripherals: SPI, I2C, I2S. A touch-screen LCD color display (24-bits color, 128x160 pixels),
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2 USB connectors: o One marked "Debug" to connect to a PC running Ride for application development,
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One marked "STM32" that allows the embedded application to communicate with external host.
One 4-directions joystick with push button, 4 menu buttons, An on-board microphone and a loudspeaker providing sound recording and playback capabilities, A headphone connector, One accelerometer (MEMS) that captures the 3D-position information related to the STM32-Primer2, and which is used to navigate through the menus, and to move the Pointer.
One extra connector is linked to some unused I/O pins of the STM32 in order to add Extra peripherals.
4.2
Power supply
The STM32-Primer2 features a 400mAh Li-Ion rechargeable battery, equipped with a
voltage regulator along with a battery charger. When one of the USB connectors is linked to a PC host, voltage supplied by the PC is used to recharge the battery. When no USB host is connected, the battery is used to supply the power for the STM32-Primer2. When the battery is fully charged, the STM32-Primer2 can be used for about 6 hours. The duration of the batteries depends on the Primer2 activity. For instance, it can be extended -or reduced- by changing the setting of the backlight intensity (see the menu Settings) and the CPU frequency.
4.3
3D MEMS accelerometer
The STM32-Primer2 is equipped with a MEMS inertial sensor (LIS3LV02DL from
STMicroelectronics). This device is used by the STM32-Primer2 as a human interface device to select commands, in coordination with a graphic pointer. When you start the STM32Primer2 for the first time, you will see a small ball moving according to the orientation of the STM32-Primer2 circuit. The information about the 3D position is provided by the MEMS.
4.4
ARM CORE: ARM Architecture M profile

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The ARM architecture has evolved through several major revisions to a point where it supports implementations across a wide spectrum of performance points, with over a billion parts per annum being produced. The latest version (ARMv7) has seen the diversity formally recognized in a set of architecture profiles, the profiles used to tailor the architecture to different market requirements. A key factor is that the application level is consistent across all profiles, and the bulk of the variation is at the system level. The introduction of Thumb-2 technology provided a balance to the ARM and Thumb instruction sets, and the opportunity for the ARM architecture to be extended into new markets, in particular the microcontroller marketplace. To take maximum advantage of this opportunity a Thumb-only profile with a new programmers model (a system level consideration) has been introduced as a unique profile, complementing ARMs strengths in the high performance and real-time embedded markets. Key criteria for ARMv7-M implementations are as follows: Enable implementations with industry leading power, performance and area constraints
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Opportunities for simple pipeline designs offering leading edge system performance levels in a broad range of markets and applications
Highly deterministic operation o Single/low cycle execution o Minimal interrupt latency (short pipelines)
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Cache less operation
Excellent C/C++ target aligns with ARMs programming standards in this area o Exception handlers are standard C/C++ functions, entered using standard calling conventions
Designed for deeply embedded systems

o
Low pin count devices
o Enable new entry level opportunities for the ARM architecture
Debug and software profiling support for event driven systems.
4.5
SYSTEM ARCHITECTURE
In low-, medium- and high-density devices, the main system consists of: Four masters:
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Cortex-M3 core DCode bus (D-bus) and System bus (S-bus) GP-DMA1 & 2 (general-purpose DMA) Internal SRAM Internal Flash memory FSMC AHB to APBx (APB1 or APB2), which connect all the APB peripherals
Four slaves:
These are interconnected using a multilayer AHB bus architecture as shown in below architecture.
Fig4.2.System architecture ICode bus This bus connects the Instruction bus of the Cortex-M3 core to the Flash memory instruction interface. Prefetching is performed on this bus.
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DCode bus This bus connects the DCode bus (literal load and debug access) of the Cortex-M3 core to the Flash memory Data interface. System bus This bus connects the system bus of the Cortex-M3 core (peripherals bus) to a BusMatrix which manages the arbitration between the core and the DMA. DMA bus This bus connects the AHB master interface of the DMA to the BusMatrix which manages the access of CPU DCode and DMA to SRAM, Flash memory and peripherals. BusMatrix The BusMatrix manages the access arbitration between the core system bus and the DMA master bus. The arbitration uses a Round Robin algorithm. In connectivity line devices, the Bus Matrix is composed of five masters -CPU DCode, System bus, Ethernet DMA, DMA1 and DMA2 bus, and three slaves -FLITF, SRAM and AHB2APB bridges. In other devices, the Bus Matrix is composed of four masters -CPU DCode, System bus, DMA1 bus and DMA2 bus, and four slaves -FLITF, SRAM, FSMC and AHB2APB bridges. AHB peripherals are connected on system bus through a BusMatrix to allow DMA access. AHB/APB bridges (APB) The two AHB/APB bridges provide full synchronous connections between the AHB and the 2 APB buses. APB1 is limited to 36 MHz, APB2 operates at full speed (up to 72 MHz depending on the device). After each device reset, all peripheral clocks are disabled (except for the SRAM and FLITF). Before using a peripheral you have to enable its clock in the RCC_AHBENR, RCC_APB2ENR or RCC_APB1ENR register.
4.6
Memory organization:
Program memory, data memory, registers and I/O ports are organized within the same linear 4-Gbyte address space.
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The bytes are coded in memory in Little Endian format. The lowest numbered byte in a word is considered the words least significant byte and the highest numbered byte the most significant.
For the detailed mapping of peripheral registers, please refer to the related chapters. The addressable memory space is divided into 8 main blocks, each of 512 MB. All the memory areas that are not allocated to on-chip memories and peripherals are considered Reserved). Refer to the Memory map figure in the corresponding product datasheet.
4.7
POWER SUPPLY OVERVIEW

The device requires a 2.0-to-3.6 V operating voltage supply (VDD). An embedded regulator is used to supply the internal 1.8 V digital power. The real-time clock (RTC) and backup registers can be powered from the VBAT voltage when the main VDD supply is powered off.
Fig4.3. POWER SUPPLY BLOCK
4.8
SPI BLOCK DIAGRAM
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Fig4.4. SPI Interface Block Diagram Usually, the SPI is connected to external devices through 4 pins: MISO: Master In / Slave Out data. This pin can be used to transmit data in slave mode and receive data in master mode. MOSI: Master Out / Slave In data. This pin can be used to transmit data in master mode and receive data in slave mode. SCK: Serial Clock output for SPI masters and input for SPI slaves. NSS: Slave select. This is an optional pin to select a slave device. This pin acts as a chip select to let the SPI master communicate with slaves individually and to avoid contention on the data lines. Slave NSS inputs can be driven by standard I/O ports on the master device. The NSS pin may also be used as an output if enabled (SSOE bit) and driven low if the SPI is in master configuration. In this manner, all NSS pins from devices connected to the Master NSS pin see a low level and become slaves when they are configured in NSS hardware mode. When configured in master mode with NSS configured as an input (MSTR=1 and SSOE=0) and if NSS is pulled low, the SPI enters the master mode fault state: the MSTR bit is automatically cleared and the device is configured in slave mode.
4.8.1 SINGLE MASTER/SINGLE SLAVE APPLICATION

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Fig4.5. Single Master/Slave Application Block Diagram The MOSI pins are connected together and the MISO pins are connected together. In this way data is transferred serially between master and slave (most significant bit first). The communication is always initiated by the master. When the master device transmits data to a slave device via the MOSI pin, the slave device responds via the MISO pin. This implies fullduplex communication with both data out and data in synchronized with the same clock signal (which is provided by the master device via the SCK pin).
4.8.2 Slave select (NSS) pin management

There are two NSS modes: Software NSS mode: this mode is enabled by setting the SSM bit in the SPI_CR1 register. In this mode, the external NSS pin is free for other application uses and the internal NSS signal level is driven by writing to the SSI bit in the SPI_CR1 register. Hardware NSS mode: there are two cases:
o
NSS output is enabled: when the STM32F10xxx is operating as a Master and the NSS output is enabled through the SSOE bit in the SPI_CR2 register, the NSS pin is driven low and all the NSS pins of devices connected to the Master NSS pin see a low level and become slaves when they are configured in NSS hardware mode When an SPI wants to broadcast a message, it has to pull NSS low to inform all others that there is now a master for the bus. If it fails to pull NSS low, this means that there is another master communicating, and a Hard Fault error occurs.
o NSS output is disabled: the multimaster capability is allowed.

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4.8.3 Configuring the SPI in master mode

In the master configuration, the serial clock is generated on the SCK pin.
Procedure

Select the BR[2:0] bits to define the serial clock baud rate. Select the CPOL and CPHA bits to define one of the four relationships between Set the DFF bit to define 8- or 16-bit data frame format Configure the LSBFIRST bit in the SPI_CR1 register to define the frame format If the NSS pin is required in input mode, in hardware mode, connect the NSS
the data transfer and the serial clock.
pin to a high- level signal during the complete byte transmit sequence. In NSS software mode, set the

SSM and SSI bits in the SPI_CR1 register. If the NSS pin is required in output The MSTR and SPE bits must be set (they remain set only if the NSS pin is In this configuration the MOSI pin is a data output and the MISO pin is a data
mode, the SSOE bit only should be set. connected to a high-level signal). input.
Transmit sequence
The transmit sequence begins when a byte is written in the Tx Buffer. The data byte is parallel-loaded into the shift register (from the internal bus) during the first bit transmission and then shifted out serially to the MOSI pin MSB first or LSB first depending on the LSBFIRST bit in the SPI_CR1 register. The TXE flag is set on the transfer of data from the Tx Buffer to the shift register and an interrupt is generated if the TXEIE bit in the SPI_CR2 register is set.
Receive sequence
For the receiver, when data transfer is complete: The data in the shift register is transferred to the RX Buffer and the RXNE flag is set An interrupt is generated if the RXNEIE bit is set in the SPI_CR2 register
At the last sampling clock edge the RXNE bit is set, a copy of the data byte received in the shift register is moved to the Rx buffer. When the SPI_DR register is read, the SPI peripheral returns this buffered value. Clearing the RXNE bit is performed by reading the SPI_DR register. A continuous transmit stream can be maintained if the next data to be transmitted is put in the Tx
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buffer once the transmission is started. Note that TXE flag should be 1 before any attempt to write the Tx buffer is made.
4.9 I2S BLOCK DIAGRAM
Fig4.6. I2S Block Diagram The SPI could function as an audio I2S interface when the I2S capability is enabled (by setting the I2SMOD bit in the SPI_I2SCFGR register). This interface uses almost the same pins, flags and interrupts as the SPI. The I2S shares three common pins with the SPI: SD: Serial Data (mapped on the MOSI pin) to transmit or receive the two time multiplexed
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data channels (in simplex mode only). WS: Word Select (mapped on the NSS pin) is the data control signal output in master mode and input in slave mode. CK: Serial Clock (mapped on the SCK pin) is the serial clock output in master mode and serial clock input in slave mode. An additional pin could be used when a master clock output is needed for some external audio devices: MCK: Master Clock (mapped separately) is used, when the I2S is configured in master mode (and when the MCKOE bit in the SPI_I2SPR register is set), to output this additional clock generated at a preconfigured frequency rate equal to 256 FS, where FS is the audio sampling frequency. The I2S uses its own clock generator to produce the communication clock when it is set in master mode. This clock generator is also the source of the master clock output. Two additional registers are available in I2S mode. One is linked to the clock generator configuration SPI_I2SPR and the other one is a generic I2S configuration register SPI_I2SCFGR (audio standard, slave/master mode, data format, packet frame, clock polarity, etc.). The SPI_CR1 register and all CRC registers are not used in the I2S mode. Likewise, the SSOE bit in the SPI_CR2 register and the MODF and CRCERR bits in the SPI_SR are not used. The I2S uses the same SPI register for data transfer (SPI_DR) in 16-bit wide mode.
4.9.1 Supported audio protocols

The three-line bus has to handle only audio data generally time-multiplexed on two Channels: the right channel and the left channel. However there is only one 16-bit register for the transmission or the reception. So, it is up to the software to write into the data register the adequate value corresponding to the considered channel side, or to read the data from the data register and to identify the corresponding channel by checking the CHSIDE bit in the SPI_SR register. Channel Left is always sent first followed by the channel right (CHSIDE has no meaning for the PCM protocol). Four data and packet frames are available. Data may be sent with a format of: 16-bit data packed in 16-bit frame 16-bit data packed in 32-bit frame 24-bit data packed in 32-bit frame 32-bit data packed in 32-bit frame
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When using 16-bit data extended on 32-bit packet, the first 16 bits (MSB) are the significant bits, the 16-bit LSB is forced to 0 without any need for software action or DMA request (only one read/write operation). The 24-bit and 32-bit data frames need two CPU read or write operations to/from the SPI_DR or two DMA operations if the DMA is preferred for the application. For 24-bit data frame specifically, the 8 non-significant bits are extended to 32 bits with 0-bits (by hardware). For all data formats and communication standards, the most significant bit is always sent first (MSB first). The I2S interface supports four audio standards, configurable using the I2S STD [1:0] and PCM SYNC bits in the SPI_I2S CFGR register.
4.9.2 I2S slave mode

For the slave configuration, the I2S can be configured in transmission or reception mode. The operating mode is following mainly the same rules as described for the I2S master configuration. In slave mode, there is no clock to be generated by the I2S interface. The clock and WS signals are input from the external master connected to the I2S interface. There is then no need, for the user, to configure the clock. The configuration steps to follow are listed below:
Set the I2SMOD bit in the SPI_I2SCFGR register to reach the I2S functionalities and choose the I2S standard through the I2S STD [1:0] bits, the data length through the DAT LEN [1:0] bits and the number of bits per channel for the frame configuring the CHLEN bit. Select also the mode (transmission or reception) for the slave through the I2S CFG [1:0] bits in SPI_I2S CFGR register.
If needed, select all the potential interrupt sources and the DMA capabilities by writing the SPI_CR2 register. The I2SE bit in SPI_I2S CFGR register must be set.
Transmission sequence
The transmission sequence begins when the external master device sends the clock and when the NSS_WS signal requests the transfer of data. The slave has to be enabled before the
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external master starts the communication. The I2S data register has to be loaded before the master initiates the communication. For the I2S, MSB justified and LSB justified modes, the first data item to be written into the data register corresponds to the data for the left channel. When the communication starts, the data are transferred from the Tx buffer to the shift register. The TXE flag is then set in order to request the right channel data to be written into the I2S data register. The CHSIDE flag indicates which channel is to be transmitted. Compared to the master transmission mode, in slave mode, CHSIDE is sensitive to the WS signal coming from the external master. This means that the slave needs to be ready to transmit the first data before the clock is generated by the master. WS assertion corresponds to left channel transmitted first. The data half-word is parallel-loaded into the 16-bit shift register (from the internal bus) during the first bit transmission, and then shifted out serially to the MOSI/SD pin MSB first. The TXE flag is set after each transfer from the Tx buffer to the shift register and an interrupt is generated if the TXEIE bit in the SPI_CR2 register is set. To secure a continuous audio data transmission, it is mandatory to write the SPI_DR register with the next data to transmit before the end of the current transmission. An underrun flag is set and an interrupt may be generated if the data are not written into the SPI_DR register before the first clock edge of the next data communication. This indicates to the software that the transferred data are wrong. If the ERRIE bit is set into the SPI_CR2 register, an interrupt is generated when the UDR flag in the SPI_SR register goes high. In this case, it is mandatory to switch off the I2S and to restart a data transfer starting from the left channel. To switch off the I2S, by clearing the I2SE bit, it is mandatory to wait for TXE = 1 and BSY=0.
Reception sequence
The operating mode is the same as for the transmission mode except for the point 1 where the configuration should set the master reception mode using the I2SCFG[1:0] bits in the SPI_I2SCFGR register. Whatever the data length or the channel length, the audio data are received by 16-bit packets. This means that each time the RX buffer is full, the RXNE flag in the SPI_SRregister is set and an interrupt is generated if the RXNEIE bit is set in the SPI_CR2 register. Depending on the data length and channel length configuration, the audio value received for a right or left channel may result from one or two receptions into the RX buffer. The CHSIDE flag is updated each time data are received to be read from SPI_DR. It is sensitive to the external WS line managed by the external master component. Clearing the RXNE bit is performed by reading the SPI_DR register.
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If data are received while the precedent received data have not yet been read, an overrun is generated and the OVR flag is set. If the bit ERRIE is set in the SPI_CR2 register, an interrupt is generated to indicate the error. To switch off the I2S in reception mode, I2SE has to be cleared immediately after receiving the last RXNE = 1.
5.1
OPERATING SYSTEM
CircleOS is the multi-application operating system used in the different STM32
Primers. This 'Open source' project was initiated by Raisonance with the objective of providing an API to access both the hardware peripherals and the user interface. CircleOS also manages
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27
the MEMS accelerometer, the melody generator, the LCD display, the menu utility and the application launcher. The CircleOS firmware requires 64 KB of FLASH and 4 KB of RAM, including the stack usage for the applications. The remaining 448 KB are available for applications, which can be added or removed at will using a programming tool. MEMORY MAP OF CIRCLE OS
Fig5.1. Memory Map of Circle OS
5.2
IDE
Ride7 software toolset that allows you to:

modify and compile applications program the STM32F103xE on the Primer2

28
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and debug the application while it runs on the microcontroller
The Ride7 toolset for STM32 Primer2 includes:
Ride7: Raisonance Integrated development environment capable of debugging and programming the target microcontroller. Ride7 provides fully integrated code editing, compiling, device programming and application debugging features from a single easyto-use graphical interface.
GNU C compiler for STM32 provides fully optimizing, unlimited compilation capability. Compiler control is seamlessly integrated in Ride7
Fig5.2. Ride7
6.1 HIGH LEVEL DESIGN

A High-Level Design provides an overview of a solution, platform, system, product, service, or process.
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Such an overview is important in a multi-project development to make sure that each supporting component design will be compatible with its neighbouring designs and with the big picture.
The highest level solution design should briefly describe all platforms, systems, products, services and processes that it depends upon and include any important changes that need to be made to them.
A high-level design document will usually include a high-level architecture diagram depicting the components, interfaces and networks that need to be further specified or developed.
The document may also depict or otherwise refer to work flows and/or data flows between component systems. In addition, there should be brief consideration of all significant commercial, legal, environmental, security, safety and technical risks, issues and assumptions. The idea is to mention every work area briefly, clearly delegating the ownership of more detailed design activity whilst also encouraging effective collaboration between the various project teams.
Today, most high-level designs require contributions from a number of experts, representing many distinct professional disciplines. Finally, every type of end-user should be identified in the high-level design and each contributing design should give due consideration to customer experience. High level software design, also called software architecture is the first step to analyze
and consider all requirements for a software and attempt to define a structure which is able to fullfill them. For this also the non-functional requirements have to be considered, such as scalability, portability and maintainability. This first design step has to be more or less independent of a programming language. This is not always 100% possible, but a good high level design can be further refined into a low level design, which then describes the implementation in any desired programming language.
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A LIC TIO PP A N LA E Y R
S TAT M H E E AC IN
M N H N LE E U A D R
M D ID LEW R A E
W E FILE AV D C D R E O E
FILE B F R U FE M A EM N AN G E T
M DE A E ID L W R
D C D E O ER
D IVE S R R
D PLA IS Y
K PA EY D
TO C S R E U H C E N
AU IOD IV R D R E
S C R D A D
MM E S
Fig6.1. HLD
6.1.2 Application layer

Menu handler
When the device is switched on, the Circle OS call this function, enum MENU_code Application_Ini ( void ):This function initialises all drivers . After initialisation the following function is called, FS_Explorer_Ini ( ): This function initialises the Circle OS explorer which enables us to view the applications on the device and navigate through them. Menu:
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enum MENU_code Application_Handler ( void ) :This function puts the applications on the menu and displays as a list for selection. FS_Explorer ( ): This function helps in navigation MENU_CONTINUE: This function will keep the explorer open. MENU_Quit: This function will quit the menu and returns to idle state. DRAW_Puts : Displays all the error messages . FS_GetVolumeInfo(0, StartMBR, &volume_info): Shall display the files on SD card. State Machine:
FS_Explorer ( ) : Shall be used to explore SD card. FS_OpenFile(&volume_info, CurrentPath,FS_READ, &file_info) :Shall open the file to read. DRAW_Puts : Shall be used to display the name of file and its information. void PlayAudioFile(void) : Shall play the file selected. FS_ReadFile(&file_info, (u8 *)AudioFileHeader, &i, HEADER_SIZE) : Shall check if it is a valid wave file. Get_Touch() : Shall take in inputs. AUDIO_Playback_Stop() : Shall stop playback of a file. FS_Explorer_Ini ( ) : Shall be used to go back to file selection mode in case quit is selected. DRAW_Clear() :Shall clear the screen. FS_Close (&file_info): Shall close the current file.
6.1.3 MIDDLE LAYER

Wave File Decoder:
The functions mentioned below checks the format of the .WAV file and gets information about the audio format. This is done by reading the value of a number of parameters stored in the file header and comparing these to the values expected authenticates the format of a standard .WAV file (44 bytes will be read). If it is a valid .WAV file format, it continues reading the header to determine the audio format such as the sample rate and the sampled data
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size .If the audio format is supported by this application, it retrieves the audio format in WAVE_Format structure and returns a zero value. Otherwise the function fails and the return value is nonzero. In this case, the return value specifies the cause of the function fails. The error codes that can be returned by this function are declared in the header file. u32 ReadUnit(u8 NbrOfBytes, Endianness BytesFormat) : Checks the header format. File buffer management:
void FillBuffer(u32 start) : Shall fill the buffer with Music from the SD card. TIM_ITConfig( TIM5, TIM_IT_Update, DISABLE ) : Shall stop reading music to buffer. Decoder:
AUDIO_Play(AudioBuffer,sizeof(AudioBuffer) / ((WAVE_Format.BitsPerSample==16) ? 2:1) : Shall play the audio from buffer.
6.2
LOW LEVEL DESIGN

Low Level Design (LLD) is like detailing the HLD. It defines the actual logic for each
and every component of the system. Class diagrams with all the methods and relation between classes comes under LLD. Programs specs are covered under LLD. LLD describes each and every module in an elaborate manner so that the programmer can directly code the program based on this.There will be at least 1 document for each module and there may be more for a module.The LLD will contain: - deailed functional logic of the module in pseudo code - database tables with all elements including their type and size - all interface details with complete API references(both requests and responses) - all dependency issues -error message listings - complete input and outputs for a module. The LLD for the following drivers are given in the APPENDIX: 1. Draw inputs 2. LCD 3. Joystick /Keypad 4 .MEMS 5. File System 6. Touch Screen 7. Audio 8. SD Card
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33
The following flowcharts outline the operation of the source code. Flowcharts have been written for these units of the code:
1. Audio Buffer/output buffer. 2. Menu handler.
2. Touch Input. 4. Wave Parsing.
7.1
FLOWCHART FOR BUFFER

Check for start position NO Retain buffer YES O verwrite buffer
Trigger to refill buffer
Check for word alignm of ent 1st byte
Zero pad to avoid false sync after last fram e
YES Check for EO F NO Decode data to lower part of buffer
Stop playback Decode data to higher part of buffer
YES Check for errors NO YES Check for EO F
NO Continue Playing
Fig7.1.Buffer
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7.2
FLOWCHART FOR TOUCH INPUT
Get Input from touchscreen
Yes C ase :stop No

Start Playback from beginning
Stop playback
Yes C ase:play
No Yes C ase:eject No No C ase:off

Exploring state (open new file and play )
Yes
Shut dow n application
Fig7.2.Touch input
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35
7.3
FLOWCHART MENU HANDLER
NO
If Exploring State=?
YES YES
CASE1
YET to SELECT Remain in same STATE
NO YES
CASE2 QUIT menu Show IDLE screen
NO YES
Start Playback CASE3
YES
If Playing State=? Display T ext
NO
If Idle State
YES
Clear Text
NO
IDLE Screen
Fig7.3.Menu Handler
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7.4
WAVE FILE PARSING

Initialise header index
Read chunk ID
YES If temp !=RIFF Error Report
NO
Read file length
YES If != WAVE format Invalid format
NO
Read format ID
YES If !=format ID Invalid format ID
NO
Read length of FMT
Fig7.4.Wave Parsing (contd..)

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YES If !=0x10 Extra format bytes=1
NO
Read audio format
YES If !=format tag Unsupported format tag
NO
Read number of channels
Read sample rate
Set the sample rate
YES If !=Sample rate Unsupportd sample rate
NO
Read byte rate
Read block Alligenment

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Read nuber of bits/sample
YES !=8||16 Bits/sample Unsupported bits/sample
NO
Read extra format bytes
If extra format bytes==1 NO
YES
YES If !=0x00
Unsupported extra format bytes
NO
Read fact chunk
YES If !=Fact ID Return invalid fact chunk ID
NO
Read fact chunk data size

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Set index to read after header end
R ead data chunk
YES If != D ata ID Invalid D ata chunk ID Error
NO
R ead noof . sample D ata
Set D ata pointer to beginning of Audio D ata
R eturn Valid W AVE file
Fig7.4.Wave Parsing
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7.5
STATE MACHINE
The state machine described below gives the behavior of the system for different inputs.
Fig7.5. State Machine On entering the application through the menu, the device enters SD card exploring state where desired audio files are selected for playing. After the file has been selected for playing, the device enters run state. The device after entering the run state can go back to exploring state if the eject icon is pressed and can go to idle state if the stop icon is pressed and can go to main startup screen if the shutdown icon is pressed.
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41
8.1
TEST RESULTS
The following test results explain how each requirement was being met. Test results have been given for each requirement which was specified earlier. 1. This is the picture of the startup screen which appears when the device is powered ON.
Fig21. Startup Screen. 1. This is the picture displaying the menu.
Fig22. Menu Screen. 2. This is the picture displaying the screen which appears when the SD card is not inserted.
Fig23. SD check Screen.
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42
3. This is the picture displaying the idle screen in the application. This screen appears when user stops the playback.
Fig24. Idle Screen. 4. This is the picture displaying the screen which appears when a file is being played.
Fig25. Run Screen.
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43
FUTURESCOPE
A media playback system can be designed from the newest of the processors in the market, such as ARM A-8, INTEL ATOM or any other MIPS processors, making it further more sophisticated and fast. The device can be upgraded to provide various features like:

Support multiple media formats such as mp3 and mp4 with the use of various codecs. Digital meta-data on digital audio collection, such as album arts, genre, ratings, year etc. Windows like User Interface. Ability to view photos and play music on same device. Support for multi-language menus. Ability to produce HD audio. And many more.
CONCLUSION
When designing a media playback system that is compact and portable, power efficiency of the system is the buzz word. This system employs a processor which consumes the lowest possible power among the leading processors available. There are various other factors which shall play a vital role in making a media playback system laudable. Cost, size, user-interface and reliability being such factors. The system is designed considering the facts that it shall not exceed the size of a palm, does not exceed 4Gs, has a user friendly application and has been tested to be free from bugs. There is no wear and tear on the media files like on a physical disc. The device produces a noiseless playback and has no moving parts making it more reliable.
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44
BIBLIOGRAPHY
[1] [2] [3] [4]
Embedded System Design: A Unified Hardware/Software Introduction. John Wiley and Sons, ISBN: 0471386782, October 2001. Microsoft Corporation (June 1998). "WAVE and AVI Codec Registries - RFC 2361". IETF. http://tools.ietf.org/html/rfc2361. Retrieved 2009-12-06. Arm cortex-M3 Complete reference manual. http://arm.com/DDI0405C_arm_architecture_v7m_application_level _reference_manual.pdf
[5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
www.arm.com/products/processors/cortex-m/cortex-m3.php infocenter.arm.com/...arm.doc.../DDI0337E_cortex_m3_r1p1_trm.pdf http://www.stm32circle.com/schematics_stm32_primer2_1_2.PDF http://en.wikipedia.org/wiki/Wav http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337e/index.html www.st.com/mcu/familiesdocs-110.html http://en.wikipedia.org/wiki/Digital_audio_player http://www.stm32circle.com/resources/stm32primer2.php www.educypedia.be/electronics/I2C.htm http://www.industryconvergence.com/evolution of media players http://en.wikipedia.org/wiki/businessreports http://en.wikipedia.org/wiki/rtos
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1. LLD_DRAW INPUTS
LLD_vbattoa static void vbattoa( u8* ptr, u16 X) This function convert an u16 in ascii radix 10 This function is used to display a character string (17 char max)at given X, Y coordinates on the LCD display.This function is the user interface to use the LCD driver. Initialize GUI drawing. Called at CircleOS startup. Called by CircleOS to manage DRAW tasks such as screen orientation. Draw the battery at xBat and yBat set in DRAW_Ini Draw a line on the LCD screen. Optimized for horizontal/vertical lines,and use the Bresenham algorithm for other cases. Draw a cross on the screen. Set the magnifying value for the characters (should be 1 or 2)
LLD_DRAW_DisplayStringW static void ithMode DRAW_DisplayStringWithMode( u8 x, u8 y, const u8* ptr, u8 len, s32 mode )
LLD_DRAW_Init
void DRAW_Init( void )
LLD_DRAW_Handler
void DRAW_Handler( void )
LLD_DRAW_Batt
void DRAW_Batt( void )
LLD_DRAW_Line_Circle
void DRAW_Line_Circle (s16 x1, s16 y1, s16 x2, s16 y2, u16 color )
LDD_DRAW_Cross_Absolute void DRAW_Cross_Absolute(s16 x1, s16 y1, u16 color, u16 CrossSize) LDD_DRAW_SetCharMagni Coeff LDD_DRAW_GetCharMagni Coeff LLD_DRAW_GetTextColor LLD_DRAW_SetTextColor
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void DRAW_SetCharMagniCoeff( u16 Coeff )
u16 DRAW_GetCharMagniCoeff( Return the current void ) magnifying value for the characters u16 DRAW_GetTextColor( void ) void DRAW_SetTextColor( u16 Return current text color. Set current text color.
46
Color ) LLD_DRAW_GetBGndColor LLD_DRAW_SetBGndColor LLD_ DRAW_Clear u16 DRAW_GetBGndColor( void ) void DRAW_SetBGndColor(u16 Color) void DRAW_Clear( void ) Return current background color. Set current background color Clear the LCD display. Draw Batterie and butterfly if main display. Draw the butterfly logo The provided bitmap is made width * height 2 byte words. Each 2 byte word contains the RGB color of a pixel. The provided bitmap is made width * height 2 byte words. Each 2 byte word contains the RGB color of a pixel. All pixels with the oldBgndColor are replaced with the newBgndColor The provided bitmap is made of width * height bits where a set bit means a pixel drawn in the current text color, whereas an unset bit means a pixel drawn in the current background color. This function is used to display vbat in ascii This function is used to display time in ascii on LCD This function is used to display a character string (17 u8 max)* at given
47
LLD_DRAW_SetLogoBW LLD_ DRAW_SetImage
void DRAW_SetLogoBW( void ) void DRAW_SetImage( const u16* imageptr, u8 x, u8 y, u8 width, u8 height )
LLD_ DRAW_SetImageSel
void DRAW_SetImageSel( const u16* imageptr, u8 x, u8 y, u8 width, u8 height, u16 oldBgndColor, u16 newBgndColor )
LLD_ DRAW_SetImageBW
void DRAW_SetImageBW( const u8* imageptr, u8 x, u8 y, u8 width, u8 height )
LLD_ DRAW_DisplayVbat LLD_ DRAW_DisplayTime
void DRAW_DisplayVbat( u8 x, u8 y ) void DRAW_DisplayTime( u8 x, u8 y ) void DRAW_DisplayString( u8 x, u8 y, const u8* ptr, u8 len )
LLD_ DRAW_DisplayString
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X, Y coordinates on the LCD display. LLD_ DRAW_DisplayStringInverted void DRAW_DisplayStringInverted( u 8 x, u8 y, const u8* ptr, u8 len ) This function is used to display a character string (17 char max) at given X, Y coordinates on the LCD display, with inverted colors. Reset text and background colors to their default values. This function is used to display the current temperature in ascii.The choice between Celcius and Fahrenheit is fixed by UTIL_SetModeTemp() Draw a line on the LCD screen. Optimized for horizontal/vertical lines,and use the Bresenham algorithm for other cases. Display at current coordinates the provided ASCII character with the current text and background colors and with the current magnify coefficient. This function is used to display a character string at current coordinates on the LCD display. This function is the user interface to use the LCD driver. This function is used to set the current position of the cursor.This position is used by the
48
LLD_ DRAW_SetDefaultColor LLD_ DRAW_DisplayTemp
void DRAW_SetDefaultColor (void) void DRAW_DisplayTemp( u8 x, u8 y )
LLD_ DRAW_Line
void DRAW_Line (s16 x1, s16 y1, s16 x2, s16 y2, u16 color )
LLD_ DRAW_Putc
void DRAW_Putc( u8 Ascii )
LLD_ DRAW_Puts
void DRAW_Puts( const u8* ptr )
LLD_ DRAW_SetCursorPos
void DRAW_SetCursorPos( s32 x, s32 y )
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DRAW_putc and DRAW_Puts functions. LLD_ DRAW_GetCursorPos s32 DRAW_GetCursorPos() This function is used to get the current position of the cursor. This function is used to set the current margins for the cursor.This position is used by the DRAW_putc and DRAW_Puts functions. This function is used to get the current margins for the cursor.This position is used by the DRAW_putc and DRAW_Puts functions.
LLD_ DRAW_SetCursorMargin
void DRAW_SetCursorMargin( s32 lx, s32 rx, s32 hy, s32 ly )
LLD_ DRAW_GetCursorMargin
void DRAW_GetCursorMargin( s32* lx, s32* rx, s32* hy, s32* ly )
2. LLD_LCD
LLD_LCD_DataLinesConfig static void LCD_DataLinesConfig( DataConfig Mode_TypeDef Mode ) Configure data lines D0~D7 in Input Floating mode for read from LCD or in Output Push-Pull mode for write on LCD Write a value on D0~D7 Configure control lines in Output PushPull mode.
LLD_LCD_DataLinesWrite
static void LCD_DataLinesWrite( GPIO_TypeD ef* GPIOx, u32 PortVal ) static void LCD_CtrlLinesConfig( void )
LLD_LCD_CtrlLinesConfig
LLD_LCD_CtrlLinesWrite
static void Set or reset control LCD_CtrlLinesWrite( GPIO_TypeDe lines. f* GPIOx, u32 CtrlPins, BitAction BitVal ) static void LCD_CheckLCDStatus( void ) void LCD_DrawCharSetFilter( s32 Check whether LCD is busy or not. Define a restriction
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LLD_LCD_CheckLCDStatus LLD_LCD_DrawCharSetFilter
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xmin, s32 xmax, s32 ymin, s32 ymax )
area for LCD_DrawChar (used for the first/last line when scrolling lists). Draw a character on the LCD screen.
LLD_LCD_DrawChar
static void LCD_DrawChar( u8 x, u8 y, u8 width, const u8* bmp, u16 textColor, u16 bGndColor, u16 charMagniCoeff ) static void LCD_DisplayRotate( Rotate_H12_V _Match_TypeDef H12 ) static void LCD_7637_Controller( void ) void LCD_ST7732S_Controller_init( void ) void LCD_BackLightConfig( void )
LLD_LCD_DisplayRotate
Configure the LCD controller for a given orientation. Initialization of the controller registers. Initialization of the controller registers. Setting of the PWM that drives the backlight intensity. Modify the PWM rate. Initialize LCD. Called at CircleOS startup. Called by the CircleOS scheduler to manage LCD tasks. Fill a rectangle with a provided color.This function does not check parameters validity Call LCD_SendLCDCmd function, with the ST7637_RAMWR or ST7732_RAMWR
LLD_LCD_7637_Controller LLD_LCD_ST7732S_Controll er_init LLD_LCD_BackLightConfig
LLD_LCD_BackLightChange LLD_LCD_Init
static void LCD_BackLightChange( void ) void LCD_Init( void )
LLD_ LCD_Handler
void LCD_Handler( void )
LLD_LCD_FillRect_Circle
void LCD_FillRect_Circle( u16 x, u16 y, u16 width, u16 height, u16 color )
LLD_LCD_SendLCDCmd
void _LCD_SendLCDCmd(void)
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50
parameter LLD_ LCD_Batt void LCD_Batt(u16 xBat, u16 yBat, Draw the battery s32 fDisplayTime, u16 BatState, u16* OldBatState, s32 divider_coord, u16* widthBat, u16* heightBat) void LCD_Clear (u16 xBat,u16 yBat) void LCD_Scroll (u8 Ascii, s32 PosCurX,s32 *PosCurY,s32 RightMarginX,s32 LeftMarginX,s32 HighMarginY,s32 LowMarginY,u16 BGndColor, u16 TextColor,u16 CharMagniCoeff ) void LCD_SendLCDCmd( u8 Cmd ) void LCD_SendLCDData( u8 Data ) u32 LCD_ReadLCDData( void ) void LCD_FillRect( u16 x, u16 y, u16 width, u16 height, u16 color ) void LCD_DrawRect( u16 x, u16 y, u16 width, u16 height, u16 color ) void LCD_DrawPixel( u8 XPos, u8 YPos, u16 Color ) void LCD_RectRead( u16 x, u16 y, u16 width, u16 height, u8* bmp ) Draw the batterie and the toolbar Scroll the screen each line to the top
LLD_LCD_Clear LLD_LCD_Scroll
LLD_LCD_SendLCDCmd LLD_LCD_SendLCDData LLD_ LCD_ReadLCDData LLD_LCD_FillRect LLD_LCD_DrawRect
Send on command byte to the LCD. Send one data byte to the LCD. Read one data byte from the LCD. Fill a rectangle with a provided color. Draw a rectangle with a provided color. Draw a pixel on the LCD with the provided color. Save the pixels of a rectangle part of the LCD into a RAM variable Read the RGB color of the pixel the coordinate are provided in parameter. Display at provided coordinates the provided ASCII
51
LLD_LCD_DrawPixel
LLD_LCD_RectRead
LLD_ LCD_GetPixel
u16 LCD_GetPixel( u8 x, u8 y )
LLD_ LCD_DisplayChar
void LCD_DisplayChar( u8 x, u8 y, u8 Ascii, u16 TextColor, u16 BGndColor, u16 CharMagniCoeff)
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character with the provided text and background colors and with the provided magnify coefficient. LLD_ LCD_SetRect_For_Cmd void LCD_SetRect_For_Cmd( s16 x, s16 y, s16 width, s16 height ) Define the rectangle for the next command to be applied. Modify the PWM rate. Any value below BACKLIGHTMIN reset the value to the default value Switch the LCD back light off. Switch the LCD back light on. Returns le LCD PWM rate. Enable or disable the ability of the screen display to rotate according to the MEMs information. Return the screen rotation mode. Set the screen orientation.
LLD_ LCD_SetBackLight
void LCD_SetBackLight( u32 newBacklightStart )
LLD_ LCD_SetBackLightOff LLD_ LCD_SetBackLightOn LLD_ LCD_GetBackLight LLD_ LCD_SetRotateScreen
void LCD_SetBackLightOff( void ) void LCD_SetBackLightOn( void ) u32 LCD_GetBackLight( void ) void LCD_SetRotateScreen( u8 RotateScreen)
LLD_ LCD_GetRotateScreen LLD_ LCD_SetScreenOrientation
u8 LCD_GetRotateScreen( void ) void LCD_SetScreenOrientation( Rotate_ H12_V_Match_TypeDef ScreenOrientation ) Rotate_H12_V_Match_TypeDef LCD_GetScreenOrientation( void ) void LCD_SetFont(u8* NewFont)
LLD_ LCD_GetScreenOrientation LLD_ LCD_SetFont
Return current screen orientation. Change the current font, with the specified new one.
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LLD_ LCD_SetDefaultFont
void LCD_SetDefaultFont(void)
Restore the default system font.
3. LLD_JOYSTICK
LLD_JOYSTICK_Handler void JOYSTICK_Handler( void ) Called by the CircleOS scheduler to manage Joystick tasks 1. Current direction. 2. Number of permutations. 3. The new direction value. LLD_BUTTON_SetMode LLD_BUTTON_GetMode LLD_BUTTON_GetState LLD_BUTTON_WaitForRelease void BUTTON_SetMode( enum BUTTON_mode mode ) enum BUTTON_mode BUTTON_GetMode( void ) enum BUTTON_state BUTTON_GetState( void ) void BUTTON_WaitForRelease( void ) Sets new button mode Returns current button mode. Returns current button state. Disable temporarily any new button event. Decodes the Joystick direction. Disable temporarily any new button event.
LLD_JOYSTICK_CircularPermuta tion
enum JOYSTICK_state JOYSTICK_CircularPermutation (enum JOYSTICK_state abs_direction, s32 iter)
LLD_JOYSTICK_GetState
enum JOYSTICK_state JOYSTICK_GetState(void) void JOYSTICK_WaitForRelease( void )
LLD_JOYSTICK_WaitForRelease
4.LLD_MEMS
LLD_MEMS_WakeUp static void MEMS_WakeUp( void )
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Wake Up Mems.
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LLD_MEMS_ReadOut static u32 MEMS_ReadOutXY( void ) XY
Reads X and Y Out.return An unsigned 32 bit word with the highest 16 bits containing the Y and the lowest 16 bits the X. Selects or deselects the MEMS device. Sends a byte through the SPI interface and return the byte received from the SPI bus. Initializes the peripherals used by the SPI MEMS driver. Called by the CircleOS scheduler to manage the MEMS. The Circle beeps if the MEMS is shocked. Reads SPI chip identification. Returns the current (relative) position of the Primer.Only XY axis are considered here. Returns current screen orientation. Set current position as "neutral position". Return the current MEMS information
54
LLD_MEMS_ChipSel ect LLD_MEMS_SendByt e
static void MEMS_ChipSelect( u8 State) static u8 MEMS_SendByte( u8 byte )
LLD_MEMS_Init
void MEMS_Init(void)
LLD_MEMS_Handler
void MEMS_Handler( void )
LLD_MEMS_ReadID LLD_ MEMS_GetPosition
u8 MEMS_ReadID( void ) void MEMS_GetPosition( s16* pX, s16*pY )
LLD_MEMS_GetRota tion
void MEMS_GetRotation (Rotate_H12_V_Match_TypeDef*pH12)
LLD_MEMS_SetNeutr void MEMS_SetNeutral( void ) al LLD_MEMS_GetInfo tMEMS_Info* MEMS_GetInfo( void )
DEPT E&C,SBMJCE
(state, absolute position...).
5. LLD_FILESYSTEM
LLD_FS_Explorer_ UpdateList LLD_FS_Mount NODEBUG void FS_Explorer_UpdateList() u32 FS_Mount(enum STORAGE_device device) u32 FS_Unmount(enum STORAGE_device device) Populate the list with contents of current directory. Initializes and connects selected device to file system. Deinitializes and disconnects selected device to file system.
LLD_FS_Unmount
LLD_FS_OpenFile
u32 FS_OpenFile(PVOLINFO volinfo, u8 Call FS_OpenFile with *path, u8 mode, PFILEINFO fileinfo) mode = FS_READ and supply a path and the relevant VOLINFO structure. FS_OpenFile will populate a FILEINFO that can be used to refer to the file. u32 FS_ReadFile(PFILEINFO fileinfo, u8 *buffer, u32 *successcount, u32 len) u32 FS_WriteFile(PFILEINFO fileinfo, u8 *buffer, u32 *successcount, u32 len) Reads the file Call DFS_OpenFile with mode = DFS_WRITE and supply a path and the relevant VOLINFO structure. DFS_OpenFile will populate a FILEINFO that can be used to refer to the file. Close file. Seek file pointer to a given position. Delete file or directory. Search next entry of the
55
LLD_FS_ReadFile LLD_FS_WriteFile
LLD_FS_Close LLD_FS_Seek LLD_FS_Delete LLD_FS_GetNextE

DEPT E&C,SBMJCE
u32 FS_Close(PFILEINFO fileinfo) void FS_Seek(PFILEINFO fileinfo, u32 offset) u32 FS_Delete(PVOLINFO volinfo, u8 *path) u32 FS_GetNextEntry(PVOLINFO
ntry LLD_FS_OpenDire ctory
volinfo, PDIRINFO dirinfo, PDIRENT dirent) u32 FS_OpenDirectory(PVOLINFO volinfo,u8 *dirname, PDIRINFO dirinfo)
directory. Open directory. Gets the volume informations Checks the presence of the SDCARD, initializes various structures and lists the root directory. Navigation into the SDCARD folders, through a list,and selection of a file. Get the Currentpath of the SDCard, updated during navigation with the explorer. Get the volume informations of the SDCard,structure populated by the FS_Explorer_Ini(). This structure is necessary for file access, (FS_OpenFile, FS_ReadFile, FS_Seek...).
LLD_FS_GetVolum u32 FS_GetVolumeInfo(u8 unit, u32 eInfo startsector, PVOLINFO volinfo) LLD_FS_Explorer_ Ini enum MENU_code FS_Explorer_Ini ()
LLD_FS_Explorer
s32 FS_Explorer ()
LLD_FS_GetSDCar dCurrentPath
u8* FS_GetSDCardCurrentPath (void)
LLD_FS_GetSDCar dVolInfo
VOLINFO* FS_GetSDCardVolInfo ( void )
LLD_FS_GetPathFi lter LLD_FS_SetPathFil ter
u8* FS_GetPathFilter ( void )
Get the filter applied to the file type during exploring the SDCard Set the filter applied to the file type during exploring the SDCard.A null pointer indicates no filter
void FS_SetPathFilter ( u8* filter )
DEPT E&C,SBMJCE
56
LLD_NVIC_Config _SDIO
void NVIC_Config_SDIO(void)
Configures SDIO IRQ channel.
6. LLD_TOUCHSCREEN
LLD_TOUCHSCR_Handler void TOUCHSCR_Handler() Called by the CircleOS scheduler to manage the touchscreen. Change the mode of the touchscreen. This function provides a mini "scribble" functionality. Called by the CircleOS scheduler to initialize the touchscreen. Takes care of caliberation of the screen Return the current position of the point touched. Return the current absolute position of the point touched.This position is independant with the orientation of the screen. Return info if the screen has been touched or not. Return info if the touchscreen is in calibration or not.
57
LLD_TOUCHSCR_SetMode
void TOUCHSCR_SetMode( TOUCHS CR_Mode_enum mode ) void TOUCHSCREEN_Drawing( void )
LLD_TOUCHSCR Drawing
LLD_TOUCHSCR_Init
void TOUCHSCR_Init()
LLD_TOUCHSCR calibration
void TOUCHSCREEN_Calibration() u16 TOUCHSCR_GetPos( void )
LLD_TOUCHSCR_GetPos
LLD_TOUCHSCR_GetAbsPo s
u16 TOUCHSCR_GetAbsPos( void )
LLD_TOUCHSCR_IsPressed
bool TOUCHSCR_IsPressed( void ) TOUCHSCR_Mode_enum TOUCHSCR_GetMode( void )
LLD_TOUCHSCR_GetMode
DEPT E&C,SBMJCE
LLD_TOUCHSCR_SetSensibi void lity TOUCHSCR_SetSensibility( u16 sens )
Set the sensibility of the touch detection.
7. LLD_AUDIO
LLD_AUDIO_DeviceSoftwar void Reset the audio codec. eReset AUDIO_DeviceSoftwareReset(voi d) LLD_AUDIO_Init void AUDIO_Init( void ) General initialization of the STw5094a audio codec.Only the I2C interface is activated. Called by the CircleOS scheduler to manage audio tasks. Initialization of I2C communication I2C is used to configure the STw5094a audio codec Initialization for Audio Mode use of the STw5094a codec:- set STw5094a to Audio Mode via I2Cenable STM32 I2S communication to send audio samples (SPI3/I2S3 port) in DMA mode Initialization for Voice Mode use of the STw5094a codec:- set STw5094a to Voice Mode via I2C Called by the CircleOS scheduler to shutdown the audio codec. Reads a data byte from one of STw5094A configuration registers.
LLD_AUDIO_Handler
void AUDIO_Handler( void )
LLD_AUDIO_CODEC_Init_ I2C
void AUDIO_Init_I2C()
LLD_AUDIO_Init_audio_mo de
void AUDIO_Init_audio_mode(AUDI O_DeviceMode_enum mode,AUDIO_Length_enum length, AUDIO_Frequency_enum frequency, AUDIO_Format_enum format) void AUDIO_Init_voice_mode( AUDI O_DeviceMode_enum mode ) void AUDIO_Shutdown( void )
LLD_AUDIO_Init_voice_mo de
LLD_AUDIO_Shutdown
LLD_AUDIO_I2C_Read_Re gister
u8 AUDIO_I2C_Read_Register(u8 register_to_read)
DEPT E&C,SBMJCE
58
LLD_AUDIO_I2C_WriteReg ister
void AUDIO_I2C_WriteRegister(u8 register_to_write, u8 data_to_write)
Send a data byte to one of STw5094A configuration registers. Sends a data buffer to STw5094A configuration registers. Reads "NumByteToRead" bytes from STw5094A configuration registers and stores them in "pBuffer". Set the frequency of the audio tone generator for the audio buzzer. Set the RTE switch of the audio codec ON or OFF, in order to mute or not the audio buzzer.If RTE = ON, the buzzer is active through Loudspeaker and Headphones,depending of the MUT switch position Sets the volume status Copy Mono data to small buffer, set both Left+Right Channel to samme value Set new codec mode. Mode can be * AUDIO_MODE * VOICE_MODE
LLD_AUDIO_I2C_WriteMul void tByte AUDIO_I2C_WriteMultByte(u8 WriteAddr, u8 NumByteToWrite, u8* pBuffer) LLD_AUDIO_I2C_ReadMult s32 Byte AUDIO_I2C_ReadMultByte(u8 ReadAddr, u8 NumByteToRead, u8* pBuffer) LLD_AUDIO_BUZZER_Set ToneFrequency LLD_AUDIO_BUZZER_On Off void AUDIO_BUZZER_SetToneFrequ ency ( u16 freq ) void AUDIO_BUZZER_OnOff(ON_O FF_enum mode)
LLD_AUDIO_Set_Volume LLD_AUDIO_Cpy_Mono
void AUDIO_Set_Volume( void ) void AUDIO_Cpy_Mono()
LLD_AUDIO_SetMode
void AUDIO_SetMode( AUDIO_Devi ceMode_enum mode, AUDIO_Length_enumlength,AU DIO_Frequency_enum frequency AUDIO_Format_enum format) AUDIO_DeviceMode_enum AUDIO_GetMode()
LLD_AUDIO_GetMode
Get the current codec mode. Mode can be * AUDIO_MODE * VOICE_MODE
LLD_AUDIO_Play
void AUDIO_Play( sound_type * buffer, s32 size )
Issues audio samples (stored in buffer) to the

59
DEPT E&C,SBMJCE
audio codec via I2S. LLD_AUDIO_Playback_Stop void AUDIO_Playback_Stop( ) LLD_AUDIO_Playback_Get Status AUDIO_Playback_status_enum AUDIO_Playback_GetStatus() Stop the playback by stopping the DMA transfer. Gets the status of playback mode.
LLD_AUDIO_PlaybackBuffe AUDIO_PlaybackBuffer_Status Gets the status of Playback r_GetStatus AUDIO_PlaybackBuffer_GetStatu buffer. s(AUDIO_PlaybackBuffer_Status value) LLD_AUDIO_SPEAKER_O nOff void AUDIO_SPEAKER_OnOff(ON_ OFF_enum mode) Set the PLS switch of the audio codec ON or OFF, in order to mute or not the loudspeaker.If PLS = ON, the Loudspeaker is active for audio and buzzer. Set the MUT switch of the audio codec ON or OFF.If MUT = ON, both buzzer, Loudspeaker and Headphones are cut off.
LLD_AUDIO_MUTE_OnOff void AUDIO_MUTE_OnOff(ON_OFF _enum mode)
LLD_AUDIO_isMute
bool AUDIO_IsMute(void)
Indicates if the audio is MUTE or not.If MUT = ON, both buzzer, Loudspeaker and Headphones are cut off. Increment the volume of the loudspeaker and headphones. Decrement the volume of the loudspeaker and headphones. Reads a data byte from one of STw5094A configuration registers. Send a data byte to one of STw5094A configuration registers.
LLD_AUDIO_Inc_Volume
void AUDIO_Inc_Volume(u8 dB)
LLD_AUDIO_Dec_Volume
void AUDIO_Dec_Volume(u8 dB) u8 AUDIO_ReadRegister(u8 register_to_read) void AUDIO_WriteRegister(u8 register_to_write, u8 data_to_write)
LLD_AUDIO_ReadRegiste-r
LLD_AUDIO_WriteRegister
DEPT E&C,SBMJCE
60
LLD_AUDIO_SetLocalBuffe rSize
void AUDIO_SetLocalBufferSize(s32 size)
Adjust the size of the local buffer used in MONO mode.
8. LLD_SD CARD
LLD_ SD_SendSDStatus SD_Error SD_SendSDStatus(uint32_t *psdstatus) Returns the current SD card's status. Allows to process all the interrupts that are high. Checks for error conditions for CMD0.
LLD_ SD_ProcessIRQSrc SD_Error SD_ProcessIRQSrc(void) LLD_SD_ CmdError LLD_SD_ CmdResp7Error LLD_ CmdResp1Error LLD_ CmdResp3Error LLD_ CmdResp2Error static SD_Error CmdError(void)
static SD_Error CmdResp7Error(void) Checks for error conditions for R7. static SD_Error CmdResp1Error(uint8_t cmd) Checks for error conditions for R1.
static SD_Error CmdResp3Error(void) Checks for error conditions for R3 (OCR). static SD_Error CmdResp2Error(void) Checks for error conditions for R2 (CID or CSD). static SD_Error Checks for error CmdResp6Error(uint8_t cmd, uint16_t conditions for R6 (RCA). *prca) static SD_Error SDEnWideBus(FunctionalState NewState) static SD_Error IsCardProgramming(uint8_t *pstatus) static SD_Error FindSCR(uint16_t rca, uint32_t *pscr) static uint8_t convert_from_bytes_to_power_of_tw o(uint16_t NumberOfBytes) Enables or disables the SDIO wide bus mode. Checks if the SD card is in programming state. Find the SD card SCR register val. Converts the number of bytes in power of two and returns the power.
LLD_ CmdResp6Error
LLD_ SDEnWideBus
LLD_ IsCardProgramming LLD_ FindSCR LLD_ convert_from_bytes_to_p ower_of_two
LLD_ GPIO_Configuration
DEPT E&C,SBMJCE
static void GPIO_Configuration(void)
Configures the SDIO Corresponding GPIO

61
Ports LLD_ DMA_TxConfiguration LLD_ DMA_RxConfiguration static void DMA_TxConfiguration(uint32_t *BufferSRC, uint32_t BufferSize) static void DMA_RxConfiguration(uint32_t *BufferDST, uint32_t BufferSize) Configures the DMA2 Channel4 for SDIO Tx request. Configures the DMA2 Channel4 for SDIO Rx request.
SCHEMATICS
DEPT E&C,SBMJCE
62
USB INTERFACE
DEPT E&C,SBMJCE
63
POWER SUPPLY SYSTEM
BATTERY UNIT & SUPPLY
DEPT E&C,SBMJCE
64
CLOCK SOURCE
MEMS
DEPT E&C,SBMJCE
65
MEMS POWER SUPPLY
JOYSTIC CONNECTOR
DEPT E&C,SBMJCE
66
SD CARD CONNECTOR
USB
DEPT E&C,SBMJCE
67
USB INTERFACE
DEPT E&C,SBMJCE
68

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wav FILE PLAYBACK SYSTEM

1.1 Digital audio player

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.wav FILE PLAYBACK SYSTEM

.wav FILE PLAYBACK SYSTEM

Hardware Requirements Software Requirements

.wav FILE PLAYBACK SYSTEM

-Windows CE -PHARLAP -Circle OS

IDE (Integrated Development Environment) -IAR -RIDE 7 -STELLARIS WARE -XDUINO

.wav FILE PLAYBACK SYSTEM

Fig2.1.ARM Processor family Features of ARM7TDMI-S vs. CORTEX-M3

Table 2.1.Features of ARM7TDMI-S vs. CORTEX-M3 Performance of ARM7TDMI-S vs. CORTEX-M3

.wav FILE PLAYBACK SYSTEM

Fig2.2.Relative Performance of ARM7TDMI-S vs. CORTEX-M3

Fig2.3.Relative Code size of ARM7TDMI-S vs. CORTEX-M3

Performance compared to other family of processors

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Fig2.4. Performance compared to other family of processors

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Fig3.1. Use-Case analysis of Requirements

System requirements specification (SRS)

The application should display options to increase or decrease volume.

.wav FILE PLAYBACK SYSTEM

Fig3.2. Start Up Screen.

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Fig3.3. Menu Screen.

Fig3.4. SD Check Screen.

Fig3.5. Explorer Screen.

Fig3.6. Run Screen.

3.2 User Controls

Input/output Input Input

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Fig4.1. Block Diagram of the System

.wav FILE PLAYBACK SYSTEM

ARM CORE: ARM Architecture M profile

.wav FILE PLAYBACK SYSTEM

Cache less operation

Designed for deeply embedded systems

Low pin count devices

o Enable new entry level opportunities for the ARM architecture

Debug and software profiling support for event driven systems.

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POWER SUPPLY OVERVIEW

Fig4.3. POWER SUPPLY BLOCK

SPI BLOCK DIAGRAM

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4.8.1 SINGLE MASTER/SINGLE SLAVE APPLICATION

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4.8.2 Slave select (NSS) pin management

o NSS output is disabled: the multimaster capability is allowed.

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4.8.3 Configuring the SPI in master mode

the data transfer and the serial clock.

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4.9 I2S BLOCK DIAGRAM

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4.9.1 Supported audio protocols

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