Machine Language Program Execution

Machine

instruction: An instruction (or command) encoded as a bit pattern recognizable by the CPU Machine language: The set of all instructions recognized by a machine

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 Reduced Instruction Set Computing (RISC) Few, simple, efficient, and fast instructions Examples: PowerPC from Apple/IBM/Motorola

and SPARK from Sun Microsystems

Complex Instruction Set Computing (CISC) Many, convenient, and powerful instructions More complex CPU can better cope with the ever

increasing complexities of todays software. Example: Pentium from Intel.

With

CISC, program can exploit a powerful rich set of instructions, many of which would require a multi-instruction sequence in a RISC design.
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 Regardless

of RISC and CISC a machines instruction can be categorized into three groups:

Data Transfer: requests the movement(copying) of data from one location to another. Arithmetic/Logic: tells the control unit to request an activity within the arithmetic/logic unit . Uses existing bit patterns to compute a new bit patterns. Control: direct the execution of the program rather than the manipulation of data. Contains family of JUMP(or Branch) instructions
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Data Transfer

Arithmetic/logic

Control

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 How

instructions of a typical computer are encoded for example:

16 general-purpose registers and 256 main memory cells, each with capacity of 8bits. Reference purposes label registers 0-15 and memory cell addresses 0 through 255. Values are represented in base two and result is compressed using hexadecimal notation.

Registers labeled 0 to F. Memory cells addressed 00 through FF.

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The encoded version of the machine instruction consists of two parts:

Op-code: Specifies which operation to execute.

Bit pattern of op-code fields indicates which elementary operations such as SHIFT, JUMP, is requested by the instructions.

Operand: Gives more detailed information about the operation

For example in the case of STORE operation, indicates which register contains the data to be stored and which memory cell is to receive the data.

Interpretation of operand varies depending on op-code

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 35A7

instruction translates as:

STORE the bit pattern found in register 5 In the memory cell whose address is A7.

In

reality the instruction 35A7 is:

0011010110100111

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A compute follows a program stored in its memory by copying the instructions from memory into the CPU as needed. Once in the CPU, each instruction is decoded and obeyed. The order in which the instructions are fetched from the memory corresponds to the order in which the instructions are stored in the memory unless there is a JUMP instruction.

In order to understand the overall execution process we need to consider two of the special-purpose registers:

Instruction register: current instruction Program counter: address of next instruction

The CPU performs its job by continuously repeating an algorithm, 3 step process known as the machine cycle:

Fetch Decode Execute

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Fetch:

Each instruction is two bytes long, fetch process involves retrieving the contents of the two memory cells from the main memory. CPU places the instruction received from the memory in its instruction register and then increments the program counter by two. The counter contains the address of the next instruction stored in the memory. Thus the program counter will be ready for the next fetch.

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 Decode:

The instruction now in the instruction register, the CPU decodes the instruction, which involves breaking the operand field into its proper components based on the instructions op-code. CPU then executes the instruction by activating the appropriate circuitry to perform the requested task.

Execute:

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B258:

JUMP to the instruction at address 58 if the contents of register 2 is the same as that of register 0. We will start by comparing the values in register 2 and 0. If the contents different bits, the execution step terminates and the next machine cycle begins. If the contents are equal than the machine places the value 58 in its program counter during the execute step. Next fetch step finds 58 in the program counter, so instruction at that address will the next instruction to be fetched and executed.
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 Let

us follow the machine cycle applied to the program which retrieves two values from main memory, computes their sum and stores the total in a main memory cell.
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We first need to put the program somewhere in the memory. For our example, suppose the program is stored in consecutive addresses, starting at address A0(hexadecimal). With the program stored in this manner, we can cause the machine to execute it by placing the address(A0) of the first instruction in the program counter and starting the machine.

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 The

CPU begins the fetch step step of the machine cycle by extracting the instruction stored in the main memory at location A0. Placing this instruction(156C) in its instruction register.

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 Notice

that, in our machine, instructions are 16bits(two bytes) long. Thus entire instruction to be fetched occupies the memory cells at both address A0 and A1. CPU is designed to take this into account so it retrieves the content of both cells and places the bit pattern received in the instruction register which is 16 bit long.

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 The

CPU then adds two to the program counter so that this register contains the address of the next instruction.

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 At

the end of the fetch step of the first machine cycle, the program counter and instruction register contain the following data:

Program Counter:A2 Instruction Register: 156C

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