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IRAM

IRAM
Contents
Introduction Inspirations of IRAM IRAM - Architecture IRAM - Benchmarking Advantages of IRAM Disadvantages of IRAM Conclusion References

IRAM
Intelligent RAM
It is integration of Intelligence and RAM.
Intelligent RAM, or IRAM, merges processing and memory into a single chip to lower memory latency, increase memory bandwidth, and improve energy efficiency.

IRAM

IRAM
Proc $ $ I/O I/O Bus D L2$ Bus Bus I/O

I/O
Proc

Microprocessor & DRAM on separate single chip

Microprocessor & DRAM on a single chip

IRAM
Inspirations of IRAM
Processor-DRAM Gap (latency) 1000 Moores Law
Relative Performance Proc 60%/yr.

100 10 1

Processor-Memory Performance Gap: (grows 50% / year)

DRAM 7%/yr.
1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000

Time
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IRAM
Inspirations of IRAM
Application Demand

IRAM
Key Technologies
Vector Processing

Figure 4.1 shows the vector processing model in which the difference between scalar and vector instructions is schematically represented. In scalar processing the instructions are carried out sequentially while in vector processing a number of instructions are carried out in parallel which depends on the vector length of the processor. So parallel processing is much faster than scalar processing.

IRAM
Key Technologies
Vector Processing
Advantages of vector computers and the vectorized programs on them include: 1. Each result is independent of previous results, which enables deep pipelines and high clock rates in them. 2. A single vector instruction does a great deal of work, which means fewer instruction fetches in general and fewer branch instructions and so fewer mispredicted branches. 3. Vector instructions often access memory a block at a time, which allows memory latency to be amortized over, say, 64 elements. 4. Vector instructions often access memory with regular (constant stride) patterns, which allows multiple memory banks to simultaneously supply operands.
Advantages of vector processing are, It has high performance on demand for multimedia processing. That is it enhances the multimedia processing by means of parallel processing which makes it ideal processing method since multimedia processing plays a key role in todays computing.

IRAM
Key Technologies
Embedded DRAM

Figure 4.3 shows how embedded technology is used in the manufacturing of IRAM. During the fabrication the memory chip is embedded into the microprocessor to produce IRAM. Thus IRAM becomes a single chip into which both memory and processor are integrated for high quality performance due to their coexistence.
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IRAM
Key Technologies
Embedded DRAM
It offers high bandwidth for vector processing. Due to the high memory bandwidth possessed by the DRAM chip it can enhance the performance of vector processor which needs high memory usage and bandwidth because of the abundant parallelism in vector processing. It has a low latency which makes the memory accesses much faster and efficient. The energy or power required for memory accesses is very low. Also the memory access frequency is less. So the power consumption of the DRAM chip is less compared to other memory chips which consume more power.
The memory flexibility of IRAM is due to the embedded technology used in its manufacturing process. The designers can specify exact length and width of the DRAM since it is not restricted by powers of 2. So embedded DRAM offers system memory size benefits.
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IRAM
Key Technologies
Serial I/O
Board-to-Board/Backplanes Issue:Clock skew, data skew, rise and fall times, and jitter limit the ability to increase clock frequency. controlling the cross-talk issues on parallel buses is difficult.

FIGURE 2-4: Old Parallel Bus vs. New Serial Bus

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IRAM
Key Technologies
Serial I/O
Chip-to-chip communica-tion had previously been almost exclusively a parallel domain. Consider the following benefits of SERDES chip-to-chip communication: Pin Count: Smaller, cheaper packages. Fewer layers on PCB assemblies. Smaller Packages: Smaller, cheaper boards and more compact designs. SSO: Fewer pins and differential signaling eliminate the SSO problem. Power: Usually a high-speed serial link will use less power than a parallel link. Control Lines included: Often a parallel interface needs a few lines for control and enable in addition to the data lines. Serial links have enabling and control capabilities built into most protocols.
In the parallel architectures, one node can transmit to one or many nodes. But while that node is transmit- ting, all other nodes are blocked. All nodes share the available bandwidth. In serial buses, each node has a dedicated link to every other node. So one node can talk to one or to all nodes while another node is talking. In fact, all

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