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Not all accumulated information is needed by the CPU at the same time. Therefore, it is more economical to use lowcost storage devices to serve as a backup for storing the information that is not currently used by CPU.
There are two kinds of memory: random access memory, RAM, and read-only-memory, ROM. There are two types of RAM, dynamic RAM (DRAM) and static RAM (SRAM). Dynamic RAM consists of capacitors that slowly leak their charge over time. Thus they must be refreshed every few milliseconds to prevent data loss. DRAM is cheap memory owing to its simple design.
SRAM is very fast memory and it doesnt need to be refreshed like DRAM does. It is used to build cache memory.
Quantity vs Quality
Your memory system can be BIG and SLOW... or SMALL and FAST.
Faster memory is more expensive than slower memory.
$/GB
1000 100 10 1 .1 .01
10-8
10-6
10-3
1 1
100
Friends
L1:
cache (SRAM)
L2:
Larger, slower, and cheaper L3: (per byte) storage devices L4:
Registers are parts of the processor. Register transfer operations are directly controlled by the processor after instructions are decoded. Register transfer is conducted at processor speed, in one clock cycle. Many designers would not consider registers a level of memory.
The purpose of cache memory is to speed up accesses by storing recently used data closer to the CPU, instead of storing it in main memory.
Main memory is sometimes called primary memory of a computer system. It is usually much larger than the cache and often implemented by most cost effective RAM chips.(DRAMs).
Disks are used to store data, applications software and operating systems software. Whereas the primary form of storage in the early days of computing was magnetic tape, this has been replaced by predominantly disk based medium today.
All that is required now is a mechanism of converting the digital data of 0's and 1's into magnetic states of north and south poles.
Write Head Digital 0's and 1's magnetic states which can magnetize the surface areas of the disk. Read head Detect the magnetic states on the surface of the disk digital states
Disk Geometry
Disks consist of platters, each with two surfaces. Each surface consists of concentric rings called tracks. Each track consists of sectors separated by gaps.
tracks surface track k gaps
spindle
sectors
surface 0
surface 1 surface 2
surface 3 surface 4
surface 5 spindle
By moving radially, arm can position read/write head over any track
Backup storage is storage that is intended as a copy of the storage that is actively in use so that, if the storage medium such as a hard disk fails and data is lost on that medium, it can be recovered from the copy. On a personal computer, backup storage is commonly achieved with DVDs. In an enterprise, backup storage can sometimes be achieved through replication of data in multidisk storage systems, such as RAID. Enterprise backup storage often makes use of both disk and TAPE as storage media.
The most commonly quoted figure for the archival life of magnetic tape is 30 years
Information stored in memory hierarchy satisfies three important properties: Inclusion Coherence Locality
Inclusion Property
It is stated as :
M1
M2 M3, Mn
M1 is subset of M2, M2 is subset of M3, and so on. Outermost level Mn has all information items stored in it. During processing, subsets of Mn are copied into Mn-1 , subset of which are copied into Mn-2 , and so on.
If information word is found in Mi , then copies of same word can also be found in all upper levels Mi +1 , Mi+2,.. Mn. But a word stored in Mi+1 may not be found in Mi
A word miss on Mi implies that it is also missing from Mi-1 , Mi-2 , and so on.
The highest level is the backup storage where everything can be found.
Coherence Property
Coherence Property of memory hierarchy requires that copies of same information item present at successive memory levels be consistent. If a word is modified in cache memory, then copies of it must be updated at all higher levels
Frequently used information is often found in lower levels to minimize access time of memory hierarchy.
Two approaches: Write through (WT), immediate update in Mi+1 if a word is modified in Mi Write back (WB), delays update in Mi+1 until word being modified in Mi is replaced or removed
The principle of locality states that a program accesses a small part of its address space at any instant of time.
Address space is clustered into regions due to locality of references. The subset of addresses referenced within a given time window t, t+ t is called WORKING SET.
Working set is accumulated at the lowest level such as cache in the memory. This will reduce effective memory access time with higher hit ratio at the lowest memory level.
The virtual memory technique allows users to use more memory for a program than the real memory of a computer. The amount of real memory in a computer is limited to the amount of RAM installed. Because your computer has a finite amount of RAM, it is possible to run out of memory when too many programs are running at one time. This is where virtual memory comes in. Virtual memory increases the available memory your computer has by enlarging the "address space.
It does this by using hard disk space for additional memory allocation.
However, since the hard drive is much slower than the RAM, data stored in virtual memory must be mapped back to real memory in order to be used.
The process of mapping data back and forth between the hard drive and the RAM takes longer.
This means that the more virtual memory is used, the more it will slow your computer down. To facilitate copying virtual memory into real memory, the operating system divides virtual memory into pages, virtual pages. Each page is stored on a disk until it is needed. When the page is needed, the operating system copies it from disk to main memory, translating the virtual addresses into real addresses.
VIRTUAL MEMORY
PROGRAM 1
MAIN MEMORY
PROGRAM 2
PROGRAM 1
PROGRAM 2
So, then, virtual memory is pseudo or fake RAM that is really nothing more than a spot on the hard drive which Windows has set aside as RAM overflow, in effect. Because Windows treats it like RAM, it is still volatile, even though it's on the hard drive. Virtual memory, despite being part of the hard drive, is nevertheless not treated by Windows like the rest of the hard drive.
Cache: Smaller, faster storage device that acts as staging area for subset of data in a larger, slower device The performance of cache memory is frequently measured in terms of quantity called Hit Ratio. When the CPU refers to memory and finds the word in cache it is said to produce a HIT. If a word is not found in cache ,its in main memory and it counts as a miss.
Main Memory
Cache
CPU
CPU communicates with both memories. It first sends address to cache. If there is a hit ,CPU accepts data from cache. If there is a miss ,CPU reads word from main memory and word is transferred to cache.
When we talk about mapping of data from main memory to cache memory, we can organize cache in 3 ways : 1Direct Mapping 2Associative Mapping
Just as bookshelves come in different shapes and sizes, caches can also take on a variety of forms and capacities.
The word at address zero is presently stored in the cache (index=000,tag=00,data=1220) Suppose CPU wants to access word at address 01000. Index address = 000,so it is used to access cache. Two tags are compared. Cache tag is 00 but address tag is 01 so NO MATCH is found. Hence main memory is accessed and data word 3450 is transferred to CPU (next figure) Cache word at index address 000 is replaced with a tag of 01 and data 3450.
01
DATA 3450
TAG 02
DATA 5670
777
02
6710
00
2340
The words stored at addresses 01000 and 02000 of main memory are stored in cache memory at index address 000.
Similarly words at addresses 02777 and 00777 are stored in cache at index address 777.
When CPU generates a memory request the index value of address is used to access cache
Fastest ,easiest and most flexible cache organization. It stores both an address and content of memory word.
If address is found corresponding data is read and sent to CPU else main memory is accessed.
Then address data pair is transferred to associative cache memory.
DATA
3450 6710 1234
Hit Time
Time to deliver a line in the cache to the processor
- Includes time to determine whether the line is in the cache
Miss Penalty
Additional time required because of a miss - typically 50-200 cycles for main memory