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Anirban Bhattacharyya

Talk at NERIST, August


2009
 Introduction to High Electron Mobility Transistors (HEMTs)
 Semiconducting Materials
 Processing Steps
 Substrate Growth
 Epitaxy
◦ Molecular Beam Epitaxy
◦ Vapor Phase Epitaxy
 Characterization of Materials
◦ Chemical Composition
◦ Doping
 Photolithography
 Etching
 Metallization
 Bonding and Packaging

2
- High electron mobility
Transistor
 Some Scattering Mechanisms
◦ Ionized Impurity Scattering
◦ Neutral Impurity Scattering
◦ Acoustic Phonon Scattering
◦ Optical Phonon Scattering
 Depends on Coulombic Interaction between electrons
and ionized atoms (donors)
 Increases with increasing impurity concentration
◦ (but not linearly, due to screening effects)

µ Ionized _ Impurity = ( N Ionized _ Im purity )


α

Where α<1

So, we would like to have high carrier


concentration, without any ionized
impurities
6
Large Band
Narrow Band Gap
Gap

Eg (Wide) Eg (Narrow)
Eg (Wide) Eg (Narrow)

Eg (Wide) Eg (Narrow)

Eg (Narrow)
Eg (Wide)
10
l
ir a
e
at

l
ia
M

er
ap

at
G

M
nd

ap
Ba

G
ge

d
ar

n
Ba
L
w
r ro
Na
Cap Layer
Large Bandgap Material, doped
Large Bandgap Material, undoped
Narrow Bandgap Material

Buffer Material

Substrate Material
GaAs (cap layer, Si doped)
Al0:24Ga0:76As (undoped Schottky, 30 nm)
Si- Doping level 5 x 1012 cm-3
Al0:24Ga0:76As (spacer)
2 D Electron Gas
In0:15Ga0:85As (90nm)

GaAs (600nm)
AlAs/GaAs Superlattice

GaAs Substrate
Silicon: Starting material: Silica Sand
Silica Sand + Carbon Silicon (95%
-97%) Electric arc furnace in
reducing ambient

Silicon (95-95%) Trichlorosilane


Fractional Distillation of Trichlorosilane
Trichlorosilane Silicon (Electronic
Grade)
 Starting Materials
◦ Germanite
◦ Arsenopyrite
 Formation of Gallium Arsenide

Evacuated Quartz Sealed Tube

Gallium 1220 – 1240C Arsenic 600C -620C


Water Cooled
Enclosure Seed Crystal

Stirred Melt INGOT

Graphite Crucible RF POWER

Gas Outlet
Grinding

Slicing

Wafer preparation

 Lapping
 Chemo-mechanical Polishing
 Molecular Beam Epitaxy (MBE)

 Metallorganic Chemical Vapor Deposition


(MOCVD)
To Pump
To Pump
To Pump
RHEED
Transfer
GUN
Rod

Shutter

Chamber
Effusion Wall
Cell
RHEED
Screen
 Gallium Source: Triethylgallium
 Aluminum Source: Trimethylaluminum
 Arsenic Source: Arsine, Tertiarybutylarsenic
 P-type dopant: DiethylZinc
 N-type dopant: Sulphur (H2S), Selenium (H2Se), Silicon (SiH4)
 Carrier Gas: Hydrogen

GAS INLET VENT


SUSCEPTO
R

R. F. COIL
39
SHEET Carrier Density of 2DEG
= 2.1x1012 / cm2

Mobility of 2DEG
= 6100 / cm2
 Photoresist

 Developer

 Exposure
1 micron 0.5 micron 0.5 micron
feature size feature size feature size

436 nm light 436 nm light 365 nm light


 Contact printing is capable of high resolution but
has higher defect densities

 Proximity printing cannot easily print small features


(except for x-ray systems)

 Projection printing provides high resolution and low


defect densities and dominates today in the industry

 Typical projection systems use reduction optics (2X


-5X), step and repeat or step and scan mechanical
systems
GaAs

 Photolithography Al0:24Ga0:76As

 MESA Isolation by Al0:24Ga0:76As


Wet Chemical Etching
In0:15Ga0:85As
 Metallization: Ni/Ge/Au/Ti/Au

 Rapid Thermal Annealing


GaAs
AlAs/GaAs Superlattice

GaAs Substrate
Increasing Directionality

Isotropic Anisotropic
Dissociation : CF4 + e - → CF3 + F + e-
Ionization: CF3 + e- → CF3+ + 2e-
Dissociative Ionization: CF4 + e- → CF3 + F + e-
Excitation: CF4 + e- → CF4* + e-
 GaAs etching by Al0:24Ga0:76As
Citric Acid + Hydrogen
peroxide Al0:24Ga0:76As

 Metallization: Ti/Pt/Au
In0:15Ga0:85As
 Passivation with SiN

GaAs
AlAs/GaAs Superlattice

GaAs Substrate
E-BEAM

Co-Polymer

PMMA

GaAs
GaAs
GaAs
Metallization

Develop PMMA and Co-polymer

Liftoff
GaAs
E-Beam

PMMA-MMA
PMMA
Silicon Dioxide
Silicon
Cr
Ni
Cr

Silicon Dioxide Silicon Dioxide


Silicon Silicon
E-beam Exposure and Developing Metallization
Cr Cr
Ni Ni
Cr Cr

Silicon Dioxide
Silicon Silicon
Formation of T-gate Reactive Ion Etching of SiO2
Silicon Silicon
Removal of Ni by NH3 RIE Etching of Silicon Dioxide
Silicon
Cr removal
PMMA
Silicon Dioxide
Silicon Silicon
Wafer level testing will be carried out
 Dicing to separate individual Devices
◦ High Speed Saw
◦ Laser
◦ Crystallographic Cleaving

 Bonding
◦ Ball Bonding (Thermasonic)
◦ Wedge Bonding (stitching)

 Packaging
 Substrate Development

 Epitaxy

 Photolithography

 Etching

 Metallization

 Packaging

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