BENM 1143 LOGIC

CIRCUITS

CHAPTER 4
MSI LOGIC CIRCUITS
Decoder
 Decoder is a logic circuit that activates
an output that corresponds to a binary
number on the input.
• ENABLE inputs
• The 74ALS138 decoder
• BCD to decimal decoders (the 7442)
• BCD to decimal decoder/driver (the 7445)
• Decoder applications
Decoder
 General decoder diagram:
Decoders
 General decoder structure
 Typically n inputs, 2n outputs
• 2-to-4, 3-to-8, 4-to-16, etc
 Control inputs (called select
S) represent Binary index of
output to which the input is
connected
 Data input usually called
"enable" (G)
Decoder
 Truth table:
Decoder
 Figure 1:
3 to 8 decoder
Decoder
3 to 8
decoder
with enable
circuit.
 Decoder
3 to 8 line
decoder
with
enable
circuit
truth table.
Decoder
3 to 8
line
decoder
with
enable
circuit
logic
symbol.
BCD-to-7segment decoder
 The 7 segment display is a common way
to display decimal or hexadecimal
characters.
 BCD to 7 segment decoder/driver
 Common-anode versus common-
cathode LED displays
 7446/47 activate specific segment
patterns in response to input codes
BCD-to-7segment decoder
(a) 7-segment arrangement; (b) active
segments for each digit.
 BCD-to-7segment decoder
 BCD-to-7
segment
decoder/driver
driving a
common-anode
7-segment LED
display;
 Segment
patterns for all
possible input
codes.
Liquid Crystal Displays (LCD)
 How LCD and LED displays differ.
 LCD operation

 Driving an LCD

 Types of LCDs

 Active matrix TFT LCDs

Liquid Crystal Displays (LCD)
 Liquid-crystal display:
 Basic arrangement;
 Applying a voltage between the segment and the backplane
turns ON the segment.
 Zero voltage turns the segment OFF.
Encoder
a) Method for
driving an
LCD
segment;
b) Driving a 7-
segment
display.
Encoder
 The general encoder diagram.
Encoder
 Logic circuit for an octal-to-binary (8-line-to-3-line)
encoder.
 For proper operation, only one input should be active at
one time.
Multiplexer
 Definition

• A multiplexer (MUX) selects one of multiple

input signals and passes it to the output.
Multiplexer
 Functional diagram:
Multiplexer
 Acts like a digitally controlled multiposition
switch.
 Digital code applied to the SELECT input
controls.
 Data inputs will be switched to the output.
 A multiplexer selects 1 out of N input data
sources and transmits the selected data to a
single output channel.
 This is called MULTIPLEXING.
 Multiplexers/Selectors

I0 0
2:1
Y
I1 1
mux
Y = S' I0 + S I1

I0 0
I1
4:1
I2 mux
Y
Y = S1' S0' I0 + S1' S0 I1 + S1 S0' I2 + S1 S0 I3
I3 3
S1 S0

S1 S0

I0 0
I1 Y = S2' S1' S0' I0 + S2' S1' S0 I1 + S2' S1 S0' I2
I2 + S2' S1 S0 I3 +S2 S1' S0' I4 + S2 S1' S0 I5
I3
I4
8:1 + S2 S1 S0' I6 + S2 S1 S0 I7
mux Y
I5
I6
I7 7
S2 S1 S0

S2 S1 S0
Multiplexer
 The basic two input multiplexer
Multiplexer
 Figure in previous slide shows the logic
circuit for a two-input multiplexer with
data inputs I0 and I1 and SELECT input
S.
 The Boolean expression:
 When S = 0; Z = I •1 + I •0 = I
0 1 0

 When S = 1; Z = I0•0 + I1•1 = I1

Multiplexer
 The four input multiplexer
Multiplexer
 Four inputs are selectively transmitted to
the output according to the four possible
combinations of S1S0 select inputs.
 Example:

•I 0 is gated with so that I0 will pass

through its AND gate to output Z only when
S1=0 and S0=0.
• The table gives the outputs for the other three
(3) outputs.
Multiplexer
 The logic diagram:
Multiplexer
 Summary of the operation:
Multiplexer/Select
or: Expansion
Control signals B and C simultaneously
choose one of I0-I3 and I4-I7

Control signal A chooses which of the

upper or lower MUX's output to gate to Y
I0 0 4:1 8:1
I1 1 mux mux I0 0
I2 2 I1 1 S
I3 3S S 0 2:1
1 0 C
mux Y I2 0
I4 1 S 0
0 4:1 I3 1 S
I5 1 mux 1
C Y
2
I6 2 I4 0
3 S0 S1
I7 3 S1 S0 I5 1 S

A B
C
I6 0
B C A I7 1 S

Alternative 8:1 Mux Implementation C

 Multiplexer:
Implementing logic functions
Example:
F(A,B,C) = m0 + m2 + m6 + m7
= A' B' C' + A' B C' + A B C' + A B C
= A' B' (C') + A' B (C') + A B' (0) + A B
1 0(1) A B C F
C 0
0 1 0 0 0 1 C F
C 1 4:1
1 2 F 0 0 1 0
0 3 8:1 0 2 MUX
0 1 0 1
0 4 MUX C 1 3
0
0 1 1 0 S1 S0
5
1 6 1 0 0 0
0 A B
1 7 S2 S1 S0 1 0 1 0
1 1 0 1 1
A B C
1 1 1 1
"Lookup Table"
Demultiplexer
 Definition:
• A demultiplexer (DEMUX) distributes a single input to
multiple outputs.
 General diagram:
Demultiplexer
 Truth table:
Demultiplexer
 1 line to 8 line demultiplexer logic diagram: