MICROPROCESSOR 8086

NARESH TANWAR Assistant Professor, ELECTRONICS & COMMUNICATION ENGG. DEPARTMENT, ACEM, FARIDABAD Engg.tanwar86@gmail.com

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PROGRAMMING OF 8086 INSTRUCTION SET

TERMS RELATED TO 8086 MICROPROCESSOR

Instruction:An instruction is a binary pattern designed inside a microprocessor to perform a specific function.

Opcode:It stands for operational code. It specifies the type of operation to be performed by CPU. It is the first field in the machine language instruction format.
E.g. 08 is the opcode for instruction MOV X,Y.

Operand:We can also say it as data on which operation should act. operands may be register values or memory values. The CPU executes the instructions using information present in this field. It may be 8-bit data or 16-bit data.

(TR8MP 2)

Assembler:it converts the instruction into sequence of binary bits, so that this bits can be read by the processor. Mnemonics:these are the symbolic codes for either instructions or commands to perform a particular function. E.g. MOV, ADD, SUB etc. Instruction format: Op-code Destination Operand, Source Operand MOV AX,100 Variable declarations Variable Name Memory Directive Value Var1 DB 7

ASSEMBLER DIRECTIVES

ASSEMBLER DIRECTIVES
Assembler

directives give instruction to the assembler where as other instructions discussed in the above section give instruction to the 8086 microprocessor Assembler directives are specific for a particular assembler However all the popular assemblers like the Intel 8086 macro assembler, the turbo assembler and the IBM macro assembler use common assembler directives

IMPORTANT DIRECTIVES

The ASSUME directive tell the assembler the name of the logical segment it should use for a specified segment The DB directive is used to declare a byte-type variable or to set aside one or more storage locations of type byte in memory (Define Byte) The DD directive is used to declare a variable of type doubleword or to reserve memory locations which can be accessed as type doubleword (Define Doubleword) The DQ directive is used to tell the assembler to declare a variable 4 words in length or to reverse 4 words of storage in memory (Define Quadword)

IMPORTANT DIRECTIVES
The ENDS directive is used with the name of a segment to indicate the end of that logical segment The EQU is used to give a name to some value or symbol

ADDRESSING MODES

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ADDRESSING MODES OF 8086 MICROPROCESSOR

(1). Immediate, (2). Direct, (3). Register, (4). Register Indirect, (5). Indexed, (6). Register Relative, (7). Based Indexed, (8). Relative Based Indexed. (9). Intrasegment Direct Mode. (10). Intrasegment Indirect Mode. (11). Intrasegment Direct. (12). Intrasegment Indirect.

(1). Implied addressing mode

The data value/data address is implicitly associated with the instruction The instruction is 1-byte long in size. The least significant three bits of opcode are used for specifying register operand. Otherwise all the 8-bits creates an opcode.

(2). Register Addressing

The data is specified by referring the register or the register pair in which the data is present Both source & destination are hold by registers

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(3). Immediate Addressing

Immediate Addressing The data itself is provided in the instruction

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(4). Direct Addressing Mode

Direct Addressing The instruction operand specifies the memory address where data is located

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(5). Indirect Register Addressing Mode

The instruction specifies a register containing an address, where data is located

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(6). Based Addressing Mode

Based - 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP), the resulting value is a pointer to location where data resides

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(7). Indexed Addressing Mode

Indexed - 8-bit or 16-bit instruction operand is added to the contents of an index register (SI or DI), the resulting value is a pointer to location where data resides

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(8). Indexed Addressing Mode

Based Indexed - the contents of a base register (BX or BP) is added to the contents of an index register (SI or DI), the resulting value is a pointer to location where data resides

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(9). Indexed Addressing Mode

Based Indexed with displacement - 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP) and index register (SI or DI), the resulting value is a pointer to location where data resides

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INSTRUCTION SET
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Types of instruction set

(1). Data Copy/Transfer instructions. (2). Arithmetic & Logical instructions. (3). Branching instructions set (4). Machine Control instructions. (5). Flag Manipulation instructions. (6). Shift & Rotate instructions.

(7). String instructions.

Note: Total 117 instructions available in 8086.

Data Copy/Transfer Instructions Set

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Data Transfer instruction set contains following no. of Instructions 1) MOV 2) PUSH 3) POP 4) XCHG 5) IN 6) OUT 7) XLAT 8) LEA 9) LDS 10) LES 11) LAHF 12) SAHF
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(1). MOV Destination, Source;

There will be transfer of data from source to destination. Both operand must be in the same size. MOV Dest, Src

MOV MOV MOV MOV MOV

reg, reg, mem, reg, mem,

reg mem reg imm imm

reg reg mem reg mem

<<<<<-

reg mem reg imm imm

Both Source and Destination cannot be memory location or segment registers at the same time. There is no instruction to put immediate value directly to segment register. Have to use accumulator (AX) to accomplish this.

E.g. MOV CX, 037A H; MOV AL, BL; MOV BX, [0301 H]; MOV AX,100h MOV BX,AX MOV DX,BX MOV AX,1234h MOV DX,5678h MOV AL,DL MOV BH,DH MOV [100h],AX The LSB will be placed at lowest address and MSB will be placed at highest address.
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BEFORE EXECUTION
AX BX 2000H

AFTER EXECUTION
AX BX 2000H 2000H

MOV BX,AX;

BEFORE EXECUTION
AH BH CH DH AL BL CL DL 40 M

AFTER EXECUTION
AH AL BL CL DL 40 40 M

MOV CL,M;

BH CH DH

STACK OPERATION
Stack

Pointer: It is a 16-bit register, contains the address of the data item currently on top of the stack. operation includes pushing (providing) data on to the stack and popping (taking)data from the stack. operation decrements stack pointer and Popping operation increments stack pointer. i.e. there is a last in first out (LIFO) operation.

Stack

Pushing

(2). Push Source;

Source can be register, segment register or memory. This instruction pushes the contents of specified source on to the stack. In this stack pointer is decremented by 2. The higher byte data is pushed first (SP-1). Then lower byte data is pushed (SP-2). E.g.: (1). PUSH AX; (2). PUSH DS; (3). PUSH [5000H];

INITIAL POSITION

(1) STACK POINTER

DECREMENTS SP & STORES HIGHER BYTE

(2) STACK POINTER

HIGHER BYTE

DECREMENTS SP & STORES LOWER BYTE (3) STACK POINTER LOWER BYTE HIGHER BYTE

BEFORE EXECUTION
SP BH CH DH 10 2002H BL 2001H CL DL 50 2002H 2000H

PUSH CX
AFTER EXECUTION
SP 2000H 2000H 2001H 50 10

BH CH
DH

BL 10 CL
DL

50
2002H

(3). POP Destination;

Destination can be register, segment register or memory. This instruction pops (takes) the contents of specified destination. In this stack pointer is incremented by 2. The lower byte data is popped first (SP+1). Then higher byte data is popped (SP+2). E.g. (1). POP AX; (2). POP DS; (3). POP [5000H];

(1) STACK POINTER

INITIAL POSITION AND READS LOWER BYTE LOWER BYTE

INCREMENTS SP & READS HIGHER BYTE LOWER BYTE

(2) STACK POINTER

HIGHER BYTE

INCREMENTS SP LOWER BYTE HIGHER BYTE (3) STACK POINTER

BEFORE EXECUTION
SP 2000H
BH BL
2000H

2001H
2002H

30 50 34

POP BX

AFTER EXECUTION
SP BH 2002H 50 BL 30
2000H 2001H

2002H

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(4). XCHG Destination, source;

This instruction exchanges contents of Source with destination.

It cannot exchange two memory locations directly. The contents of AL are exchanged with BL. The contents of AH are exchanged with BH. E.g. (1). XCHG BX, AX; (2). XCHG [5000H],AX;

BEFORE EXECUTION

AFTER EXECUTION

AH BH

20 AL 40 70 BL 80

AH 70 BH 20

AL BL

80 40

XCHG AX,BX;

(5). IN AL/AX, 8-bit/16-bit port address It reads from the specified port address. It copies data to accumulator from a port with 8-bit or 16-bit address. DX is the only register is allowed to carry port address. E.g. (1). IN AL, 80H; (2). IN AX,DX; //DX contains address of 16-bit port.

BEFORE EXECUTION
PORT 80H 10 AL

IN AL,80H;
AFTER EXECUTION
PORT 80H 10 AL 10

(6). OUT 8-bit/16-bit port address, AL/AX; It writes to the specified port address. It copies contents of accumulator to the port with 8-bit or 16bit address. DX is the only register is allowed to carry port address. E.g. (1). OUT 80H,AL; (2). OUT DX,AX; //DX contains address of 16-bit port.

BEFORE EXECUTION
PORT 50H

10

AL

40

OUT 50H,AL;
AFTER EXECUTION
PORT 50H

40

AL

40

(7). XLAT

XLAT called translate instruction, the operation of XLAT is changing the value of AL with the memory pointed to by (AL+BX)

AL

Mem[AL+BX] dddd+mmmm AL=dddd BX=mmmm AL=data data

More clearly the XLAT instruction converts the content of register AL, using a table. Its beginning address is contained in register BX. The content of register AL is interpreted as a relative address in the table. XLAT is the only instruction that adds 8 bit number to 16 bit number!

XLAT never Affects the flags..

EXAMPLE 7:
Suppose that a seven segment LED display lookup table is stored in memory at address TABLE, now XLAT can use this table to translate the BCD number in AL to a seven segment code also in AL. Let TABLE =1000H,DS=1000H,

 First
x 3 x 2 x 1

, obtain the look up table.

x a 0 b c d e f g
0 1 2 3 4 5 6 7 8 9 3FH 06H 5BH 4FH 66H 6DH 7DH 27H 7FH 6FH

0 0 0 0 0 0 0 0 1 1

0 0 0 0 1 1 1 1 0 0

0 01 0 10 1 01 1 11 0 00 0 11 1 01 1 11 0 01 0 11

1 1 1 1 1 0 0 1 1 1

11 10 01 11 11 11 11 10 11 11

1 0 1 0 0 0 1 0 1 0

1 0 0 0 1 1 1 0 1 1

0 0 1 1 1 1 1 0 1 1

Next see the code

The code for the operation of converting is very simple using XLAT TABLE DB 3FH,06H,5BH,4FH,66H,6DH,7DH,27H,7FH,6FH MOV AL,SOME_BCD_VALUE MOV BX,OFFSET TABLE XLAT For example take 06H(6 BCD) for the initial value of AL,after translation AL contains 7DH, see the figures in the next slide.

TABLE DB 3FH,06H,5BH DB4FH,66H,6DH BX=address (TABLE)=1000H DB 7DH,27H,7FH,6FH MOV AL,06H MOV BX,OFFSET TABLE XLAT

3FH 06H 5BH 4FH 66H 6DH 7DH 27H

AL=4FH AL=06H

Temp=AL+BX=1006H AL=memory [temp] AL=4FH, which is the seven segment code of 06H

7FH 6FH

DS

TABLE

1000H

EXAMPLE 8:
Write code to read the input key from port (60H) and output the value to a 7-segemnt display at 80H. KEYS EQU 60H; DISPLAY EQU 80H; TABLE DB3FH,06H,5BH,4FH,66H,6DH,7DH,27H,7FH,6FH LEA BX,TABLE; IN AL,KEYS; XLAT OUT DISPLAY,AL

(8). LEA 16-bit register (source), address (dest.); LEA Also known as Load Effective Address (LEA). It loads a 16 bit register with the offset address of the operand

E.g. (1). LEA BX, Address; (2). LEA SI, Address[BX];

(9). LDS 16-bit register (source), address (dest.); (10). LES 16-bit register (source), address (dest.); LDS Also known as Load Data Segment (LDS). LES Also known as Load Extra Segment (LES). It loads the contents of DS (Data Segment) or ES (Extra Segment) & contents of the destination to the contents of source register.

E.g. (1). LDS BX,5000H; (2). LES BX,5000H;

(1). LDS BX,5000H; (2). LES BX,5000H;

15 0

BX

20

10

7 0 10 5000H
20 5001H 5002H 5003H

DS/ES

40

30

30 40

(11). LAHF:- This instruction loads the AH register from the contents of lower byte of the flag register. This command is used to observe the status of the all conditional flags of flag register. E.g. LAHF;
(12). SAHF:- This instruction sets or resets all conditional flags of flag register with respect to the corresponding bit positions. If bit position in AH is 1 then related flag is set otherwise flag will be reset. E.g. SAHF;

(13). PUSH F:- This instruction decrements the stack pointer by 2. It copies contents of flag register to the memory location pointed by stack pointer. E.g. PUSH F;

(14). POP F:- This instruction increments the stack pointer by 2. It copies contents of memory location pointed by stack pointer to the flag register. E.g. POP F;

ARITHEMATIC INSTRUCTIONS
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These instructions perform the operations like:

Addition, Subtraction, Increment, Decrement.

(1). ADD destination, source;

This

instruction adds the contents of source operand with the contents of destination operand. The source may be immediate data, memory location or register. The destination may be memory location or register. The result is stored in destination operand.
AX

is the default destination register.

Possibilities for ADD instruction: ADD reg, imm ADC reg, imm ADD reg, mem ADC reg, mem ADD reg, reg ADC reg, reg ADD mem, imm ADC mem, imm ADD mem, reg ADC mem, reg

E.g. (1). ADD AX,2020H; (2). ADD AX,BX;

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BEFORE EXECUTION

AFTER EXECUTION

AH

10 AL 10 ADD AX,2020H AH 30 AL 30

1010 +2020 3030

BEFORE EXECUTION AH BH 10 AL 10 20 BL 20

AFTER EXECUTION
AH BH 30 AL 20 BL 30 20 2050

ADD AX,BX

(2). ADC destination, source

This

instruction adds the contents of source operand with the contents of destination operand with carry flag bit. The source may be immediate data, memory location or register. The destination may be memory location or register. The result is stored in destination operand. AX is the default destination register.

E.g.

(1). ADC AX,2020H; (2). ADC AX,BX;

BEFORE EXECUTION

AFTER EXECUTION

CY AH

1 10 AL 10

ADC AX,2020H
1010 +2020 3030+1=3031

AH 30

AL 31

BEFORE EXECUTION

AFTER EXECUTION AH 30 AL 31 BL 20 2050

CY
AH BH

1
10 AL 10 20 BL 20

ADC AX,BX

BH 20

(3). INC source

This

instruction increases the contents of source operand by 1. The source may be memory location or register. The source can not be immediate data. The result is stored in the same place.

E.g.

(1). INC AX; (2). INC [5000H];

BEFORE EXECUTION

AFTER EXECUTION

AH

10 AL 10

INC AX

AH 10

AL 11

BEFORE EXECUTION
5000H

AFTER EXECUTION

1010

INC [5000H]

5000H

1011

(4). DEC source;

This

instruction decreases the contents of source operand by 1. The source may be memory location or register. The source can not be immediate data. The result is stored in the same place.

E.g.

(1). DEC AX; (2). DEC [5000H];

BEFORE EXECUTION

AFTER EXECUTION

AH 10 AL 10

DEC AX

AH 10 AL 09

BEFORE EXECUTION

AFTER EXECUTION

5000H

1010

DEC [5000H]

5000H

1009

(5). SUB destination, source;

This

instruction subtracts the contents of source operand from contents of destination. The source may be immediate data, memory location or register. The destination may be memory location or register. The result is stored in the destination place.

Possibilities for SUB instruction: SUB reg, imm SBB reg, imm SUB reg, mem SBB reg, mem SUB reg, reg SBB reg, reg SUB mem, imm SBB mem, imm SUB mem, reg SBB mem, reg

E.g. (1). SUB AX,1000H; (2). SUB AX,BX;

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BEFORE EXECUTION
AH 20 AL 00

AFTER EXECUTION AH 10 AL 00

SUB AX,1000H
2000 -1000 =1000

BEFORE EXECUTION AH 20 AL 00

AFTER EXECUTION AH 10 AL 00

BH 10

BL 00

SUB AX,BX

BH

10

BL

00

(6). SBB destination, source;

Also

known as Subtract with Borrow. This instruction subtracts the contents of source operand & borrow from contents of destination operand. The source may be immediate data, memory location or register. The destination may be memory location or register. The result is stored in the destination place.

E.g.

(1). SBB AX,1000H; (2). SBB AX,BX;

BEFORE EXECUTION AFTER EXECUTION SBB AX,1000H

B 1

AH 10

AL 19

AH

20 AL 20
2020 - 1000 10201=1019 AFTER EXECUTION
AH 10 BH 10 AL BL 19 10 2050

BEFORE EXECUTION

B 1
AH 20 BH 10 AL BL 20 10

SBB AX,BX

(7). CMP destination, source

Also

known as Compare. This instruction compares the contents of source operand with the contents of destination operands. The source may be immediate data, memory location or register. The destination may be memory location or register. Then resulting carry & zero flag will be set or reset.

Possibilities of CMP instruction CMP reg, imm CMP reg, mem CMP reg, reg CMP mem, reg There is no CMP mem, imm E.g. (1). CMP AX,1000H; (2). CMP AX,BX;

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D=S: CY=0,Z=1 D>S: CY=0,Z=0 D<S: CY=1,Z=0

BEFORE EXECUTION
AH BH 10 10 AL BL 00 00

AFTER EXECUTION

CMP AX,BX

CY

BEFORE EXECUTION
AH BH 10 00 AL BL 00 10

AFTER EXECUTION

CMP AX,BX

CY

BEFORE EXECUTION
AH BH 10 20 AL BL 00 00

AFTER EXECUTION

CMP AX,BXH

CY

(8). AAA Also known as ASCII Adjust After Addition. This instruction is executed after ADD instruction. It works according to the following Algorithm: if low nibble of AL > 9 or AF = 1 then: AL = AL + 6; AH=AH + 1; AF = 1; CF = 1; else AF = 0; CF = 0; in both cases: clear the high nibble of AL. Example: MOV AX, 15 ; AH = 00, AL = 0Fh AAA ; AH = 01, AL = 05

(1). FOR AL<=09H

AX AX 00
AH

67
AL

BEFORE EXECUTION AFTER EXECUTION

00
AH

07
AL

(2). FOR AL>09H

AX 00
AH

0A
AL

BEFORE EXECUTION

(A)1010 +(06)0110=0001 0000

AX
AH

01

00
AL

AFTER EXECUTION

(9). AAS
Also known as ASCII Adjust After Subtraction. It converts the result of the subtraction of two valid unpacked BCD digits to a single valid BCD number and takes the AL register as an implicit operand. This instruction is executed after SUB instruction. (1). IF lower bits of AL<=09 then, Higher nibble of AL should loaded with zeroes. There should be no change in lower bits of AL. Bits of AH remains unchanged (2). IF lower bits of AL>09 then, Lower nibble of AL must be decremented by 06 (i.e. AL-0110). Bits of AH must be decremented by 01 (i.e. AH-0001) Higher nibble of AL should loaded with zeroes.

Example (1). MOV AX,0901H SUB AL, 9 AAS ; (2). ;BCD 91 ;Minus 9 Give AX =0802 h (BCD 82) ;AL =0011 1001 =ASCII 9 ;BL=0011 0101 =ASCII 5

;SUB AL, BL ;(9 - 5) Result :

;AL = 00000100 = BCD 04,CF = 0 ;AAS ;Result : ;AL=00000100 =BCD 04 ;CF = 0 NO Borrow required (b) ;AL = 0011 0101 =ASCII 5 ;BL = 0011 1001 = ASCII 9 ;SUB AL, BL ;( 5 - 9 ) Result : ;AL = 1111 1100 = - 4

; in 2s complement CF = 1
AAS ;Results : ;AL = 0000 0100 =BCD 04 ;CF = 1 borrow needed .
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(1). FOR AL<=09H

AX AX 06
AH

Hb=Higher bits, Lb=Lower bits. BEFORE EXECUTION AFTER EXECUTION

07
Lb

06
AH

07
Lb

(2). FOR AL>09H

AX 06
AH

0A
Lb Hb Lb

BEFORE EXECUTION

(A)1010 -(06)0110=0000 0100

AX 05
AH

04
AL

AFTER EXECUTION

(10). AAM

Also known as ASCII Adjust After Multiplication. This instruction is executed after MUL instruction. Then AH=AL/10 & AL=Remainder.
E.g. MOV AL,04 // AL=04 MOV BL,09 // BL=09 MUL BL AAM // 04*09=36 (i.e. BL*AL) // AH=03 & AL=06

E.g. (1). AAM;

(11). AAD; Also known as ASCII Adjust before Division. Then AL=AH*10 +AL & AH=0.

E.g. MOV AX, 0105 // AH=01, AL=05 AAD // AL=15 (i.e.0FH) & AH=00

E.g. (1). AAD; AAD Instruction - ADD converts unpacked BCD digits in the AH and AL register into a single binary number in the AX register in preparation for a division operation. Before executing AAD, place the Most significant BCD digit in the AH register and Last significant in the AL register. When AAD is executed, the two BCD digits are combined into a single binary number by setting AL=(AH*10)+AL and clearing AH to 0.

Example: MOV AX,0205h ;The unpacked BCD number 25 AAD ;After AAD , AH=0 and ;AL=19h (25) After the division AL will then contain the unpacked BCD quotient and AH will contain the unpacked BCD remainder. Example: ;AX=0607 unpacked BCD for 67 decimal ;CH=09H AAD ;Adjust to binary before division ;AX=0043 = 43H =67 decimal DIV CH ;Divide AX by unpacked BCD in CH ;AL = quotient = 07 unpacked BCD 79 ;AH = remainder = 04 unpacked BCD

ASCII Adjust before Division. Prepares two BCD values for division.
Algorithm:

AL = (AH * 10) + AL AH = 0 Example: MOV AX, 0105h ; AH = 01, AL = 05 AAD ; AH = 00, AL = 0Fh (15) RET

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(12). DAA;
Decimal

Adjust Accumulator. IF lower bits of AL>09. Then AL=AL+06.

E.g. MOV AL,53H //AL=53H MOV CL,29H //CL=29H ADD AL,CL // AL=7CH (i.e. 12=C) & C>9. DAA // AL=7C+06=82H. (i.e. 0111 1100 + 0000 0110)=1000 0010

(13). DAS
Decimal

Adjust after Subtraction. IF lower bits of AL>09. Then AL=AL-06.

E.g. MOV AL,30H // AL=30H MOV CL,20H // CL=20H SUB AL,CL // AL=0AH (i.e. A=10) & C=10>9. DAS // AL=0A-06=04H. (i.e. 0000 1010 - 0000 0110)=0000 0100

Multiplication operation
IMUL (Integer multiplication) unsigned multiplication IMUL reg IMUL mem MUL (Multiplication) signed multiplication. MUL reg MUL mem Always perform with accumulator. Effected flag are only over and carry flag.

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8 BIT MULTIPLICATION OPERATION

AL is multiplicand AX keep the result

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16 BIT MULTIPLICATION OPERATION

AX is multiplicand DX:AX keep the result

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(14). MUL operand

Unsigned Multiplication. Operand contents are positively signed. Operand may be general purpose register or memory location. If operand is of 8-bit then multiply it with contents of AL. If operand is of 16-bit then multiply it with contents of AX. Result is stored in accumulator (AX).

E.g. (1). MUL BH

// AX= AL*BH; // (+3) * (+4) = +12. // AX=AX*CX;

(2). MUL CX

(15).
Signed

IMUL operand

Multiplication. Operand contents are negatively signed. Operand may be general purpose register, memory location or index register. If operand is of 8-bit then multiply it with contents of AL. If operand is of 16-bit then multiply it with contents of AX. Result is stored in accumulator (AX).

E.g. (1). IMUL BH // AX= AL*BH; // (-3) * (-4) = 12. (2). IMUL CX // AX=AX*CX; (3). MOV AL,10h ; AL = 10h MOV CL,13h ; CL = 13h IMUL CL ; AX = 0130h (4). IMUL BH // AX= AL*BH; // (-3) * (-4) = 12. (5). IMUL CX // AX=AX*CX; (6). MOV AL,10h ; AL = 10h MOV CL,13h ; CL = 13h IMUL CL ; AX = 0130h

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DIVISION OPERATION
IDIV

(Integer division) unsigned division. IDIV reg IDIV mem DIV (Division) signed division.

DIV reg DIV mem

Always

perform with accumulator. Effected flag are only over and carry flag.

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8 BIT DIVISION OPERATION

AL is dividend AL keep the result AH keep the remainder

MOV AX, 0017h MOV BX, 0010h DIV BL ; AX = 0701

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16 BIT MULTIPLICATION OPERATION

DX:AX dividend. AX keep the result, DX keep the remainder.

MOV AX,4022h MOV DX,0000h MOV CX,1000h DIV CX

; ; ; ;AX = 0004 ;DX = 0022

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(16).

DIV operand

Unsigned Division. Operand may be register or memory. Operand contents are positively signed. Operand may be general purpose register or memory location. AL=AX/Operand (8-bit/16-bit) & AH=Remainder.

E.g. MOV AX, 0203 // AX=0203

MOV BL, 04 IDIV BL // BL=04 // AL=0203/04=50 (i.e. AL=50 & AH=03)

(17). IDIV operand

Signed Division. Operand may be register or memory. Operand contents are negatively signed. Operand may be general purpose register or memory location. AL=AX/Operand (8-bit/16-bit) & AH=Remainder.

E.g. MOV AX, -0203

MOV BL, 04 DIV BL

// AX=-0203 // BL=04 // AL=-0203/04=-50 (i.e. AL=-50 & AH=03)

(3). LOGICAL INSTRUCTIONS

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(1). AND destination,source

Destination

operand may be register, memory

location. Source operand may be register, immediate data or memory location. Result is stored in destination operand.

E.g.

MOV AX, 3F0FH // AX=3F0FH MOV BX, 0008H // BX=0008H AND AX,BX // AX=0008H

Follow the rules as given below:(1). 1 AND 1 = 1 (2). 1 AND 0 = 0 (3). 0 AND 1 = 0 (4). 0 AND 0 = 0

3F0FH=

0011 1111 0000 1111 0008H= 0000 0000 0000 1000 0000 0000 0000 1000 = 0008H

(2). OR destination,source
Destination

operand may be register, memory

location. Source operand may be register, immediate data or memory location. Result is stored in destination operand.

E.g.

MOV AX, 3F0FH MOV BX, 0098H OR AX,BX

// AX=3F0FH // BX=0098H // AX=3F9FH

Follow the rules as given below:(1). 1 OR 1 = 1 (2). 1 OR 0 = 1 (3). 0 OR 1 = 1 (4). 0 OR 0 = 0

3F0FH=

0011 1111 0000 1111 0098H= 0000 0000 1001 1000 0011 1111 1001 1111 = 3F9FH

(3). NOT operand;

Operand

may be register, memory location. This instruction inverts (complements) the contents of given operand. Result is stored in Accumulator (AX).

E.g.

MOV AX, 0200FH NOT AX

// AX=200FH // AX=DFF0H

Follow the rules as given below:(1). 1 NOT = 0 (2). 0 NOT = 1

200FH=

0010 0000 0000 1111 1101 1111 1111 0000 = DFF0H

(4). TEST destination,source

Different possibilities for Test instruction

TEST TEST TEST TEST TEST REG, memory memory, REG REG, REG memory, immediate REG, immediate

This instruction performs bit by bit logical AND operation for ZF, SF, PF flags only (i.e. only flags will be affected). Result is not stored anywhere. If the corresponding 0th bit of result contains 1 then result will be nonzero & zero flag will be cleared/reset (i.e. ZF=0). & If the corresponding 0th bit of result contains 0 then result will be zero & zero flag will be set (i.e. ZF=1).. E.g. (1). TEST AX,BX
(2). TEST [0500],06H
(3) MOV AL, 00000101b TEST AL, 1 ; ZF = 0. TEST AL, 10b ; ZF = 1.

RET

(5). RCR
Also known as Rotate Right through Carry. Each binary bit of the operand is rotated towards right by one position through Carry flag. Least Significant Bit (LSB) i.e. B0 is placed in the Carry flag. Then carry flag bit is placed in the Most significant Bit (MSB) position B15.

Different combinations for RCR instruction RCR memory, immediate RCR REG, immediate RCR memory, CL RCR REG, CL Rotate operand1 right through Carry Flag by number of bits is set by operand2.

Example: STC ; set carry (CF=1). MOV AL, 1Ch ; AL = 00011100b RCR AL, 1 ; AL = 10001110b, CF=0. RET
103

OF=0 if first operand keeps original sign

BEFORE EXECUTION

B 1

B 1

B 0

B 1

B 0

B 0

B 1

B 0

B B B B B B B B 0 0 0 1 0 0 0 1

CF 0

15

AFTER EXECUTION
B 0 B 1 B 1 B 0 B 1 B 0 B 0 B 1 B B B B B B B B 0 0 0 0 1 0 0 0 CF
1

15

(6). RCL
Also known as Rotate Left through Carry. Each binary bit of the operand is rotated towards left by one position through Carry flag. Least Significant Bit (LSB) of operand i.e. B0 is placed in the B1. Then Most Significant Bit (MSB) of operand is placed in carry flag bit.

RCL memory, immediate RCL REG, immediate RCL memory, CL RCL REG, CL Rotate operand1 left through Carry Flag. The number of rotates is set by operand2. When immediate is greater then 1, assembler generates several RCL xx, 1 instructions because 8086 has machine code only for this instruction (the same principle works for all other shift/rotate instructions). Example: STC ; set carry (CF=1). MOV AL, 1Ch ; AL = 00011100b RCL AL, 1 ; AL = 00111001b, CF=0. RET OF=0 if first operand keeps original sign. 106

BEFORE EXECUTION

CF

B 1

B 0

B 0

B 1

B 0

B 0

B 1

B 0

B B B B B B B B 0 0 0 1 0 0 0 1

AFTER EXECUTION
CF 1

B 0

B 0

B 1

B 0

B 0

B 1

B 0

B 0

B B B B B B B B 0 0 1 0 0 0 1 0

ROL DEST, SOURCE

ROL memory, immediate ROL REG, immediate memory, CL ROL REG, CL Rotate operand1 left. The number of rotates is set by operand2. Algorithm: shift all bits left, the bit that goes off is set to CF and the same bit is inserted to the right-most position. Example: MOV AL, 1Ch ; AL = 00011100b ROL AL, 1 ; AL = 00111000b, CF=0. RET OF=0 if first operand keeps original sign.

108

ROR DEST, SOURCE

ROR memory, immediate ROR REG, immediate ROR memory, CL ROR REG, CL Rotate operand1 right. The number of rotates is set by operand2. Algorithm: shift all bits right, the bit that goes off is set to CF and the same bit is inserted to the left-most position. Example: MOV AL, 1Ch ; AL = 00011100b ROR AL, 1 ; AL = 00001110b, CF=0. RET OF=0 if first operand keeps original sign.

109

(4). STRING MANIPULATION INSTRUCTIONS SET

110

STRING INSTRUCTIONS
String instructions

MOVS

LODS

STOS

MOVSB

MOVSW

LODSB

LODSW

STOSB

STOSW

B stands for byte, and W stands for word

1). MOVSB : Copy byte at DS:[SI] to ES:[DI]. Update SI and DI.

DS:[SI] if

ES:[DI]

DF = 0 then

SI = SI + 1 & DI = DI + 1

else
SI = SI - 1 & DI = DI - 1

Note: 1. DF is Direction flag 2. MOVS instruction deals with SI in the data segment and DI in the extra segment. The extra segment cant be overridden here).

REP INSTRUCTION WITH STRING INSTRUCTIONS

MOV CX,100 REP MOVSB CLD clears the D flag (D=0) How does the above code executes? STD sets the Dflag to 1(D=1) IF (D flag==0) { D=1 we decrement SI,DI Memory[DI]Memory[SI] D=0 we increment DI,SI SI++; DI++; } else(If D flag==1) { SI--; DI -; CX-- } IF(CX!=0) //repeat the instruction, other wise then next one//

2). MOVSW Copy word at DS:[SI] to ES:[DI] Update SI and DI The same as MOVSB except we move a word not a byte, see what happens to SI and DI DS:[SI] ES:[DI]
if

DF = 0 then
DI = DI + 2

SI = SI + 2 &
else

SI = SI - 2

& DI = DI - 2

EXAMPLE 12:
Copy 1000 bytes from location STR1 to STR2,Both are in data segment. STR2 SI=add(str1) LEA SI,STR1 LEA DI, STR2 DI=add(str2 AX=DS MOV AX,DS ES=AX=DS MOV ES,AX MOV CX,1000; Load CX with 1000 Dflag=0 CLD STR1 REP MOVSB
DS ES

1000 bytes

1000 bytes

EXAMPLE 13:

Copy 500 words from physical address 0800:200 to physical address 4000:0300,use string instructions.
0800 is the segment address and the 200 is the offset by contrast 4000 is the segment address and 0300 is its offset

So, we begin by assigning the segments addresses to DS and ES and the offsets to SI and DI

MOV DS,0800H MOV ES,4000H MOV SI,0200H MOV DI,0300H CLD MOV CX,500 REP MOVSW

1000 bytes DI=300

ES=4000H
D=0

D A T A
1000 bytes

SI=200
DS=0800H

3). STOSB This instruction Store byte in AL into ES:[DI]. Update DI. 4). STOSW This instruction Store word in AX into ES:[DI]. Update DI. How STOSB executes? ES:[DI] AL if DF = 0 then
DI = DI + 1

Else
DI = DI 1

And STOSW executes the same as STOSB but DI is incremented or decremented by 2

5). LODSB This instruction load byte in AL from DS:[SI]. Update SI by one. 6). LODSW This instruction load word in AX from DS:[SI]. Update SI by two.

How LODSB exexutes? AL DS:[SI] if D = 0 then

SI = SI + 1

Else SI = SI 1
LODSW is the same except that SI is changed by 2

(7). REP
Also

known as Repeat instruction prefix. This instruction executed repeatedly until the CX register becomes zero. When CX becomes zero then program control passes to next instruction. There are following sub types of REP instruction,

(i). REPE:- REPeat instruction while Equal. (ii). REPZ:- REPeat instruction while Zero. (iii). REPNE:- REPeat instruction while Not Equal. (iv). REPNZ:- REPeat instruction while Not Zero.

(8). CMPS
Also

known as Compare String Byte or String Word. The length of the string must be stored in register CX. If both the byte or word are equal then zero flag will be set (i.e. ZF=1) otherwise it will be reset (i.e. ZF=0). When zero flag will be set then CX=0. There are following sub types, (i). CMPSB:- Compare String Byte. (ii). CMPSW:- Compare String Word.

CMPSB: Compare bytes: ES:[DI] from DS:[SI]. Algorithm: DS:[SI] - ES:[DI] set flags according to result: OF, SF, ZF, AF, PF, CF if DF = 0 then SI = SI + 1 DI = DI + 1 Else SI = SI 1 DI = DI - 1
122

CMPSW:Compare String Word Compare words: ES:[DI] from DS:[SI]. Algorithm: DS:[SI] - ES:[DI] set flags according to result: OF, SF, ZF, AF, PF, CF if DF = 0 then SI = SI + 2 DI = DI + 2else SI = SI 2 DI = DI - 2

123

CONVERSION FROM ONE FORMAT TO ANOTHER

(9). Byte to Word : CBW

(10). Word to Double word : CWD

124

(9). BYTE TO WORD : CBW

Signed convert AL -> AX Convert byte into word. Algorithm: if high bit of AL = 1 then: AH = 255 (0FFh) else AH = 0 Example: MOV AX, 0 ; AH = 0, AL = 0 MOV AL, -5 ; AX = 000FBh (251) CBW ; AX = 0FFFBh (-5) RET

125

(10). WORD TO DOUBLE WORD : CWD

Signed convert AX -> DX:AX Convert Word to Double word. Algorithm: if high bit of AX = 1 then: DX = 65535 (0FFFFh) else DX = 0 Example: MOV DX, 0 ; DX = 0 MOV AX, 0 ; AX = 0 MOV AX, -5 ; DX AX = 00000h:0FFFBh CWD ; DX AX = 0FFFFh:0FFFBh RET

126

EX. FOR CONVERSION OPERATION

MOV CBW MOV CBW MOV CWD MOV CWD

AL,22h

; AX=0022h
AL,F0h ; AX=FFF0h

AX, 3422h
; DX=0000h; AX=3422h AX, F422h ; DX=FFFFh; AX=F422h

127

BRANCHING
INSTRUCTIONS SET

128

(1). CALL
Also

known as unconditional call. Under unconditional call, the execution control is transferred to the specified location independent of any status or condition. This instruction is used to call subroutine from a main program. There are following sub types,

(i). NEAR CALL:- It pushes only IP into the stack. (ii). FAR CALL:- It pushes IP & CS into the stack.

Transfers control to procedure, return address is (IP) is pushed to stack. 4-byte address may be entered in this form:1234h:5678h, first value is a segment second value is an offset (this is a far call, so CS is also pushed to stack). Example: ORG 100h ; for COM file. CALL p1 ADD AX, 1 RET ; return to OS.

p1 PROC ; procedure declaration. MOV AX, 1234h RET ; return to caller. p1 ENDP

130

JUMP AND LOOPS OPERATION

Control structures

Selection using jumping instructions Unconditional jumping Conditional jumping Repetition / Loop

131

(2). JMP

Also known as unconditional jump. Under unconditional jump, the execution control is transferred to the specified location using 8-bit or 16-bit displacement.

(3). Conditional jump instructions

JA / JNBE - This instruction performs the Jump if above (or) Jump if not below or equal operations according to the condition, if CF and ZF = 0 . Example: ( 1 ) CMP AX, 4371H

;Compare by subtracting 4371H from AX

JA RUN_PRESS

;Jump to label RUN_PRESS if AX

above 4371H

( 2 ) CMP AX, 4371H ;Compare ( AX 4371H) JNBE RUN_PRESS ;Jump to label RUN_PRESS if AX not below or equal to 4371H
133

JAE / JNB / JNC - This instructions performs the Jump if above or equal, Jump if not below, Jump if no carry operations according to the condition, if CF = 0. Examples: 1. CMP AX, 4371H ;Compare ( AX 4371H) JAE RUN ;Jump to the label RUN if AX is above or equal to 4371H . 2. CMP AX, 4371H ;Compare ( AX 4371H) JNB RUN_1 ;Jump to the label RUN_1 if AX is not below than 4371H 3. ADD AL, BL JNC OK ; Add AL, BL. If result is with in ;acceptable range, continue
134

JB/JC/JNAE Instruction - Jump if below/Jump if carry/Jump if not above nor equal JBE/JNA Instructions - Jump if below or equal /Jump if not above JCXZ Instruction - Jump if the CX register iszero JE/JZ Instruction - Jump if equal/Jump if zero JG/JNLE Instruction - Jump if greater/Jump if notless than nor equal JB/JC/JNAE Instruction - This instruction performs the Jump if below (or) Jump if carry (or) Jump if not below/ equal operations according to the condition, if CF = 1 Example: 1. CMP AX, 4371H ;Compare ( AX 4371H ) JB RUN_P ;Jump to label RUN_P if AX is below 4371H 2. ADD BX, CX ;Add two words and Jump to JC ERROR ; label ERROR if CF = 1

135

JBE/JNA Instruction - This instruction performs the Jump if below or equal (or) Jump if not above operations according to the condition, if CF and ZF = 1 Example: CMP AX, 4371H ;Compare ( AX 4371H ) JBA RUN ;Jump to label RUN if AX is ;below or equal to 4371H CMP AX, 4371H ;Compare ( AX 4371H ) JNA RUN_R ;Jump to label RUN_R if AX is ;not above than 4371H Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 47 59
136

 JCXZ Instruction - This instruction performs the Jump if CX register is zero. If CX does not contain all zeros, execution will simply proceed to the next instruction. Example: JCXZ SKIP_LOOP;If CX = 0, skip the process NXT: SUB [BX], 07H ;Subtract 7 from data value INC BX ; BX point to next value LOOP NXT ; Loop until CX = 0 SKIP_LOOP ;Next instruction Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 48

137

JE/JZ Instruction Instruction - This instruction performs the Jump if equal (or) Jump if zero operations according to the condition if ZF = 1 Example: NXT:CMP BX, DX ;Compare ( BX DX ) JE DONE ;Jump to DONE if BX = DX, SUB BX, AX ;Else subtract Ax INC CX ;Increment counter JUMP NXT ;Check again DONE: MOV AX, CX ;Copy count to AX Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 49 Example: IN AL, 8FH ;read data from port 8FH SUB AL, 30H ;Subtract minimum value JZ STATR ; Jump to label if result of ;subtraction was 0 Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 50
138

 JL/JNGE Instruction - Jump if less than/Jump if not greater than or equal JLE/JNG Instruction - Jump if less than or equal/ Jump if not greater JMP Instruction - Unconditional jump to specified destination Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 52 JGE/JNL Instruction - This instruction performs the Jump if greater than or equal / Jump if not less than operation according to the condition if SF = OF Example: CMP BL, 39H ;Compare by the ;subtracting 39H from BL JGE NEXT11 ;Jump to label if BL is ;more positive than 39H ; or equal to 39H CMP BL, 39H ;Compare by subtracting ;39H from BL JNL NEXT22 ;Jump to label if BL is not ;less than 39H Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 53

139

 JL/JNGE Instruction - This instruction performs the Jump if less than / Jump if not greater than or equal operation according to the condition, if SF OF Example: CMP BL, 39H ;Compare by subtracting 39H ;from BL JL AGAIN ;Jump to the label if BL is more ;negative than 39H CMP BL, 39H ;Compare by subtracting 39H ;from BL JNGE AGAIN1 ; Jump to the label if BL is not ;more positive than 39H or ;not equal to 39H Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 54

140

JLE/JNG Instruction - This instruction performs the Jump if less than or equal / Jump if not greater operation according to the condition, if ZF=1 and SF OF Example: CMP BL, 39h ; Compare by subtracting 39h ;from BL JLE NXT1 ;Jump to the label if BL is more ;negative than 39h or equal to 39h CMP BL, 39h ;Compare by subtracting 39h ;from BL JNG AGAIN2 ; Jump to the label if BL is not ;more positive than 39h Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 55 JNA/JBE Instruction - Jump if not above/Jump if below or equal JNAE/JB Instruction - Jump if not above or equal/ Jump if below JNB/JNC/JAE Instruction - Jump if not below/Jump if no carry/Jump if above or equal

141

 JNE/JNZ Instruction - Jump if not equal/Jump if not zero Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 56 JNE/JNZ Instruction - This instruction performs the Jump if not equal / Jump if not zero operation according to the condition, if ZF=0 Example: NXT: IN AL, 0F8H ;Read data value from port CMP AL, 72 ;Compare ( AL 72 ) JNE NXT ;Jump to NXT if AL 72 IN AL, 0F9H ;Read next port when AL = 72 MOV BX, 2734H ; Load BX as counter NXT_1:ADD AX, 0002H ;Add count factor to AX DEC BX ;Decrement BX JNZ NXT_1 Repeat until BX = 0 Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 57
142

JNG/JLE Instruction - Jump if not greater/ Jump if less than or equal JNGE/JL Instruction - Jump if not greater than nor equal/Jump if less than JNL/JGE Instruction - Jump if not less than/ Jump if greater than or equal JNLE/JG Instruction - Jump if not less than nor equal to /Jump if greater than Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 58 JNO Instruction Jump if no overflow JNP/JPO Instruction Jump if no parity/ Jump if parity odd JNS Instruction - Jump if not signed (Jump if positive) JNZ/JNE Instruction - Jump if not zero / jump if not equal JO Instruction - Jump if overflow Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004

143

 JNO Instruction This instruction performs the Jump if no overflow operation according to the condition, if OF=0 Example: ADD AL, BL ; Add signed bytes in AL and BL JNO DONE ;Process done if no overflow MOV AL, 00H ;Else load error code in AL DONE: OUT 24H, AL ; Send result to display Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 60

144

 JNP/JPO Instruction This instruction performs the Jump if not parity / Jump if parity odd operation according to the condition, if PF=0 Example: IN AL, 0F8H ;Read ASCII char from UART OR AL, AL ;Set flags JPO ERROR1 ;If even parity executed, if not ;send error message Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 61
145

 JNS Instruction - This instruction performs the Jump if not signed (Jump if positive) operation according to the condition, if SF=0 Example: DEC AL ;Decrement counter JNS REDO; Jump to label REDO if counter has not ;decremented to FFH

146

 JO Instruction - This instruction performs Jump if overflow operation according to the condition OF = 0 Example: ADD AL, BL ;Add signed bits in AL and BL JO ERROR ; Jump to label if overflow occur ;in addition MOV SUM, AL ; else put the result in memory ;location named SUM Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004 62
147

 JPE/JP Instruction - Jump if parity even/ Jump if parity

148

 JPO/JNP Instruction - Jump if parity odd/ Jump if no parity

149

 JS Instruction - Jump if signed (Jump if negative) 63

150

 JZ/JE Instruction - Jump if zero/Jump if equal Example (cont..) M. Krishna Kumar MAM/M2/LU5/V1/2004

151

 JPE/JP Instruction - This instruction performs the Jump if parity even / Jump if parity operation according to the condition, if PF=1 Example: IN AL, 0F8H ;Read ASCII char from UART OR AL, AL ;Set flags JPE ERROR2 ;odd parity is expected, if not ;send error message

152

 JS Instruction - This instruction performs the Jump if sign operation according to the condition, if SF=1 Example: ADD BL, DH ;Add signed bytes DH to BL JS JJS_S1 ;Jump to label if result is ;negative Example (cont..)

153

154

155

LOOP OPERATION
Base on CX (Counter register) to count the loop. Instructions :
1.

2.
3. 4.

LOOP ; Dec CX 0 LOOPZ ;CX<>0 and Z=1 LOOPNZ ;CX<>0 and Z=0 JCXZ ; Jump if CX=0, used with LOOP to determine the CX before loop.

156

LOOP EXAMPLE

157

JCXZ

158

EXAMPLE FINDING FIRST CHARACTER

159

FLAG MANIPULATION INSTRUCTIONS SET

160

(1). CMC
Also

known as Complement Carry Flag. It inverts contents of carry flag. if CF = 1 then CF will be = 0. if CF = 0 then CF will be = 1.
E.g.

CMC

(2). STC
Also

known as Set Carry Flag. It makes carry flag in set condition. After execution CF = 1.
E.g.

STC

(3). CLI
Also

known as Clear Interrupt Flag. It makes interrupt flag in reset condition. After execution IF = 0. E.g.

CLI

(4). CLD
Also

known as Clear Direction Flag. It makes direction flag in reset condition. After execution DF = 0.
E.g.

CLD

MACHINE CONTROL INSTRUCTIONS SET

165

(1). HLT
Also

known as Halt It makes the processor to be in stable (do nothing) condition.

E.g.

HLT

(2). NOP
Also

known as No Operation. It tells about further there will be no operation to be performed.

E.g.

NOP

ADDITIONAL PART
168

MACROS

avoid repetitious SAS code

create generalizable and flexible SAS code

pass information from one part of a SAS job to another conditionally execute data steps and PROCs dynamically create code at execution time

MAXIMUM MODE
Maximum mode

Maximum mode is designed to be used with a coprocessor exists in the

system.

All the control signals (except RD) are not generated by the microprocessor. But we still need those control signals. Solution: 8288.

WHAT WE HAVE STUDIED.

A Processor based system Microprocessor Microprocessor 8085 fundamentals.

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Probable Questions..
What are the fundamental units of microprocessor based system? Define microprocessor ? Which was the first microprocessor? What are the main features of 8085 microprocessor?

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Questions/ Suggestions

Thank You .. for Your Attention ..!

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