Case study of NS0808 A/D Characterization

(SEETHARAMAN N) REG NO: 23541007 ROLL NO: 191124006 Master of Technology School of VLSI Technology Bengal Engineering and Science University Shibpur, Howrah-711103

Contents
Objective Project Overview Datasheet Specification of ADC0808 Top-level description of test circuit Derivation of block level specifications Devices used with minimum specs need for each

Glimpse of data captured

Results obtained Future scope of work

Objective
To study and develop a step by step approach to carry out

testing and characterizaton of a given ADC from scatch As case studies ,

Test an ADC for performance parameters and compare them with

that provided in datasheet To develop an evaluation board to carry out characterization of given

Project Overview
PART - I
Study of fundamentals of ADC Study on Error Budgeting and techniques

PART - II
Selecting an test methodology

PART - III
A case study of NS 0808ADC

Future Work
Development of an evaluation board for an ADC from scratch and cross check the

specification with that mentioned in Datasheet . Getting process up and set to test and characterize an ADC

Case Study : NS0808ADC

Some Key Specifications
Resolution 8 Bits Total Unadjusted Error LSB and 1 LSB Single Supply 5 VDC Low Power 15 mW Conversion Time 100 s Conversion Technique : SAR # Input Channels = 8 Operating Temp -40 -85 Reference Mode : Ext

As a case study, NS ADC0808 has been characterized for the following static and dynamic parameters:
1) DC Offset Error 2) DC Gain Error 3) Signal to Noise Ratio (SNR)

4) Total Harmonic Distortion (THD)

5) Integral Non Linearity (INL) 6) Differential Non Linearity (DNL) 7) Spurious Free Dynamic Range 8) Power Dissipation

What is needed ??
Control Signal
Clock Data Capture & Storage I/p Signal Power Supply Report Generation

Evaluation of stored data

Step (1) connect power supply and reference voltages

REQUIREMENT: NS ADC0808 requires VDD = 5V then tolerance has to be 0.25 * LSB = [ 5 / 2 ^ (8+2) ]V = 0.00488 V = 5mV == 0.1% tolerance for 5V Supply VREF+/- = 5V, 0V needs a tolerance of 0.25*LSB = 0.1% tolerance for 5V EQUIPMENT USED: Agilent E3620A DC power supply, dual-output: 0-25 V, 0-1A. Ripple & Noise from 20 Hz to 20 MHz Normal Mode Voltage rms: 350 V Peak-to-Peak: 1.5 mV * Hence meeting the requirement of 0.1%tolerance at 5V = 5mV.

Step (2) provide a continuous input signal [vin] and clock signal [Clock]
REQUIREMENT: Signal Source: As ADC0808 has resolution of 8Bits, so maximum expected SNDR = 6.02*ENOB +1.76dB = 49.92dB. In order to effectively test and characterize the ADC, test signal source must have an SNDR equivalent to that of a (8+2) bit ENOB ADC [i.e61.76dB].

EQUIPMENT USED: Signal Source: Agilent 33521A I-Channel 30 MHz Function/Arbitrary Waveform Generator 16 MSa/channel arbitrary waveform memory option 250 MSa/s, 16-bit sampling rate for higher time resolution arbitrary waveforms *Hence 16Bit sampling satisfies greater 10bit resolution criteria .

Step (2) provide a continuous input signal [vin] and clock signal [Clock] Cont..
REQUIREMENT: Clock : Frequency = (8387* 10K )/ 1024*128 = 633Hz Voltage = 5V-0Vwith [0.01% tolerance] Low Jitter

Using the Coherent Sampling Criteria

EQUIPMENT USED: Clock: Agilent 33522A 2-Channel 30 MHz Function/Arbitrary Waveform Generator < 40 ps jitter and less 250 MSa/s, 16-bit sampling rate for higher time resolution arbitrary waveforms 16 MSa/channel arbitrary waveform memory option *Hence satisfies the low jitter criteria.

Step (3) Control Signal

This EOC output is coupled to SC input, where falling edge of EOC output acts as SC input to direct the ADC to start the next conversion . Input control signals ALE and OE, being active-high, are tied to Vcc (+5 volts) Channel Selection is done through ADD A , ADD B, ADD C
(input to 3x 8 Multiplexer)

Step (4) obtain the corresponding samples for a fixed number [N] of points & Step (5) Store the data.
REQUIREMENT:
More than double the sampling speed [2*0.01MHz] Voltage range 3.5- 5V input high Greater than 128*1024 = 128K bit storage.

EQUIPMENT USED:
Agilent 16802A Logic Analyzer, 68 channels, 4 GHz Timing, 250 MHz State, 1M Depth Memory Space. *Hence satisfies the double sampling speed and memory requirement.

Time Domain Plot of Output data in decimal form

128*1024 pts FFT plot for Output digital data

FFT Plot Generator

SNDR Calculation

RESULTS OBTAINED
For the ADC under test: NS ADC0808 Critical parameters measured from the output plots
DC Offset Error : < 5mV Signal to Noise Ratio (SNR) : 36dB Total Harmonic Distortion (THD) : 62dB

Integral Non Linearity (INL) : 1LSB

Differential Non Linearity (DNL) : 1 LSB Power Dissipation : 3.5mA

Future Scope Of Work

Case Study II [TI ADC 7953] Characterization using Evaluation board provided by TI

Developed of Evaluation Board for 7953 ADC from scratch

with Lab View Interface Creation of test plan and interface circuitry for a latest ADC

Thank You