1

EKT 441
MICROWAVE COMMUNICATIONS
CHAPTER 6:
MICROWAVE AMPLIFIERS
2
INTRODUCTION
Most RF and microwave amplifiers today used transistor devices
such as Si or SiGe BJTs, GaAs HBTs, GaAs or InP FETs, or GaAs
HEMTs.

Microwave transistor amplifiers are rugged, low cost, reliable and
can be easily integrated in both hybrid an monolithic integrated
circuitry.
3
General Amplifier Block Diagram
( ) ( ) ( ) ( ) . . .
3
3
2
2 1
T O H t v a t v a t v a t v
i i i o
+ + + =
Input and output voltage relation of the amplifier
can be modeled simply as:
V
cc

P
L

P
in

The active
component
v
i
(t)
v
s
(t)
v
o
(t)
DC supply
Z
L

V
s

Z
s

Amplifier
Input
Matching
Network
Output
Matching
Network
i
i
(t)
i
o
(t)
4
Amplifier Classification
Amplifier can be categorized in 2 manners.
According to signal level:
Small-signal Amplifier.
Power/Large-signal Amplifier.
According to D.C. biasing scheme of the active component:
Class A.
Class B.
Class AB.
Class C.

There are also other classes, such as Class D (D stands for
digital), Class E and Class F. These all uses the transistor/FET as
a switch.
Our approach in this chapter
5
Small-Signal Versus Large-Signal Operation
Z
L

V
s

Z
s

Sinusoidal waveform
Usually non-sinusoidal waveform
Large-signal: ( ) ( ) ( ) ( ) . . .
2
3
2
2 1
T O H t v a t v a t v a t v
i i i o
+ + + =
Nonlinear
Small-signal:
( ) ( ) t v a t v
i o 1
~
Linear
v
o
(t)
v
i
(t)
6
Small-Signal Amplifier (SSA)
All amplifiers are inherently nonlinear.
However when the input signal is small, the input and output
relationship of the amplifier is approximately linear.




This linear relationship applies also to current and power.
An amplifier that fulfills these conditions: (1) small-signal operation (2)
linear, is called Small-Signal Amplifier (SSA). SSA will be our focus.
If a SSA amplifier contains BJT and FET, these components can be
replaced by their respective small-signal model, for instance the
hybrid-Pi model for BJT.
( ) ( ) ( ) ( ) ( ) t v a T O H t v a t v a t v a t v
i i i i o 1
3
3
2
2 1
. . . ~ + + + =
When v
i
(t)0 (< 2.6mV)
( ) ( ) t v a t v
i o 1
~ (1.1)
Linear relation
7
Example 1.1 - An RF Amplifier Schematic (1)
Z
L

V
s

Z
s

Amplifier
Input
Matching
Network
Output
Matching
Network
DC supply
RF power flow
8
Typical RF Amplifier Characteristics
To determine the performance of an amplifier, the following
characteristics are typically observed.
1. Power Gain.
2. Bandwidth (operating frequency range).
3. Noise Figure.
4. Phase response.
5. Gain compression.
6. Dynamic range.
7. Harmonic distortion.
8. Intermodulation distortion.
9. Third order intercept point (TOI).


Important to small-signal
amplifier
Important parameters of
large-signal amplifier
(Related to Linearity)
9
Power Gain
For amplifiers functioning at RF and microwave frequencies, usually
of interest is the input and output power relation.
The ratio of output power over input power is called the Power Gain
(G), usually expressed in dB.



There are a number of definition for power gain as we will see shortly.
Furthermore G is a function of frequency and the input signal level.

dB log 10
Power Input
Power Output
10
|
.
|

\
|
= G
Power Gain
(1.2)
10
Why Power Gain for RF and Microwave
Circuits? (1)
Power gain is preferred for high frequency amplifiers as the
impedance encountered is usually low (due to presence of parasitic
capacitance).

For instance if the amplifier is required to drive 50 load the voltage
across the load may be small, although the corresponding current
may be large (there is current gain).
For amplifiers functioning at lower frequency (such as IF frequency), it
is the voltage gain that is of interest, since impedance encountered is
usually higher (less parasitic).
For instance if the output of IF amplifier drives the demodulator
circuits, which are usually digital systems, the impedance looking into
the digital system is high and large voltage can developed across it.
Thus working with voltage gain is more convenient.
Power = Voltage x Current
11
Why Power Gain for RF and Microwave
Circuits? (2)
Instead on focusing on voltage or current gain, RF engineers focus on
power gain.
By working with power gain, the RF designer is free from the
constraint of system impedance. For instance in the simple receiver
block diagram below, each block contribute some power gain. A large
voltage signal can be obtained from the output of the final block by
attaching a high impedance load to its output.

LO
IF Amp.
BPF
LNA
BPF
RF Portion
(900 MHz)
IF Portion
(45 MHz)
RF signal
power
1 W
15 W
IF signal
power
75 W
7.5 mW
400
t
v(t)
4.90 V
R
V
average
P
2
2
=
12
Harmonic Distortion (1)
Z
L

V
s

Z
s

When the input driving signal is
small, the amplifier is linear.
Harmonic components are
almost non-existent.
Harmonics generation reduces the gain
of the amplifier, as some of the output
power at the fundamental frequency is
shifted to higher harmonics. This result in
gain compression seen earlier!
f
f
1

harmonics
f
f
1
2f
1
3f
1
4f
1
0
Small-signal
operation
region
P
out
P
in
13
Harmonic Distortion (2)
Z
L

V
s

Z
s

When the input driving signal is
too large, the amplifier becomes
nonlinear. Harmonics are
introduced at the output.
Harmonics generation reduces the gain
of the amplifier, as some of the output
power at the fundamental frequency is
shifted to higher harmonics. This result in
gain compression seen earlier!
f
f
1

f
harmonics
f
1
2f
1
3f
1
4f
1
0
P
out
P
in
14
Power Gain, Dynamic Range and Gain
Compression
Dynamic range (DR)
1dB compression
Point (P
in_1dB
)
Saturation
Device
Burn
out
Ideal amplifier
1dB
Gain compression
occurs here
Noise Floor
-70 -60 -50 -40 -30 -20 -10 0 10
P
in

(dBm)
20
P
out
(dBm)
-20
-10
0
10
20
30
-30
-40
-50
-60
Power gain G
p
=
P
out
(dBm) - P
in
(dBm)
= -30-(-43) = 13dB
Linear Region
Nonlinear
Region
P
in
P
out

Input and output at same frequency
15
Bandwidth
Power gain G versus frequency for small-signal amplifier.
f / Hz 0
G/dB
3 dB
Bandwidth
P
o
dBm
P
i
dBm
P
o
dBm
P
i
dBm
16
Intermodulation Distortion (IMD)
( ) ( ) ( ) ( ) . . .
3
3
2
2 1
T O H t v a t v a t v a t v
i i i o
+ + + =
( ) t v
i
( ) t v
o
ignored
f
f
1
f
2

|V
i
|
These are unwanted components, caused by
the term o
3
v
i
3
(t), which falls in the operating
bandwidth of the amplifier.
f
f
1
-f
2

2f
1
-f
2

2f
2
-f
1

f
2

f
1
2f
1

f
1+
f
2

2f
2

3f
1
3f
2

2f
1
+f
2

2f
2
+f
1

|Vo|
IMD
Operating bandwidth
of the amplifier
Two signals v
1
, v
2
with similar
amplitude, frequencies f
1
and f
2

near each other
Usually specified
in dB
17
Noise Figure (F)
V
s

The amplifier also introduces noise into the output in
addition to the noise from the environment.
Assuming small-signal operation.
Noise Figure (F)= SNR
in
/SNR
out

Since SNR
in
is always larger
than SNR
out
, F > 1 for an
amplifier which contribute noise.
SNR:
Signal to Noise
Ratio
Smaller SNR
in

Larger SNR
out

Z
s

Z
L

18
Power Components in an Amplifier
Z
L
V
s

Z
s

Amplifier
V
s

Z
s

Z
L

Z
1

Z
2

V
Amp

+
-
P
Ao

P
L

P
Ro

P
As

P
Rs

P
in

2 basic source-
load networks
Approximate
Linear circuit
19
Power Gain Definition
From the power components, 3 types of power gain can be defined.









G
P
, G
A
and G
T
can be expressed as the S-parameters of the amplifier
and the reflection coefficients of the source and load networks. Refer
to Appendix 1 for the derivation.
As
L
T
As
Ao
A
in
L
p
P
P
G
P
P
G
P
P
G
= =
= =
= =
power Input Available
load to delivered Power
Gain Transducer
power Input Available
Power load Available
Gain Power Available
Amp. power to Input
load to delivered Power
Gain Power
The effective power gain
(2.1a)
(2.1b)
(2.1c)
20
Naming Convention
Z
L
V
s

Z
s

Amplifier
2 - port
Network
I
1
I
2

Source
Network
Load
Network
I
s

I
L

(

22 21
12 11
s s
s s
In the spirit of high-
frequency circuit design,
where frequency response
of amplifier is characterized
by S-parameters and
reflection coefficient is
used extensively
instead of impedance,
power gain can be expressed
in terms of these parameters.
21
TWO-PORT POWER GAIN
Figure 7.1: A two port network with general source and load impedance.
22
Power Gain Definition
From the power components, 3 types of power gain can be defined.









G
P
, G
A
and G
T
can be expressed as the S-parameters of the amplifier
and the reflection coefficients of the source and load networks. Refer
to Appendix 1 for the derivation.
As
L
T
As
Ao
A
in
L
p
P
P
G
P
P
G
P
P
G
= =
= =
= =
power Input Available
load to delivered Power
Gain Transducer
power Input Available
Power load Available
Gain Power Available
Amp. power to Input
load to delivered Power
Gain Power
The effective power gain
(2.1a)
(2.1b)
(2.1c)
23
TWO-PORT POWER GAIN
Power Gain = G = P
L
/ P
in
is the ratio of power dissipated in the load Z
L
to
the power delivered to the input of the two-port network. This gain is
independent of Z
s
although some active circuits are strongly dependent on
Z
S
.

Available Gain = G
A
= P
avn
/ P
avs
is the ratio of the power available from
the two-port network to the power available from the source. This assumes
conjugate matching in both the source and the load, and depends on Z
S
but
not Z
L
.

Transducer Power Gain = G
T
= P
L
/ P
avs
is the ratio of the power delivered
to the load to the power available from the source. This depends on both Z
S

and Z
L
.

If the input and output are both conjugately matched to the two-port, then
the gain is maximized and G = G
A
= G
T

24
TWO-PORT POWER GAIN
+ + +
+ + +
I + = + =
I + = + =
2 22 1 21 2 22 1 21 2
2 12 1 11 2 12 1 11 1
V S V S V S V S V
V S V S V S V S V
L
L
0
0
22
21 12
11
1
1
1 Z Z
Z Z
S
S S
S
V
V
in
in
L
L
in
+

=
I
I
+ = = I
+

From the definition of S parameters:

[7.1a]
[7.1b]
Eliminating V
2
-
from [7.1a]:
[7.2]
0
0
11
21 12
22
2
2
1 Z Z
Z Z
S
S S
S
V
V
out
out
S
S
out
+

=
I
I
+ = = I
+

[7.3]
25
TWO-PORT POWER GAIN
in
in
in
Z Z
I
I +
=
1
1
0
( )
( )
in S
S S
V
V
I I
I
=
+
1
1
2
1
By voltage division:
( )
in
in S
in
S
V V V
Z Z
Z
V V I + = + =
+
=
+ +
1
1 1 1 1
Using:
Solving for V
1
+
:
[7.4]
[7.5]
[7.6]
26
TWO-PORT POWER GAIN
( ) ( )
2
2
2
0
2
2
1
0
1
1
1
8
1
2
1
in
in S
S S
in in
Z
V
V
Z
P I
I I
I
= I =
+
( )
( )
2 2
22
2 2 2
21
0
2
2
22
2 2
21
0
2
1
1 1
1 1
8
1
1
2
in S L
S L S
L
L
L
S
S
Z
V
S
S
Z
V
P
I I I
I I
=
I
I
=
+
( )
2
0
2
2
1
2
L L
Z
V
P I =

The average power delivered to the network:
The power delivered to the load is:
[7.7]
[7.8]
[7.9]
27
TWO-PORT POWER GAIN
( )
( )
2
22
2
2 2
21
1 1
1
L in
L
in
L
S
S
P
P
G
I I
I
= =
( )
2
2
0
2
1
1
8
S
S s
in avs
Z
V
P P
S
in
I
I
= =
-
I = I
( )
-
-
I = I
-
I = I
I I I
I I
= =
out
L
out
L
in S out
S out s
L avn
S
S
Z
V
P P
2
2
22
2 2 2
21
0
2
1 1
1 1
8
The power gain can be expressed as:
The available power from the source:
The available power from the network:
[7.10]
[7.11]
[7.12]
28
TWO-PORT POWER GAIN
( )
2 2
11
2 2
21
0
2
1 1
1
8
out S
S s
avn
S
S
Z
V
P
I I
I
=
( )
( )
2
11
2
2 2
21
1 1
1
S out
S
avs
avn
A
S
S
P
P
G
I I
I
= =
( )( )
2 2
22
2 2 2
21
1 1
1 1
in S L
L S
avs
L
T
S
S
P
P
G
I I I
I I
= =
The power available from the network:
The available power gain:
The transducer power gain:
[7.13]
[7.14]
[7.15]
29
Summary of Important Power Gain Expressions
and the Gain Dependency Diagram
s
s
L
L
s
s
s
s
I
AI
= I
I
AI
= I
1 1
2 2
2
2 2
1 1
1
1
1
|
.
|

\
|
I I
|
.
|

\
|
I
=
2
1
2
22
2 2
21
1 1
1
L
L
P
s
s
G
|
.
|

\
|
I I
|
.
|

\
|
I
=
2
2
2
11
2
21
2
1 1
1
s
s
A
s
s
G
2
1
2
22
2 2
21
2
1 1
1 1
s L
s L
T
s
s
G
I I I
|
.
|

\
|
I
|
.
|

\
|
I
=
Note:
All G
T
, G
P
, G
A
, I
1
and I
2

depends on the S-
parameters.
(2.2a)
21 12 22 11
s s s s = A
(2.2b)
(2.2c)
(2.2d)
(2.2e)
I
s
I
L

I
1
I
2

G
A
G
P

G
T

(

22 21
12 11
s s
s s
The Gain Dependency Diagram
30
TWO-PORT POWER GAIN
2
21
S G
T
=
A special case of the transducer power gain occurs when both input and
output are matched for zero reflection (in contrast to conjugate
matching).
Another special case is the unilateral transducer power gain, G
TU
where
S
12
=0 (or is negligibly small). This nonreciprocal characteristic is
common to many practical amplifier circuits.
in
= S
11
when S
12
= 0, so
the unilateral transducer gain is:
( )( )
2
22
2
11
2 2 2
21
1 1
1 1
in S
L S
TU
S S
S
G
I I
I I
=
[7.16]
[7.17]
31
TWO-PORT POWER GAIN
Figure 7.2: The general transistor amplifier circuit.
32
TWO-PORT POWER GAIN
2
22
2
2
21 0
2
2
1
1
1
1
L
L
L
S in
S
S
S
G
S G
G
I
I
=
=
I I
I
=
The separate effective gain factors:
[7.18a]
[7.18b]
[7.18c]
33
TWO-PORT POWER GAIN
If the transistor is unilateral, the unilateral transducer gain reduces
to G
TU
= G
S
G
0
G
L
, where:
2
22
2
2
21 0
2
11
2
1
1
1
1
L
L
L
S
S
S
S
G
S G
S
G
I
I
=
=
I
I
=
[7.19c]
[7.19b]
[7.19a]
34
Example 1 Familiarization with the Gain
Expressions
An RF amplifier has the following S-parameters at f
o
: s
11
=0.3<-70
o
,
s
21
=3.5<85
o
, s
12
=0.2<-10
o
, s
22
=0.4<-45
o
. The system is shown
below. Assuming reference impedance (used for measuring the S-
parameters) Z
o
=50O, find:
(a) G
T
, G
A
, G
P
.
(b) P
L
, P
A
, P
inc
.
Amplifier
(

22 21
12 11
s s
s s
Z
L
=73O
40O
5<0
o

35
Example 1 Cont...
Step 1 - Find I
s
and I
L
.

Step 2 - Find I
1
and I
2
.
Step 3 - Find G
T
, G
A
, G
P
.
Step 4 - Find P
L
, P
A
.
151 . 0 146 . 0
22
11
1 1
j
L
L
s
D s
= = I
I
I
358 . 0 265 . 0
11
1
22
2
j
s
s
s
D s
= = I
I
I
111 . 0 = = I
+

o s
o s
Z Z
Z Z
s
187 . 0 = = I
+

o L
o L
Z Z
Z Z
L
( )
( )
742 . 13
1 1
1
2
1
2
22
2 2
21
=
I I
I
=
L
L
s
s
G
739 . 14
1 1
1
2
2
2
11
2
21
2
=
|
.
|

\
|
I I
|
.
|

\
|
I
=
s
s
A
s
s
G
562 . 12
1 1
1 1
2
1
2
22
2 2
21
2
=
I I I
|
.
|

\
|
I
|
.
|

\
|
I
=
s L
s L
T
s
s
G
| |
W P
s
s
Z
V
A
078 . 0
Re 8
2
= =

W Z P P
o
s
Z Z
s
Z Z
A in
0714 . 0 1
2
1
1
=
|
|
.
|

\
|
=
+

W P G P
in P L
9814 . 0 = =
Try to derive
These 2 relations
Again note that this is an
analysis problem.
36
STABILITY
In the circuit of Figure 7.2, oscillation is possible if either the input or
output port impedance has the negative real part; this would imply that
|
in
|>1 or |
out
|>1.

in
and
out
depends on the source and load matching networks, the stability
of the amplifier depends on
S
and
L
as presented by matching networks.

Unconditionally stable: The network is unconditionally stable if |
in
| < 1
and |
out
| < 1 for all passive source and load impedance (ex; |
S
| < 1 and
|| < 1).
Conditionally stable: The network is conditionally stable if |
in
| < 1 and
|
out
| < 1 only for a certain range of passive source and load impedance.
This case also referred as potentially unstable.

The stability condition of an amplifier circuit is usually frequency
dependent.
37
STABILITY CIRCLES
1
1
22
21 12
11
<
I
I
+ = I
L
L
in
S
S S
S
1
1
11
21 12
22
<
I
I
+ = I
S
S
out
S
S S
S
The condition that must be satisfied by
S
and
L
if the amplifier is
to be unconditionally stable:
[7.20a]
[7.20b]
The determinant of the scattering matrix:
21 12 22 11
S S S S = A
[7.21]
38
STABILITY CIRCLES
( )
2 2
22
21 12
2 2
22
11 22
A
=
A
A
=
-
-
S
S S
R
S
S S
C
L
L
( )
2 2
11
21 12
2 2
11
22 11
A
=
A
A
=
-
-
S
S S
R
S
S S
C
S
S
The output stability circles:
The input stability circles:
[7.22a]
[7.22b]
[7.23a]
[7.23b]
39
STABILITY CIRCLES
Figure 7.3: Output stability circles for conditionally stable device.
(a) |S
11
| < 1 (b) |S
11
| > 1
40
STABILITY CIRCLES
If the device is unconditionally stable, the stability circles must be
completely outside (or totally enclose) the Smith chart.
1 1
1 1
22
11
< >
< >
S R C
S R C
S S
L L
[7.24a]
[7.24b]
41
STABILITY TEST
1
2
1
21 12
2 2
22
2
11
>
A +
=
S S
S S
K
1
21 12 22 11
< = A S S S S
Rollets condition:
the auxiliary condition:
1
1
21 12 11 22
2
11
>
+ A

=
-
S S S S
S

the test:
[7.25]
[7.26]
[7.27]
42
Example 2
The S parameters for the HP HFET-102 GaAs FET at 2 GHz with a
bias voltage of Vgs = 0 are given as follow (Z0 = 50 Ohm):

S
11
= 0.894 < -60.6
S
21
= 3.122 < 123.6
S
12
= 0.020 < 62.4
S
22
= 0.781 < -27.6

Determine the stability of this transistor using the K-A test and the
test, and plot the stability circles on the Smith Chart
43
Example 2
1
2
1
21 12
2 2
22
2
11
>
A +
=
S S
S S
K
1
21 12 22 11
< = A S S S S
1
1
21 12 11 22
2
11
>
+ A

=
-
S S S S
S

For the test:

Remember, criteria for unconditional stability is:
For the K-A test:
44
Example 2
1 607 . 0
2
1
21 12
2 2
22
2
11
< =
A +
=
S S
S S
K
1 696 . 0
21 12 22 11
< = = A S S S S
1 86 . 0
1
21 12 11 22
2
11
< =
+ A

=
-
S S S S
S

For the test:

Calculation results:
For the K-A test:
Which indicates potential instability
45
Example 2
Input stability circle and radius
Calculation for the input and output stability circles:
Output stability circle center and radius:
( )
50 . 0
47 361 . 1
2 2
2 2
2 1 1 2
2 2
2 2
1 1 2 2
=
A
=
< =
A
A
=
-
-
S
S S
R
S
S S
C
L
L
( )
199 . 0
68 132 . 1
2 2
1 1
2 1 1 2
2 2
1 1
2 2 1 1
=
A
=
< =
A
A
=
-
-
S
S S
R
S
S S
C
S
S
46
STABILITY
Figure 7.4: Example of stability circles
47
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
-
-
I = I
I = I
L out
S in
2
22
2
2
21
2
1
1
1
1
max
L
L
S
T
S
S G
I
I
I
=
Maximum power transfer from the input matching network to the
transistor and the maximum power transfer from the transistor to the
output matching network will occur when:
Then, assuming lossless matching sections, these conditions will
maximize the overall transducer gain:
[7.28a]
[7.28b]
[7.29]
48
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
In the general case with a bilateral transistor,
in
is affected by
out
,
and vice versa, so that the input and output sections must be matched
simultaneously.
S
S
L
L
L
S
S
S S
S
S
S S
S
I
I
+ = I
I
I
+ = I
-
-
11
21 12
22
22
21 12
11
1
1
[7.30a]
[7.30b]
49
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
2
2
2
2
2 2
1
2
1
2
1 1
2
4
2
4
C
C B B
C
C B B
L
S

= I

= I
The solution is:
[7.31a]
[7.31b]
50
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
-
-
A =
A =
A + =
A + =
11 22 2
22 11 1
2 2
11
2
22 2
2 2
22
2
11 1
1
1
S S C
S S C
S S B
S S B
The variables are defined as:
[7.32a]
[7.32b]
[7.32c]
[7.32d]
51
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
2
22
2
21
2
11
1
1
1
1
max
S
S
S
G
TU

=
( ) 1
2
12
21
max
= K K
S
S
G
T
12
21
S
S
G
msg
=
When S
12
= 0, it shows that
S
= S
11
* and
L
= S
22
*, and the maximum
transducer gain for unilateral case:
The maximum stable gain with K = 1:
[7.33]
[7.34]
[7.35]
When the transistor is unconditionally stable, K > 1, and the max
transducer power gain can be simply re-written as:
52
Example 3
Design an amplifier for a maximum gain at 4.0 GHz. Calculate the
overall transducer gain, G, and the maximum overall transducer gain
G
TMAX
. The S parameters for the GaAs FET at 4 GHz given as follow
(Z0 = 50 Ohm):

S
11
= 0.72 < -116
S
21
= 2.60 < 76
S
12
= 0.03 < 57
S
22
= 0.73 < -68

53
Example 3 (Cont)
195 . 1
2
1
2 1 1 2
2 2
2 2
2
1 1
=
A +
=
S S
S S
K
162 488 . 0
21 12 22 11
< = = A S S S S
Determine the stability of this transistor using the K-A test
Since |A| < 1 and K > 1, the transistor is unconditionally stable at 4.0
GHz.
54
Example 3 (cont)
For the maximum gain, we should design the matching sections for a
conjugate match to the transistor. Thus,
S
=
in
* and
L
=
out
*,
S

and
L
can be determined from;
61 876 . 0
2
4
123 872 . 0
2
4
2
2
2
2
1 2
1
2
1
2
2 1
< =

= I
< =

= I
C
C B B
C
C B B
L
S
55
Example 3
dB
S
G
S
20 . 6 17 . 4
1
1
2
11
= =

=
dB S G 30 . 8 76 . 6
2
21 0
= = =
dB
S
G
L
L
L
22 . 2 67 . 1
1
1
2
2 2
2
= =
I
I
=
So the overall maximum transducer gain will be;
The effective gain factors can calculated as:
dB G
T
7 . 16 22 . 2 30 . 8 20 . 6
max
= + + =
56
UNILATERAL FOM
2 2
) 1 (
1
) 1 (
1
U G
G
U
TU
T

< <
+
In many practical cases |S
12
| is small enough to be ignored, the device
then can be assumed to be unilateral, which greatly simplifies design
procedure
Error in the transducer gain caused by approximating |S
12
| as zero is
given by the ratio G
T
/G
TU
, and be bounded by:
Where U is defined as the unilateral figure of merit
) 1 )( 1 (
2
22
2
11
22 11 21 12
S S
S S S S
U

=
57
Example 4
An FET is biased for minimum noise figure, and has the following S
parameters at 4 GHz:

S
11
= 0.60 < -60
S
21
= 1.90 < 81
S
12
= 0.05 < 26
S
22
= 0.50 < -60

For design purposes, assume the device is unilateral and calculate the
max error in G
T
resulting from this assumption.

58
Example 4 (cont)
2 2
) 1 (
1
) 1 (
1
U G
G
U
TU
T

< <
+
059 . 0
) 1 )( 1 (
2
22
2
11
22 11 21 12
=

=
S S
S S S S
U
To compute the unilateral figure of merit;
Then the ratio of G
T
/G
TU
is bounded as;
130 . 1 891 . 0 < <
TU
T
G
G
59
Example 4 (cont)
In dB, this is;
dB G G
TU T
53 . 0 50 . 0 < <
Where G
T
and G
TU
are now in dB. Thus we should expect less than
about 0.5 dB error in gain.
60
CONSTANT GAIN CIRCLES
In many cases it is desirable to design for less than the max obtainable
gain, to improve bandwidth or to obtain a specific value for an
amplifier gain.
Mismatches are purposely introduced to reduce the overall gain
Procedure is facilitated by plotting constant gain circles on the Smith
Chart
Represents loci of
S
and
L
, that give fixed values of G
S
and G
L
.
To simplify the discussion, we will only treat the case of a unilateral
device
61
CONSTANT GAIN CIRCLES
2
11
2
1
1
S
S
S
S
G
I
I
=
2
22
2
1
1
L
L
L
S
G
I
I
=
2
11
1
1
max
S
G
S

=
The expression for the G
S
and G
L
for the unilateral case is given by:
These gains are maximized when
S
= S
11
* and
L
= S
22
* :
2
22
1
1
max
S
G
L

=
62
CONSTANT GAIN CIRCLES
) 1 (
1
1
2
11
2
11
2
max
S
S G
G
g
S
S
S
S
S

I
I
= =
Now we define normalized gain factors g
S
and g
L
as;
Thus we have a that: 0 g
S
1, and 0 g
L
1. A fixed value of g
S
and g
L

represents circles in the
S
and
L
planes.
) 1 (
1
1
2
22
2
22
2
max
S
S G
G
g
L
L
L
L
L

I
I
= =
63
CONSTANT GAIN CIRCLES
( )
( )
( )
2
11
2
11
2
11
11
1 1
1 1
1 1
S g
S g
R
S g
S g
C
S
S
S
S
S
S


=

=
-
( )
( )
( )
2
22
2
22
2
22
22
1 1
1 1
1 1
S g
S g
R
S g
S g
C
L
L
L
L
L
L


=

=
-
Input constant gain circles:
Output constant gain circles:
[7.37a]
[7.37b]
[7.38a]
[7.38b]
64
Example 5
Design an amplifier to have a gain of 11 dB at 4 GHz. Plot constant
gain circles for G
S
= 2 dB and 3 dB; and G
L
= 0 dB and 1 dB. The
FET has the following S parameters (Z
0
= 50 ):

S
11
= 0.75 < -120
S
21
= 2.50 < 80
S
12
= 0.00 < 0
S
22
= 0.60 < -85

65
Example 5 (cont)
Since S
12
= 0 and |S
11
| < 1 and |S
22
| < 1, the transistor is unilateral and
unconditionally stable. We calculate the max matching section gains
as;
The gain of the mismatched transistor is;
dB
S
G
S
6 . 3 29 . 2
1
1
2
11
max
= =

=
dB
S
G
L
9 . 1 56 . 1
1
1
2
22
max
= =

=
dB S G 0 . 8 25 . 6
2
21 0
= = =
66
Example 5 (cont)
So the max unilateral transducer gain is
Thus we have 2.5 dB more available gain than required by specs,
since the design only requires 11 dB gain. However, the question also
asked us to analyze the effect of having:

Condition 1: G
S
= 3 dB and G
L
= 0 dB
Condition 2: G
S
= 2 dB and G
L
= 1 dB

(Note that these conditions must happens at the same time in order to
keep the gain at 11 dB.)
dB G
U
T
5 . 13 0 . 8 9 . 1 6 . 3
max
= + + =
67
Example 5 (cont)
875 . 0
max
= =
S
S
S
G
G
g
For condition 1 (input side), when G
S
= 3 dB:
( )
( )
( )
166 . 0
1 1
1 1
120 706 . 0
1 1
2
1 1
2
1 1
2
1 1
1 1
=


=
< =

=
-
S g
S g
R
S g
S g
C
S
S
S
S
S
S
68
Example 5 (cont)
For condition 1 (output side), when G
L
= 0 dB:
( )
( )
( )
440 . 0
1 1
1 1
70 440 . 0
1 1
2
2 2
2
2 2
2
2 2
2 2
=


=
< =

=
-
S g
S g
R
S g
S g
C
L
L
L
L
L
L
640 . 0
max
= =
L
L
L
G
G
g
69
Example 5 (cont)
70
LOW NOISE AMPLIFIER DESIGN
In receiver applications especially, it is often required to have a
preamplifier with as low a noise figure as possible since, the first
stage of a receiver front end has the dominant effect on the noise
performance of the overall system.

Generally it is not possible to obtain both minimum noise figure and
maximum gain for an amplifier, so some sort of compromise must
be made. This can be done by using constant gain circles and circles
of constant noise figure to select a usable trade of between noise
figure and gain.
2
min opt S
S
N
Y Y
G
R
F F + =
[7.39]
71
LOW NOISE AMPLIFIER DESIGN
2
0
min
1
4
opt
N
Z R
F F
N I

=
( )
1
1
1
2
+
I +
=
+
I
=
N
N N
R
N
C
opt
F
opt
F
For a fixed noise figure, F, the noise figure parameter, N, is given as:
The circles of constant noise figure:
[7.40]
[7.41a]
[7.41b]
72
Example 6
An GaAs FET amplifier is biased for minimum noise figure and has
the following S-parameters (Z
0
= 50 ):

S
11
= 0.75 < -120
S
21
= 2.50 < 80
S
12
= 0.00 < 0
S
22
= 0.60 < -85

opt
= 0.62 < 100
F
min
= 1.6 dB
R
N
= 20

For design purposes, assume the unilateral. Then design an amplifier
having 2.0 dB noise figure with the max gain that is compatible with
this noise figure.
73
Example 6 (cont)
0986 . 0 1
4
2
0
min
= I

=
opt
N
Z R
F F
N
Next use the formulas to compute the center and radius of the 2 dB
noise figure circle:
The gain of the mismatched transistor is
( )
24 . 0
1
1
100 56 . 0
1
2
=
+
I +
=
< =
+
I
=
N
N N
R
N
C
o p t
F
o p t
F
74
Example 6 (cont)
The noise figure circle is plotted in the figure. Min noise figure (F
min

= 1.6 dB) occurs for
S
=
opt
= 0.62<100
o


It can be seen that G
S
= 1.7 dB gain circle just intersects the F = 2.0
dB noise figure circle, and any higher gain will result in a worse
noise figure.
G
S
(dB) g
S
C
S
R
S
1.0 0.805 0.52<60
o
0.300
1.5 0.904 0.56<60
o
0.205
1.7 0.946 0.58<60
o
0.150
75
Example 6 (cont)
For the output section we choose
L
= S
22
* = 0.5<60
o
for a max G
L

of:
dB G G G G
L S T
U
53 . 8
0
max
= + + =
dB
S
G
L
25 . 1 33 . 1
1
1
2
22
= =

=
dB S G 58 . 5 61 . 3
2
21 0
= = =
76
Example 6 (cont)