Switching Theory and Logic Design

Combinational Logic Design

Overview
Introduction Design using conventional logic gates
Adder Subtractor Multiplier Magnitude Comparator

Encoder Decoder Multiplexer De-Multiplexer

Introduction

Combination Logic Example

Design using conventional logic gates Adders-Half Adder

0+0= 0 0+1= 1 1+0= 1 1 + 1 = 10

Design using conventional logic gates Adders-Full Adder

Design using conventional logic gates Full Adder-Using 2 Half Adders

4-bit Binary Adder or Ripple Carry Adder

Addition of n-bit numbers requires a chain of n full adders or a chain of one-half adder and n-1 full adders If we use Classical method, then 29 = 512 entries for 9-inputs in truth table as seen in half and full adders

Adders-Carry Propagation
In ripple carry adder the propagation delay in each stage will add up to the final stage. Pi (Carry Propagate)and Gi (carry generate) settle to steady-state after propagating through respective gates. Form input Ci to output Ci + 1carry propagates through AND and OR. In n-bit adder, 2n gates for carry between input and output To reduce carry propagation Carry Lookahead logic is widely used

4-bit Carry stage

4-bit Carry Lookahead Adder

Design using conventional logic gates Subtractor-Half subtractor

0+0= 0+1= 1+0= 1+1= 0 1 with barrow 1 1 0

Design using conventional logic gates Subtractor-Full subtractor

4-bit Adder-Subtractor

If M=0 and Co=0, then above circuit acts as 4-bit adder If M=1 and Co=1, then above circuit acts as 4-bit subtractor

Binary Multiplier-(2-bit by 2-bit)

Binary Multiplier-(4-bit by 3-bit)

Magnitude Comparator
It is a combination circuit which compares two numbers A and B. A = B, A > B, A < B

4-bit Magnitude Comparator

Encoders
An Encoder has 2^n (or fewer) input and n outputs An example of octal to binary encoder is discussed below encode discussed below has limitation that only one input must be active Ambiguity between all input 0s and Do

Priority Encoder

Four Input Priority Encoder

Decoders

Decoder (2 to 4)- Active Low

Decoder given here has Active low Enable (E) input Active low outputs (D0, D1,D2, D3) Active high inputs (A and B)

Decoder (3 to 8)

Decoder (4 to 16)

Combination Logic Design

Multiplexer
2^n inputs n selection lines 1 output

Multiplexer (2 to 1)

Multiplexer (4 to 1)

Multiplexer (Quadruple 2 to 1)

Combinational Logic Design (Eg.1)

Combinational Logic Design (Eg.2)

Design using conventional logic gates Adders-Half Adder

Design using conventional logic gates Adders-Full Adder

Design using conventional logic gates Full Adder-Using 2 Half Adders

Design using conventional logic gates Subtractor-Half Subtractor

Design using conventional logic gates Subtractor-Full Subtractor

D=A XOR B XOR C BOR_out = A B + (A XOR B) B_in

4 to 2 Encoder

2 to 4 Decoder

Decoder