SDH Principle 20080528 A

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Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.
SDH Principle
Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved. Page1
Contents
1. SDH Overview
2. Frame Structure & Multiplexing Methods
3. Overheads & Pointers
Emergence of SDH
What is SDH?
Synchronous Digital Hierarchy
It defines a standard frame structure, a specific
multiplexing method, and so on.
Why did SDH emerge?
Need for a system to process increasing amounts of
information.
New standard that allows interconnecting equipment
of different suppliers.
Advantages of SDH
Interfaces
PDH electrical interfaces
Only 3 regional standards:
European (2.048 Mb/s),
Japanese, North American
(1.544 Mb/s)
PDH optical interfaces
No standards,
manufacturers develop at
their will.

SDH electrical interfaces
Universal standards
SDH optical interfaces
Can be connected to
different vendors optical
transmission equipments.

140 Mb/s
34 Mb/s
34 Mb/s
8 Mb/s
8 Mb/s
2 Mb/s
140 Mb/s

Not suitable for huge-volume transmission
Headache for network planners
More equipment to achieve this functionality
More equipment More floor space
More power More costs
Demultiplexers
Multiplexers
Multiplexing methods: Level by level

Disadvantages of PDH
Advantages of SDH
Lower rate SDH to higher rate SDH
(STM-1 STM-4 STM-16 STM-64)
4:1
STM-1
A
STM-1
B
STM-1
C
STM-1
D
A
B
D
C
B
A
D
C
B
A

STM-4
One Byte from
STM-1 B
--- Synchronous multiplexing method and
flexible mapping structure
--- Multistage pointer to align PDH loads in
SDH frame, thus, dynamic drop-and-insert
capabilities
What about PDH?
Multiplexing methods: byte interleaved

Advantages of SDH
OAM function
PDH
In the frame structure of
PDH signals, there are
few overhead bytes used
for OAM.
Weak OAM function

SDH
Abundant overheads
bytes for OAM
Remote & Centralized
Management
Fast circuit provisioning
from centralized point

Advantages of SDH
Processing
PDH ATM SDH Ethernet
Pack
SDH Network
Processing
PDH ATM SDH Ethernet
Transmit Receive
Container
STM-N
STM-N
Container
Service Signal Flow Model
Unpack
Compatibility

Comparison between SDH and PDH
Low bandwidth utilization ratio
In PDH, E4 signal (140Mbits/s) can contain 64 E1 signals.
In SDH, STM-1 (155 Mbits/s) can only carry 63 E1 signals.
Complex mechanism of pointer justification
Influence of excessive use of software on system security

Contents
1. SDH Overview
SDH Frame Structure
From ITU-T G.707:

1. One frame lasts for 125
microseconds (8000
frames/s)
2. Rectangular block
structure 9 rows and 270
columns (Basic frame:
STM-1)
3. Each unit is one byte (8 bits)
4. Transmission mode: Byte
by byte, row by row, from
left to right, from top to
bottom

Bit rate of STM-1= 9*270*8*8000
1

2

3

4

5

6

7

8

9

270 Columns
9 rows
Frame = 125 us
SDH Frame Structure
Frame = 125 us
9
MSOH
AU-
PTR
Information
Payload
RSOH
1

2

3

4

5

6

7

8

9

270 Columns
9 rows
Three parts:
SOH
AU-Pointer
Information
Payload
SDH Frame Structure
Information Payload
Also known as Virtual Container level 4 (VC-4)
Used to transport low speed tributary signals
Contains low rate signals and Path Overhead (POH)
Location: rows #1 ~ #9, columns #10 ~ #270
9
MSOH
AU-PTR
Payload
RSOH
270 Columns
H
P
O
H

1
package
package
low rate signal
LPOH, TU-PTR
LPOH, TU-PTR
9 rows
Data
package
SDH Frame Structure
Functions: Fulfills the section layer OAM
9
270 Columns
9 rows
Types of Section Overhead

1. RSOH monitors the regenerator
section
2. MSOH monitors the
multiplexing section
Location:
1. RSOH: rows #1 ~ #3,
columns #1 ~ #9
2. MSOH: rows #5 ~ #9,
columns #1 ~ #9
1

2

3

5

6

7

8

9

MSOH
AU-PTR Information
Payload
RSOH
Section Overhead
SDH Frame Structure
9
MSOH
AU-PTR
Information
Payload
RSOH
270 Columns
9 rows
4
Function:
Indicates the first byte of VC4

Location:
row #4, columns #1 ~ #9
J
1
AU-PTR
SDH Multiplexing Features
SDH Multiplexing includes:
Low to high rate SDH signals (STM-1 STM-N)
PDH to SDH signals (2M, 34M & 140M STM-N)
Other hierarchy signals to SDH Signals (IP STM-N)
Some terms and definitions:
Mapping
Aligning
Multiplexing
Go to glossary
AU-4
TU-3 TUG-3 VC-3 C-3
VC-4 C-4
TU-12 VC-12 C-12
TUG-2
3
1
7
3
E4
signal
E3 signal
E1 signal
Multiplexing
Mapping
Aligning
STM-1 AUG-1
1
1
AUG-4
AUG-16
AUG-64
STM-4
STM-16
STM-64
1
1
1
4
4
4
Go to glossary
C-4-4c VC-4-4c
AU-4-4c
1
C-4-16c VC-4-16c
AU-4-16c
1
C-4-64c VC-4-64c
AU-4-64c
1
SDH Multiplexing Structure
From 140Mb/s to STM-N
140M
Rate
adaptation
Add HPOH
C4
9
1
260
125 s

1
Next
Mapping
VC4
1
9
125s
1
261
H
P
O
H
Add
AU-PTR
Add
SOH
Aligning
AU-PTR
AU-4
10 270
X1
AUG-1
Multiplexing
AUG-N
1
270
RSOH
MSOH
Info
Payload
AU-PTR
9
STM-1
Add
SOH
One STM-1 frame can load
only one 140Mbit/s Signal
1 270N
RSOH
MSOH
Info
Payload
AU-PTR
9
STM-N
34M
Rate
Adaptation
Add LPOH
C3
1
84
9
125s
1
1
9
VC3
L
P
O
H
125s
1
85
Next
Mapping
1st
align
Fill
gap
3
86
TU-3
1
H1
H2
H3
1
9
1
86
1
9
H1
H2
H3

R

TUG-3
Multiplexing
H
P
O
H

R

R

VC-4
9
1
1
261
3
Same
procedure
as 140M
Aligning
From 2Mb/s to STM-N
2M
Next
page
125s
1 4
C12
1
9
4
LPOH
VC12
1
1
9
Rate
Adaptation
Add
LPOH
Add
TU-PTR
Aligning
TU12
1 4
1
9
TU-PTR Mapping
From 2Mb/s to STM-N
X 3
1 12
TUG-2
1
9
X 7
Multiplexing
R R
TUG-3
1
86
1
9
Multiplexing
Same
procedure
as 34M
Questions
What are the main parts of SDH Frame structure?
What is the transmission rate of STM-4? How to
calculate it ?
Contents
1. SDH Overview
Overheads
Overheads
Section
Overhead
(SOH)
Path
Overhead
(POH)
Regenerator
Section Overhead
(RSOH)
Multiplex Section
Overhead
(MSOH)
High Order Path
Overhead
(HPOH)
Low Order Path
Overhead
(LPOH)
Overheads
A1 A1 A1 A2 A2 A2 J0 X X
B1 E1 F1 X X
D1 D2 D3
AU-PTR
B2 B2 B2 K1 K2
D4 D5 D6
D7 D8 D9
D10 D11 D12
S1 M1 E2
H
P
O
H
:

V
C
-
3
/
4

J1
B3
C2
G1
F2
H4
F3
K3
N1
R
S
O
H

M
S
O
H

1 2 3 4 5 6 7 8 9 10
1
2
3
4
5
6
7
8
9
Media dependent bytes (Radio-link, Satellite)
X Reserved for National use
Huawei propriety bytes LPOH: VC-11/12
V5 J2 N2 K4
A1 and A2 Bytes
Framing Bytes
Indicate the beginning of the STM-N frame
Bytes are unscrambled
A1 = f6H (11110110), A2 = 28H (00101000)
STM-N: (3XN) A1 bytes, (3XN) A2 bytes
STM-N STM-N STM-N STM-N STM-N STM-N
Finding frame head
A1 and A2 Bytes
Frame
Next
process
Find
A1,A2
OOF
LOF
N
Y
AIS
over 3ms
over 625s
(5 frames)
D1 ~ D12 Bytes
Data Communications Channel (DCC) Bytes
RS-DCC D1 ~ D3 192 Kbit/s (3x64 Kbit/s)
MS-DCC D4 ~ D12 576 Kbit/s (9x64 Kbit/s)
TMN
DCC channel
NE NE NE NE
OAM Information: Operation, Administration and
maintenance
E1 and E2 Bytes
Orderwire Bytes
E1 RS Orderwire Byte Used between regenerators
E2 MS Orderwire Byte Used between multiplexers
Digital telephone channel
E1-RS, E2-MS
E1 and E2
NE NE NE NE
B1 Byte
Bit interleaved Parity Code (BIP-8) Byte
A parity code (even parity)
Used to check the transmission errors over the RS
B1 BBE is represented by RS-BBE (performance event)
Tx
2#STM-N
Rx
1#STM-N Calculate B
1#STM-N
2#STM-N
Calculate B
A1 00110011
A2 11001100
A3 10101010
A4 00001111

B 01011010
BIP-8
B1 = B
STM-N
B1
B
Compare B & B RS-BBE
B2 Byte
Bit interleaved Parity Code (MS BIP-24) Byte
BIP-24 is used to check the bit errors over the MS
B2 BBE is represented by MS-BBE (performance event)
The working mechanism of B2 is same as B1
M1 Byte
Multiplexing Section Remote Error Indication Byte
A return message from Rx to Tx ,when Rx find B2 bit errors
Value is the same as the count of BIP-24xN (B2) bit errors
Tx generate corresponding performance event MS-FEBBE
Tx
Rx
Traffic
Generate
MS-FEBBE
MS-REI
Find B2 bit errors
Generate MS-BBE
Return M1
K1 and K2 (b1-b5) Bytes
Automatic
Protection
Switching
(APS) bytes
Transmitting APS protocol
Used for network multiplexing
protection switch function
P
WTR
WTR
P
I
I
I
I
P
S
S P
K2 (b6 ~ b8) Byte
Rx detects K2 (b6-b8) = "111
Generate MS-AIS alarm
Rx detects K2 (b6-b8) = "110"
Generate MS-RDI alarm
Generate
MS-AIS
Start
Detect
K2 (b6-
b8)
Return
MS-RDI
Generate
MS-RDI
111
110
S1 Byte
Synchronization Status Message Byte (SSB): S1
b1 ~ b4 Value indicates the external clock ID (Extended SSM)
b5 ~ b8 Value indicates the sync. Level (Standard SSM)
bits 5 ~ 8 Description
0000 Quality unknown (existing sync. Network)
0010 G.811 PRC
0100 SSU-A (G.812 transit)
1000 SSU-B (G.812 local)
1011 G.813 (Sync. Equipment Timing Clock)
1111 Do not use for sync (DNU).
Path Overheads
J1
B3
C2
G1
F2
H4
F3
K3
N1
VC-n Path Trace Byte
Path BIP-8
Path Signal Label
Path Status
Path User Channel
TU Multiframe Indication
Path User Channel
AP Switching
Network Operator
Higher Order Path Overhead
1 2 3 4 5 6 7 8 9 10
1
2
3
4
5
6
7
8
9
R S O H
M S O H
A U P T R
J1 Byte
Next
process
Detect J1
Match
HP-TIM
Y N
Path trace byte
The first byte of VC-4
User-programmable (HUAWEI
SBS)
The received J1 should match
the expected J1
B3 Byte
Next
process
Verify B3
Y N
Correct
HP-BBE
Path bit parity
Even parity code
Used to detect bit errors
Mechanism is same as B1 and B2

C2 Byte
Detect C2
00H
HP-UNEQ Match
HP-SLM
Next
process
Insert AIS
downward
N Y
N
Y
Signal label byte
The received C2 should
match with the expected C2
Specifies the mapping type in
the VC-n
00 H Unequipped
02 H TUG structure
13 H ATM mapping

VC-12 VC-12 VC-12 VC-12
K4 N2 J2 V5
1
9
1 4
500s VC-12 multi-frame
Low Order Path Overhead
V5
Indicated by TU-PTR
Error checking, Signal Label
and Path Status of VC-12
b1 - b2 Error Performance
Monitoring (BIP-2)
b3 Return Error detected in
VC-12 (LP-REI)
b8 Return alarm detected
in VC-12 (LP-RDI)

Path Overheads
Pointers
Pointers
Administrative
Unit Pointer
(AU-PTR)
Tributary
Unit Pointer
(TU-PTR)
Bytes indicated

AU-PTR VC-4 J1
TU-PTR VC-3 J1
VC-12 V5
AU-PTR
RSOH
MSOH
MSOH
RSOH
H1YYH2FF H3H3H3
H1YYH2FFH3H3H3
0 --- 1--- --- --- --- --- --- --- --- --- --- 86
696 --- 697 --- --- --- --- --- --- --- --- 782
1
9
270
1
4
9
1
4
9
125s
250s
522 --- 523 --- --- --- --- --- --- --- --- 608
435 --- 436 --- --- --- --- --- --- --- --- 521
Negative
justification
Positive
justification
0 --- 1 --- --- --- --- --- --- --- --- --- --- 86
435 --- 436 --- --- --- --- --- --- --- --- 521
87 --- 88 --- --- --- --- --- --- --- --- --- 173
87 --- 88 --- --- --- --- --- --- --- --- --- 173
TU-PTR
VC3
H1
H2
H3
TU POINTERS
VC-
12
VC-
12
VC-
12
VC-
12
V1 V2 V3 V4
1 4
1
9
TU POINTERS
TU Multi-frame 500s
Questions
Which byte is used to report the MS-AIS and
MS-RDI?
What is the mechanism for R-LOF generation?
Which byte implements the RS (MS/HP) error
monitoring?
Summary
SDH Overview
Frame Structure & Multiplexing Methods
Overheads & Pointers
Thank you
www.huawei.com

SDH Principle 20080528 A

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