Analog CMOS Design

Etienne SICARD
etienne.sicard@insa-toulouse.fr
www.etienne-sicard.fr
INSA Toulouse, FRANCE
April 16-17, 2009
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 Outlines
AGENDA
First day : 9h - 12h: Mos Implementation - Inverter

Second Day: 14h - 17h: Basic Cell Design

Second day: 9h - 12h: Mini-project 1/2

Second Day: 14h - 16h: Mini-project 2/2 – Mini presentation

OBJECTIVES
At the end of the course, the auditor will be able to design and simulate
basic analog cells and understand the link between design parameters and
electrical performances.

PRE REQUISITES
Basic knowledge in CMOS technology, electrical circuits and MOS models.
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 Microwind

• All notions may be illustrated with Microwind

Microwind is a friendly and free PC
tool for designing and simulating
microelectronic circuits at layout
level.

http://www.microwind.org
Version used in 2009: version 3.5 “beta”
Temporary installation permitted
Copying or diffusion prohibited
Lite version free for download at www.microwind.net

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 Getting Started

• http://www.etienne-sicard.fr/cours/cmos
• Logiciel de conception de circuits micro-électronique
• Unzip in “My Documents/Temp”
• Open “/system”, double click “Microwind35.exe”
• Documentation : click “Livre CMOS de base” ch2 – pp21

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 Microwind Main Screen

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 Most important icons

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 1. MOS Implementation

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 Problem 1

• Draw a n-channel MOS

• See the MOS in 2D
• Measure Ion, Ioff
• Simulate the switch (ch2 – pp 21)
• Summarize the n-channel behavior

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 Draw a n-channel MOS

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 2D section of a n-channel MOS

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 Tensile Strain

Polysilicon
gate
Horizontal
Gate strain created
oxide by the silicon
nitride capping
layer

Drain Drain
Source (Si) Source (Si)
(Si) (Si)

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 Ion, Ioff

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 Ion, Ioff

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 Transient Simulation

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 Transient Simulation

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 N-channel MOS summary

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 Draw a p-channel MOS

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 2D section of a p-channel MOS

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 Compressive Strain
Gate

Horizontal
Gate pressure
oxide created by the
uniaxial SiGe
strain

Si Si SiGe SiGe

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 Ion, Ioff

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 Ion, Ioff

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 Transient Simulation

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 P-channel MOS Summary

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 Problem 2

• Design a Transmission Gate

• Draw a n-channel + p-channel MOS
• Add “Enable control”
• Simulate the analog switch
• Determine the cut-off frequency

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 Interconnect n-diff and p-diff

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 Transmission Gate

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 Problem 3 – correct design

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 Problem 3 – correct design

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 Problem 4

• Design a MOS device

suitable for Bluetooth output
stage
• What ????

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2. Inverter
 Problem 5

• Draw an Inverter (ch4 – pp 3)

– Tune the design for symmetrical V/V curve
– Delay performances when connected to 1,2, 3
inverters (fanout)
• Draw 3 inverters (ch4 – pp 35)
– Try to have the fastest free oscillator

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 V/V Static Curve

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 Delay vs. Fanout

Delay

Fanout
0 1 2 3

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 3. Basic analog cells

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 Problem 6 – What is this ?

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 Problem 7 – Draw a 10 K  resistor

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 Problem 8 – Generate a 0.6 V reference, 1µA max

• Use two diode-

connected MOS
• Verify DC
consumption by
– “Voltages and
Currents”
– I in log

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 Problem 9 – From 1µA, generate 100µA

• Use the current Vout

mirror principle
• I(M2) = I(M1) if size
identical
• For which Vout
range do we have
100µA +/- 10% ?

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 Problem 10 – Amplify with a gain of 10

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 Problem 10 – Amplify with a gain of 10

Vout

Vin

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Problem 11 – OpAmp to compare two analog values

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 4. Mini-Projects

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 Analog - Digital Converters
5V
Vin
5V

Amplifer used as comparator

3.75V
Poly resistor - C2 4.375V
A1
+
2.5V
- C1 3.75V
Coding Logic
+
1.25V 3.125V
A0
- C0
+
0V 2.5V
Vout
1.875V

• 3-bit ? 1.25V

• R/2R ? 0.625V
 
• C/2C ? 0V

• Other type? A2
0
nA2

A1 nA1
A0 nA0
0 1
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 Static Memory

• 4x4?
• 8x8?
• Emulate 256 x 256 ?
• Split in 3 sub-projects?

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 Other ideas

• Amplifier with programmable gain

• Rail-to-rail amplifier
• 1.9 GHz amplifier 1 Watt
• 2.45 GHz amplifier with sub-sampling to 100 MHz
• Phase Lock Loop
– Frequency multiplier
– FM receiver

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Thank you for your attention