UNIT 2

MSP430

Family
MSP430 CPU
Memory
MSP430 Peripherals
Launchpads

MSP430 Families

Low Power
+
Performanc
e
Ultra
Low

Security
+ Comm

F5xx Key Features

Ultra-Low Power
160 A in active mode
2.5 A standby mode
Integrated LDO, BOR, WDT+, RTC
12 MHz @ 1.8V
Wake up from standby in <5 s
Increased Performance
Up to 25 MHz
Up to 512 KB Flash
Up to 66 KB RAM
1.8V ISP Flash erase and write
Fail-safe, flexible clocking system
User-defined Bootstrap Loader
Up to 1MB linear memory addressing
Innovative Features
Multi-channel DMA supports data movement in standby mode
Industry leading code density
More design options including USB, RF, encryption, LCD interface

Looking at the 'FR59xx...

MSP430FR58xx/59xx
MSP430FR58/59xx
Ultra Low Power
16-bit MCU
16MHz

Memory
FRAM
(32/48 / 64
KB)
RAM
(1 or 2 KB)
Debug
MPU
Real Time JTAG
Embedded emulation
Bootstrap Loader

Accelerators
32x32 Multiplier
DMA (3 Ch)
CRC16
AES256 Encryption
Serial
Interfaces
(FR59xx)
3 Serial Interfaces
(eUSCI)
2 UART + IrDA or SPI
2 I2C or SPI
Analog
12-bit SAR ADC (up to
16 ch)
o Differential inputs
o Window comparators
Comparator (Comp_E)
Vref (REF_A)

Timers
Watch Dog Timer (WDT_A)
Real Time Clock (RTC_B)
Two 16-bit w/3 CCR (TA0,
TA1)
Two 16-bit w/2 CCR (TA2,
TA3)
Connectivity
One 16-bit w/7 CCR (TB0)
Up to 40 GPIO
(Interrupt/Wake)
Power
Cap touch
IO
& Clocking
Brownout Reset
Supply Voltage Supervisor
(SVS)
Low Power Vreg (1.5V LDO)
External Oscillators: LFXT,

MSP430 CPU

Efficient, ultra-low power CPU

C-compiler friendly
RISC architecture
51 instructions
7 addressing modes
Constant generator
Single-cycle register operations
Bit, byte and word processing
1MB unified memory map

Extended addressing modes

No paging
Page-free 20-bit reach
Improved code density
Faster execution

100% code compatible with

earlier versions

Unified Memory Map/Address space

In-System Prog
(ISP)
Write
Write using:
using: User
User
program,
program, JTAG,
JTAG, BSL
BSL
Byte,
Byte, word,
word, longlongword
word
Erase
(or
Erase one
one
(or all)
all)
Main
Flash
segments
at
segments
at aa time
time
512
512 byte
byte segments
segments
Start
Start address
address
moves
moves according
according to
to
RAM
RAM
Info

F5529 Memory
Map

Bytes

Memory

U
Use
se for
for your
your own
own

calibration
calibration data,
data,
etc.
etc.

4
(ABoot
Loader
4 segments
segments
(A(BSL)
D)
(BSL)
D)
Program
128
128 byte
byteFlash/RAM
Program
Flash/RAM
segments
with
serial
segments
with
serial
(slau319)

Flash

0xFFF
F
0xFF8
INT Vectors
0
0x240
0
0x01C
0

128
K
80

RAM

8K

USB RAM

2K

Info Memory 512

Boot Loader 2K
0x000
Peripherals
0

4K

MSP430
MSP430
Memory
Memory

Unified
Unified memory
memory
map
map
(program
(program or
or
data)
data)
Absolutely no
Absolutely no
paging
paging

RAM

Always
Always aa contig.
contig.
block
block
If
If enabled,
enabled, USB
USB
port
port uses
uses first
first 2K
2K
RAM
RAM segments
segments
can
can be
be powered
powered
down
Device
down
Device
Descriptors
Descriptors (TLV)
(TLV)
Factory
Factory calibration
calibration
data,
data, periph
periph

F5529
0x243F
F
0xFFFF

Main
Flash

0xFF80 INT Vectors

0x440
0
0x240
0
0x1C0
0
0x1A0
0

Main
Flash
RAM
USB RAM
TLV
Info A
Info B
Info C

0x180
0

Info D
Boot Loader

F5529 vs FR5969 Mem Maps

81K

FR5969

Most MSP430
devices have similar
Memory Maps

F5529

Main
FRAM

17K

INT Vectors

80

Main
FRAM

47K

8K
2K

128K of Flash nonvolatile memory

10K of SRAM (2K can

be dedicated to USB
usage)

Vacant
RAM
TLV
Info A
Info B
Info C
Info D
Boot Loader
Peripherals

128
128
128
128
2K
4K

0x000
Peripherals
0

Bytes

FR5969

64K of non-volatile
FRAM memory

2K of SRAM

Though you can use

FRAM like SRAM
which gives you up to

MSP430 Peripherals
Clocks

Power Watchdog

F5529 block diagram

Timer A & B RTC

GPIO

USB

MSP430 GPIO (GPIOs)

GPIO

GPIO

(Chapter
(Chapter 3)
3)

F5529 block diagram

Independently
Independently
programmable
programmable
Any
Any combination
combination of
of input,
input,
output,
output, interrupt
interrupt and
and
peripheral
peripheral is
is possible
possible
Each
Each I/O
I/O has
has an
an
individually
individually programmable
programmable
pull-up/pull-down
pull-up/pull-down resistor
resistor
Many
Many devices
devices can
can lock
lock pin
pin
values
values during
during low-power
low-power

MSP430 Timers (Timers,RTC,WDT)

Watchdog

GPIO

Timers

(Chapters
(Chapters 3,
3, 5,
5, 6,
6, 8)
8)

Timer_A:
Timer_A: 16-bit
16-bit timer/counter
timer/counter

Multiple
Multiple capture/compare
capture/compare registers
registers
Generates
Generates PWM
PWM and
and other
other complex
complex
waveforms
waveforms && interrupts
interrupts
Directly
Directly trigger
trigger GPIO,
GPIO, DMA,
DMA, ADC,
ADC, etc.
etc.

Timer_B:
Timer_B: Same
Same as
as A;
A; improved
improved PWM
PWM

Timer_D:
Timer_D: Same
Same as
as B;
B; with
with hi-res
hi-res timing
timing

RTC:
RTC: Real-time
Real-time clock
clock with
with calendar
calendar &&

F5529 block diagram

Timer A & B RTC

alarms
alarms runs
runs in
in LPM3
LPM3 low
low power
power mode
mode

MSP430 Clocking & Power Mgmt

Clocks

Power

Clocking
(Chapter
(Chapter 4)
4)

F5529 block diagram

Three
Three Internal
Internal Clocks
Clocks
provide
provide for
for CPU,
CPU, fast
fast and
and
slow
slow peripherals
peripherals
Many
Many clock
clock sources
sources
(internal
(internal and
and external)
external)
provide
provide cheap
cheap and
and
accurate
accurate clks
clks with
with quick
quick
wake-up
wake-up
Clock
Clock defaults
defaults and
and
failsafes
failsafes improve
improve system
system
robustness
robustness

Power Mgmt

MSP430 Analog
Clocks

Power Watchdog

Analog

Families
Families ADC
ADC converter
converter
options:
options:

10
10 or
or 12-bit
12-bit SAR
SAR (ADC10,
(ADC10, ADC12)
ADC12)
16
16 or
or 24-bit
24-bit Sigma-Delta
Sigma-Delta (SD16,
(SD16, SD24)
SD24)
Slope
Slope converters
converters

DAC
DAC converters:
converters: 12-bit
12-bit DAC12
DAC12

Comparators
Comparators

Voltage
Voltage REFerences
REFerences

Features
Features in
in common:
common:
F5529 block
diagram
Analog
input
Analog mux
mux supporting
supporting multiple
multipleCH
input6chans
chans
DMA
without
DMA can
can read/write
read/write samples
samplesTimers
without CPU
CPU

Precise
Precise timing
timing when
when using
using timer
timer to
to trigger
trigger

GPIO

MSP430 Communication
Clocks

Power Watchdog

Communications

USB
USB

USB
USB 2.0
2.0 at
at Full
Full speed
speed (12Mbps)
(12Mbps)
Includes
Includes PHY,
PHY, LDO,
LDO, PLL,
PLL, PUR
PUR

Serial
Serial ports
ports

USI:
USI:
USCI:
USCI:
eUSCI:
eUSCI:

SPI,
SPI, I2C
I2C
SPI,
SPI, I2C,
I2C, IrDA,
IrDA, UART
UART
enhanced
enhanced USCI
USCI

F5529
block

Radio
Frequency
Radiodiagram
Frequency

CH 6
CC430
include
CC430 and
and RF430
RF430 devices
devices
include
Timers
Sub-1GHz
Sub-1GHz or
or NFC
NFC radios
radios

GPIO

USB

MSP430 Accelerators
Clocks

Power Watchdog
CH 5

GPIO
C

Accelerators

DMA
DMA (hardware
(hardware
memcpy)
memcpy)
Copy
Copy from
from memory
memory to
to
memory
memory
Faster
Faster copies
copies than
than with
with
CPU
CPU
Supports
Supports periphs
periphs (ADC,
(ADC,
UART)
UART)

MPY32
MPY32 (8/16/32
(8/16/32
Multiplier)
Multiplier)

MAC,
MAC, fractional,
fractional, saturation
saturation
support
support

CRC:
CRC: Single-cycle
Single-cycle CRC
CRC
generation
generation
F5529 block diagram
AES:
AES: 128,
128, 192,
192, 256
256 bit
bit
encryption
encryption

LCD:
LCD: Automatic
Automatic with
with up-to
up-to

USB

MSP-EXP430F5529LP Overview

Register Sets

Pull-up Resistor

Pull-down Resistor