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Registers 1.1
Registers 1.2
Registers 1.3
Shift Registers
..or in parallel,
Registers 1.4
Configuration
Registers 1.5
Construction
Edge-triggered devices
Output state retention
Registers 1.6
D Q
Q
D Q
Q
D Q
Q
Registers 1.7
10110
10110
10110
10110
10110
10110
10110
10110
How many clock edges are required for each
operation?
Registers 1.8
Input
D Q
D Q
D Q
Output
Registers 1.9
Output
Input
Output
Output
D Q
D Q
D Q
Registers 1.10
Input
Input
Input
Output
D Q
Q
D Q
D Q
Registers 1.11
Input
Input
Input
D Q
D Q
D Q
Output
Output
Output
Registers 1.12
Mode
In-class exercise
14
Registers 1.
14
Describe where
this circuit
combination may
be used.
Registers 1.
15
JK Shift Registers
J-K Shift registers are seldom used, as two inputs
(J,K) are required to load the first flip-flop (note
all others receive only set or reset inputs).
Input
Input
Output
Registers 1.16
Ring Counter
Registers 1.17
Ring Counter
RC circuit
Logic detection (similar to truncating a counter)
Registers 1.19
Johnson Counter
A Johnson Counter re-circulates the last flipflop Q (inverted) output back to the input of the
first Flip-Flop. It doesnt require an
initialization value, and will provide a
predictable output state sequence.
Registers 1.20
Re-Circulating Counters
A 4-bit Johnson counter has a modulus of 8,
meaning there are 8 unique output states.
Johnson Counter
0000
1000
1100
1110
8 unique states
1111
0111
0011
0001
Registers 1.
21
State Diagram
0000
1110
0001
0011
1111
0111
Registers 1.22
State Recognition
End
Paul R. Godin
prgodin@gmail.com
Registers 1.25