SECURITY SYSTEM USING FPGA

TEAM MEMBERS:
VIPPARLA VAMSI KRISHNA
WUDARU VISHAL REDDY
S VIJAY
ADAM RINALDAN
SYED ZAMEER
INTRODUCTION:
Who safeguards your home in your absence..?

Present day, everyone is always in great need of security. During

recession, crime rate like burglary and thief reaches its peak and
so home needs to be more secured.

Such need can be fulfilled using a smart security system which will
provide secure and comfortable environment for living.

This system is not only limited to house and robbery but in almost
any of your daily utilities like car etc. and fire accident etc.

A siren or message will be triggered if anything malicious

happens.
LITERATURE REVIEW:

Many researches have taken place on this topic of security system:

Home Automation System Design Verilog Hardware Description Language

(Komol Arafat. Gani, Farzana. Yasmin, A B M Najmul. Karim, Iqbalur. Rahman )
[2nd International Conference on Recent Trends in Computer and Information
Engineering (ICRTCIE'2013) Dec. 20-21, 2013 Bali (Indonesia) ]

In the current systems security is achieved by using a combinational lock or

by normal lock.

The main drawback of the above systems is

the burglar can enter by any means of false
convention or by breaking the lock.
MOTIVATION:
Lot of car robberies, house looting ,accidents caused by gas explosions and leak
are increasing these days

In order to overcome the above mentioned cases we thought of a system which

notifies or alarms the owner through our smart security system.

WHY VERILOG/VHDL:

As Verilog is most used language to model electronic systems

&
VHDL is highly secured.

Field Programmable Gate Array (FPGA) controller is used to model the electronic
system to which the devices and sensors are interfaced which automates the
process.
 METHODOLOGY:
We have thought of 2 methods to achieve this:

First:
The first method is completely based on finite state machine which is
done in VHDL.

Security System will be activated if the alarm

system has been energized i.e. (K=1) and the
door is open (D=1) and / or an ultrasonic sensor
signals movement inside(U=1).
SECOND:

This method is done in VERILOG.

Various modules will be defined here for each sensor connected to FPGA.

One module which is a parent module which takes input from various
modules and alters the values of sensors to high or low by generating an
output.

SENSORS USED ARE AS FOLLOWS

Magnetic sensor
Ultra sonic sensor
Fire sensor
Smoke sensor

THANK YOU