Introduction

What is computer interfacing

 Interfaces and Interfacing
Definitions of interface from Websters Dictionary:
noun: the place at which independent systems meet and act or
communicate with each other.
e.g. human - machine interface
digital - analogue interface
terminal - network interface
TTL - CMOS interface
parallel or serial interface

verb 1: to connect by means of an interface.

verb 2: to become interfaced.
verb 3: to interact or co-ordinate harmoniously.

e.g. to interface a printer to a computer

to interface a PC to a mainframe
to interface TTL logic with ECL logic
Why is computer interfacing important ?

1. The human - machine interface determines the ultimate

success or failure of many computer- based systems.

2. Digital systems exist within and must successfully interact

with an analogue natural environment. Digital - analogue
interfaces are unavoidable.

3. Rather than designing digital systems from elementary

components, computer engineers more typically assemble
new systems from existing subsystems.

4. Interfaces between digital hardware subsystems and

between software modules must be thoroughly considered.
Why is computer interfacing important ?
5. With advances in technology, special attention must increasingly
be paid to analogue effects affecting high-speed analogue
interfaces.

6. Interfaces are a key area of standardization activity. The

choice of standards can have great competitive implications.

7. Interfacing software is typically tricky and time-consuming to design

and test. Much effort can be saved if proper interfacing techniques
are adopted (and poor interfacing techniques avoided) and good design
practices and design strategies.
 System-Level Interfaces
Human- Digital-
Human Analogue
Machine Analogue
Users Environment
Interface Interface

Digital-Digital Interface

Other Digital Systems

Human-machine interface:
Input devices: keyboard, mouse, microphone, camera
Output devices: CRT, printer, light panel, audio amp.
Digital - Analogue Interface:
Input devices: A/D converters, modems, sensors
Output devices: D/A converters, modems, transducers,
actuators, stepper motors
Control devices: switches, multiplexers, amplifiers,
attenuators
Digital - Digital Interface:
Connectors: wires, ribbon cable, coax, twisted pair, PCB
I/O devices: buffers, level-shifters, synchronizers
 An Example PC Computer

Lab Board

Serial
Port Keyboard
CPU Cache Controller

Main Memory Mouse

Memory Controller

Parallel
Hard Disc Port Printer
Drive Controller Controller

Diskette Diskette Video

CRT
Drive Controller Controller

System Bus
 Typical Mechanisms at Interfaces
1) Data buffering and flow control
-- helps compensate for short-term mismatches in
data generation and consumption rates
-- groups data into larger, more efficient chunks
2) Synchronization, handshaking
-- compensates for asynchronous clocks, clock skew
affecting synchronous signals, devices with
different response times
-- bit stuffing to equalize bit rates (telecom technique)
3) Digital processing
-- framing, packet assembly and disassembly
-- data communication protocols
-- encoding, decoding, code conversion
-- error detection and error correction
-- data compression (e.g. using Huffman codes)
4) Analogue signal conversion and conditioning
-- restore correct voltage and current levels
-- restore correct signal rise and fall times
-- pulse-shaping and channel equalization
-- take precautions to reduce noise and reflections
-- carrier modulation and demodulation
 Microprocessor (P)(MPU)
P = CPU on a single chip
Components of CPU
Registers: Temporary storage locations for
program instruction or data.
The Arithmetic Logic unit (ALU): performs both
arithmetic and logical operations
Timing and Control Circuits: keeps all working
together in the right time sequence
Bus: n_bit (internal) path for data exchange
 Microprocessor
Microprocessor=P=MPU
Tasks
processing data
controlling all components make P the Computer system
P executes instructions in memory
Fetch, Decode, Execute
 Microcomputers
Micro-computer (-Computer)
small computer
specifically for data acquisition and control applications
 Microcomputers
All Microcomputers consist of (at least) :
Microprocessor Unit (P)
Program Memory (ROM)
Data Memory (RAM)
Input / Output ports (IO)
Bus System (External)
(and Software)
MPU is the brain of microcomputer
 The Input/Output (I/O) System

I/O links MPU to outside world.

Input port : a circuit through which an external device

can send signals (data?) to the MPU.

Output port is a circuit that allows the MPU to send

signals (data?) to external devices.

I/O ports connect both digital and analogue devices by

DAC and ADC
 Bus
A common communications pathway that carry
information between the various elements of system

The term BUS refers to

a group of wires
or conduction tracks on a printed circuit board (PCB)
though which binary information is transferred

Subsystems are connected through BUS together

 3_Bus

There are three main bus grouPs

ADDRESS BUS
DATA BUS
CONTROL BUS
 Data Bus
The Data Bus carries the data which is transferred
throughout the system. ( bi-directional)

Examples of data transfers

Program instructions being read from memory into MPU.
Data being sent from MPU to I/O port
Data being read from I/O port going to MPU
Results from MPU sent to Memory

These are called read and write operations

 Address Bus

Address = binary number that identifies a

specific memory storage location or I/O
port involved in a data transfer

Address Bus = pathway transmit address to

memory or I/O port.

Address Bus is unidirectional (one way):

addresses are always issued by the MPU
 Control Bus

Control Bus = grouP of control signals

Control signals are unidirectional, and are
mainly outputs from the MPU.

provide synchronization (timing control)

between MPU and other components.

Example
RD: (read signal) read data into MPU
WR: (write signal) write data from MPU
 Main memory
Memory
Stores programs
Provides data to the MPU
Accepts result from the MPU for storage
Main memory Types
ROM : read only memory. Contains program
(Firmware). does not lose its contents when
power is removed (Non-volatile)
RAM: random access memory (read/write
memory) used as variable data, loses contents
when power is removed volatile. When power up
will contain random data values
 Read-Only Memory

P can read instructions from ROM quickly

Cannot write new data to the ROM

ROM remembers the data, even after power cycled

When power is turned on, the microprocessor will

start fetching instructions from ROM (bootstrap )
 Available ROMs
Masked ROM or just ROM
PROM or programmable ROM(once only)
EPROM (erasable via ultraviolet light) =UVROM
Flash
re-writable about 10000 times
usually must write a whole block not just 1 or 2 bytes,
slow writing fast reading
EEPROM (electrically erasable ROM)
fast writing slow reading
can program millions of times
useless for storing a program
good for save configuration information.
 ROM
A0 D0
A1 D1
m+1 bit A2 D2 n+1 bit
Address Data
Am 2m1 (n 1)
m1
Dn
Capacity : 2 ROM
PROM
EEPROM
OE : Output Enable
connect to RD of P

CE (CS ) : Chip Enable

to Address decoder CE OE
 ROM Read Timing
A0-Am

D0-Dn

CE

OE

OE falls to data valid

Addr valid to data valid
 27XX EPROM U3

10 11
9 A0 O0 12
U1 U2 A1 O1
8 13
7 A2 O2 15
8 9 8 9 A3 O3
7 A0 O0 10 A0 O0 6 16
A1 O1 7 10 A4 O4
6 11 A1 O1 5 17
A2 O2 6 11 4 A5 O5 18
5 13 5 A2 O2 13 A6 O6
4 A3 O3 14 A3 O3 3 19
A4 O4 4 14 25 A7 O7
3 15 3 A4 O4 15 A8
2 A5 O5 16 A5 O5 24
A6 O6 2 16 21 A9
1 17 1 A6 O6 17 A 10
23 A7 O7 A7 O7 23
A8 23 2 A 11
22 22 A8 A 12
19 A9 A9
A 10 19 22
21 A 10 OE
20 A 11 27
OE 20 PGM
18 CE
CE 20
18 OE/V PP
21 CE 1
V PP V PP

2716 2732 2764

16 kbit 32 kbit 64 kbit
2 kbyte 4 kbyte 8 kbyte

PGM and VPP are used to programming

 27XXX EPROM
U7

U6 12 13
U4 U5 11 A0 D0 14
10 11 10 A1 D1 15
10 11 10 11 9 A0 O0 12 9 A2 D2 17
9 A0 D0 12 9 A0 D0 12 A1 O1 A3 D3
A1 D1 A1 D1 8 13 8 18
8 13 8 13 7 A2 O2 15 7 A4 D4 19
7 A2 D2 15 7 A2 D2 15 A3 O3 A5 D5
A3 D3 A3 D3 6 16 6 20
6 16 6 16 5 A4 O4 17 5 A6 D6 21
5 A4 D4 17 5 A4 D4 17 A5 O5 A7 D7
A5 D5 A5 D5 4 18 27
4 18 4 18 3 A6 O6 19 A8
A6 D6 A6 D6 26
3 19 3 19 25 A7 O7 A9
A7 D7 A7 D7 23
25 25 24 A8 A 10
A8 A8 25
24 24 21 A9 A 11
A9 A9 4
21 21 23 A 10 A 12
A 10 A 10 28
23 23 2 A 11 A 13
A 11 A 11 29
2 2 26 A 12 A 14
A 12 A 12 3
26 26 27 A 13 A 15
A 13 A 13 2
27 1 A 14 A 16
22 A 14 A 15
OE 24
27 22 22 31 OE
20 PGM 20 OE OE/V PP PGM
CE CE 20 22
CE CE
1 1 28 1
V PP V PP V CC V PP

27128 27256 27512 27010

128 kbit 256 kbit 512 kbit 1024 kbit
16 kbyte 32 kbyte 64 kbyte 128 kbyte
 28XX E2PROM

12 13
11 A0 D0 14
10 A1 D1 15
12 13 A2 D2
11 A0 D0 14 9 17
A1 D1 8 A3 D3 18
10 11 10 15 A4 D4
A0 D0 9 A2 D2 17 7 19
9 12 A3 D3 A5 D5
10 11 8 A1 D1 13 8 18 6 20
A0 I/O0 A2 D2 A4 D4 5 A6 D6 21
9 12 7 15 7 19 A7 D7
8 9 A1 I/O1 A3 D3 6 A5 D5 20 27
A0 I/O0 8 13 6 16 A8
7 10 A2 I/O2 A4 D4 5 A6 D6 21 26
A1 I/O1 7 15 5 17 A9
6 11 A3 I/O3 A5 D5 27 A7 D7 23
A2 I/O2 6 16 4 18 A 10
5 13 A4 I/O4 A6 D6 26 A8 25
A3 I/O3 5 17 3 19 A 11
4 14 A5 I/O5 A7 D7 23 A9 4
A4 I/O4 4 18 25 A 12
3 15 A6 I/O6 A8 25 A 10 28
A5 I/O5 3 19 24 A 13
2 16 A7 I/O7 A9 4 A 11 29
A6 I/O6 25 21 A 14
1 17 A8 A 10 28 A 12 3
A7 I/O7 24 1 23 A 15
23 A 9 RDY /BUSY A 11 29 A 13 2
A8 21 2 A 16
22 A 10 A 12 3 A 14 30
A9 23 26 A 17
19 A 11 A 13 2 A 15 1
A 10 2 1 A 18
A 12 A 14 A 16
20 24 24
OE 22 22 OE
21 OE OE 31 OE 31
WE 27 27 WE
18 WE WE 22 WE 22
CE 20 20 CE
CE CE CE
24 32 32
V CC 28 28 V CC
V CC V CC V CC

2816 2864 28256 28010 28040

16 kbit 64 kbit 256 kbit 1026 kbit 4096 kbit
2 kbyte 8 kbyte 32 kbyte 128 kbyte 512 kbyte
 RAM (Random Access Memory)

P can read the data from RAM quickly

P can write new data to RAM quickly
RAM forgets its data if power is turned off
Two type is available :
Static RAM(SRAM): ff base, fast, expensive, low
cap/vol, applied for cache , no refresh
Dynamic RAM (DRAM): cap base, slow , low cost high
capacity/volume , applied for main memory(pc) need
refresh.
 RAM
A0 D0
A1 D1
m+1 bit A2 D2 n+1 bit
Address Data
Am 2m1 (n 1)
m1
Dn
Capacity : 2 RAM Data bus is
Bidirectional
RD : Read signal
connect to MemRD of P
WR : Write signal
connect to MemWR of P
CS : Chip Select CS WR RD

to Address decoder