Department Of Technical Education

Andhra Pradesh

Name :G Sudhakar Reddy.

Designation :Senior Lecturer.
Branch: :DECE
Institute :Government Polytechnic Narsipatnam.
Year/Semester :III semester.
Subject :ELECTRONICS CIRCUITS-I.
Subject Code :EC-302.
Topic :FET&UJT.
DURATION :50 MIN
SUB TOPIC :CONSTRUCTION&WORKING PRINCIPLE

OF COMPLEMENTARY MOSFET
TEACHING AIDS : ANIMATION & PHOTOGRAPHS
EC302.40 1
 RECAP

We all ready know about the

3. The merits and demerits of MOSFETs

5. Difference between depletion and enhancement

MOSFETs

7. Power requirements of MOSFETs

EC302.40 2
OBJECTIVES

On completion of this period you would be able to know

• Introduction of complementary MOSFETs.

• Construction of complementary MOSFETs.

• Operation &circuit symbol of complementary MOSFETs.

EC302.40 3
CONSTUCTION OF COMPLEMENTARY
MOSFET(CMOS)
G

S2 S1 • In this device two

D MOSFETs that are
complementary to
each other are used.
N+ N+ P+ P+

P- Well
N-substrate
Q1

Q2
EC302.40 4
CONSTRUCTION OF CMOSFET(contd..)

S2 S1
D

N+ N+ P+ P+ •The drains of both the

MOSFETs are
combined and single
terminal is taken.
P- Well
N-substrate
Q1

Q2 EC302.40 5
CONSTRUCTION OF CMOSFET(contd..)
G

S2 S1
•Similarly the gates of
D both the transistors are
combined and a single

N+ P+
gate terminal is taken
N+ P+
out.

•Here the input is

P- Well
N-substrate appllied at the input
Q1 terminal vi.
Q2
EC302.40 6
 WORKING PRINCIPLE OF CMOSFET

-VDD
• When vi is high i.e., equal to -VDD
then Q1 is turned ON and Q2 is
turned OFF.
Q1

• The output VO is zero.

V0

V1 • Similarly when the input voltage

Vi is low i.e., equal to 0v, the Q2
Q2
turned ON and Q1 turned OFF.

EC302.40 7
 WORKING PRINCIPLE OF CMOSFET(contd..)

-VDD

•So the output voltage Vo lies at

Q1
–V dd level i.e., high.

V0 •Thus the CMOSFET in this

configuration works as an
V1
inverter.
Q2

EC302.40 8
 VDD

Q1
•The key advantage of using
CMOS design is this extremely
V0
low power consumption usually
V1 of the order of 50mv

Q2

EC302.40 9
SUMMARY

• In CMOS(GAP)FET two enhancement MOSFET that are

complementary to each other are used .

• CMOSFET is push –pull connection of p & n channel

MOSFETs on a single substrate.

• CMOS design is extremely low power consumption

usually of the order of 50 mw.

• CMOSFET works as an inviter

EC302.40 10
QUIZ
1. Regarding application of dual –gate FET which
statement is false?

(a) It is ideal for mixer application in

communication receivers.

(b) It is used for AGC driver IF amplifiers.

(c) It can not be used in colour TV.

(j) due to its two independent gates ,it has min .

cross modulation.

EC302.40 11
 FREQUENTLY ASKED QUESTION

1. Draw the constructional diagram of CMOSFET and

explain the working principle

2. Draw the symbol of CMOSFET.

EC302.40 12