Escolar Documentos
Profissional Documentos
Cultura Documentos
Organização de uC
Parte 1
• CPU
• Memória
• Entradas e Saídas
• Tempo
• Energia
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020 3
uControladores
uC
uP
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
Familias de uC
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
CPU
• ISA
• Registradores
• representação de dados e números
• Tipos
• Mapas de memória
• Extensão de memória
• Representação de dados e números
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
Espaço de Memória
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
Banco de memória
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
Mapa de Memória
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
Mapa de Memória do MSP430
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
Expansão de Memória
Parte 2
• CPU
• Memória
• Entradas e Saídas
• Tempo
• Energia
© 2014 by M. Jiménez, R.
Palomera, & I. Couvertier
EEE026 – PSE – UFMG 2020
Representação de Números
• Interface com SW
• Tipos
• Protocolos
• E/S mapeada em memoria
Parte 3
• CPU
• Memória
• Entradas e Saídas
• Tempo
• Energia
• Clock
• Reset
• Interrupção
• Bootstrap
Parte 4
• CPU
• Memória
• Entradas e Saídas
• Tempo
• Energia
VDD
τ = R×C
τ
• Conceito
– Geralmente as prioridades são fixas em uC
– São vetorizadas
– Apresentam certa latência
• Tipos
– Reset
– NMI
– Mascaráveis
• Usos
– Fontes internas e/ou externas
EEE026 – PSE – UFMG 2020 61
Bootstrap
• No MSP430:
– “This bootstrap loader (BSL) provides a method to program
the flash memory during MSP430 project development and
updates. It can be activated by a utility that sends commands
via the familiar UART protocol. The BSL enables the user to
control the activity of the MSP430 and to exchange data
using a personal computer or other device that supports a
UART protocol.”
– “this code is stored in a special factory-masked boot ROM.
The BSL cannot ever be erased.”
Parte 5.a
• CPU
• Memória
• Entradas e Saídas
• Tempo
• Energia
• Modos de operação
• Consumo
• Fontes de alimentação
• Reguladores
• Power Mgmt. IC
• Gerencia as diversas
fontes de energia e
alimentação de um SE
• Primárias:
– Alcalinas
• Secundárias
– NiCd
– NiMH 1.8 Volt Technology – Benefits. AN550. Microchip.
Parte 5.b
• CPU
• Memória
• Entradas e Saídas
• Tempo
• Energia
2. Supervisor circuit protects from brown-out conditions occurring as a result of supply
voltage drops below the safe operating level. It eliminates a slowly decaying power
supply which causes the microcontroller to begin executing instructions without
enough voltage to sustain its SRAM, producing indeterminate results, and helps
prevent a runaway system or helps back up critical data during power fluctuations.
– Most processor data sheets provide a minimum reset period, during which the
device should remain out of operation until the local power supply has stabilized
for a specified interval (200ms is typical). The processor is not guaranteed to
correctly operate if brought out of reset too quickly. During this reset interval,
the processor's clock is allowed to stabilize and the internal registers have time
to load properly.
3. Even the best-designed systems are subject to errors other than power
supply fluctuation. Bugs in the program code, incorrect clocking signals,
or poorly responding peripherals can all force the processor out of its
normal operating code or into a dead-end loop. When a processor leaves
the expected instruction path, it may have no way of knowing that it is
incorrectly operating and needs to restart.
• The Why, What, How, and When of Using Microprocessor Supervisors. Tutorial. Maxim. 2018.