1 2 3 4 5 6

Global power nets:

Sheet: Power VDD = main power supply, nominal +5V (regulated)
VEE = LCD bias supply, nominal -18V (unregulated)
VCC = DC input supply (battery or DC jack), nominal +3V
GND = common ground

A
File: power.sch
Game Boy Pocket mainboard A

VDD Main SoC MGB-CPU-01

Voltage supervisor
U1 MGB-ECPU-01
VDD

53
GameBoy_CPU_MGB
MGB-LCPU-01

VDD
U6 PST9135N
A0 1
A0 MA0
49 MA0
MA0 TP10 MGB-LCPU-02
5

A1 2 50 MA1
A1 MA1 MA1 TP11
R3 TP6 A2 3 51 MA2
VCC

A2 MA2 MA2 TP12

160k RES A3 4 52 MA3
A3 MA3 MA3 TP13
A4 5 54 MA4
4 RES A4 MA4 MA4 TP14
VOUT A5 6 55 MA5
A5 MA5 MA5 TP15
A6 7 56 MA6 Cartridge slot
A6 MA6
GND

MA6 TP16
SUB

TP43 VDD
C17 A7 8 57 MA7
A7 MA7 MA7 TP17
100nF A8 9 64 MA8 1
A8 MA8 MA8 TP18 VCC
2
3

A9 10 63 MA9 PHI 2
A9 MA9 MA9 TP19 PHI
A10 11 60 MA10 WR 3
A10 MA10 MA10 TP20 WR
A11 12 62 MA11 RD 4
GND A11 MA11 MA11 TP21 RD
A12 13 58 MA12 CS 5
A12 MA12 MA12 TP22 CS
*see Note 2 A13 14 A0 6
A13 *see Note 1 A0
B A14 15 37 MD0 A1 7 B
A14 MD0 MD0 TP23 A1
A15 16 36 MD1 A2 8
A15 MD1 MD1 TP24 A2
35 MD2 A3 9
MD2 MD2 TP25 A3
System clock D0 17 34 MD3 A4 10
D0 MD3 MD3 TP26 A4
D1 18 33 MD4 A5 11
D1 MD4 MD4 TP27 A5
TP1 X1 TP3 D2 19 31 MD5 A6 12
D2 MD5 MD5 TP28 A6
CK1 4.194304 MHz CK2 D3 20 30 MD6 A7 13
D3 MD6 MD6 TP29 Work RAM A7
D4 21 29 MD7 A8 14
D4 MD7 MD7 TP30 A8
D5 22 A9 15
D5 VDD A9
D6 23 61 MRD A10 16
D6 MRD MRD TP31 A10
D7 24 59 MCS A11 17 P1
C1 C2 D7 MCS MCS TP32 TP34 TP36 TP38 TP40 U2 A11
65 MWR A12 18 GameBoy_Cartridge

28
25pF 25pF MWR MWR TP33 LD1 LD0 CPG CP LH52A64N A12
RD 79 Sheet: LCD A13 19
RD A13

VCC
CS 80 45 A0 10 11 D0 A14 20
CS LD1 LD1 A0 I/O0 A14
GND WR 78 44 A1 9 12 D1 A15 21
WR LD0 LD0 A1 I/O1 A15
41 A2 8 13 D2 D0 22
CPG CPG A2 I/O2 D0
RES 25 46 A3 7 15 D3 D1 23
RES CP CP A3 I/O3 D1
66 43 A4 6 16 D4 D2 24
CK2 ST ST A4 I/O4 D2
67 42 A5 5 17 D5 D3 25
CK1 CPL CPL A5 I/O5 D3
PHI 77 47 A6 4 18 D6 D4 26
C PHI FR FR A6 I/O6 D4 C
48 A7 3 19 D7 D5 27
S S A7 I/O7 D5
75 A8 25 D6 28
TP2 TP4 TP5 T2 File: lcd.sch A8 D6
76 74 P10 TP35 TP37 TP39 TP41 A9 24 22 RD D7 29
SO1 SO2 VIN T1 P10 A9 OE D7
GND 73 P11 S FR CPL ST A10 21 27 WR RES 30
P11 A10 WE VDD RES VDD
Sheet: Analog audio VIN 26 71 P12 A11 23 20 CS VIN 31
VIN P12 A11 CE1 VIN

GND
Right SO1 27 70 P13 Sheet: Joypad A12 2 26 A14 32
SO1 SO1 P13 A12 CE2 GND
Left SO2 28 69 P14 P10 TP42
SO2 SO2 P14 P14 P10 C11 TP44 C10
68 P15 P11 CS2

14
File: audio.sch P15 P15 P11 10nF P1-GND 10nF
SCK 39 P12
TP7 SCK SCK VDD P12
SIN 40 P13
TP8 SIN SIN P13
GND

SOUT 38 GND GND GND GND

TP9 SOUT SOUT File: joypad.sch
C12
32

10nF

GND GND
Sheet: Link port
https://github.com/gekkio/gb-schematics
SCK
https://gekkio.fi
SIN
SOUT
Sheet: /
D File: MGB-xCPU.sch D
Note 1:
The MGB SoC includes integrated Video RAM, but all the VRAM bus signals are available as pins and connected to test pads
P14 Title: MGB-xCPU
Note 2: File: link_port.sch Size: A4 Date: 2020-09-19 Rev: B
The supervisor IC has an open drain output that is pulled low when VDD <= 3.5V
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1 2 3 4 5 6
 1 2 3 4 5 6

A A

B Protection diodes Noise suppression / current limiting B

VDD

VDD
2

2
DA3A DA3B DA3C DA3D
UMN1N UMN1N UMN1N UMN1N RA3
1

5
220R 1
VDD
P3-SOUT 2
SOUT SO
1 8 P3-SIN 3
SIN SI
2 7 P3-P14 4
P14 SD
3 6 P3-SCK 5 P3
SCK SC
4 5 6 GameBoy_LinkPort
GND
5

DA4D DA4C DA4B 1 DA4A C4 C5 C6 C7 C9 *see Note 1

UMP1N UMP1N UMP1N UMP1N 100pF 100pF 100pF 100pF 10nF
2

SH
GND

GND
C C

https://github.com/gekkio/gb-schematics
https://gekkio.fi
Sheet: /Link port/
D File: link_port.sch D

Title: MGB-xCPU - Link port

Note 1:
Official link cables omit pin 1 (VDD) and pin 4 (P14/SD), but unofficial cables usually have all 6 signals with VDD/SD crossed Size: A4 Date: 2020-09-19 Rev: B
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A A

D-Pad

SW3
UP

DA1-U
P12
Buttons

SW2 SW5 SW9

LEFT RIGHT A

DA1-L DA1-R DA2-A

P11 P10 SW8 P10
B
SW4
DA2-B
DOWN P11

DA1-D
P13

B B

SW6 SW7
SELECT START

DA2-SEL DA2-STA
P12 P13

D-Pad signal selection Button signal selection

DA1-U DA1-D DA1-R DA1-L DA2-SEL DA2-B DA2-A DA2-STA

1

5
TP45 DA1A DA1B DA1C DA1D TP46 DA2A DA2B DA2C DA2D
P14 FMN1 FMN1 FMN1 FMN1 P15 FMN1 FMN1 FMN1 FMN1
2

2
P14 P15
*see Notes 1,2 *see Notes 1,2

C C

https://github.com/gekkio/gb-schematics
Note 1:
https://gekkio.fi
Earlier boards use Panasonic MA6X124 (SOT-23-6 footprint) instead of Rohm FMN1 (SOT-23-5 footprint)
The SOT-23-6 footprint on the board is compatible with both Sheet: /Joypad/
D File: joypad.sch D

Note 2: Title: MGB-xCPU - Joypad

Warning: MA6X124 and FMN1 datasheets use non-standard pin numbering!
This schematic uses standard SOT-23-5/SOT-23-6 numbering Size: A4 Date: 2020-09-19 Rev: B
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A A

AC coupling TP90 TP93

EM2
RA5 RA5-LOUT P5-LOUT
TP49 Ferrite
C18 15R
RA4-SO1
1uF Volume control
TP52 1 4
SO1 RA4 VR1-SO1 2 3
510R
EM3
C19 1 4 TP91 TP94
Ferrite
1uF 2 3 RA5-ROUT P5-ROUT
TP47
TP53 Headphone + speaker amplifier
SO2 LIN
5

4
VR1-SO2 TP87
TP50 2 LIN
SW
RA4-SO2 VR1 TP95
2x10k EM1
P5-GND
B 3 RIN Ferrite B
VCC
1
3
1

RIN U3
VR1-GND 2 P5

14
TP51 IR3R53N

4
TP48 VDD Headphones
*see Note 1 5
TP88 TP89

VCC1

VCC2
4
U3-LOUT U3-ROUT
GND
8 12 U3-LOUT
LIN HPLOUT TP96
7 15 U3-ROUT GND
RIN HPROUT SP

TP54 TP85 TP86 SW 6 3 SP

SW SPKOUT LS1
HPLBC HPRBC SPKBC 5 1
SD Speaker
2
HPLBC 13
HPLBC
HPRBC 16
HPRBC C14 C15 C16
TP92
47nF 47nF 47nF
SPKBC 17 A-GND
SPKBC VCC

GND1
GND2
GND3
C25 C26 C27 C31
2.2uF 2.2uF 2.2uF GND 100uF
C13
11 10nF
1
2
C C
GND GND

GND GND
Filter capacitors

https://github.com/gekkio/gb-schematics
https://gekkio.fi
Sheet: /Analog audio/
D File: audio.sch D
Note 1:
Pins 4 (GND) and 5 (SW) are normally connected, and inserting a plug disconnects SW from GND. Title: MGB-xCPU - Analog audio
Size: A4 Date: 2020-09-19 Rev: B
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1 2 3 4 5 6
 1 2 3 4 5 6

Global power nets:

VDD = main power supply, nominal +5V (regulated)
VEE = LCD bias supply, nominal -18V (unregulated)
VCC VDD PWR_FLAG PWR_FLAG VCC = DC input supply (battery or DC jack), nominal +3V
GND = common ground
Main power inputs (DC jack, battery)

PWR_FLAG PWR_FLAG VEE GND

A A
D3
RB160LAM-40
Main power switch

TP57
P4 F2 F1 *see Note 1 SW1-VCC SW1
DC 3V 500mA 1A SP3T VCC
1
3 *see Note 3 1 TP60
2 TP58 2 C VCC
C35 R6 D2
Mounting BT1 SW1-R4 3 Mounting

C 0R 1SS355 R4
MP

MP
Battery
*see Note 2 75R
*see Note 2 *see Note 4

GND GND
GND

Power LED
*see Note 5
B DC/DC conversion B
VCC
TP55 VDD
U5 VDD
VCC
DC/DC
1 6
R7
2 5 750R
3 4
C32 C30 C33
TP61
100uF 330uF 6.8uF VDD TP59 Q2C
R8 Q2B

3
47k
Q2
1 2SC4081
GND C29

2
33uF
TP62
Q2E
TP56
D4
VEE
LED
VEE
TP63
D4
C C
D5
1SS355

Note 1:
F1 is 600mA on earlier boards GND

Note 2:
D3/F2/R6 share the same footprint, and the actual device can be only one of them
D2 is also optional and not used in all cases.
Known combinations:
1) only D2 populated, no D3/F2/R6
2) D2 + R6 populated
3) D2 + F2 populated
4) only D3 populated, no D2

Note 3:
Pins 2 (GND) and 3 (BT-) are normally connected, and inserting a DC plug disconnects GND from BT-

https://github.com/gekkio/gb-schematics
Note 4:
R4 provides a discharge path from VCC to GND when the power switch is in the off position https://gekkio.fi
Sheet: /Power/
D File: power.sch D
Note 5:
Power LED circuit is not present on early MGB-CPU-01 boards
Title: MGB-xCPU - Power
Size: A4 Date: 2020-09-19 Rev: B
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1 2 3 4 5 6
 1 2 3 4 5 6

A A

Contrast adjustment STN LCD bias generation

VDD VDD
TP69
TP80
TP65 U4 V1B

2
V4

10
VR IR3E02 TP82
Q1
C20 C21 C22 C23 C24 TP79 TP81 V3
1 2SA1576A

V+
VR 18 11 1uF 1uF 1uF 1uF 1uF
VR V1B C3 V1 V2

3
C28 47pF
TP66 3 12 V1
TODO: more specific symbol VR2 10uF VS1 V1
VS1 4 15 V2
30k VS2 V2
TP67 5 16 V3
VS3 V3
TP64 GND VS3 6 13 V4 TP83
VS4 V4
VR2-VEE TP68 7 14 P2-V5
VS5 V5
1

V-
JP1 VS5 TP70
SolderJumper_2_Bridged U4-V5 R1
2

1
100R

B VEE VEE B

VDD TP84
TP71 P2-GND
JP2 P2-CPG
SolderJumper_2_Bridged 1
P2-CPG 2
CPG
1 2 P2-CPL 3
TP72 P2-ST 4
JP3 P2-CPL P2-LD0 5
SolderJumper_2_Bridged P2-LD1 6
CPL P2-CP 7
1 2
P2-FR 8
TP73
JP4 P2-V5 9
P2-ST
SolderJumper_2_Bridged V3 10 P2
V2 11 LCD FPC
ST
1 2 P2-CPL 12
TP74 P2-S 13
JP5 P2-LD0 14
SolderJumper_2_Bridged P2-FR 15
C LD0
C
1 2 V1 16
V4 17
TP75
JP6 P2-V5 18
P2-LD1
Mounting
SolderJumper_2_Bridged

MP
LD1
1 2
TP76 GND
JP7 P2-CP
SolderJumper_2_Bridged
CP
1 2
TP77
JP8 P2-FR
SolderJumper_2_Bridged
FR
1 2
TP78
JP9 P2-S https://github.com/gekkio/gb-schematics
SolderJumper_2_Bridged
https://gekkio.fi
S
1 2 Sheet: /LCD/
D File: lcd.sch D

Title: MGB-xCPU - LCD

Size: A4 Date: 2020-09-19 Rev: B
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