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1

PCB STACK UP
LAYER 1 : TOP

TE4 Block Diagram

LAYER 2 : GND1
LAYER 3 : IN1
LAYER 4 : VCC
A

LAYER 5 : IN2

LAYER 6 : IN3
LAYER 7 : GND2

USB-0

DDRIII-SODIMM1
DDRIII-SODIMM2

Re-Driver

SATA - HDD
P29

P29

DDR SYSTEM MEMORY

Dual Channel DDR III


800/1066/1333 MHZ

INT_CRT

PCI-E

rPGA 989
P4, 5, 6,7
FDI

DMI

LCD/CCD Con. P26

INT_LVDS

Arrandale (UMA+VGA)

P14,15

Graphics Interfaces

LAYER 8 : BOT

CRT Con.

daughter board
P26

INT_HDMI

HDMI Con.
P25

DMI(x4)

SATA - ODD
P29

SATA 0
FDI

DMI

SATA 1
SATA

PCI-E

PCI-Express

CK505

PCIE-3

USB Con.(Right)

daughter board

USB-3

Cardreader

SIM CARD.
P32

P27

USB-8

P26

P3

3G

USB-10

POWER SYSTEM
ISL88731C
PM6686TR
RT8207L
G5602R41U
RT8152C
ISL62882HRTZ-T
G966A

Ibex Peak-M
USB 2.0 (Port0~13)

PCIE-5

USB

PCH

USB-4
P27

WLAN

USB-5

P27

P9, 10, 11,12,13


PCIE-6
RTC

USB-13

USB Con.(Left)
C

P38
P40
P41
P42

P31

+VCC_CORE

BATTERY
USB-9

USB Con.(Left)

P37
P39

Giga/10/100 Lan

P28

Cardreader Con.
P32
3 IN 1

P36

P9

P28

Azalia

+1.5V
+1.5VSUS

IHDA

NVRAM

LPC

+VTT
+1.05V

LPC

+1.8V

Audio Codec

EC

+1.5V_S5
P33

FAN
MIC JACK

MDC Con.

P30

+3VPCU
+3V_S5
+3V
+5VPCU
+5V_S5
+5V
+SMDDR_VTERM
+SMDDR_VREF

Port-A

Port-B

P30

P30

HP

K/B Con.

HALL Sensor

SPI Flash

Touch Pad /B
Con.

SPK Con.
P30

P30

P4

P34

P4

P33

P34

Power /B
Con.
P34

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Date:

Friday, November 12, 2010

Rev
1A

Block Diagram
1

HTTP://FAQP.RU/

Sheet

1
8

of

46

02
POWER PLANE

Table of Contents
PAGE

DESCRIPTION

Schematic Block Diagram

Front Page

Clock Gen

4-7

VIN

S3 Power Reduction
PCH

RTC

14-15

DDRIII SO-DIMM

25

HDMI comm part

26

LCD Panel
CRT & CRT BUS SWITCH
CCD
HALL SENSOR&BACK LIGHT SWITCH
MINI Card (Wi-Fi & WIMAX)

27

MINI Card 2nd


MINI Card 3nd
28

USB 2.0

29

SATA ODD
Main SATA HDD & 2nd SATA HDD

30

Codec (CX20587)

31

Atheros LAN

32

3 IN 1 Card reader

33

EC NPCE791L

34

INT KeyBoard & K/B LED Power

VOLTAGE

Power States
ACTIVE IN

10V~+19V

+VCCRTC

Processor

8
9-13

CONTROL
SIGNAL

S0~S5

+3.0V~+3.3V

S0~S5

+3V

+3.3V

MAIN_ON

S0

+3V_S5

+3.3V

S5_ON

S0~S5

+3V_HDP

+3.3V

MAIN_ON

S0

+3VPCU

+3.3V

AC/DC Insert enable

S0

+5V

+5V

MAIN_ON

S0

+5V_S5

+5V

S5_ON

S0~S5
S0~S5

+5VPCU

+5V

AC/DC Insert enable

WIMAX_P

+3.3V

WMAX_P for WLAN

+1.8V

+1.8V

MAIN_ON

+1.5V

+1.5V

MAIN_ON

S0

+1.5V_SUS

+1.5V

SUSON

S0~S3

VRON

S0

+VCC_CORE

S0

+VTT

+1.05V

MAIN_ON

S0

+1.05V

+1.05V

MAIN_ON

S0

MPWROK

S0

+VAXG

TP board
Power SW
HOLE
35

LED / EMI

36

Charger (ISL88731C)

37

System 5V/3V (PM6686TR)

38

DDR1.5V(RT8207L)/1.05VSUS

39
40

+VTT/+1.05V (G5602R41U)
VAXG_CORE RT8152C FOR UMA

41

+VCC_CORE(ISL62882HRTZ-T)

42

+1.8V (G966A)/Discharge

GND PLANE

PAGE

8769AGND

33

Audio_GND

30

Shield_GND

30

GND

ALL

ISL95870A_AGND

30

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Date:

Friday, November 12, 2010

POWER STAGE AND BOI-FUNCTION


1

HTTP://FAQP.RU/

Sheet

of
8

46

Rev
1A

[CLK]

CLOCK Gen

250mA(20mils)

PBY160808T-601Y-N_1A

+3V_CK505_VDD

L8

C239
0.1U/10V_4X

C229
0.1U/10V_4X

U9
R397
*590@0_6

+1.5V

L7

150mA(20mils)

595@PBY160808T-601Y-N_1A

C233
595@10U/6.3V_8X

C7335
*0.1U/10V_4X

C234
*0.1U/10V_4X

5
29

+1.5V_CK505_VDD

1
17
24
XTAL_OUT
XTAL_IN

C243
*0.1U/10V_4X

27
28

CPU_SEL

30

CGDAT_SMB
CGCLK_SMB
C

CLK_PCH_14M

{10} CLK_PCH_14M

R133

+1.05V

80mA(20mils)

+VDDIO_CLK

C435
10U/6.3V_8X

03

Pin1/17/24
Sligo595 =>1.5V (AL000595000)
Sligo590 =>3.3V (AL8SP590000)

+3V

L17

33_4

C225
*15P/50V_4C

VDD_27
VDD_REF

SDA
SCL

2
8
9
12
21
26

VSS_DOT
VSS_27
VSS_SATA
VSS_SRC
VSS_CPU
VSS_REF

C7354

C240

*10U/6.3V_8X

10U/6.3V_8X

0.1U/10V_4X

0.1U/10V_4X

15
18

DOT_96
DOT_96#

DREFCLK_R
DREFCLK#_R

27M
27M_SS

6
7

CLK_VGA_27M_R
CLK_VGA_27M#_R

SRC_1/SATA
SRC_1#/SATA#
SRC_2
SRC_2#

10
11
13
14

DREFSSCLK_R
DREFSSCLK#_R
PCIE_3GPLL_R
PCIE_3GPLL#_R

*CPU_STOP#

16

ICS_CPU_STOP#

CPU_1
CPU_1#
CPU_0
CPU_0#

20
19
23
22

CLK_BUF_BCLK1_P_R
CLK_BUF_BCLK1_N_R
CLK_BUF_BCLK0_P_R
CLK_BUF_BCLK0_N_R

CKPWRGD/PD#

25

VR_PWRGD_CLKEN

XTAL_OUT
XTAL_IN
REF_0/CPU_SEL

C246

3
4

VDD_DOT_1.5
VDD_SRC_1.5
VDD_CPU_1.5

31
32

33

VDD_SRC_I/O
VDD_CPU_I/O

PBY160808T-601Y-N_1A
D

C249

RP3

2
4

1
3

R186
R190
R197
RP4
RP5
R411

CLK_BUF_DREFCLKP
CLK_BUF_DREFCLKN

*EV@33_4
EV@33_4
*33_4

2
4
2
4

10K_4

*short_4P2R

1
3
1
3

{10}
{10}

PCH_CLK_27M
TP35

*short_4P2R

CLK_BUF_DREFSSCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_PCIE_3GPLLN

*short_4P2R

{10}
{10}
{10}
{10}

+3V
C

TP31
TP30
RP2

4
2

3
1

*short_4P2R

CLK_BUF_BCLKP
CLK_BUF_BCLKN

{10}
{10}

GND
SLG8LV595VTR

CLK CRYSTAL

CLK CPU_SEL

CLK POWERGOOD

CLK I2C
+3V

+3V

R378

*10K_4

SDATA

CGDAT_SMB

{41} VR_PWRGD_CK505#

C231

33P/50V_4N

33P/50V_4N

R137
100K/F_4

Q12

2N7002_200MA

R136

C230

VR_PWRGD_CLKEN

CGDAT_SMB {14,15,27}

2N7002_200MA
Q32

XTAL_OUT

14.318MHZ_30

10K_4

XTAL_IN

{10,31}

CPU_SEL

Y2

R138

+3VPCU

10K_4

R134

10K_4
R398
10K_4

+3V
A

0
CPU_SEL

{10,31}

SCLK

CGCLK_SMB

CGCLK_SMB {14,15,27}

Quanta Computer Inc.

2N7002_200MA
Q34

CPU =133MHz CPU=100MHz


(default)

PROJECT : TE4
Size

Document Number

Rev
A1A

CLOCK GENERATOR
Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

of

46

U19A

{11}
{11}
{11}
{11}

A24
C23
B22
A21

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

{11}
{11}
{11}
{11}

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

B24
D23
B23
A22

{11}
{11}
{11}
{11}

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

D24
G24
F23
H23

{11}
{11}
{11}
{11}

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

D25
F24
E23
G23

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

D22
C21
D20
C18
G22
E20
F20
G19

{11} FDI_FSYNC0
{11} FDI_FSYNC1

F17
E17

{11}

C17

FDI_INT

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
FDI_FSYNC[0]
FDI_FSYNC[1]
FDI_INT

F18
D17

{11} FDI_LSYNC0
{11} FDI_LSYNC1

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

Intel(R) FDI

E22
D21
D19
D18
G21
E19
F21
G18

FDI_LSYNC[0]
FDI_LSYNC[1]

PCI EXPRESS -- GRAPHICS

{11} FDI_TXP[7:0]

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

04

U19B

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

2.7GT/s data rate


{11} FDI_TXN[7:0]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

B26 PEG_COMP
A26
B27
A25 PEG_RBIAS

R7350

49.9/F_4

R7351

750/F_4

R83
R87
R55
R89

20/F_4
20/F_4
49.9/F_4
49.9/F_4

H_COMP3 AT23
H_COMP2 AT24
H_COMP1 G16
H_COMP0 AT26
AH24

TP7

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

COMP3
COMP2
COMP1
COMP0
SKTOCC#

MISC

{12}

AK14
AT15
H_PROCHOT#_D
AN26
CPU_PM_THRMTRIP# AK15

H_PECI

CATERR#
PECI
PROCHOT#
THERMTRIP#

E16
D16

CLOCKS PEG_CLK
PEG_CLK#

THERMAL

CLK_CPU_BCLKP
CLK_CPU_BCLKN

AR30
AT30

BCLK_ITP
BCLK_ITP#

del in UMA
H_CATERR#

A16
B16

BCLK
BCLK#

R326

A18 CLK_DREFSSCLKP_R
A17 CLK_DREFSSCLKN_R

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

EV@0_4

R323 3
1

4 *IV@0X2
2

R325
H_CPURST#_R
{11}

PM_SYNC

{12} H_PWRGOOD
{8,11} PM_DRAM_PWRGD

PM_DRAM_PWRGD

AM26

TP11

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

{11,27,31,33}

PLTRST#

H_VTTPWRGD
1.5K/F_4 CPU_PLTRST#

R7135

R66

AP26
AL15
AN14
AN27
AK13

AM15
AL14

RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK

F6

SM_DRAMRST#

DDR3 SM_RCOMP[0]
MISC SM_RCOMP[1]
SM_RCOMP[2]

TAPPWRGOOD

750/F_4

PRDY#
PREQ#
TCK

PWR MANAGEMENT

TMS
XDP_OBS0 AJ22
XDP_OBS1 AK22
XDP_OBS2 AK24
XDP_OBS3 AJ24
XDP_OBS4 AJ25
XDP_OBS5 AH22
XDP_OBS6 AK23
XDP_OBS7 AH23

TP10
TP13
TP9
TP8
TP5
TP4
TP12
TP6

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

JTAG & BPM

TRST#
TDI
TDO
TDI_M
TDO_M

R353
R354
R355
R92
R95
R88
R90

CLK_DREFSSCLKP
CLK_DREFSSCLKN

{10}
{10}

For EDP
A

100/F_4
24.9/F_4
130/F_4
10K_4
*short_4
*short_4
10K_4

{8}

+VTT
PM_EXTTS#0 {14}
PM_EXTTS#1 {15}
+VTT

AT28
AP27
AN28

XDP_PRDY#
XDP_PREQ#
XDP_TCLK

TP20
TP14
TP16

AP28

XDP_TMS

TP18

AT27

XDP_TRST#

TP21

AT29
AR27
AR29
AP29

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

AN25

DBR#

{10}
{10}

DDR3_DRAMRST#_C

AN15 PM_EXT_TS#0
AP15 PM_EXT_TS#1

PM_EXT_TS#[0]
PM_EXT_TS#[1]

TP17
TP19
CLK_PCIE_3GPLLP
CLK_PCIE_3GPLLN

EV@0_4

DDR3_DRAMRST#_C

AL1 SM_RCOMP_0
AM1 SM_RCOMP_1
AN1 SM_RCOMP_2

VTTPWRGOOD
RSTIN#

{12}
{12}

SYS_RESET#

{11}

ACA-ZIF-069-K01

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

JTAG MAPPING

Processor hot
+VTT

throttle
XDP_TDI_R
XDP_TDO_M

Ra R115
Rb R101

*short_4
*0_4

68_4

R103
*short_4

ACA-ZIF-069-K01

XDP_TDI_M
XDP_TDO_R

Ra

Rd R102
Re R100

R99
51_4

*0_4
*short_4

R114

{41} H_PROCHOT#

H_PROCHOT#_D

*short_4

If Ra no stuff must change Rb to 50 ohm

Scan Chain
(Default)

STUFF -> Ra, Rc, Re


NO STUFF -> Rb, Rd

CPU Only

STUFF -> Ra, Rb


NO STUFF -> Rc, Rd, Re

GMCH Only

STUFF -> Rd, Re


NO STUFF -> Ra, Rb, Rc

Thermal Trip
+VTT
C

R109

Rb

XDP_TDI
XDP_TDO
XDP_TRST#

Rc

Q31

{11,41} DELAY_VR_PWRGOOD

FDI Disable (Discrete only)

2N7002_200MA

VTT Power Good


Cost Down Study

+3V

+VTT
*short_4

+VTT

2
4

HWPG_1

R105

2K/F_4

H_VTTPWRGD

R52

EV@1K_4

R49

EV@1K_4 FDI_FSYNC0

*51_4
*51_4
*51_4

R50

EV@1K_4 FDI_FSYNC1

R48

EV@1K_4

FDI_LSYNC0

*51_4

R51

EV@1K_4

FDI_LSYNC1

H_CATERR#
R70
H_CPURST#_R R360

49.9/F_4
*68_4

XDP_TMS
XDP_TDI_R
XDP_PREQ#

R107
R110
R106

XDP_TCLK

R94

R359

{11,33} MPWROK

R116

1
R112
*short_4

U5

*0_4

R111

TC7SH08FU(F)
R104
1K/F_4

VL

*56.2/F_4
CPU_PM_THRMTRIP#

*0_4

R84

Local Temperature

R365

R364

1K_4

100K_4

FDI_INT

R113

HWPG

{33}

Q30
MMBT3904-7-F_200MA
SYS_SHDN#
3

*short_4

SYS_SHDN#

PM_THRMTRIP#

{37}

PM_THRMTRIP#

{12}

CPU FAN CTRL


+3V

+3VPCU
+3VPCU

+3VPCU
+3V

R310
150_4

R301

3mA(40mils)

R313
*150_4

C3A

R311

*10K_4

*330_4

SET
GND

0.1U/10V_4X
R488
0_4

HYST

OT#

R315

THER_SHD#

TEMP_ALERT#

{12,33} TEMP_ALERT#

Q25

*MMBT3904-7-F_200MA

SYS_SHDN#

1
Q3

2.2U/6.3V_6X

CPUFAN#_ON_R_1
3
*2N7002_200MA
{33}

{37}

40mils

U1
C33

THM@22K/F_4

VCC

U16
+3VPCU_HW_SD 5
C367

10K_4

+5V

R312

VFAN1

VO
GND
/FON GND
GND
4
VSET GND
G991P11U
1

VIN

3
5
6
7
8

{33}

FANSIG1

CN7

FANSIG1

TH_FAN_POWER1

1
2
3

C30

C31

C348

10U/6.3V_8X

0.01U/25V_4X

*0.01U/25V_4X

Quanta Computer Inc.

85205-0300L

G708T1U

VL

FANPWR = 1.6*VSET

R489

*0_4

R316

PROJECT : TE4

*short_4
Size

C3A

D3B

#Shut down on 86 degree#


2

Rev
A1A

PROCESSER 1/4(HOST&PEX)
Date:

Document Number

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
8

of

46

05
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)
A

{15} M_B_DQ[63:0]

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

AA6
AA7
P7

M_A_CLKP0 {14}
M_A_CLKN0 {14}
M_A_CKE0 {14}

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

Y6
Y5
P6

M_A_CLKP1 {14}
M_A_CLKN1 {14}
M_A_CKE1 {14}

SA_CS#[0]
SA_CS#[1]

AE2
AE8

M_A_CS#0 {14}
M_A_CS#1 {14}

SA_ODT[0]
SA_ODT[1]

AD8
AF9

M_A_ODT0 {14}
M_A_ODT1 {14}
M_A_DM[7:0] {14}

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

M_A_DM0
B9
D7 M_A_DM1
H7 M_A_DM2
M7 M_A_DM3
AG6 M_A_DM4
AM7 M_A_DM5
AN10 M_A_DM6
AN13 M_A_DM7

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

M_A_DQSN0
C9
M_A_DQSN1
F8
M_A_DQSN2
J9
M_A_DQSN3
N9
AH7 M_A_DQSN4
AK9 M_A_DQSN5
AP11 M_A_DQSN6
AT13 M_A_DQSN7

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

C8 M_A_DQSP0
M_A_DQSP1
F9
H9 M_A_DQSP2
M9 M_A_DQSP3
AH8 M_A_DQSP4
AK10 M_A_DQSP5
AN11 M_A_DQSP6
AR13 M_A_DQSP7

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

U19D
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

DM signals are not present on Clarkfield


processor. All DM signal can be left as
NC on Clarkfield and connect directly to
GND on So-DIMM side for Clarkfield
design only
M_A_DQSN[7:0]

{14}

M_A_DQSP[7:0] {14}

M_A_A[15:0] {14}

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

{14}
{14}
{14}

M_A_BS#0
M_A_BS#1
M_A_BS#2

AC3
AB2
U7

SA_BS[0]
SA_BS[1]
SA_BS[2]

{15}
{15}
{15}

M_B_BS#0
M_B_BS#1
M_B_BS#2

AB1
W5
R7

SB_BS[0]
SB_BS[1]
SB_BS[2]

{14}
{14}
{14}

M_A_CAS#
M_A_RAS#
M_A_WE#

AE1
AB3
AE9

SA_CAS#
SA_RAS#
SA_WE#

{15}
{15}
{15}

M_B_CAS#
M_B_RAS#
M_B_WE#

AC5
Y7
AC6

SB_CAS#
SB_RAS#
SB_WE#

ACA-ZIF-069-K01

DDR SYSTEM MEMORY B

M_A_DQ0 A10
M_A_DQ1 C10
M_A_DQ2
C7
M_A_DQ3
A7
M_A_DQ4 B10
M_A_DQ5 D10
M_A_DQ6 E10
M_A_DQ7
A8
M_A_DQ8
D8
M_A_DQ9
F10
M_A_DQ10
E6
M_A_DQ11
F7
M_A_DQ12
E9
M_A_DQ13
B7
M_A_DQ14
E7
M_A_DQ15 C6
M_A_DQ16 H10
M_A_DQ17 G8
M_A_DQ18
K7
M_A_DQ19
J8
M_A_DQ20 G7
M_A_DQ21 G10
M_A_DQ22
J7
M_A_DQ23 J10
M_A_DQ24
L7
M_A_DQ25 M6
M_A_DQ26 M8
M_A_DQ27
L9
M_A_DQ28
L6
M_A_DQ29
K8
M_A_DQ30 N8
M_A_DQ31
P9
M_A_DQ32 AH5
M_A_DQ33 AF5
M_A_DQ34 AK6
M_A_DQ35 AK7
M_A_DQ36 AF6
M_A_DQ37 AG5
M_A_DQ38 AJ7
M_A_DQ39 AJ6
M_A_DQ40 AJ10
M_A_DQ41 AJ9
M_A_DQ42 AL10
M_A_DQ43 AK12
M_A_DQ44 AK8
M_A_DQ45 AL7
M_A_DQ46 AK11
M_A_DQ47 AL8
M_A_DQ48 AN8
M_A_DQ49 AM10
M_A_DQ50 AR11
M_A_DQ51 AL11
M_A_DQ52 AM9
M_A_DQ53 AN9
M_A_DQ54 AT11
M_A_DQ55 AP12
M_A_DQ56 AM12
M_A_DQ57 AN12
M_A_DQ58 AM13
M_A_DQ59 AT14
M_A_DQ60 AT12
M_A_DQ61 AL13
M_A_DQ62 AR14
M_A_DQ63 AP14

DDR SYSTEM MEMORY A

U19C

{14} M_A_DQ[63:0]

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

W8
W9
M3

M_B_CLKP0 {15}
M_B_CLKN0 {15}
M_B_CKE0 {15}

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

V7
V6
M2

M_B_CLKP1 {15}
M_B_CLKN1 {15}
M_B_CKE1 {15}

SB_CS#[0]
SB_CS#[1]

AB8
AD6

M_B_CS#0 {15}
M_B_CS#1 {15}

SB_ODT[0]
SB_ODT[1]

AC7
AD1

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

D4
E1
H3
K1
AH1
AL2
AR4
AT8

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

D5
F4
J4
L4
AH2
AL4
AR5
AR8

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

C5
E3
H4
M5
AG2
AL5
AP5
AR7

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_ODT0 {15}
M_B_ODT1 {15}
M_B_DM[7:0] {15}

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

DM signals are not present on Clarkfield


processor. All DM signal can be left as
NC on Clarkfield and connect directly to
GND on So-DIMM side for Clarkfield
design only
M_B_DQSN[7:0]

{15}

M_B_DQSP[7:0] {15}

M_B_A[15:0] {15}

Quanta Computer Inc.

ACA-ZIF-069-K01

PROJECT :TE4
Size

Document Number

Rev
A1A

PROCESSER 2/4(DDR)
Date:
1

HTTP://FAQP.RU/

Monday, January 24, 2011


7

Sheet

5
8

of

46

C179

10U/6.3V_8X

C182

10U/6.3V_8X

C417

10U/6.3V_8X

C157

10U/6.3V_8X

C180

10U/6.3V_8X

C424

10U/6.3V_8X
10U/6.3V_8X

C194

0.1U/10V_4X

C419

0.1U/10V_4X

C175

*0.047U/10V_4X

C185

*0.047U/10V_4X

C423

*0.047U/10V_4X

10U/6.3V_8X

C420

10U/6.3V_8X

C153

10U/6.3V_8X

C425

10U/6.3V_8X

C174

10U/6.3V_8X

C167

10U/6.3V_8X

C183

*10U/6.3V_8X

C188

*10U/6.3V_8X

10U/6.3V_8X

C403

10U/6.3V_8X

C163

10U/6.3V_8X

*IV@330U/2V_7343P_E6b

+VAXG

C369

*330U/2V_7343P_E6b

VTT Rail Values are


Auburndal VTT=1.05V
AF10
AE10
C103
10U/6.3V_8X
AC10
C100
10U/6.3V_8X
AB10
Y10
W10
U10
T10
J12
J11
R54
*short_6
J16 +VTT_43
R56
*short_6
J15 +VTT_44

C213

IV@10U/6.3V_8X

C429

IV@10U/6.3V_8X

C216

IV@10U/6.3V_8X

C430

IV@10U/6.3V_8X

C422

IV@10U/6.3V_8X

C214

IV@10U/6.3V_8X

C215

IV@10U/6.3V_8X

C421

IV@10U/6.3V_8X

+VTT
R91

AN33

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

VID0
VID1
VID2
VID3
VID4
VID5
VID6
ICH_DPRSTP#

PSI#

{41}

C138

10U/6.3V_8X

C400

10U/6.3V_8X

+VTT

H_VID0
{41}
H_VID1
{41}
H_VID2
{41}
H_VID3
{41}
H_VID4
{41}
H_VID5
{41}
H_VID6
{41}
ICH_DPRSTP#

G15

EV@0_8

+VTT

(15mils)

PSI#

VTT_SELECT

C432
+

*IV@330U/2V_7343P_E6b

{41}

C375

10U/6.3V_8X

C370

10U/6.3V_8X

C186

10U/6.3V_8X

C177

10U/6.3V_8X

J24
J23
H25

VTT1_45
VTT1_46
VTT1_47

K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

TP2

06

ISENSE

VCC_SENSE
VSS_SENSE

AN35

ISENSE

ISENSE

B15 VTT_SENSE
A15 TP_VSS_SENSE_VTT
R75

100/F_4

R77

100/F_4

AJ34
AJ35

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

AM22
AP22
AN22
AP23
AM23
AP24
AN24

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

AR25
AT25
AM24

VCC_AXG_SENSE {40}
VSS_AXG_SENSE {40}

GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6

TP15
GFXVR_EN

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

P10
N10
L10
K10
J22
J20
J18
H21
H20
H19

VCCPLL1
VCCPLL2
VCCPLL3

L26
L27
M26

ACA-ZIF-069-K01

H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V

VTT_SENSE
VSS_SENSE_VTT

AR22
AT22

GFXVR_EN {40}
GFXVR_DPRSLPVR {40}
GFXVR_IMON {40}
R362

PEG & DMI

C189

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

C151

C431
+

FDI

CPU CORE SUPPLY

C161

10U/6.3V_8X

VAXG_SENSE
VSSAXG_SENSE

{40}
{40}
{40}
{40}
{40}
{40}
{40}

del in VGA

EV@1K_4

+1.5V_CPUVDDQ
C154

1U/6.3V_4X

C169

1U/6.3V_4X

C172

1U/6.3V_4X

C166

1U/6.3V_4X

C148

1U/6.3V_4X

C178

10U/6.3V_8X

C187

10U/6.3V_8X

C184

10U/6.3V_8X

10U/6.3V_8X

C171

SENSE
LINES

C191

del in VGA

GRAPHICS VIDs

10U/6.3V_8X

10U/6.3V_8X

C397

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

- 1.5V RAILS

10U/6.3V_8X

C181

C416

AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

POWER

C192

U19G

10U/6.3V_8X

DDR3

10U/6.3V_8X

+VAXG

+VTT
C418

1.1V

C160

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

1.8V

10U/6.3V_8X

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

C159

1.1V RAIL POWER

10U/6.3V_8X

POWER

10U/6.3V_8X

C190

CPU VIDS

C162

GRAPHICS

10U/6.3V_8X

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

SENSE LINES

C193

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

18A

U19F
+VCC_CORE

*330U/2V_7343P_E6b

+VTT
C407

10U/6.3V_8X

C412

10U/6.3V_8X

C399

10U/6.3V_8X

C398

10U/6.3V_8X

C137

10U/6.3V_8X

C141

4.7U/6.3V_6X

C140

2.2U/6.3V_6X

C142

1U/6.3V_4X

C402

1U/6.3V_4X

+1.8V

{41}

TP72
TP73
+VCC_CORE
VCCSENSE {41}
VSSSENSE {41}
VID0

R343
R342

1K_4
*1K_4

VID1

R341
R340

1K_4
*1K_4

VID2

R345
R344

1K_4
*1K_4

VID3

R347
R346

*1K_4
1K_4

VID4

R349
R348

*1K_4
1K_4

VID5

R351
R350

1K_4
*1K_4

VID6

R352
R356

*1K_4
1K_4

ICH_DPRSTP#

R7435
R357

1K_4
*1K_4

PSI#

R361
R363

*1K_4
1K_4

+VCC_CORE

+VTT

C414
+

C415
+

*330U/2V_7343P_E6b

*330U/2V_7343P_E6b

ACA-ZIF-069-K01

HFM_VID : Max 1.4V


LFM_VID : Min 0.65V

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

PROCESSER 3/4(POWER)
1

HTTP://FAQP.RU/

Sheet

6
8

of

46

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

07

AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U19I

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

R358
R327
R53

*short_4
*short_4
*short_4

AT35
AT1
AR34
B34
B2
B1
A35

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

J17
H17

{14} DDR_VREF_DQ0
{15} DDR_VREF_DQ1
CFG0
CFG3
CFG4
CFG7

TP3

VSS

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

R7352
R7353

*0_4
*0_4

TP_RSVD17_R
TP_RSVD18_R

SA_DIMM_VREF
SB_DIMM_VREF

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8

G25
G17
E31
E30
B19
A19
A20
B20
U9
T9

RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20

AC9
AB9
C1
A3
J29
J28
A34
A33
C35

RSVD21
RSVD22
RSVD_NCTF_23
RSVD_NCTF_24
RSVD26
RSVD27
RSVD_NCTF_28
RSVD_NCTF_29
RSVD_NCTF_30

B35
AJ13
AJ12
AH25
AK26
AL26
AR2
AJ26
AJ27
AP1

RSVD_NCTF_31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD_NCTF_37
RSVD38
RSVD39
RSVD_NCTF_40

RESERVED

AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

U19E

RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

AT2
AT3
AR1
AL28
AL29
AP30
AP32
AL27
AT31

RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
RSVD_TP_59
RSVD_TP_60

AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
E15
F15

KEY
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70

A2
D15
C15
AJ15 RSVD64_R
AH15 RSVD65_R
AA5
AA4
R8
AD3
AD2

RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80

AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7

RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

W3
W2
N3
AE5
AD9

VSS

R69
R68

*0_4
*0_4

TP74

AP34

ACA-ZIF-069-K01

NCTF

U19H

ACA-ZIF-069-K01

ACA-ZIF-069-K01

CFG[ 1:0 ] - PCI_Epress Configuration Select


* 11= 1 x 16 PEG
* 10= 2 x 8 PEG

CFG0 R97

*3.01K/F_4

CFG3 R96

3.01K/F_4

Enabled; An external Display port


device is connected to the Embedded
Display port

CFG4 R93

*3.01K/F_4

CFG7 R98

*3.01K/F_4

1
CFG4
(Display Port
Presence)

The Clarkfield processor's PCI Express interface may


not meet PCI Express 2.0 jitter specifications. Intel
recommends placing a 3.01K +/- 5% pull down resistor to
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
issue is fixed.

CFG0
(PCI-Epress
Configuration Select)
CFG3
(PCI-Epress Static
Lane Reversal)

Disabled; No Physical Display Port


attached to Embedded Diplay Port

Single PEG
Normal Operation

For Discrete only

Bifurcation enabled
Lane Numbers Reversed
15 -> 0 , 14 -> 1

Quanta Computer Inc.


PROJECT : TE4
Size

HTTP://FAQP.RU/

Document Number

Rev
A1A

PROCESSER 4/4 (GND)


Date:

Monday, January 24, 2011


7

Sheet

7
8

of

46

S3 Power Enable

08

DRAM Reset
+1.5VSUS

S3_1.5V

PR60

*0/F_6

2 100K_4

MAINON

4
1

{13,33,39,42}

DDR3_DRAMRST# {14,15}

R37

C76

*100K_4

0.1U/10V_4X

Q6
2

+1.5V_CPUVDDQ_PG

BSS138-7-F_0.2MA

PR49

PR53

R25
*0_4

TC7SH08FU(F)

PU4
PR54

R27
1K_4

{12} DDR3_DRAMRST#_PCH

+3V_S5

{38}

S3_1.5V

*0_6

S3_Reduce {33}

DDR3_DRAMRST#_C

{4} DDR3_DRAMRST#_C

MAINON_ON_G {14,42}

PQ3
2N7002K_300MA

*Short_6

R30

100K_4

VDDQ Power Good

VDDQ Power Switch


+3V_S5

+1.5V_CPUVDDQ

VDDQ Discharge
+1.5VSUS

+15V

+1.5VSUS
+1.5V_CPUVDDQ
R45
10K/F_4
+1.5V_CPUVDDQ_PG
3

C136

C143

C127

0.1U/10V_4X

0.1U/10V_4X

0.1U/10V_4X

0.1U/10V_4X

C368
0.01U/25V_4X

Q8
2N7002_200MA

3
2

{14,42} MAINON_ON_G

+1.5V_CPUVDDQ

Q27
2N7002K_300MA

Q7
FDV301N_200MA
1

C82
0.1U/10V_4X

R322
220_8

C131

5.1K/F_4

4
Q26
AO4466_9.4A

R33

MAIND

{37,38,42} MAIND

3
2
1

R39
10K/F_4

5
6
7
8

R314
*100K_4

+1.5V_CPUVDDQ

C3A

6A/maximum

Q7044AO6402A,cost down.
DRAM Power Good
+3V_S5

+3V_S5

PM_DRAM_PWRGD:
Never drive hight before DDR3 voltage ramp to stable

+1.5VSUS

R324

+1.5V_CPUVDDQ_PG

U18

R321
*1.1K/F_4

2
4

R317

1.5K/F_4

R320

1
3

10K/F_4

*short_4

PM_DRAM_PWRGD {4,11}

PM_DRAM_PWRGD

TC7SH08FU(F)
R318

Quanta Computer Inc.

R319
*3K/F_4

750/F_4

PROJECT : TE4
Size

Document Number

Rev
A1A

S3 Power Reduction
Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

of

46

09

INTVRMEN - Integrated SUS 1.1V VRM Enable


High - Enable Internal VRs

12P/50V_4C

+RTC_CELL
+RTC_CELL

12P/50V_4C

R422

1M_4

R415

330K_6

RTC_RST#

C14

SRTC_RST#

D17

SM_INTRUDER#

A16

PCH_INVRMEN

ACZ_BITCLK
ACZ_SYNC
{12,30} PCBEEP

ACZ_RST#

{30} ACZ_SDIN0_AUDIO
TP45
TP50
TP53

ACZ_SDOUT

{12,33} PCH_GPIO33

A14

A30
D29
P1
C30
G30
F30
E32
F32
B29
H32
J30

TP44
PCH_JTAG_TCK

M3

PCH_JTAG_TMS

K3

PCH_JTAG_TDI

K1

PCH_JTAG_TDO

J2

PCH_JTAG_RST#

J4

Ibex-M
1 OF 10

RTCX1
RTCX2

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ

LPC

RTCRST#

RTC

SRTCRST#

(+3V)

INTRUDER#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

INTVRMEN

HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

IHDA

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

(+3V)
(+3V_S5)

SATA3RXN

SATA SATA3RXP
SATA3TXN
SATA3TXP

JTAG_TCK
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

JTAG_TMS

JTAG

JTAG_TDI
JTAG_TDO

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

TRST#

D33
B33
C32
A32
C34
A34
F34
AB9

R209
10K_4

LFRAME# {27,33}

{26} INT_LVDS_BRIGHT
{26} INT_LVDS_DIGON
{26} INT_LVDS_PWM

Y48

R274
R273

+3V
LDRQ#1

{27}
SERIRQ

{27,33}

AK7
AK6
AK11
AK9

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

AH6
AH5
AH9
AH8

SATA_RXN1 {29}
SATA_RXP1 {29}
SATA_TXN1 {29}
SATA_TXP1 {29}

{29}
{29}
{29}
{29}

AF11
AF9
AF7
AF6

IV@10K_4
IV@10K_4

B2A

TP57

HDD

L_CTRL_CLK
L_CTRL_DATA

AB46
V48

LVDS_IBG
LVDS_VBG

AP39
AP41

LVDS_VREFH
LVDS_VREFL

AT43
AT42

{26} INT_LCD_TXLCLKOUT{26} INT_LCD_TXLCLKOUT+

AV53
AV51

{26} INT_LCD_TXLOUT0{26} INT_LCD_TXLOUT1{26} INT_LCD_TXLOUT2-

BB47
BA52
AY48
AV47

TP82
{12}

SPI_SI_R

BA2

SPI_CS0#_R

AV3

SPI_CS1#

AY3

SPI_SI_R

AY1

SPI_SO

AV1

SPI_CLK

SATAICOMPO

SPI_CS0#

SATAICOMPI

SPI

SPI_CS1#

SATALED#

SPI_MOSI

(+3V) SATA0GP / GPIO21


(+3V_S5) SATA1GP / GPIO19

SPI_MISO

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDS--B

AD3
AD1
AB3
AB1

TP81
TP77
TP76
TP75

SATA_COMP R211

AF15

37.4/F_4

+1.05V

SATA_LED#

del in VGA

10K_4
10K_4

+3V
+3V

CRT_BLU
CRT_GRE
CRT_RED

{26} INT_CRT_BLU
{26} INT_CRT_GRE
{26} INT_CRT_RED

SATA_LED# {35}

R216
R7356

Y9
V1

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AY51
AT48
AU50
AT51

AF16

T3

LVDSB_CLK#
LVDSB_CLK

AY53
AT49
AU52
AT53

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

AA52
AB53
AD53

CRT_BLUE
CRT_GREEN
CRT_RED

V51
V53

{26} INT_CRT_DDCCLK
{26} INT_CRT_DDCDAT
R457
R456

{26} INT_CRT_HSYNC
{26} INT_CRT_VSYNC

IbexPeak-M_Rev1_0

IV@0_4
IV@0_4
R267

TP107

CRT

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC_R Y53
CRT_VSYNC_R Y51

CRT_HSYNC
CRT_VSYNC

1K/D_4 DAC_IREF AD48


AB51

TP106

[RTC]

LVDS--A
LVDSA_CLK#
LVDSA_CLK

AP48
AP47

SPI_CLK_R

LVD_VREFH
LVD_VREFL

TP7046

AD9
AD8
AD6
AD5

SDVO_CTRLCLK
SDVO_CTRLDATA

LVD_IBG
LVD_VBG

BB48
BA50
AY49
AV48

{26} INT_LCD_TXLOUT0+
{26} INT_LCD_TXLOUT1+
{26} INT_LCD_TXLOUT2+

SATA2/SATA3 HM55 not support

SDVO_INTN
SDVO_INTP

SDVO

L_CTRL_CLK
L_CTRL_DATA

TP7047

AH3
AH1
AF3
AF1

SDVO_STALLN
SDVO_STALLP

L_DDC_CLK
L_DDC_DATA

del in VGA
ODD

SDVO_TVCLKINN
SDVO_TVCLKINP

L_BKLTCTL

AB48
Y45

{26} INT_LCD_EDIDCLK
{26} INT_LCD_EDIDDATA

Ibex-M
4 OF 10

L_BKLTEN
L_VDD_EN

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

DISPLAY PORT B

C446

RTC_X1 B13
RTC_X2 D13

{27,33}
{27,33}
{27,33}
{27,33}

T48
T47

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA

DISPLAY PORT C

U22D
LAD0
LAD1
LAD2
LAD3

U22A

10M_4
3
4

32.768KHZ_20

del in VGA

+3V

Digital Display Interface

R414

DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA

DISPLAY PORT D

Y4

IBEX PEAK-M (LVDS,DDI)

IBEX PEAK-M (HDA,JTAG,SATA)

2
1

C447

DAC_IREF
CRT_IRTN

DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
TP64
TP65

Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52

del in VGA
INT_HDMI_SCL {23}
INT_HDMI_SDA {23}

BC46
BD46
AT38

DDPD_AUXN
DDPD_AUXP

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

C_TMDSD_DATA2#
C_TMDSD_DATA2
C_TMDSD_DATA1#
C_TMDSD_DATA1
C_TMDSD_DATA0#
C_TMDSD_DATA0
C_TMDSD_CLK#
C_TMDSD_CLK

R265
R266

IV@10K_4
IV@10K_4

+3V
Port-D_HPD {23}

del in VGA

DDP Setting
R250

D24

(20mils)

LVDS_VREFH
LVDS_VREFL

IV@0_4

R243

IV@2.37K/F_4

LVDS_IBG

R463
R462
R461

IV@150/F_4
IV@150/F_4
IV@150/F_4

CRT_BLU
CRT_GRE
CRT_RED

+RTC_CELL

SDM10K45-7-F_100MA

(30mils)

(20mils)

BF45
BH45

IbexPeak-M_Rev1_0

RTC BATTERY
+3VPCU

BJ46
BG46
BJ48
BG48

R_3VRTC

Port
LVDS

D23

C460

SDM10K45-7-F_100MA

1U/10V_6X

R432

How to enable Port?

Strap
L_DDC_DATA

How to disable Port?

PU to 3.3V with 2.2k+/- 5%

NC

Port B SDVO_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC

Port C DDPC_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC

C_TMDSD_DATA2
C_TMDSD_DATA2#

C484
C483

IHM@0.1U/10V_4X
IHM@0.1U/10V_4X

Port D DDPD_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC

C_TMDSD_DATA1
C_TMDSD_DATA1#

C475
C473

IHM@0.1U/10V_4X
IHM@0.1U/10V_4X

NC

C_TMDSD_DATA0
C_TMDSD_DATA0#

C471
C472

IHM@0.1U/10V_4X
IHM@0.1U/10V_4X

C_TMDSD_CLK
C_TMDSD_CLK#

C314
C308

IHM@0.1U/10V_4X
IHM@0.1U/10V_4X

HDMI
TP102

RTC_N02

1K_4

TMDSD_DATA2 {23}
TMDSD_DATA2# {23}

TP101
TP100

TMDSD_DATA1 {23}
TMDSD_DATA1# {23}

TP99
TP7135

CN14

CFG[4]

eDP

PD to GND directly

TMDSD_DATA0 {23}
TMDSD_DATA0# {23}

TP98
TP59

AAA-BAT-054-K01

TMDSD_CLK {23}
TMDSD_CLK# {23}

TP58

Alzia

33_4

ACZ_RST#

{30} ACZ_RST#_AUDIO

R444

{30} ACZ_SDOUT_AUDIO

R440
C463

33_4 ACZ_SDOUT
*10P/50V_4C

{30} ACZ_SYNC_AUDIO

R439
C462

33_4 ACZ_SYNC
*10P/50V_4C

{30} BIT_CLK_AUDIO

R443
C464

33_4 ACZ_BITCLK
22P/50V_4N

RESET JUMP
+RTC_CELL

R418

An RC delay circuit with a time delay in the range


of 18 ms to 25 ms should be provided

*51_4 PCH_JTAG_TMS

R374

*51_4 PCH_JTAG_RST#

C451

G2

1U/6.3V_4X

*SHORT_ PAD

*51_4 PCH_JTAG_TDI

R392

*51_4

R390

51_4

SPI_SO

R381

*short_4

SPI_SO_R

SPI_SI_R

R7358

*short_4

SPI_SI

SPI_CLK_R

R395

*short_4

SPI_CLK

SPI_CS0#_R R380

*short_4

SPI_CS0#

SO
SI

VDD
HOLD

SCK

WP

CE

VSS

8
SPI_HOLD# R376

3.3K/F_4

G1

1U/6.3V_4X

*SHORT_ PAD

SPI_WP#

3.3K/F_4

R377

HM57/PM57
QM57/QS57

4
C434
0.1U/10V_4X

W25Q32BVSSIG
C454

8MB

4MB

+3V

SRTC_RST#

20K_6

2MB

HM55

U21

+RTC_CELL

R421
R391

PCH
PM55

RTC_RST#

20K_6

+1.05V
R373

4M byte SPI ROM

Quanta Computer Inc.

PCH_JTAG_TDO

PROJECT :TE4

PCH_JTAG_TCK

Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

PCH 1/5 (SATA,HDA,LPC)


1

HTTP://FAQP.RU/

Sheet

9
8

of

46

10

IBEX PEAK-M (GND)


U22I

IBEX PEAK-M (PCI-E,SMBUS,CLK)


U22B

PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

C304
C302

BG30
BJ30
BF29
BH29

PERN1
PERP1
PETN1
PETP1

TP56
TP52
TP46
TP47

AW30
BA30
BC30
BD30

PERN2
PERP2
PETN2
PETP2

3G@0.1U/10V_4X
3G@0.1U/10V_4X

PCIE_RXN3
AU30
PCIE_RXP3
AT30
PCIE_TXN3_C AU32
PCIE_TXP3_C AV32

TP55
TP54
TP49
TP48

BA32
BB32
BD32
BE32

WLAN

{27}
{27}
{27}
{27}

PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5

C467
C470

0.1U/10V_4X
0.1U/10V_4X

PCIE_RXN5
BF33
PCIE_RXP5
BH33
PCIE_TXN5_C BG32
PCIE_TXP5_C BJ32

LAN

{31}
{31}
{31}
{31}

PCIE_RXN6
PCIE_RXP6
PCIE_TXN6
PCIE_TXP6

C298
C291

0.1U/10V_4X
0.1U/10V_4X

PCIE_RXN6
BA34
PCIE_RXP6
AW34
PCIE_TXN6_C BC34
PCIE_TXP6_C BD34

TP96
TP95
TP7035
TP97

PCIE_CLK_REQ0#
TP60
TP68

3G

WLAN

AJ50
AJ52
PCIE_CLK_RQ5#

H6

TP104
TP103

AK53
AK51

PCIE_CLK_REQB#

P13

CL_CLK1

T13

T3

T11

T2

CL_RST1#

T9

T1

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P

(+3V)

M9

SCLK
SDATA

CL_DATA1

(+3V_S5)PEG_A_CLKRQ# / GPIO47

PCIECLKRQ1# / GPIO18

A8

SMBALERT#
SCLK
SDATA
SMBL0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0
SML1ALERT#
MBCLK2
MBDATA2

{3,31}
{3,31}

PEG

PCI-E*

U4

PCIE_CLK_REQ4#

{27} PCIE_CLK_RQ5#

PERN6
PERP6
PETN6
PETP6

(+3V_S5)

AM51
AM53

{27} CLK_PCIE_MINI#
{27} CLK_PCIE_MINI

PERN5
PERP5
PETN5
PETP5

PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P

AH42
AH41

{27} PCIE_CLK_REQ4#

Controller
Link

PERN4
PERP4
PETN4
PETP4

P9
AM43
AM45

N4

{27} CLK_PCIE_3G#
{27} CLK_PCIE_3G

PERN3
PERP3
PETN3
PETP3

PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P

PCIE_CLK_REQ3#

{31} PCIE_CLK_REQ3#

B9
H14
C8
J14
C6
G8
M14
E10
G12

BG34
BJ34
BG36
BJ36
AK48
AK47

AM47
AM48

{31} CLK_PCIE_LAN#
{31} CLK_PCIE_LAN

SMBALERT# / GPIO11
SMBCLK
SMBDATA
(+3V_S5) SML0ALERT# / GPIO60
SML0CLK
SML0DATA
(+3V_S5) SML1ALERT# / GPIO74
SML1CLK / GPIO58
(+3V_S5)
(+3V_S5) SML1DATA / GPIO75

(+3V_S5)

PERN7
PERP7
PETN7
PETP7

PCIE_CLK_REQ2#

LAN

SMBus

AT34
AU34
AU36
AV36

PCIE_CLK_REQ1#
TP63
TP67

Ibex-M
2 OF 10

H1 CLK_PEGA_REQ#
AD43
AD45
AN4
AN2

CLK_PEGA_REQ#

del in UMA
CLK_PCIE_3GPLLN {4}
CLK_PCIE_3GPLLP {4}
C

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2# / GPIO20

(+3V)

CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3# / GPIO25

(+3V_S5)

CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5# / GPIO44

CLKIN_BCLK_N
CLKIN_BCLK_P

AP3
AP1

CLK_BUF_BCLKN {3}
CLK_BUF_BCLKP {3}

CLKIN_DOT_96N
CLKIN_DOT_96P

F18
E18

CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP

AH13
AH12

CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
REFCLK14IN

P41

R256

J42

CLK_PCI_FB

*short_4

CLKIN_PCILOOPBACK

(+3V)
(+3V_S5) (+3V)
(+3V)
(+3V)

AH51
AH53

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

AF38

XCLK_RCOMP

T45
P43
T42
N50

{3}
{3}
{3}
{3}

*22P/50V_4N

CLK_PCI_FB {11}

XTAL25_IN
XTAL25_OUT

CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

{3}
{3}

CLK_PCH_14M {3}

C317

(+3V_S5)

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

CLK_DREFSSCLKN {4}
CLK_DREFSSCLKP {4}
CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP

CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26

AT1
AT3
AW24
BA24

CLKIN_DMI_N
CLKIN_DMI_P

From CLK BUFFER

{27}
{27}
{27}
{27}

3G

TP93
TP92
TP90
TP91

+3V

CLK_FLEX0
CLK_FLEX1
CLK_FLEX2
CLK_CARD_5159

Clock Flex

R254
R272
T18
T13

90.9/F_4
10K_4

+1.05V

PCIE_CLK_REQ1#
PCIE_CLK_REQ2#

CLK_CARD_5159 {32}

C493

+3V_S5

22P/50V_4N

IbexPeak-M_Rev1_0

CRYSTAL

Placement close
Q15
1

MBCLK2

2N7002_200MA
3

R464

C491

+3V_S5

IbexPeak-M_Rev1_0
MBDATA2

1
Q13

PCIE_CLK_REQ0#
PCIE_CLK_REQ3#
PCIE_CLK_REQ4#
PCIE_CLK_REQB#
PCIE_CLK_RQ5#
SMBALERT#
SMBL0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0
SML1ALERT#
MBCLK2
MBDATA2
SCLK
SDATA

R124
R404
R173
R144
R172
R406
R198
R399
R170
R125
R188
R189
R156
R401

10K_4
*10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
2.2K_4
2.2K_4
10K_4
4.7K_4
4.7K_4
2.2K_4
2.2K_4

CLK_PEGA_REQ#

R393

IV@10K_4

R367

*EV@10K_4

EV@0_4

2ND_MBCLK {33}
XTAL25_IN

10K_4
10K_4

+3V

PEG_B_CLKRQ# / GPIO56(+3V_S5)

SMBUS

R385
R389

IV@27P/50V_4N

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

Y5

R455
IV@1M/F_4

2ND_MBDATA {33}
XTAL25_OUT

2N7002_200MA

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

Quanta Computer Inc.

IV@25MHZ_30
C495

PROJECT : TE4

IV@27P/50V_4N
Size

Document Number

Rev
A1A

PCH 2/5 (PCIE, SMBUS, CK)


Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

10

of

46

11

IBEX PEAK-M (DMI,FDI,GPIO)

IBEX PEAK-M (PCI,USB,NVRAM)

U22C
U22E

{12}
{12}

GNT0#
GNT1#

{12}

GNT3#

F51
A46
B45
M53

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

(+5V)
(+5V)
(+5V)

F48
K45
F36
H53

GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

(+3V)
(+3V)
(+3V)

B41
K53
A36
A48

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

(+5V)
(+5V)
(+5V)
(+5V)

E44
E50

SERR#
PERR#

PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#

A42
H44
F46
C46

IRDY#
PAR
DEVSEL#
FRAME#

PCI_PLOCK#

D49

PLOCK#

PCI_STOP#
PCI_TRDY#

D41
C48

STOP#
TRDY#

PLT_RST-R#
R458
TP105
TP69
R276
R268

{27} PCLK_DEBUG
{10}
{33}

CLK_PCI_FB
PCLK_591

22_4 CLK_33M_LPC_R
22_4
22_4

CLK_PCI_FB_R
CLK_PCI_EC

M7

PME#

D5

PLTRST#

N52
P53
P46
P51
P48

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE
NV_CLE

BD3
AY6

NV_ALE

AU2

NV_RCOMP

NV_RB#

AV7

NV_WR#0_RE#
NV_WR#1_RE#

AY8
AY5

USB

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

{4}
{4}
{4}
{4}

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

BD24
BG22
BA20
BG20

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

{4}
{4}
{4}
{4}

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

BE22
BF21
BD20
BE18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

{4}
{4}
{4}
{4}

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

BD22
BH21
BC20
BD18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

BH25
BF25

DMI_ZCOMP
DMI_IRCOMP

T6
M6
B17
K5

SYS_RESET#
SYS_PWROK
PWROK
MEPWROK

A10
D9
C16

LAN_RST#
DRAMPWROK
RSMRST#

+1.05V

NV_ALE

R424

R382

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USBRBIAS#

B25

DMI_COMP

{4} SYS_RESET#

{12}

R123
R428
R153

*32.4/F_4

SYS_RESET#
*short_4
*short_4
*short_4
RSV_ICH_LAN_RST#

{4,8} PM_DRAM_PWRGD
{33}
RSMRST#
{33}

AV11
BF5

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

49.9/F_4

USBP0USBP0+
TP84
TP83
TP36
TP38
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
TP40
TP39
TP86
TP88
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
TP42
TP89
TP43
TP41
USBP13USBP13+

{26}
{26}

RSMRST#
DNBSWON#

DNBSWON#

PM_RI#
PCIE_WAKE#

{31} PCIE_WAKE#
{4}
PM_SYNC

CCD

P5
F14
J12
BJ10

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

BJ14
BF13
BH13
BJ12
BG14

FDI_INT {4}
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

Ibex-M
3 OF 10

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

BC24
BJ22
AW20
BJ20

SYS_PWROK

NV_RCOMP

PCIRST#

PCI_SERR#
PCI_PERR#

TP29

AV9
BG8

NV_WE#_CK0
NV_WE#_CK1

REQ0#
REQ1#
REQ2#
REQ3#

K6

{4}
{4}
{4}
{4}

NV_DQS0
NV_DQS1

PCI

PIRQA#
PIRQB#
PIRQC#
PIRQD#

8.2K_4

C/BE0#
C/BE1#
C/BE2#
C/BE3#

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NVRAM

G38
H51
B37
A44

PIRQE#
PIRQF#
PIRQG#
INTH#
R174

J50
G42
H47
G34

Ibex-M
5 OF 10

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

TP94

+3V

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

AY9
BD1
AP15
BD8

DMI

FDI

System Power Management

PWRBTN#
RI#
WAKE#
PMSYNCH

SLP_S3#
SLP_S4#

P12
H7

SLP_M#
TP23

K8
N2

(+3V_S5) SUS_PWR_DN_ACK / GPIO30


ACPRESENT / GPIO31
(+3V_S5)
(+3V) CLKRUN# / GPIO32
(+3V_S5) SUS_STAT# / GPIO61
SUSCLK / GPIO62
(+3V_S5)
(+3V_S5)
SLP_S5# / GPIO63
(+3V_S5) BATLOW# / GPIO72

M1
P7
Y1
P8
F3
E4
A6

SLP_LAN# / GPIO29

F6

(+3V_S5)

SUSB#
SUSC#
SLP_M#

{4}
{4}
{4}
{4}

{33}
{33}

TP34

TP78
SUS_PWR_ACK_R
AC_PRESENT
CLKRUN#
RSV_SUS_SATA# TP37
SLP_S5#
PM_BATLOW#

CLKRUN#

{33}

TP79
TP33
B

TP32

IbexPeak-M_Rev1_0

{32}
{32}
{27}
{27}
{27}
{27}

Card Reader
SIM
WLAN
USB6/USB7 HM55 not support

{26}
{26}
{28}
{28}
{27}
{27}

USB for daughter board


USB for left side 1
3G
EMI

{28}
{28}

SUS_PWR_ACK

USB for left side 2


+3V_S5

22.6/F_4
C

Q33

D25

USBRBIAS

N16
J16
F16
L16
E14
G16
F12
T15

(+3V_S5)OC0# / GPIO59
(+3V_S5)OC1# / GPIO40
(+3V_S5)OC2# / GPIO41
(+3V_S5)OC3# / GPIO42
(+3V_S5)OC4# / GPIO43
(+3V_S5) OC5# / GPIO9
(+3V_S5)OC6# / GPIO10
(+3V_S5)OC7# / GPIO14

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

USB_BIAS R427

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USBOC#8
USB_OC5#
USBOC#13_9
SCI#

B2A

2N7002_200MA

PCLK_DEBUG

C3A

B2A
*0_4

R5837
R475

*0_4

R476

*0_4

USBOC#8

CLK_PCI_FB

USB_BUS_SW0 {28}
SC_CB {28,33}
SC_CB1

{33} SUS_PWR_ACK

SUS_PWR_ACK_R

PCLK_591

{28,33}

{26,33}

R7354

USBOC#13_9 {28,33}
SCI#
{33}

C492

C327

C323

*E@22P/50V_4N

*E@22P/50V_4N

*E@22P/50V_4N

*0_4

IbexPeak-M_Rev1_0

B2A

EMI

PWROK
+3V_S5

RESET
+3V_S5

+3V

R217

+3V

+3V

PM_RI#
PM_BATLOW#
PCIE_WAKE#
SUS_PWR_ACK_R
AC_PRESENT
DNBSWON#

R203
R396
R148
R372
R154
R129

10K_4
10K_4
10K_4
10K_4
10K_4
*10K_4

REQ2#
PIRQE#
PIRQF#
CLKRUN#
PIRQG#
SYS_RESET#

R260
R252
R459
R7357
R446
R128

PCI_SERR#
PCI_PIRQD#
PCI_FRAME#
REQ1#

8.2K_4
8.2K_4
8.2K_4
8.2K_4
8.2K_4
1K_4
PLT_RST-R#

8.2KX8

R218

2
PLTRST#

USBOC#13_9
USB_OC5#
USB_OC2#
USB_OC3#

RP9
6
7
8
9
10

SCI#
USB_OC0#
USB_OC1#
USBOC#8

B2A

+3V_S5

REQ3#
PCI_DEVSEL#
INTH#
PCI_TRDY#

8.2KX8

5
4
3
2
1

R150
*100K/F_4

R180

+3V
RP6
5
4
3
2
1

100K_4
6
7
8
9
10

PCI_PLOCK#
PCI_PERR#
REQ0#
PCI_PIRQB#

RSMRST#
RSV_ICH_LAN_RST#

R419
R407

10K_4
10K_4

R167

HTTP://FAQP.RU/

R210

100K_4

10K_4

*LCP0G050M0R2R

SYS_PWROK

Quanta Computer Inc.


R131

TP24

+3V

D27
C232
0.1U/10V_4X

SYS_PWROK

U13
TC7SH08FU(F)

D3B

{4,27,31,33}

*SHORT_4

D3B

8.2KX8

4
2

{4,33} MPWROK

C236
*0.1U/10V_4X
4

+3V_S5

{4,41} DELAY_VR_PWRGOOD
U8
*TC7SH08FU(F)

6
7
8
9
10

PCI_IRDY#
PCI_STOP#
PCI_PIRQA#
PCI_PIRQC#

0.1U/10V_4X

*0_4

+3V_S5

RP8
5
4
3
2
1

C259

Study Cost Down

EV@0_4

VGA_PLTRST#

PROJECT : TE4
Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

PCH 3/5 (PCI,ONFI,USB,DMI)


7

Sheet

11
8

of

46

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)


U22F

{4,33} TEMP_ALERT#

C3A

Y3

BOARD_ID6

C38

TACH1 / GPIO1

(+3V)

GPIO6

D37

TACH2 / GPIO6

(+3V)

Ibex-M
6 OF 10

BMBUSY# / GPIO0(+3V)

CLKOUT_PCIE6N
CLKOUT_PCIE6P

AH45
AH46

TP62
TP66

CLKOUT_PCIE7N
CLKOUT_PCIE7P

AF48
AF47

TP70
TP61

BOARD_ID4

J32

TACH3 / GPIO7 (+3V)

GPIO

GPIO8

F10

GPIO8(+3V_S5)

MISC

GPIO12

K9

LAN_PHY_PWR_CTRL / GPIO12 (+3V_S5)

GPIO15

T7

GPIO15 (+3V_S5)

GPIO16

AA2

SATA4GP / GPIO16 (+3V)

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

GPIO17

F38

TACH0 / GPIO17(+3V)

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

GPIO22

Y7

GPIO27

AB12

GPIO27 (+3V_S5)

GPIO28

V13

GPIO28 (+3V_S5)

ESATA_DN#

AB7

SATA2GP / GPIO36

(+3V)

THRMTRIP#

GPIO37

AB13

SATA3GP / GPIO37

(+3V)

GPIO39

P3

SDATAOUT0 / GPIO39 (+3V)

F1

PCIECLKRQ7# / GPIO46(+3V_S5)

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24

BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10

VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

PECI
RCIN#

CPU

AB6

SDATAOUT1 / GPIO48

(+3V)

TEMP_ALERT#

AA4

SATA5GP / GPIO49

(+3V)

H10
H3
F8
M11
V6
V3

A20GATE

SCLOCK / GPIO22(+3V)

BOARD_ID5

GPIO24
GPIO45
GPIO57
BOARD_ID2
BOARD_ID3
GPIO38

{28,33} USB_BUS_SW1

PROCPWRGD

RSVD

GPIO24
(+3V_S5)
PCIECLKRQ6# / GPIO45 (+3V_S5)
GPIO57
(+3V_S5)
STP_PCI# / GPIO34
(+3V)
SATACLKREQ# / GPIO35(+3V)
SLOAD / GPIO38
(+3V)

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1

12

U22H

BOARD_ID1

GPIO46

{8} DDR3_DRAMRST#_PCH

IBEX PEAK-M (GND)

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15

NCTF

U2

GATEA20

GATEA20 {33}

AM3
AM1
BG10

PCH_PECI_R

{4}

CLK_CPU_BCLKP

{4}

H_PECI {4}

RCIN#

T1

CLK_CPU_BCLKN

RCIN#

BE10

{33}

H_PWRGOOD {4}

BD10 PCH_THRMTRIP#_R

R185

56.2/F_4

PM_THRMTRIP# {4}
R181

56.2/F_4

+VTT

TP28

IbexPeak-M_Rev1_0

AB16
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

PCH Strap Pin Configuration Table


SPKR
*1K/F_4

{9,30} PCBEEP

R388

+3V

0 = Default Mode (Internal weak Pull-down)


1 = No Reboot Mode with TCO Disabled

GNT3#/
GPIO55
{11}

R460

GNT3#

*10K/F_4

0 = Default Mode (Internal weak Pull-down)


1 = No Reboot Mode with TCO Disabled

HDA_DOCK_EN
#/GPIO33
R237

{9,33} PCH_GPIO33

JP1
2

1K/F_4

*SHORT PAD
1

0 = Top Block Swap Mode


1 = Default Mode (Internal pull-up)
B

GNT0#,
GNT1#

{11}
{11}

GNT0#
GNT1#

GNT0#
GNT1#

R270
R271

*1K/F_4
*1K/F_4

Boot BIOS Strap


PCI_GNT0#

GNT#1

Boot BIOS Location

LPC

Reserved (NAND)

PCI

SPI

SPI_MOSI

{9}

R7355

SPI_SI_R

*1K_4

+3V

NV_ALE

IbexPeak-M_Rev1_0

{11}

R403

NV_ALE

*10K_4

+1.8V

1 = Enabled
0 = Disabled (Default)

+3V_S5

+3V

GPIO8
GPIO46

R394

10K_4

GPIO16

R368

10K_4

GPIO45

R375

*10K_4

GPIO17

R239

10K_4

GPIO24

R178

*10K_4

GPIO22

R118

10K_4

GPIO57

R192

10K_4

ESATA_DN#

R202

10K_4

GPIO27

R169

*10K_4

GPIO37

R146

10K_4

GPIO12

R171

10K_4

GPIO39

R387

10K_4

GPIO8

R149

+3V

RCIN#

R386

10K_4

GATEA20

R371

10K_4

TEMP_ALERT#

R383

10K_4

GPIO6

R447

10K_4

10K_4

+3V_S5

This signal has a weak internal pull up.


NOTE: This signal should not be pulled low

GPIO15
GPIO15

R126

1K_4

+3V_S5

0 = Intel ME Crypto Transport Layer Security (TLS) cipher


suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality

BOARD ID SETTING
Board ID

ID1

UMA SKU
VGA SKU

H
L

ID3

ID4

ID5

ID6

GPIO28

GPIO27

GPIO38
+3V
+3V_S5

W/ MDC
W/O MDC

H
L

W/ HDMI
W/O HDMI
D

ID2

GPIO28

H
L

15"
14"

R263
10K_4

R127

R122

HM@10K_4
BT_Detect#

BOARD_ID4

CPUSB#

{27}

BOARD_ID3

R182

*10K_4

R369

10K_4

IV@10K_4

BOARD_ID2

0 = Disables the VccVRM. Need to use


on-board filter circuits for analog rails.
1 = Enables the internal VccVRM to have a clean supply for analog rails.
No need to use on-board filter circuit.
This signal has a weak internal pull-up.

BOARD_ID1

BOARD_ID5

GPIO38

R384
10K_4

H
L

W/O BT
W/ BT

BOARD_ID6

GPIO27

+3V

+3V

R244
10K_4

R157
10K_4

H
L

W/O 3G
W/ 3G

+3V

+3V

R145

R152

R370

*10K_4

EV@10K_4

R191
NHM@10K_4
10K_4

H
L

14 or 15
13

H
L

Old HW(2010)
New HW(2011)

Quanta Computer Inc.

H
L

PROJECT : TE4D
Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

PCH 4/5 (GPIO & Strap)


1

HTTP://FAQP.RU/

Sheet

12
8

of

46

13

+VCCA_DAC_1_2=69mA(15mils)

*short_8
R257

VCCCORE = 1.432A(80mils)

C7235

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

4.7U/6.3V_6X

+1.05V

*short_6
R423

+1.05V

40mA(15mils)

+1.05V_PCH_VCCDPLL_EXP
R441

R430
TP87

*short_1206

+V1.1LAN_VCCAPLL_EXP

*short_1206
+V1.1S_VCC_EXP
C290
4.7U/6.3V_6X

C474

C458

1U/6.3V_4X

C275

1U/6.3V_4X

+
*330U/2V_7343P_E6b
C456

1U/6.3V_4X

C276

1U/6.3V_4X

C457

0.1U/10V_4X

C283

0.1U/10V_4X

C271

0.1U/10V_4X

VCCIO = 3.062A(150mils)

C322

*0.1U/10V_4X
+3V_VCCA3GBG

+3V

R275

*short_6

+1.8V

R417

*short_6 +VCCAFDI_VRM
TP85

+1.05V R413

POWER

U22G

+1.05V_VCCCORE_ICH
C286
1U/6.3V_4X

*short_6

+V1.1LAN_VCCAPLL_FDI
+1.05V_VCCDPLL_FDI

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

Ibex-M

7 OF 10

CRT

VCC CORE
AK24
BJ24

VSSA_DAC[1]

AF53

VSSA_DAC[2]

AF51

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

AP43
AP45
AT46
AT45

VCCTX_LVDS
C319
C316
C313

AD35

VCCVRM[1]
VCCFDIPLL

EV@0_6
IV@0_6

R261
R262
IV@4.7U/6.3V_6X
IV@0.1U/10V_4X
IV@0.01U/25V_4X

+3V_VCC_GIO

R245

C303

*short_6 +1.05V_VCCAUX

R412

VCCME = 1.849A(100mils)

+3V

EV@0_6
IV@0.1uh_8_250MA

*short_6

+1.05V

R258

*short_8 +1.05V_VCCEPW

+1.8V

+3V

VCC3_3 = 0.357A(30mils)

AD38

VCCME[1]

AD39

VCCME[2]

AD41

VCCME[3]

AF43

VCCME[4]

10U/6.3V_8X

AF41

VCCME[5]

C312

10U/6.3V_8X

AF42

VCCME[6]

C301

1U/6.3V_4X

V39

VCCME[7]

C307

1U/6.3V_4X

V41

VCCME[8]

C299

1U/6.3V_4X

V42

VCCME[9]

+1.8S_VCCADMI_VRM R420

*short_6

+1.8V

Y39

VCCME[10]

VCCDMI[1]

AT16

VCCDMI

*short_6

+VTT

Y41

VCCME[11]

VCCDMI[2]

AU16

Y42

VCCME[12]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

R207

C252

1U/6.3V_4X

VCCPNAND= 156mA(15mils)
+V_NVRAM_VCCQ
C263

R409

+VCCRTCEXT
0.1U/10V_4X

C248

AU24

+1.8V

*short_8

V9

+1.8V

+V1.1LAN_VCCA_A_DPL

0.1U/10V_4X
+V1.1LAN_VCCA_B_DPL

BB51
BB53
BD51
BD53

VCCIO = 3.062A(150mils)

NAND / SPI
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

VCCME3_3= 85mA(15mils)
AM8
AM9
AP11
AP9

+3.3V_VCCME_SPI
C247

R195

R454

+1.05V

*short_6

+3V

0.1U/10V_4X

*short_6 +1.05V_SSCVCC

AH23
AJ35
AH35
AF34
AH34
AF32

VCCIO[1]

V12

DCPSST

+V1.1LAN_INT_VCCSUS Y22
0.1U/10V_4X

DCPSUS

*short_6 +3V_S5_VCCPSUS
0.1U/10V_4X

VCC3_3 = 0.357A(30mils)

+VTT

L22
U23
1

SHDN

GND
VIN

10uh_8_100MA

+V1.1LAN_VCCA_A_DPL

*short_6 +3V_VCCPCORE
C258
0.1U/10V_4X

VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]

V15
V16
Y16

VCC3_3[5]
VCC3_3[6]
VCC3_3[7]

SET

*10U/6.3V_8X

R468
*52.3K/F_4

C336
*220U/2.5V_3528P_E35b

C490
1U/6.3V_4X

R453
*short_8

R469

+VTT_VCCPCPU
4.7U/6.3V_6X
0.1U/10V_4X
0.1U/10V_4X

C441
C443

0.1U/10V_4X
0.1U/10V_4X

R236

*short_6

CPU

A12

VCCRTC

L30

VCCSUSHDA

RTC

HDA

VCCSUSHDA= 6mA(15mils)
+3V_S5

*G913C

*short_6
C450
C261
C452

V_CPU_IO[1]
V_CPU_IO[2]

+3V_S5_VCCPUSB

VCCSUS3_3[28]

U23

VCCIO[56]

V23

V5REF_SUS

F24

C278

+1.05V

R431

*short_6

+3V_S5

C277

0.1U/10V_4X

C274

0.1U/10V_4X

C282

*0.047U/10V_4X

+1.05V_VCCUSBCORE

V5REF_SUS< 1mA
V5REF_SUS

R225

100/F_4

D13

SDM10K45-7-F_100MA

C281

1U/6.3V_4X

+5V_S5
+3V_S5

V5REF< 1mA
V5REF

V5REF

K49

D15

PCI/GPIO/LPC

C321
J38
L38
M36
N36
P36
U35
AD13

R253

100/F_4

SDM10K45-7-F_100MA

+3V_VCCPPCI R249
C294
C306

+5V
+3V

1U/6.3V_4X
*short_6

+3V

0.1U/10V_4X
0.1U/10V_4X

VCCSATAPLL[1]
VCCSATAPLL[2]

AK3
AK1

VCCVRM[4]

AT20

VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

AH22
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

AA34
Y34
Y35
AA35

SATA

+V1.1LAN_VCCAPLL

TP80

R215

*short_6

+1.8V

VCCIO = 3.062A(150mils)
+VCC_SATA R379
C269

*short_8

+1.05V

1U/6.3V_4X

VCCME = 1.849A(100mils)
+1.05V_VCCEPW

+V3.3A_1.5A_HDA_IO
IbexPeak-M_Rev1_0

+V1.1LAN_VCCA_B_DPL

*0_4

*short_6

1U/6.3V_4X

C287

1U/6.3V_4X

C494

Quanta Computer Inc.

C486
1U/6.3V_4X

*0.1U/10V_4X

R238

PCI/GPIO/LPC

AT18
AU18

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

P18
U19
U20
U22

VCCRTC= 2mA(15mils)
+RTC_CELL

C499
VO

R416

+1.05V

VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[2]
VCCIO[3]
VCCIO[4]

0.1U/10V_4X +VCCSST

C257

R7359

VCCADPLLB[1]
VCCADPLLB[2]

C268
R226

+3V_S5

VCCADPLLA[1]
VCCADPLLA[2]

C250

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

USB

VCCVRM[3]

1U/6.3V_4X
1U/6.3V_4X
1U/6.3V_4X

+1.05V_VCCUSBCORE

VCCIO[6]
VCCIO[7]
VCCIO[8]

V24
V26
Y24
Y26

10 OF 10VCCIO[5]

DCPRTC

C273
C296
C289

VCCSUS3_3 = 0.163A(20mils)

FDI

+3V_LDO

VCCLAN[2]

AT24

CRT POWER

+5V

VCCLAN[1]

AF24

C311

V_CPU >1mA(15mils)

AF23

VCCVRM[2]

+3V

MAINON

VCCACLK[2]
DCPSUSBYP

IbexPeak-M_Rev1_0

37mA(15mils)

{8,33,39,42}

VCCACLK[1]

AP53
Y20

0.1U/10V_4X

VCCDMI= 61mA(15mils)

PCI E*

Ibex-M
AP51

VCCLAN = 0.32A(30mils)

VCCVRM= 196mA(15mils)

DMI

VCCACLK

DCPSUSBYP
0.1U/10V_4X

C267

R240
R251

POWER

U22J
TP71

+1.05V

VCCALVDS

HVCMOS

+3V
+3V_LDO

VCCALVDS= 59mA(15mils)

AH38
AH39

VCC3_3[4]

BJ18
AM23

C488

AB35

AT22

0.01U/25V_4X

AE52

VCC3_3[3]

VCC3_3[1]

0.1U/10V_4X

AE50

VCCAPLLEXP

AN35

*10U/6.3V_8X

VCCADAC[2]

AB34

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
VCCIO[54]
VCCIO[55]

C496
VCCADAC[1]

VCC3_3[2]

AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AN30
AN31

10U/6.3V_8X

C489

VCCIO[24]

HCB1608KF-181T15_1.5A
*0_6

C498

VCCALVDS
VSSA_LVDS

LVDS

R465
R467

Clock and Miscellaneous

+VCCA_DAC_1_2

+1.05V

PROJECT : TE4
Size

Document Number

Rev
A1A

PCH 5/5 (POWER)


Date:
1

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet

13
8

of

46

14

H=4

ODT0
ODT1

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

{3,15,27} CGCLK_SMB
{3,15,27} CGDAT_SMB
{5} M_A_ODT0
{5} M_A_ODT1
{5} M_A_DM[7:0]

{5} M_A_DQSP[7:0]

{5} M_A_DQSN[7:0]

JDIM2B

+3V

{4}
PM_EXTTS#0
{8,15} DDR3_DRAMRST#
R41
+1.5VSUS
R26

{7} DDR_VREF_DQ0

*0_4

PM_EXTTS#0

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

*1K/F_4
SMDDR_VREF_DQ0
SMDDR_VREF_DIMM

R22

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

*100K/F_4

B2A

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

DDRSK-20401-TP4B

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

+SMDDR_VTERM

GND

116
120

DIMM0_SA0
DIMM0_SA1

+1.5VSUS

GND

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ15
M_A_DQ14
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ23
M_A_DQ21
M_A_DQ20
M_A_DQ22
M_A_DQ19
M_A_DQ28
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ29
M_A_DQ24
M_A_DQ30
M_A_DQ31
M_A_DQ36
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ32
M_A_DQ33
M_A_DQ39
M_A_DQ38
M_A_DQ45
M_A_DQ44
M_A_DQ47
M_A_DQ46
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ48
M_A_DQ53
M_A_DQ55
M_A_DQ54
M_A_DQ52
M_A_DQ49
M_A_DQ51
M_A_DQ50
M_A_DQ61
M_A_DQ60
M_A_DQ58
M_A_DQ59
M_A_DQ57
M_A_DQ56
M_A_DQ62
M_A_DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

206

10K/F_4
10K/F_4

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

205

R78
R79

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

PC2100 DDR3 SDRAM SO-DIMM


(204P)

M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

PC2100 DDR3 SDRAM SO-DIMM


(204P)

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

SO-DIMMA SPD Address is 0XA0


SO-DIMMA TS Address is 0X30
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}

M_A_DQ[63:0] {5}

JDIM2A

{5} M_A_A[15:0]
A

DDRSK-20401-TP4B

Place these Caps near So-Dimm0.


Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30%

C62

0.1U/10V_4X

C66

2.2U/6.3V_6X

4.7U/6.3V_6X

C115

4.7U/6.3V_6X

C132

4.7U/6.3V_6X

C110

4.7U/6.3V_6X

C128

4.7U/6.3V_6X

C152

0.1U/10V_4X

C149

4.7U/6.3V_6X

C158

2.2U/6.3V_6X

C124

0.1U/10V_4X

C155

*0.047U/10V_4X

C125

0.1U/10V_4X

C123

0.1U/10V_4X

C114

0.1U/10V_4X

C198

2.2U/6.3V_6X

C139

0.1U/10V_4X

C197

*0.1U/10V_4X

C120

*0.047U/10V_4X

C196

C119

*0.047U/10V_4X

SMDDR_VREF_DIMM

C210

1U/6.3V_4X

C209

1U/6.3V_4X

C203

1U/6.3V_4X

C211

1U/6.3V_4X

C207

4.7U/6.3V_6X

C170

470P/50V_4X

R62

R60

*10K/F_4

R59

*short_4
*10K/F_4

+SMDDR_VTERM

+SMDDR_VREF
+1.5VSUS

R82
22_4

+SMDDR_VTERM

Q11
2N7002_200MA
{8,42} MAINON_ON_G

+1.5VSUS

+1.5VSUS

R36
1K/F_4
+3V

SMDDR_VREF_DQ0
+ C112
R32
1K/F_4

C70
0.1U/10V_4X

*0.047U/10V_4X

C72
*0.047U/10V_4X

Quanta Computer Inc.

*330U/2.5V_7343P_E9a

PROJECT : TE4
Size

Document Number

Rev
A1A

DDR3 DIMM-0
Date:

C116

SMDDR_VREF_DIMM {15}

SMDDR_VREF_DQ0

+1.5VSUS

HTTP://FAQP.RU/

Monday, January 24, 2011


7

Sheet

14
8

of

46

15

H=8

116
120

ODT0
ODT1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

{5} M_B_ODT0
{5} M_B_ODT1
{5} M_B_DM[7:0]

SO-DIMMB SPD Address is 0XA4


SO-DIMMB TS Address is 0X34

{5} M_B_DQSP[7:0]

{5} M_B_DQSN[7:0]

M_B_DQ4
M_B_DQ5
M_B_DQ7
M_B_DQ6
M_B_DQ0
M_B_DQ1
M_B_DQ3
M_B_DQ2
M_B_DQ12
M_B_DQ13
M_B_DQ11
M_B_DQ15
M_B_DQ9
M_B_DQ8
M_B_DQ14
M_B_DQ10
M_B_DQ20
M_B_DQ21
M_B_DQ23
M_B_DQ22
M_B_DQ17
M_B_DQ16
M_B_DQ19
M_B_DQ18
M_B_DQ29
M_B_DQ28
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ30
M_B_DQ31
M_B_DQ36
M_B_DQ32
M_B_DQ34
M_B_DQ35
M_B_DQ33
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ44
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ55
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ50
M_B_DQ61
M_B_DQ60
M_B_DQ58
M_B_DQ62
M_B_DQ56
M_B_DQ57
M_B_DQ63
M_B_DQ59

+1.5VSUS
A

JDIM1B

+3V

{4}
PM_EXTTS#1
{8,14} DDR3_DRAMRST#
R24

{7} DDR_VREF_DQ1

*0_4

SMDDR_VREF_DQ1

{14} SMDDR_VREF_DIMM
R23

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

*100K/F_4

B2A

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

DDRSK-20401-TP8D

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

+SMDDR_VTERM

GND

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

GND

R86
R80

109
108
79
114
121
101
103
102
104
73
74
115
110
113
10K/F_4 DIMM1_SA0 197
10K/F_4 DIMM1_SA1 201
202
200

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

206

+3V
{3,14,27} CGCLK_SMB
{3,14,27} CGDAT_SMB

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

205

M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

PC2100 DDR3 SDRAM SO-DIMM


(204P)

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}
{5}

M_B_DQ[63:0] {5}

JDIM1A

M_B_A[15:0]

PC2100 DDR3 SDRAM SO-DIMM


(204P)

{5}

DDRSK-20401-TP8D

Place these Caps near So-Dimm1.


Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30%
+1.5VSUS

SMDDR_VREF_DIMM

+SMDDR_VTERM

C129

4.7U/6.3V_6X

C164

0.1U/10V_4X

C204

1U/6.3V_4X

C111

4.7U/6.3V_6X

C168

2.2U/6.3V_6X

C205

1U/6.3V_4X

C147

4.7U/6.3V_6X

C156

*0.047U/10V_4X

C208

1U/6.3V_4X

C133

4.7U/6.3V_6X

C206

1U/6.3V_4X

C146

4.7U/6.3V_6X

C212

4.7U/6.3V_6X

C117

4.7U/6.3V_6X

SMDDR_VREF_DQ1
C60

+1.5VSUS

R31
1K/F_4

+1.5VSUS

0.1U/10V_4X
SMDDR_VREF_DQ1

C121

0.1U/10V_4X

C122

0.1U/10V_4X

C57

2.2U/6.3V_6X

C113

0.1U/10V_4X

C118

0.1U/10V_4X

C199

2.2U/6.3V_6X

C134

0.1U/10V_4X

C202

*0.1U/10V_4X

C126

*0.047U/10V_4X

C201

*0.047U/10V_4X

C130

*0.047U/10V_4X

+ C108
R7035
1K/F_4

+3V

C64
0.1U/10V_4X

C67
*0.047U/10V_4X

*330U/2.5V_7343P_E9a

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Rev
A1A

DDR3 DIMM-1
Date:
1

HTTP://FAQP.RU/

Monday, January 24, 2011


7

Sheet

15
8

of

46

Display Port Enable

I2C PU

LEVEL SHIFT ENABLE

23

HDMI LEVEL SHIFT (UMA)


+3V

[HDM]
+3V

R7452

+3V

U7008

IHM@10K_4

R7163

R7166

IHM@1.5K/F_4

*IHM@1.5K/F_4

R7131

IHM@2.2K_4

IHM@2.2K_4

OE#

R7130

R7187
HDMI_LF_HPOUT

Q7047

IHM@2N7002_200MA
INT_HDMI_SCL
INT_HDMI_SDA

*IHM@10K_4

TMDSD_CLK
TMDSD_CLK#

{9} TMDSD_DATA1
{9} TMDSD_DATA1#

TMDSD_DATA1
TMDSD_DATA1#

39
38

IN_D+
IN_D1-

OUT_D1+
OUT_D1-

22
23

HDMITX1P
HDMITX1N

{9} TMDSD_DATA2
{9} TMDSD_DATA2#

TMDSD_DATA2
TMDSD_DATA2#

42
41

IN_D2+
IN_D2-

OUT_D2+
OUT_D2-

19
20

HDMITX2P
HDMITX2N

{9} TMDSD_DATA0
{9} TMDSD_DATA0#

TMDSD_DATA0
TMDSD_DATA0#

45
44

IN_D3+
IN_D3-

OUT_D3+
OUT_D3-

16
17

HDMITX0P
HDMITX0N

{9} TMDSD_CLK
{9} TMDSD_CLK#

TMDSD_CLK
TMDSD_CLK#

48
47

IN_D4+
IN_D4-

{9} INT_HDMI_SCL
{9} INT_HDMI_SDA

LEVEL SHIFT SETTING


+3V

Hot Plug Detector (UMA)

+3V

R7151

*IHM@4.7K_4

R7152

*short_4

R7149

*IHM@4.7K_4

R7150

SR0

R7190

IHM@4.7K_4

R7195

*IHM@0_4

DDC_EN

IHM@10K_4

R7184

*IHM@4.7K_4

OUT_D4+
OUT_D4-

13
14

HDMICLK+
HDMICLK-

SCL
SDA

SCL_SINK
SDA_SINK

28
29

HDMI_DDCCLK
HDM_DDCDATA

HDMI_LF_HPOUT

HPD

HPD_SINK

30

HDMI_CON_HP

VCC[1]
VCC[2]
VCC[3]
VCC[4]
VCC[5]
VCC[6]
VCC[7]
VCC[8]

2
11
15
21
26
33
40
46

GND[1]
GND[2]
GND[3]
GND[4]
GND[5]
GND[6]
GND[7]
GND[8]
GND[9]
GND[10]

1
5
12
18
24
31
36
37
43
49

OE#

25

OE#

DDC_EN

32

DDC_EN

OC_3

10

NC(OC_3)

SR0
SR1

3
4

SR0
SR1

OC_2

NC(OC_2)

27

GND

34
35

NC(EQ_0)
NC(EQ_1)

*short_4
EQ_0
EQ_1

R7421

SR1

SR0

Rise/Fall Time
140ps

130ps

120ps

110ps

Reserve

{9}

R7137

*IHM@0_4

OC_2

R7147

*IHM@0_4

OC_3

R7196

*IHM@0_4

EQ_0

R7191

*IHM@0_4

EQ_1

+3V
Q7046

Slew Rate Control Function

HDMICLK+ {25}
HDMICLK- {25}
HDMI_DDCCLK
HDM_DDCDATA

{25}
{25}

HDMI_CON_HP

{25}

+3V

0.1A(20mils)

IHM@PI3VDP411LSRZBE
IHM@2N7002_200MA

Port-D_HPD

HDMITX0P {25}
HDMITX0N {25}

9
8

OE#

*IHM@0_4

HDMITX2P {25}
HDMITX2N {25}

INT_HDMI_SCL
INT_HDMI_SDA

SR1
R7443

HDMITX1P {25}
HDMITX1N {25}

+3V

HDMI_LF_HPOUT

R7148
R7407
C7488

C7491

C7288

C7271

+5V

R7333

IHM@2.2K_4

HDMI_DDCCLK

IHM@0.1U/10V_4X

IHM@0.01U/25V_4X

IHM@0.1U/10V_4X

IHM@0.01U/25V_4X

+5V

R7334

IHM@2.2K_4

HDM_DDCDATA

IHM@100K_4

IHM@100K_4

C3A
LVDS (UMA)

CRT (UMA)

{9,26} INT_LVDS_BRIGHT

LVDS_BRIGHT

{9,26} INT_LVDS_DIGON

LVDS_DIGON

{9,26}

{9,26} INT_LCD_TXLCLKOUT+
{9,26} INT_LCD_TXLCLKOUT-

{9,26}

LVDS_PWM {9,26}

{9,26} INT_LVDS_PWM

{9,26} INT_LCD_EDIDCLK
{9,26} INT_LCD_EDIDDATA

LCD_EDIDCLK
LCD_EDIDDATA

LCD_TXLCLKOUT+ {9,26}
LCD_TXLCLKOUT- {9,26}

{9,26}
{9,26}

{9,26} INT_LCD_TXLOUT0+
{9,26} INT_LCD_TXLOUT0-

LCD_TXLOUT0+ {9,26}
LCD_TXLOUT0- {9,26}

{9,26} INT_LCD_TXLOUT1+
{9,26} INT_LCD_TXLOUT1-

LCD_TXLOUT1+ {9,26}
LCD_TXLOUT1- {9,26}

{9,26} INT_LCD_TXLOUT2+
{9,26} INT_LCD_TXLOUT2-

LCD_TXLOUT2+ {9,26}
LCD_TXLOUT2- {9,26}

CRT_RED {9,26}
CRT_GRE {9,26}
CRT_BLU {9,26}

{9,26} INT_CRT_RED
{9,26} INT_CRT_GRE
{9,26} INT_CRT_BLU

{9,26} INT_CRT_DDCCLK
{9,26} INT_CRT_DDCDAT

CRT_DDCCLK
CRT_DDCDAT
CRT_HSYNC
CRT_VSYNC

{9,26} INT_CRT_HSYNC
{9,26} INT_CRT_VSYNC

{9,26}
{9,26}
{9,26}
{9,26}

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Rev
A1A

UMA
Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

23

of

46

HDMI Conn [HDM]


HDMITX2N_R
HDMITX1P_R
+5V

HDMITX1N_R
HDMITX0P_R

HDMITX0N_R
HDMICLK+_R
F1
HM@NANOSMDC110F-2

HDMICLK-_R
HDMI_DDCCLK
HDM_DDCDATA

D21

25

CN11
HDMITX2P_R

DDC5V

1 HM@RSX101M-30_1A

DDC5V_2
HDMI_CON_HP

C405

C144

*E@0.1U/16V_4Y

HM@0.1U/16V_4Y

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0GND
CK+
CK Shield GND
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL2

20

23
22

21

HM@C12826-11905-L

{23}
{23}

HDMITX0P
HDMITX0N

HDMITX0P
HDMITX0N

RN5

2
4

1
3

HM@0X2

HDMITX0P_R
HDMITX0N_R

{23}
{23}

HDMITX1P
HDMITX1N

HDMITX1P
HDMITX1N

RN35

2
4

1
3

HM@0X2

HDMITX1P_R
HDMITX1N_R

{23}
{23}

HDMITX2P
HDMITX2N

HDMITX2P
HDMITX2N

RN7

2
4

1
3

HM@0X2

HDMITX2P_R
HDMITX2N_R

{23}
{23}

HDMICLK+
HDMICLK-

HDMICLK+
HDMICLK-

RN6

1
2

3
4

HDMITX0P_R
HDMITX0N_R
HDMITX1P_R
HDMITX1N_R
HDMITX2P_R
HDMITX2N_R

HDMICLK+_R
HDMICLK-_R
HM@DLP11SN900HL2L

HDMICLK+_R
HDMICLK-_R

near to CN13
HDMITX0P_R
HDMITX1P_R
HDMITX2P_R
HDMICLK+_R

RN38: footprint is choke model

B2A
HDMI_DDCCLK
HDM_DDCDATA

{23} HDMI_DDCCLK
{23} HDM_DDCDATA

R58
R64
R65
R63

*E@100_4
*E@100_4
*E@100_4
*E@100_4

HDMITX0N_R
HDMITX1N_R
HDMITX2N_R
HDMICLK-_R

HDMI_CON_HP

{23} HDMI_CON_HP

B2A
EMI
HDMI_DDCCLK
HDM_DDCDATA
A

C409
*E@56P/50V_4N

C408
*E@56P/50V_4N

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Rev
A1A

HDMI CONN
Date:
5

Monday, January 24, 2011

HTTP://FAQP.RU/

Sheet

25

of
1

46

LCD POWER SWITCH


<LDS>

HALL Sensor
<HSR>

+3VPCU

R466

26

100K_4

+3V

+15V

2
MR1

C497

1K_4

R10

R450

0.1U/10V_4X

1.5A(65mils)

330K_6

DISPON

Q1
+3VPCU

+3V

AH9249NTR-G1
D

C3A

{33}

LCDVCC

LCDONG 2
ME2306_4A

DISPON

100K_4

C36

R13

LCDVCC1

L3

R9
Q5

75/F_8

SDM10K45-7-F_100MA

D26

IV@SDM10K45-7-F_100MA

LID591#

LID591#

{33}

C3A

C20

C23

C28

C@0.1U/16V_4Y

C@0.01U/25V_4X

C@10U/6.3V_8X

LVDS_BRIGHT

B2A

{9}

+3V

2N7002_200MA
LCDDISCHG
R451

Q4

{9} LVDS_DIGON

D25

*SHORT_6

0.01U/25V_4X

Q2

DTC143TKAT146_100MA
2N7002_200MA

R452

{33}

Q39

R12

100K_4

Q38
DTC144EUBTL_30MA

100K_4

EC_FPBACK#

EV@10K_4
LCDON#

EV@2N7002_200MA

Q37
EV@2N7002_200MA

B2A

LCD Panel Module


[LDS]

CRT
<CRT>
CN3

0.3A (20mils)
+3V

R299

2.2K_4

LCD_EDIDCLK

R6

2.2K_4

LCD_EDIDDATA

LCDVCC

LCDVCC
+3V

LCD_EDIDCLK
LCD_EDIDDATA

{9} LCD_EDIDCLK
{9} LCD_EDIDDATA

LCD_TXLOUT0LCD_TXLOUT0+

{9} LCD_TXLOUT0{9} LCD_TXLOUT0+

D20

*LCP0G050M0R2R

LCD_TXLOUT1LCD_TXLOUT1+

{9} LCD_TXLOUT1{9} LCD_TXLOUT1+

C3A

LCD_TXLOUT2LCD_TXLOUT2+

{9} LCD_TXLOUT2{9} LCD_TXLOUT2+

DISPON_O_R

LCD_TXLCLKOUTLCD_TXLCLKOUT+

{9} LCD_TXLCLKOUT{9} LCD_TXLCLKOUT+


VIN

R8

*SHORT_6

LCD_BK_POWER

DISPON

{9}

R516

LVDS_PWM
DISPON_O_R

2.2/F_4

C3A

LVDS_PWM

LCD_BK_POWER

C27

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23

USB for CRT BOARD (Right)

{9}

CRT_RED

{9}

CRT_GRE

{9}

CRT_BLU

L16

BLM18BA470SN1D_300MA

L15

BLM18BA470SN1D_300MA

L14

BLM18BA470SN1D_300MA

RED_L

+5V

+3V

GREEN_L
BULE_L

C365

C362

C360

C349

C361

C364

6.8P/50V_4N

6.8P/50V_4N

6.8P/50V_4N

6.8P/50V_4N

6.8P/50V_4N

6.8P/50V_4N

C53

C366

C@0.1U/10V_4X

C@0.1U/10V_4X

<USB>

CN4
+5V

+3V

C@10U/25V_1206X

{9}
{9}

CRT_VSYNC
CRT_HSYNC

+5VPCU

LCD_EDIDCLK

+3V

LCD_EDIDDATA

CCD_POWER
USBP0-_LCD
USBP0+_LCD

LCDVCC
{30}
{30}

C345

L2
L1

DMIC_CLK
DMIC_IN

C26

C24

C342

*E@22P/50V_4N

*E@0.1U/25V_4X

*E@0.1U/25V_4X

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

{9} CRT_DDCCLK
{9} CRT_DDCDAT

SBY100505T-221Y-N_300MA
SBY100505T-221Y-N_300MA

24
25
26
27
28
29
30

24
25
26
27
28
29
30

34

34

33

33

32

32

31

31

RED_L
C363

GREEN_L

1U/16V_6X

BULE_L
U15
G545A2P8U

2
3

IN1
IN2

4
1
9

EN#
GND
GND-C

50373-03001-001

*E@22P/50V_4N

C22

C21

*E@10P/50V_4N

*E@10P/50V_4N

{33} USB_EN#1

OUT3
OUT2
OUT1

8
7
6

OC#

USBPWR3

USBP8+_L
USBP8-_L

C347
*10U/6.3V_8X

87213-2000G

L3512

B2A

1
2

{11,33} USBOC#8

EMI CO-LAY

3
4

1
2

3
4

change footprint
E@DLP11SN900HL2L
USBP8+_L
USBP8-_L

change footprint
*E@DLP11SN900HL2L

USBP8+
USBP8-

C3A D3B

USBP0+_LCD
USBP0-_LCD

USBP0+
USBP0-

C3A

{11}
{11}

R7

*SHORT_6

Quanta Computer Inc.

CCD_POWER
C25

{11}
{11}

EMI

0.2A(20mils)
+3V

B2A

L3511

CCD
[CCD]

PROJECT : TE4

C@10U/6.3V_8X
Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

LCD/LED Panel/CCD
5

HTTP://FAQP.RU/

Sheet

26

of

46

MINI Card Slot#1(WiFi / Wimax / Combo)

<MNW>

+1.5V

0.5A(30mils)

R470

27

+3V

2.75A(120mils)
R366

0_8

C264

C251

C227

C459

C468

C455

C469

*0.01U/25V_4X

*0.1U/16V_4Y

*10U/6.3V_8X

0.1U/16V_4Y

C@0.1U/16V_4Y

C@0.1U/16V_4Y

C@10U/6.3V_8X

0_4

{33} BT_RFCTRL

WIMAX_P

WIMAX_P
Q36
D

R434

3 *DTC144EUBTL_30MA

10K_4
BT_RFCTRL_BT

R433

*0_4

BT_RFCTRL_BT5

R437

0_4

SERIRQ_debug
D

B2A
CN15
{9,33}
{9}

PLTRST#

SERIRQ
LDRQ#1

{11} PCLK_DEBUG

R442
RN8

4
2

R438

*NMP@0_4
3 NMP@0X2
1
NMP@0_4

SERIRQ_debug
LDRQ#1__debug
PLTRST#_debug
PCLK__debug

{10} PCIE_TXP5
{10} PCIE_TXN5

{10} PCIE_RXP5
{10} PCIE_RXN5

R166

*0_4

{10} PCIE_CLK_RQ5#

{10} CLK_PCIE_MINI
{10} CLK_PCIE_MINI#

BT_RFCTRL_BT5

*2N7002_200MA

Q14
WIMAX_P

R735

*10K_4

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

NC
C-Link_RST
C-Link_DAT
C-Link_CLK
GND
NC
NC
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
NC
NC

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
NC
NC
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
WAKE#
80003-5121

NC
NC
NC
NC
NC
+1.5V
GND
+3.3V

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

USBP5+
USBP5-

{11}
{11}

CGDAT_SMB {3,14,15}
CGCLK_SMB {3,14,15}

PLTRST#
RF_EN

LFRAME#_PCIE
LAD3_PCIE
LAD2_PCIE
LAD1_PCIE
LAD0_PCIE

16
14
12
10
8
6
4
2

RF_EN
R168
R163
R158
R151
R142

NMP@0_4
NMP@0_4
NMP@0_4
NMP@0_4
NMP@0_4

{33}

LFRAME# {9,33}
LAD3
{9,33}
LAD2
{9,33}
LAD1
{9,33}
LAD0
{9,33}

MINI Card Slot#2-3G

<MNT>

+1.5V

+3V_3G

+3V_3G

2.75A(120mils)
CN20

C339

3G@0.1U/16V_4Y

C@0.1U/16V_4Y

C@0.1U/16V_4Y

C@10U/6.3V_8X

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

{10} PCIE_TXP3
{10} PCIE_TXN3
B

+3V

{10} PCIE_RXP3
{10} PCIE_RXN3

+3V_3G

0.5A(30mils)
R281

{10} CLK_PCIE_3G
{10} CLK_PCIE_3G#

3G@0_8

PCIE_CLK_3G_REQ#_C

15
13
11
9
7
5
3
1

NC
C-Link_RST
C-Link_DAT
C-Link_CLK
GND
+3.3V
+3.3V
CPEE#
GND
PETp0
PETn0
GND
GND
PERp0
RERn0
GND
MMC_DAT
MMC_CMD
GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
WAKE#
3G@80003-5121

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
CPUSB#
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
RESET#
W_DISABLE#
GND
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

C481

C478

C482

*3G@0.01U/25V_4X

*3G@0.1U/10V_4X

*3G@10U/6.3V_8X

CPUSB# {12}
USBP10+ {11}
USBP10- {11}
CGDAT_SMB {3,14,15}
CGCLK_SMB {3,14,15}
B

PLTRST#
3G_EN

PLTRST# {4,11,31,33}
3G_EN {33}

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR

16
14
12
10
8
6
4
2

+3V_3G

+3V

+3V_3G

+3V_S5

R298
3G@10K/F_4

C479
*3G@100P/50V_4N

C477

54
53

C480

PCIE_CLK_3G_REQ#_C

PCIE_CLK_REQ4#

{10}

54
53

C487

Q19
3G@2N7002_200MA
R288

*3G@0_4

B2A

SIM CARD
JSIM1

1
2
3
4
5
6
7
8
9
10
1411
1312

UIM_CLK
A

UIM_DATA
UIM_RST
UIM_VPP
UIM_PWR

C218

3G@0.1U/10V_4X
USBP4+
USBP4-

{11}
{11}

Quanta Computer Inc.

3G@88511-120N

PROJECT : TE4D
Size

Document Number

Rev
A1A

MINI CARD(WLAN/3G/SIM Card)


Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011


1

Sheet

27

of

46

USB2.0 MB SIDE (Left) 1

<USB>

+5VPCU

28

020173MR004S55PZR
C335
CN13

USBPWR2

8
7
6

OUT3
OUT2
OUT1

EN#
GND
GND-C

OC#

1
2
3
4

USBP9-_C
USBP9+_C

C3A

+
C436
10U/6.3V_8X

C433
*10U/6.3V_8X

C440
C@100U/6.3V_3528P_E45b

IN1
IN2

4
1
9

{33} USB_EN0#

U10
G545A2P8U

2
3

1U/16V_6X

{11,33} USBOC#13_9
D5

*LCP0G050M0R2R USBP9-_C

D9

*LCP0G050M0R2R USBP9+_C

L3513
USBP9+_C
USBP9-_C

1
2

3
4

USBP9+
USBP9-

{11}
{11}

E@DLP11SN900HL2L
change footprint

B2A

C3A

USB2.0 MB SIDE (Left) 2 <USB>


+5VPCU

020173MR004S55PZR
C428
CN12

1
2
3
4

USBP13-_R
USBP13+_R

C3A

+
C427
10U/6.3V_8X

OC#

C426
*10U/6.3V_8X

R1015

C200
C@100U/6.3V_3528P_E45b

OUT3
OUT2
OUT1

EN#
GND
GND-C

USBPWR1

8
7
6

IN1
IN2

4
1
9

{33} USB_EN2#

U20
G545A2P8U

2
3

1U/16V_6X

*470/F_4

{11,33} USBOC#13_9

B2A
C

D2

*LCP0G050M0R2R USBP13-_R

D3

*LCP0G050M0R2R USBP13+_R

Q1100
*2N7002_200MA

B2A
L3514

<SLC>

USB w S&C MAXIM solution

USBP13+_R
USBP13-_R

1
2

USBP13+_C
USBP13-_C

3
4

E@DLP11SN900HL2L

C3A

+5VPCU

B2A

B2A

change footprint

C217
U4
MAX14566BEETA+T

0.1U/10V_4X

D3B
R490

{11,33} SC_CB1
{11,33} SC_CB

0_4

1
8

VCC

TDP
TDM

CB1(CEN#)
CB
DP
DM

GND

GND

6
7

USBP13+
USBP13-

3
2

USBP13+_C
USBP13-_C

USBP13+
USBP13-

{11}
{11}

CB0

CB1

Auto mode

Status
Force dedicated charger mode

Pass-Through(USB) mode:
Connect DP/DM to TDP/TDM

USB w S&C TI solution

<SLC>
+5VPCU

USBP13+
USBP13-

RN10

4
2

USB_SW-

3 *0X2 USB_S&C_1
1
USB_S&C#_1

3
4

1D+

VCC

1D-

2D+

D+

2DGND
GND

DOE
GND

10
U24

USB_BUS_SW0

USB_S&C_R1

USB_S&C#_R1

USB_BUS_SW0
RN9

6 USB_BUS_SW1
14

USB_BUS_SW1

C549

{11}

3 *0X2
1

4
2

USBP13+_C
USBP13-_C

14

*0.1U/10V_4X

USB_SW+

C538
USB_SW*0.1U/10V_4X

5
9

{12,33}

12

GND
GND
GND
GND

5
15

+5VPCU

16
13
12
11

{11,33} SC_CB1

+3V_S5

+5VPCU

+3V_S5

U30
*TS3USB221DRCR
USB_SW+

R482

*10K_4

USB_BUS_SW0

R485

*10K_4

USB_BUS_SW1

OE#

Function

Disconnect

D=1D

D=2D
OE#
Function

Disconnect

A port= B port

GND

1A

1B

2A

2B

3A

4B

4A

3B

1OE

3OE

2OE

4OE

R480
*43K_4

R484
*51K_4

R483
*51K_4

7
3
6
11
8

R486

*100_4

10

SC_CB

{11,33}

13

*SN74CBT3125CPWR

OE#

VCC

R481
*75K/F_4

1OE#

2OE#

3OE#

4OE#

Mode3 High

High

Low

Low

Mode4 Low

Low

High

High

C3A

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

USB 2.0
5

Sheet

28

of

46

HTTP://FAQP.RU/

29

SATA ODD
[ODD]

ODD Zero power . (Only for Intel) <OZP>


+5V_ODD

+5V

D3B

R408
*SHORT_8
CN18

GND14

14

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

DP
+5V
+5V
MD
GND
GND

8
9
10
11
12
13

GND15

15

SATA_TXP1_C
SATA_TXN1_C

C309
C305

0.01U/25V_4X
0.01U/25V_4X

SATA_RXN1_C
SATA_RXP1_C

C295
C358

0.01U/25V_4X
0.01U/25V_4X

SATA_TXP1 {9}
SATA_TXN1 {9}
SATA_RXN1 {9}
SATA_RXP1 {9}

+5V_ODD

+5V_ODD
+ C445

C453

C449

C@0.1U/10V_4X

C@10U/6.3V_8X

C@100U/6.3V_3528P_E45b

205901-1

B2A

HDD_VCC
HDD_VCC

SATA HDD

SATA HDD Re-driver IC


C41
HDR@0.01U/25V_4X

[HDD]
+3V

R335

HDR@0_6

C34
HDR@0.1U/16V_4Y

HDD_VCC

{9} SATA_RXN0
{9} SATA_RXP0

R300
C344

C@0.1U/10V_4X

C@10U/6.3V_8X

*SHORT_8

6
VCC

10

16
VCC

SATA_TXP0_C

AI+

AO+

SATA_TXN0

C38

HDR@0.01U/25V_4X

SATA_TXN0_C

AI-

SATA_RXN0

C39

HDR@0.01U/25V_4X

SATA_RXN0_C

BO-

SATA_RXP0

C40

HDR@0.01U/25V_4X

SATA_RXP0_C

BO+

EN

D3B
C343

VCC

HDR@0.01U/25V_4X

HDD_VCC

+5V_HDD1

C37

R11

+5V

GND_P

{9} SATA_TXN0

U2

SATA_TXP0

21

24

BSATA_RXN0
BSATA_RXP0

VCC

GND24

{9} SATA_TXP0

GND
GND
GND
GND

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

BSATA_TXP0
BSATA_TXN0

Mode

1
2
3
4
5
6
7

3
19
18
13

GND1
RXP
RXN
GND2
TXN
TXP
GND3

17

23

20

CN9
GND23

15

BSATA_TXP0_C

C45

0.01U/25V_4X

BSATA_TXP0

AO-

14

BSATA_TXN0_C

C44

0.01U/25V_4X

BSATA_TXN0

BI-

12

BSATA_RXN0_C

C43

0.01U/25V_4X

BSATA_RXN0

BI+

11

BSATA_RXP0_C

C42

0.01U/25V_4X

BSATA_RXP0

A_EM

B_EM

R17

*HDR@100_4

HDD_VCC

R14

*HDR@100_4

HDD_VCC

HDR@SN75LVCP412ARTJR

HDR@0_4

R16

R15

HDR@10K_4

HDR@10K_4

+ C346
C@100U/6.3V_3528P_E45b

SATA Re-driver Bypass


Colay with Redriver IC

19C201-1

B2A

SATA_TXP0

R306

HDO@0_4

R302

HDO@0_4

BSATA_TXP0_C

SATA_TXN0

R305

HDO@0_4

R303

HDO@0_4

BSATA_TXN0_C

Quanta Computer Inc.

SATA_RXN0

R309

HDO@0_4

R304

HDO@0_4

BSATA_RXN0_C

PROJECT : TE4

SATA_RXP0

R308

HDO@0_4

R307

HDO@0_4

BSATA_RXP0_C

Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

HDD/ODD/MDC
5

HTTP://FAQP.RU/

Sheet
1

29

of

46

Codec(CX20587-11Z)

<ADO/MDC/AMP>

EXT MIC <ADO/AMP>

30

MIC1-VREFO
FILT_1.65V

AVDD_3.3

C350

C351

C266

C354

1U/10V_6Y

0.1U/16V_4Y

10U/6.3V_8X

0.1U/16V_4Y

R223
3.3K/F_4

C262
*4.7U/6.3V_6X

R212
3.3K/F_4
GND

GND
R224

+3V

*SHORT_6

GND

CN17

+3AVDD
C272

D3B

C300

10U/6.3V_8X

MIC1_L1

R425

100/F_6

MIC1_L2

L18

0_6

MIC1_R1

R429

100/F_6

MIC1_R2

L19

0_6

1
2
6
3
4

MIC1_L3

C352

0.1U/16V_4Y

MIC1_R3

0.1U/16V_4Y

Port_B#
C461
GND

R285

+3V_S5

B2A:change value

*SHORT_6

+5AVDD

D3B

C334

C330

*10U/6.3V_8X

0.1U/16V_4Y

L9

*100P/50V_4N

TI160808U300_1A

C265

C353

10U/6.3V_8X

0.1U/16V_4Y

10
7
8
9

C448

C465

*100P/50V_4N

GND
*0.1U/25V_6X

2SJ1012-023111

B2A

GND Shield_GND

+5V

R213
0.1/F_1206

GND

GND

GND

+3AVDD_S5
CLASSD_5V

{26}
{26}

0.1U/16V_4Y

R284

DMIC_CLK
DMIC_IN

56
55

PCBEEP_C

15

T14

54

T15
T17
T16

53
52
51
3
4
5

100_4 DMIC_IN_CLK
DMIC_IN

C254

C255

0.1U/16V_4Y

10U/6.3V_8X

10U/6.3V_8X

23
1

22

RPWR_5.0

CLASSDREF

36

17

35

20

LPWR_5.0

AVDD_5V

37

GND

PORTF_R
PORTF_L

DIB_P
DIB_N

PORTB_R
PORTB_L
B_BIAS

PC_BEEP

C_BIAS
PORTC_R
PORTC_L

SPDIF
GPIO0/EAPD#
GPIO1/SPK_MUTE#
GPIO2/SPDIF2

CX20587-11Z

PORTE_R
PORTE_L
PORTD_R
PORTD_L

DMIC_3/4
DMIC_CLK0
DMIC_1/2

PORTA_R
PORTA_L

AUXENABLE
AUX_CLK

14

GND

AVEE
FLY_N
FLY_P

50
49

SENSE_A
SENSE_B

48
47

T12
T11

46
45
44

MIC1-RR
MIC1-LL
MIC1-VREFO_B

42
41
40

T4
T7
T9

39
38

T6
T10

33
32

T5
T8

GND

39.2K/F_4
20K/F_4
5.11K/F_4

+3AVDD_S5

L13
L12

MDC@0_6
MDC@0_6

<ADO/AMP>

+3AVDD_S5
CN19

C292
C288
R235

MIC1_R1
MIC1_L1
MIC1-VREFO

2.2U/6.3V_6X
2.2U/6.3V_6X
0_4

HPOUT-L

R448

5.1/F_6

HPOUT-L2

L20

HCB1608KF-121T20_2A

HPOUT-L3

HPOUT-R

R449

5.1/F_6

HPOUT-R2

L21

HCB1608KF-121T20_2A

HPOUT-R3

C466

C359

10
7
8
9

5
2SJ1012-023111

C485

*100P/50V_4N

1
2
6
3
4

Port_A#
C476
*100P/50V_4N

B2A

*0.1U/25V_6X

GND

GND

GND

Shield_GND

1U/10V_6Y
C356

C355

0.1U/16V_4Y

10U/6.3V_8X

GND

R220
R221
R269

0_4
*0_4
0_4

R473

E@0_4

R474

E@0_4

INT SPK <ADO/AMP>

GND
GND

B2A

C3AD3B
SPK_R+
SPK_RSPK_LSPK_L+

C3A

DIB_P
DIB_N

EXT H.P / Beats

Port_A#
Port_B#

HPOUT-R
HPOUT-L
AVEE
FLY_N
FLY_P

SPK_R+
SPK_RSPK_LSPK_L+

5.11K/F_4

R248
R445
R242

31
30
27
26
25

{33} AMP_MUTE#
GND

R241

EP_GND

C326

PCBEEP

C310

0.1U/16V_4Y

57

{9,12}

C315

0.1U/10V_4X

SENSE_A
SENSE_B

GND
GND

DIB_P_R
DIB_N_R

BIT_CLK
SYNC
SDATA_IN
SDATA_OUT

29
28

SDATA_IN

FILT_1.65

33_4

RESET#

AVDD_3.3

R279

9
12
10
8

RIGHT+

13

0_4 BIT_CLK_AUDIO_R

FILT_1.8
VAUX_3.3
VAUX_3.3
VDD_IO
DVDD_3.3
AVDD_HP

33_4 ACZ_RST#_AUDIO_R

R278

HPFILT

R280

EXT_MUTE#

{9} BIT_CLK_AUDIO
{9} ACZ_SYNC_AUDIO
{9} ACZ_SDIN0_AUDIO
{9} ACZ_SDOUT_AUDIO

GND
*0.1U/16V_4Y

43

{9} ACZ_RST#_AUDIO

U14

C329

RIGHT-

In order for the audio codec to Wake on Jack, the CODEC


VAUX pin (VAUX_3.3, pin 4) must be powered by a rail
that is not removed unless AC power is removed.
GND

C297

R277
10K_4

21

0.1U/16V_4Y

LEFT-

C324

10U/6.3V_8X

19

C338

18

GND

Note:

FILT_1.8V

7
2
6
11
24
34

0.1U/16V_4Y

LEFT+

C328

10U/6.3V_8X

16

C325

R246
R255
R259
R264

0.1/F_8
0.1/F_8
0.1/F_8
0.1/F_8

EMI

DIB_P_R
DIB_N_R

B2A

CN5

R73
R72
R71
R67

*SHORT_6
*SHORT_6
*SHORT_6
*SHORT_6

INSPKR+N
INSPKR-N
INSPKL-N
INSPKL+N

INSPKL-N

C106

E@1000P/50V_4X

GND

INSPKL+N

C107

E@1000P/50V_4X

GND

INSPKR-N

C105

E@1000P/50V_4X

GND

INSPKR+N

C104

E@1000P/50V_4X

GND

4
35
26
1
88266-04001-06
GND

B2A
C320

GND

MDC <MDC>

C318

*E@100P/50V_4N

*E@100P/50V_4N

GND

EMI part

CN8

1
3
5
7
9
11

DIB_P
DIB_N

BIT_CLK_AUDIO

DMIC_IN_CLK
DMIC_IN

ACZ_SDOUT_AUDIO

SB_GPIO7
SB_GPIO27
FM_INT
DIB_P
DIB_N
FM_DET#

+3V
GND
AGND
FM_L
FM_R
AGND

2
4
6
8
10
12

MDC@88023-12101
GND

ACZ_RST#_AUDIO
C357
C333

C331

C332

*10P/50V_4C

*10P/50V_4C

*10P/50V_4C

C32

C29

E@150P/50V_4N

E@150P/50V_4N

C337

*0.47U/6.3V_4X

*0.47U/6.3V_4X

D3B
C3A

GND

Quanta Computer Inc.

GND
GND

PROJECT : TE4
Size

Document Number

Rev
A1A

Codec (CX20587)
Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

30

of

46

Atheros Lan

31

<LAN/LN1/LNG>
U3

R40

+3V_S5

*SHORT_6

D3B

LAN_VDD33

C90

C89

C86

C81

C75

C@10U/6.3V_8X

*10U/6.3V_8X

51@1000P/50V_4X

1U/10V_6Y

0.1U/16V_4Y

VDD33

LED_LINK10/100n
LED_ACTn
CLKREQn/LED2

DVDD_REG
DVDDL
AVDDL
AVDDL

PLTRST#
PCIE_WAKE#
CKREQ_G#

{4,11,27,33} PLTRST#

C84

0.1U/16V_4Y

2
3
4

AVDD_CEN

AVDDL
33P/50V_4N
2
1

XTLI_LAN_C

AR8151/AR8152

XTLO

TEST_RST
TESTMODE

Y1

1U/10V_6Y

XTLI

SMDATA
SMCLK

25MHZ_30

33P/50V_4N

33
32
36
35
30
29

C63

1U/10V_6Y

C58
C47
C48
C55

0.1U/16V_4Y
0.1U/16V_4Y
0.1U/16V_4Y
0.1U/16V_4Y

CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_RXP7_C
PCIE_RXN7_C

C46
C49

AVDDH
AVDDL
AVDDL

51_52@AR8151-BL1A-R

GND9

TRXP3
TRXN3

CLK_PCIE_LAN {10}
CLK_PCIE_LAN# {10}
PCIE_TXN6 {10}
PCIE_TXP6 {10}
PCIE_RXP6 {10}
PCIE_RXN6 {10}

0.1U/10V_4X
0.1U/10V_4X

4.7K_4
R35

51@0_4

CKREQ_G#

R42

52@0_6 AVDD_CEN

R19

52@0_4

CKREQ#

C92

*52@1U/10V_6Y

C93

52@0.1U/16V_4Y

C94

*52@10U/10V_8Y

LAN-Wake up function <LAN>

28
27
SB_SMBDATA1_LAN
SB_SMBCLK1_LAN

26
25

PCIE_WAKE#
LX

40

L4

51@4.7uh_C_1A

AVDD_CEN

C78

C77

C73

51@1000P/50V_4X

51@10U/6.3V_8X

51@0.1U/16V_4Y

PCIE_WAKE# {11}

41

22

AVDDH

C50

0.1U/16V_4Y

16
19
13

AVDDH
AVDDL
AVDDL

C61
C54
C69

51@0.1U/16V_4Y
51@0.1U/16V_4Y
51@0.1U/16V_4Y

LAN-SM-Bus

GND10

TRXP2
TRXN2

R18

+3V_S5
{10} PCIE_CLK_REQ3#

<LAN>
C

50

20
21

TRXP1
TRXN1

GND8

TX3P
TX3N

AVDDH

GND7

17
18

GND1

TRXP0
TRXN0

49

14
15

TX2P
TX2N

RBIAS

GND6

TX1P
TX1N

48

11
12

1U/10V_6Y

GND5

C79

47

TX0P
TX0N

C80
0.1U/16V_4Y

GND4

10

46

RBIAS

45

2.37K/F_4

LX

DVDDL
DVDDL
AVDDL
AVDDL

37
24
31
34

AVDDH_REG

GND3

R34

GND2

AVDDH

44

C87

XTLO_LAN_C

AVDDL_REG

43

C95
C85

0.1U/16V_4Y

REFCLKP
REFCLKN
RX_N
RX_P
TX_P
TX_N

VDDCT

42

C83

Atheros

PERSTn
WAKEn
VDDCT_REG/CKRn

LAN_LINKLED#
LAN_ACTLED
CKREQ#

39
38
23

SB_SMBDATA1_LAN

R28

*0_4

SB_SMBCLK1_LAN

R29

*0_4

SDATA

{3,10}

SCLK

{3,10}

GIGA:AR8151-BL1A-R = AL008151005
10/100:AR8152-BL1A-R = AL008152009

LAN-terminator <LAN/LN1/LNG>
LAN-Transformer
C88

*1U/10V_6Y

AVDD_CEN_T

C98

0.1U/16V_4Y

AVDD_CEN_T
TX3P
TX3N

1
2
3

AVDD_CEN_T
TX2P
TX2N

4
5
6

RN1

RN2

51@49.9X2

51@49.9X2

1
3

1
3

C52

C56

*0.1U/16V_4Y

*0.1U/16V_4Y

C59

51@0.1U/16V_4Y 51@1000P/50V_4X

<LAN>

PBY160808T-601Y-N_1A

AVDD_CEN

CN10
B

C102

51@1000P/50V_4X

L5

51@0.1U/16V_4Y

C135

*0.1U/16V_4Y

AVDD_CEN_T
TX1P
TX1N
AVDD_CEN_T
TX0P
TX0N

7
8
9
10
11
12

TCT1
TD1+
TD1-

MCT1
MX1+
MX1-

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

24
23
22

TERM4

21
20
19

TERM3

18
17
16

LAN_ACTLED
X-TX3P
X-TX3N

+3V_S5

R20

X-TX1P
X-TX1N

15 TERM1
14
13

1000P/50V_4X

0.1U/16V_4Y

1000P/50V_4X

X-TX3P

X-TX1N

X-TX2N

Over-clocking enable (default = 1)

X-TX2P

Over-clocking disable

X-TX1P

X-TX0N

X-TX0P

51@5.1K/F_6

LED0 = LAN_ACTLED

1
0

X-TX0P
X-TX0N
C91

LAN_LINKLED#

R21

52@5.1K/F_6

0.01U/100V_6X

0.01U/100V_6X

0.01U/100V_6X

0.01U/100V_6X

SWR switch-mode regulator select


Giga LAN pull High (default = 1)

LDO linear regulator select


10/100M LAN pull Low

NC4/3NC/3+
RX-/1NC2/2NC1/2+
RX+/1+
TX-/0-

EMI

TX+/0+
GND
GND

LED1 = LAN_LINKLED#

TERM4_C

C96

TERM3_C

C99

TERM2_C

C101

TERM1_C

TX0P
TX0N
49.9X2

1
3

RN4

49.9X2

C71

X-TX3N

TERM2

2
4

TX1P
TX1N
2
4
1
3

RN3

C68

5.1K/F_6

10 R328
9 R329

VPORT 0603 220K-V05


VPORT 0603 220K-V05

B2A

D3B

100073FR012M22RZL

B2A

Normal function

CKREQ# or CKREQ_G#

C74
0.1U/16V_4Y

R47

R46

R44

R43

75/F_8

75/F_8

51_52@75/F_8

51_52@75/F_8

ATE test mode

C3A
C109

C65

R38

X-TX2P
X-TX2N

51_52@TRANSFORMER

LAN(RJ45)-CONN Interface

U17

C97

C51

LAN-Strap function <LAN/LN1/LNG>

<LAN/LN1/LNG>

TX2P
TX2N

2
4

2
4

TX3P
TX3N

PLACE NEAR LAN IC SIDE

51_52@47P/3KV_1808C

TERM9

1G(47p): CH047GJ0I00
10/100(220p): CH122GK1I10
EMI
B2A
If support 10/100 , R44,R43 change to 0-ohm(0805)(CS00004JA40),and C91,C96 stuff
4
If support 1G , R44,R43 change
to 75-ohm(0805)(CS07504FA11),and C91,C963 stuff

HTTP://FAQP.RU/

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

Atheros Lan
2

Sheet

31

of

46

3 IN 1 CARD READER
Card reader controller

3 IN 1 CARD READER

VCC_XD

<MMC>

<MMC>

C238
1U/10V_6Y

32

C438

C439

C437

0.1U/16V_4Y

0.1U/16V_4Y

C@0.1U/16V_4Y

VCC_XD
CN16

SD_DAT0
SD_D1
SD_D2
SD_D3/MS_D1
SD_CLK/MS_D2
SD_CMD
SD_CD#
SD_WP/MS_CLK

R143
R139
R402
R132
R160
R161
R159
R119

SD_DAT0_R
SD_D1_R
SD_D2_R
SD_D3/MS_D1_R
SD_CLK/MS_D2_R
SD_CMD_R
SD_CD#_R
SD_WP/MS_CLK_R

0_4
0_4
0_4
0_4
0_4
0_4
0_4
0_4

10
3
2
20
18
7
15
21
1
22

SD-VCC
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CLK
SD-CMD
SD-C/D
SD-WP
GND

17
9
8
11
14
16
13
6
23
19
12

MS-VCC
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-SCLK
MS-INS
MS-BS
GND
MS-GND
SD-GND

MS-GND

SD-GND

TP25

SD_D3/MS_D1

SD_D2

48M_CARD

MS_BS

{10} CLK_CARD_5159

D3B
TP26

R117

6.2K/F_4

RREF

*SHORT_4

19

R121

SP11

20
SP12

21
SP13

22
SP14

XD_D7

24
CLK_IN

U7

23

SD_WP/MS_CLK

SD_CLK/MS_D2_R
CM35-5

VCC_XD
C235
E@22P/50V_4N

RREF
SP10

SD_CMD

18

{11}

{11}
+3V

D3B
R108

USBP3-

USBP3+

+3V_Card

C219
4.7U/6.3V_6X

RTS5138-GRT

VREG

TP_XD_LED# {35}

C224
E@22P/50V_4N

B2A
SP9

16

MS_D0

SP8

15

SD_CLK/MS_D2

SP7

14

SP6

13

MS_INS#

C226
E@270P/50V_4X

C3A
TP27

V18
SD_CD#

GND

SP5
12
MS_D3

SP4
11
SD_DAT0

SP3
10
SD_D1

9
MS_INS#

SP1
8
SD_WP/MS_CLK

7
TP22

SP2

XD_CD#

3
2N7002_200MA

CARD_3V3

C221
1U/10V_6Y

25

1
Q40

17

3V3_IN

QFN24
5

GPIO0

DP

C220
0.1U/16V_4Y
VCC_XD

SD_WP/MS_CLK_RMS

DM

0.035A(30mils)
*SHORT_8

MS_D0
SD_D3/MS_D1_R
SD_CLK/MS_D2_R
MS_D3
SD_WP/MS_CLK_RMS
MS_INS#
MS_BS

Quanta Computer Inc.


PROJECT : TE4D
Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

RTS5138 (Card Reader)


5

HTTP://FAQP.RU/

Sheet
1

32

of

46

D14

*VPORT 0603 220K-V05

33

+3VPCU

+3VPCU

0.03A(30mils)

{11}
{12}

+3VPCU

R234
10K_4

CLKRUN#

GATEA20

121

{12}

RCIN#

{11}

SCI#

122
D7

SCI#_uR

SW1010CPT_100MA

29
6

{26} EC_FPBACK#
ECGPIO10

124

R233
{4,11,27,31} PLTRST#
*10K_4
{28} USB_EN0#
{9,27}
{35}

7
123
125

SERIRQ
BAT_SAT1

BAT_SAT1

{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

54
55
56
57
58
59
60
61

{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}
{34}

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
3ND_MBCLK
3ND_MBDATA

{36}
MBCLK
{36}
MBDATA
{10} 2ND_MBCLK
{10} 2ND_MBDATA
3ND_MBCLK
3ND_MBDATA
{27}
3G_EN

{34}
{34}
{8}
{26}
{11,28}
{11,28}

70
69
67
68
119
120
24
28

HWPG

TPCLK
TPDATA
S3_Reduce
USB_EN#1
SC_CB1
SC_CB

72
71
10
11
12
13

R201
R196

0_4
0_4

8768_32KX1

R183

*SHORT_4

8768_32KX1_R

77

8768_32KX2

R187

*SHORT_4

8768_32KX2_R

79

R184

20M_6

LPC

ECSCI/GPIO54
LDRQ/GPIO24

80

GPIO41(VBAT)
LPCPD/GPIO10

PWUREQ/GPIO67
SERIRQ
SMI/GPIO65

17
20
21
25
27

no wake-up
GPO82/TRIS
capability GPO84/BADDR0

110
112
111
113
93

SOUT_CR/GPO83/BADDR1
SIN_CR/CIRRX/GPIO87
GPIO06

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

SER

KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
KBSOUT16/GPIO60
KBSOUT17/GPIO57
SCL1/GPIO17
SDA1/GPIO22
SCL2/GPIO73
SDA2/GPIO74
SCL3/GPIO23
SDA3/GPIO31
SCL4/GPO47
SDA4/GPIO53

32
118
62
65
22
16
81
66

A_PWM/GPIO15
B_PWM/GPIO21
C_PWM/GPIO13
D_PWM/GPIO32
PWM
E_PWM/GPIO45
F_PWM/GPIO40/CLKIN48
G_PWM/GPIO66
H_PWM/GPIO33

TEMP_MBAT {36}
+3VPCU

ICMNT {36}
AC SET_EC {36}
USBOC#8 {11,26}

TP51

SPI

FIR
CIR

IV@10K_4

{4}

CORE DEFINED

10

2Eh

2Fh

11

164Eh

164Fh

BADDR0

BADDR0

R229

*10K_4

BADDR1

BADDR1

R228

10K_4

SHBM

RF_EN

R194

10K_4

BAT_SAT0

Disabled ('1') if using FWH device on LPC.


Enabled ('0') if using SPI flash for both system BIOS and EC firmware

BAT_SAT0 {35}
RF_LED {35}
AMP_MUTE# {30}
ID
{36}
D/C#
{36}
DISPON {26}

ID

75
73
74
23
14
114
109

IRRX1/GPIO72/SIN2
IRRX2_IRSL0/GPIO70
IRTX/GPIO71/SOUT2
CIRRXM/GPIO46/TRST
GPIO34/CIRRXL
CIRTX1/GPIO16
CIRTX2/GPIO30

86
87
90
92

F_SDI/F_SDIO1
F_SDO/SDIO0
F_CS0
F_SCK

PS/2

2ND_MBCLK
2ND_MBDATA

VCC_POR

0_6

VREF

6
5

SCL
SDA

BADDR1
TP_ON_OFF {34}
LID591# {26}

C3A

HWPG_VGA
R487

*0_4

PWRLED#

FANSIG1 {4}

VCC
GND

C228

M24C08-WMN6TP
0.1U/16V_4Y
C

+3V

{35,36}
{42}
{41}

SPI FLASH

Q16
2N7002_200MA

1
R230

TEMP_ALERT# {4,12}

*0_4

+3VPCU

0.025A(20mils)

U12
RF_EN {27}
D11

SW1010CPT_100MA

RSMRST#

DNBSWON# {11}
R177

RSMRST# {11}
SUSC# {11}
MPWROK {4,11}
R176

MPWROK

*10K_4

VCC_POR#

R193

VREF_uR

R227

100K_4

4.7K_4

33_4

SPI_SDI

SPI_SDO_uR

R205

33_4

SPI_SDO 5

SPI_SCK_uR

R214

33_4

SPI_SCK 6

BT_RFCTRL

SO

R204

10K_4

VDD

SI

HOLD

SCK

+3VPCU

D3B

WP

CE

C242

0.1U/16V_4Y

VSS

W25X40BVSSIG

Intel

512KB

W25X40BVSSIG

AMD

2MB

W25Q16BVSSIG

{27}

INTERNAL KEYBOARD STRIP SET

SUS_PWR_ACK {11}

85
104

R199

PCH_GPIO33 {9,12}

*short_4

R200

+3VPCU

SPI_SDI_uR

SPI_CS0#_uR

NUMLED {34}
CAPSLED {34}
SPI_SDI_uR
SPI_SDO_uR
SPI_CS0#_uR
SPI_SCK_uR

WP

0.003A(20mils)

8
4

ADDRESS: A0H

B2A

ACIN
S5_ON
VRON

1
2
3

A0
A1
A2

USB_BUS_SW1 {12,28}

USBOC#13_9 {11,28}
SUSON {38}
MAINON {8,13,39,42}
USB_EN2# {28}
PWRLED# {35}

30

CLKOUT/GPIO55

+3VPCU

U6
BADDR0

+3VPCU

+3VPCU

0_4 +A3VPCU

MY0

R120

10K_4
B

HWPG

+3V

R426
C222

TP1

18P/50V_4C

10K_6

D3B

1U/10V_6X

8769AGND

01

R436

SUSLED_EC {35}

84
RF_EN
83
82
91 DNBSWON#_uR

SPI_DI/GPIO77
SPI_DO/GPO76/SHBM
SPI_SCK/GPIO75
GPIO81

FIU

C241

18P/50V_4C

Data

XOR TREE TEST MODE

R435

Cell_separate
VFAN1

Index

00

SHBM=0: Enable shared memory with host BIOS

GFX_MAINON {39}
NBSWON# {34}
SUSB# {11}

NBSWON#

31
63
117
64
26
15

TA1/GPIO56
TB1/GPIO14
TA2/GPIO20
TB2/GPIO01
TA3/GPIO51
TB3/GPIO36

TIMER

SMB

PSCLK1/GPIO37
PSDAT1/GPIO35
PSCLK2/GPIO26
PSDAT2/GPIO27
PSCLK3/GPIO25
PSDAT3/GPIO12

32KX2

GPIO

GPIO42/TCK
GPIO43/TMS
wake-up
GPIO44/TDI
capability
GPIO50/TDO
CIRTX2/GPIO52/RDY

LRESET

32KX1/32KCLKIN

+3VPCU

ICMNT
AC SET_EC

101
105
106
107

DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97

D/A

33K/F_4

32.768KHZ_20

97
98
99
100
108
96
95
94

*100K/F_4

3 cell protect
for VGA SKU

EV@10K_4

L10
C237

R222

GA20

WPCE775LA0DG
Y3
4
3

BADDR1-0

AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93
AD4/GPIO05
AD5/GPIO04
AD6/GPIO03
AD7/GPIO07

A/D

CLKRUN/GPIO11

R179

1
2

H=1.6mm

KBRST

4.7K_4
4.7K_4

I/O Address

8769AGND

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

R231
R232

I/O Base Address

for 14"/15"
option

3
126
127
128
1
2

LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_591

10U/6.3V_8X

VDD

U11

C260

0.1U/16V_4Y

VCORF

0.1U/16V_4Y

C253

10U/6.3V_8X

AGND

C442

0.1U/16V_4Y

+3V_GFX
3ND_MBCLK
3ND_MBDATA

44

C223

0.1U/16V_4Y

4.7K_4
4.7K_4
4.7K_4
4.7K_4

*SHORT_6

C293

0.1U/16V_4Y

103

C244

0.1U/16V_4Y

R208

R175
R165
R155
R162

+3V

VCORF_uR

C444

0.1U/16V_4Y

+3V_VDD_EC

C279

102

C280

10U/6.3V_8X

VCC1
VCC2
VCC3
VCC4
VCC5

C245

{9,27}
{9,27}
{9,27}
{9,27}
{9,27}
{11}

+A3VPCU

PBY160808T-601Y-N_1A

AVCC

L11

GND1
GND2
GND3
GND4
GND5
GND6

2.2_6

0.01A(20mils)

5
18
45
78
89
116

R247

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

+3VPCU_EC

0.03A(30mils)

19
46
76
88
115

+3VPCU

B2A

SM BUS PU

EC<KBC>

8769AGND

GFX_PG

D22

*EV@SW1010CPT_100MA

R491

*EV@0_4

HWPG_VGA

+3VPCU

TP23

SMBUS Table
SMBUS

+5V

Devices

Address

{40} HWPG_VAXG
R405
R400

Battery

R164

10K_6

10K_4 TPCLK
10K_4 TPDATA

D4

*IV@SW1010CPT_100MA

*10K_6

R493

IV@0_4

D6

*SW1010CPT_100MA

R494

0_4

D8

*SW1010CPT_100MA

R495

0_4

D10

*SW1010CPT_100MA

R496

0_4

+3VPCU
{37} SYS_HWPG

Close to U16

PCH SML1

R492

LED PU/PD

PCLK_591

+3V

AMD SMBus

98H

EC EEPROM

A0H

VGA Board Thermal Sensor

98H

DNBSWON#_uR

C256

*0.1U/16V_4Y

R219
*22_4

NBSWON#

SW1

PWRLED#

AC SET_EC

R147

10K_4

R140

*10K_4
{38} HWPG_1.5V

ICMNT

HWPG

HWPG

{4}

*SHORT_ PAD

3
D12
*LCP0G050M0R2R

BAT_SAT0
BAT_SAT1

C270

C285

C284

*10P/50V_4C

*10U/6.3V_8X

*10U/6.3V_8X

R410
R206

10K_4
10K_4

{39} HWPG_VTT

8769AGND
8769AGND

D3B

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Date:

Monday, January 24, 2011

Rev
A1A

EC-WPC8763LDG/WPC8769L(O)
5

HTTP://FAQP.RU/

Sheet
1

33

of

46

INT KeyBoard <KBC>

TP board <TPD>

+3VPCU

+5V

34

RP7
MX1
MX6
MX5
MX0

C12
C13
C14
C15

MX7
MX2
MX3
MX4

1 10KX8
2
3
4
5

10
9
8
7
6

*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X

CN1
36

C16
C17
C18
C19

*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X

MX0
MX5
MX6
MX1

C8
C9
C10
C11

*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X

MY7
MY13
MY12
MY15

C4
C5
C6
C7

*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X

MY3
MY5
MY14
MY6

C2
C341
C3
C35

*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X

MY2
MY1
MY0
MY4

K_LED_P
MY16

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

MX7
MX2
MX3
MX4

L6
*SHORT_6

TPCLK_L

D3B

TPDATA_L
MY16

MY17
K_LED_P
MY2
MY1
MY0
MY4
MY3
MY5
MY14
MY6
MY7
MY13
MY8
MY9
MY10
MY11
MY12
MY15
MX7
MX2
MX3
MX4
MX0
MX5
MX6
MX1
K_LED_P
CAPSLED

{33}

MY2
MY1
MY0
MY4
MY3
MY5
MY14
MY6
MY7
MY13
MY8
MY9
MY10
MY11
MY12
MY15
MX7
MX2
MX3
MX4
MX0
MX5
MX6
MX1

{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}
{33}

CAPSLED

{33}

NUMLED

{33}

C165
*E@10P/50V_4C

C150
*E@10P/50V_4C

TPCLK_L
TPDATA_L

TPCLK
TPDATA

R61
R57

+5V_TP

1
2
3
4
5
6

E@0_6
E@0_6

{33} TP_ON_OFF
C176
C@4.7U/6.3V_6X

C173
E@0.1U/16V_4Y

1
2
3
4
5
6

88513-064N
Near to CN7

EMI

C3A
EMI

Power board <PSW>

C145
*E@0.1U/10V_4X

K/B LED power <KBP>


Only for Huron River
CN2

{33}

NUMLED

{33}
{33}

{33}

MY17

CN6

EMI

1
2
3
4

NBSWON#

88513-044N

35

91504-344N
C340

*100P/50V_4N MY17

C1

*100P/50V_4N MY16

B2A

(10mils)
R1

+3V

150_4

K_LED_P

HOLE
CPU

HDD&ODD
HOLE7

HOLE23

HOLE4

HOLE21

HOLE10

3
4

1
2

HOLE13

*H-C131D91P2

*H-C131D91P2

*H-C131D91P2

*H-C131D91P2

*H-TC276I150BC197D150P2

*INTEL-CPU-BRACKET

MDC

1
2
3

1
2
3
*HG-C236D157P2

*HG-C236D157P2

HOLE22
6
5
4

7
8
9

HOLE24
HOLE5

*HG-C197D118P2

HOLE18
6
5
4

7
8
9

R130
*E@0_6

*HG-C236D157P2

*HG-C236D157P2

HOLE3
6
5
4

HOLE8
6
5
4

R85
E@1000P/50V_6X

C3A
HOLE2
6
5
4

7
8
9

7
8
9

D3B

HOLE9
6
5
4

7
8
9

*H-TC276I150BC197D150P2
*H-TC276I150BC197D150P2

HOLE19
6
5
4

7
8
9

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

7
8
9

HOLE1
6
5
4

HOLE17
6
5
4

7
8
9

HOLE6
6
5
4

7
8
9
1
2
3

HOLE20
6
5
4

1
2
3

debug Card()

7
8
9

3G Card()

1
2
3

MINI CARD

*HG-C276D98P2
*HG-C236D98P2

*HG-TE315X228D98P2

*HG-TE315X315D98P2

*hg-tsbsd98p2-1

*HG-C315D98P2

HOLE31
HOLE30
HOLE16
6
5
4

HOLE25
6
5
4

7
8
9

HOLE26
6
5
4

7
8
9

HOLE27
6
5
4

7
8
9

HOLE28
6
5
4

7
8
9

Quanta Computer Inc.

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

7
8
9

HOLE12

*EMIPAD
*SPAD2

*HG-TSBSI138D98P2

*HG-C315D98P2

*HG-C315D98P2

*HG-C299D98P2

*HG-C299D98P2

B2A

PROJECT : TE4
Size

Document Number

Date:

Monday, January 24, 2011

*HG-C236D98P2

Rev
A1A

KB/TP&TP/PB/FL/LEB/MMB/B-CAS
3

HTTP://FAQP.RU/

Sheet
1

34

of

46

35

LED
BATERRY
Full Charge = White
10K_4

+5VPCU

R283

3
2
12-11/T3D-CP1Q2B12Y/2C

ACIN_C

R296

ACIN_A

1K_4

-BATLED0

R287

1.5K/F_4 BATLED0_R

3
Q20

1
ME2N7002DW_250MA

-BATLED1

R289

1.2K/F_4 BATLED1_R

3
Q21

1
ME2N7002DW_250MA

ACIN

+5VPCU
MMBT3906-7-F_200MA

ACIN

{33,36}

Q18
DTC144EUBTL_30MA

Q35

2mA

Charging = Orange

BAT_SAT1
BAT_SAT1 {33}

CARDREADER

POWER
+5VPCU

BAT_SAT0 {33}

LED6
12-12/S2ST3D-C30/2C

+5VPCU

BAT_SAT0

ACIN_R
LED3
1

2mA

AC-IN

DC IN = White
R293

1.5K/F_4

R294

1.2K/F_4

PWRLED#_Q
3

-SUSLED

R292
0_4

-SUSLED_R
Q23

S3 Mode = Orange

-PWRLED

LED2
12-12/S2ST3D-C30/2C

{32} TP_XD_LED#
PWRLED#

PWRLED#

TP_XD_LED

LED5

{33}

TP_XD_LED_A
2
12-11/T3D-CP1Q2B12Y/2C

R295

1K_4

+5V

B2A

*2N7002W_115MA

HDD/ODD

SUSLED_EC
SUSLED_EC

{33}

Q22
DTC144EUBTL_30MA
+5V

R290

RF LED

*10K_4

Amber
R297

+5V

560_4

RF_LED

LED4 2

{33}

1 12-11/T3D-CP1Q2B12Y/2C

-SATA_LED

R291

1.5K/F_4

SATA_LED#_C

HDDLED#

Q17

MMBT3906-7-F_200MA

RF_LED_R
2
12-21/S2C-AL1M2VY/2C

1
LED1

R282

+3V

10K_4

SATA_LED# {9}

ESD Protect
FOR POWER LED

FOR BATTERY LED

D18
+3V

+5V

+3V

-PWRLED

+5V

C501
*E@0.1U/10V_4X

C502
*E@0.1U/10V_4X

C503
*E@0.1U/10V_4X

RF_LED_R

D17

3
-BATLED0

*PJMBZ5V6

FOR CARDREADER LED

D19

3
-SUSLED

C500
E@68P/50V_4C

-BATLED1

D3B

FOR HDD/RF LED

D16

3
-SATA_LED

*PJMBZ5V6

3
TP_XD_LED

*PJMBZ5V6

C3A

*PJMBZ5V6

C3A
+5VPCU

C504
*E@0.1U/10V_4X

+5VPCU

VIN

C505
*E@0.1U/10V_4X

VIN

C506
*E@0.1U/10V_4X

C507
*E@0.1U/10V_4X

B2A

+3V

D3B
EMI

C508
E@82P/50V_4N

Quanta Computer Inc.


EMI

PROJECT : TE4
Size

Document Number

Rev
A1A

LED
Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

35

of

46

PL5
*short/UPB201209T-800Y-N
PCN2

VA2

VIN

PQ27
AOD403
VA3

P1

PQ21
AOD403

BAT-V

PC31
0.1U/25V_4X

PD4

PD5

TVS_SMAJ20A

PR37
10/F_6

SW1010CPT_100MA

PR32
220K/F_4

PC14
*0.1U/25V_4X

PR19
33K_6
D

PR41
10/F_6
PR22
10K_6

PC16
*2200P/50V_4X

( Near by sense R side)


PR34
220K/F_4

3
CSIN

PR149
82.5K/F_6

PC129
*0.1U/25V_4X

2
SBR1045SP5-13

B2A

20277-044L

R1

1
3

0.01_3720
PR147

PD6

VA1

PL4
*short/UPB201209T-800Y-N

PC27
*4.7U/25V_8X

PC158
E@0.1U/25V_4X

PC99
E@2200P/50V_4X

DC_JACK

PF2
F1206HA15V024TM
1
2VA0

4
PQ2
IMD2AT108

+3VPCU

{33}

PQ1
2N7002K_300MA

D/C#

CSIP

11

{33}

MBCLK

CH4

VN

TEMP_MBAT_C 3

VP

CH2

CH3

10
M-DATA

6
5

13

+3VPCU
M-CLOCK

C3A

PR130
82.5K/F_6

ACOK

LGATE

PU7
ISL88731CHRTZ-T

DCIN

3.2V
88731ACIN

D3B

+3VPCU

2
3

PGND

CSOP

PR10
10K/F_4

VREF

6
BAT-V

VBF
VCOMP
NC

PC21
0.01U/50V_4X

TEMP_MBAT {33}

1
2

*E@10U/25V_8X
PC11

*E@10U/25V_8X
PC10

10U/25V_8X
PC98

10U/25V_8X
PC97

CSON

17
16

PR115

15

BAT-V

100_4

(Please place this R near by battery pack side)

29

{33}

100_4

PR9
PD2
*UDZSTE-175.6B

CSOP

PC110
10U/6.3V_8X

PC17
0.01U/50V_4X

{33}

1
PD1
*UDZSTE-175.6B

( Near by sense R side)

ICMNT

{33}
1K_4

18

PR120

100K_4
MBCLK

PR113
10/F_6

12

7
2

*1U/10V_4X
PR8

100/F_4
MBDATA

PR112
10/F_6
PC8
E@1000P/50V_4X

47P/50V_4N

PC18

47P/50V_4N

AON7410

PR21
2.21K/F_6

+3VPCU

PR7
100/F_4

14

{33}

TEMP_MBAT_C

PC1

PR16
PQ22

19

GND

GND

M-DATA
M-CLOCK
PC2

BAT-V

NC

ICM

ID

ICOMP

NC

ID

88731A_L_GATE

20

PC101
0.1U/25V_4X

PF1
F1206HA15V024TM
1
2

MBAT+

PR6

1
3.3UH_7X7

( Near by IC side)

NC

10

88731A_PHASE

23

ACIN

CSON
4

BTJ-09HZ0B

E@2200P/50V_4X
PC96

21
PHASE

3
2
1

22

PR131
22K/F_6

11

0.01_3720
PR107

C3A

E@2.2/F_6

9
8
7
6
5
4
3
2
1

SCL

PC13
0.1U/25V_4X

PR18
49.9/F_6

B2A

PCN1

88731A_U_GATE

24

PL1

DCIN

PR11
*100K_4

AON7410

PC82
10U/25V_8X

CH1

UGATE

PC100
0.1U/50V_6X

25

PR117
2.7_6

BOOT

SDA

PQ25

PC84
10U/25V_8X

PU11
CM1213A-04SO

VDDSMB

10/10/01 change Value and FP (EMI)


10/10/05 change Value and FP (EMI)
10/10/06 PC71 and PC76

3
2
1

MBDATA

VDDP

NC
GND
GND
GND
GND
CSSP

{33}

26

+3VPCU
PC105 0.1U/25V_4X

VCC

ACIN

ACIN

PC12 1U/10V_4X
1
2

27

{33,35}

PR20
4.7_6

PC107
0.1U/25V_4X

1
33
32
31
30
28

E@0.1U/25V_4X
PC95

PC15 1U/10V_4X
1
2

CSSN

PC131
10U/6.3V_8X

PR153
10K/F_4

( Near by IC side)

ID

C3A

VIN
PR118
10K/F_4

{33} AC SET_EC

PC3
0.01U/50V_4X

D3B

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Rev

CHARGER-ISL88731C
Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

1A
36

of

46

*0_4/S

PR162

VIN

PR161
*0_4/S

PC154
10U/25V_8X

PC70
*0.1U/25V_4X

5V_EN

PC145
10U/25V_8X

PR164
*0_4/S

VL
10.10.06 add
PD3
UDZSTE-175.6B

PC77
*0.1U/25V_4X

VIN

P2

VL

{42}

S5D

SYS_SHDN#

{4}

39K/F_4

PR159

{8,38,42}

S5D

MAIND

3V_EN

MAIND

PC68
4.7U/10V_6X

f : 500k Hz
ESR : 17m

*2.2/F_6

PQ39
AON7702

5V_DL

PR165
0_4

PC150
*1000P/50V_4X

PC140
0.1U/50V_6X
PR167
1/F_6
2

1
10.10.20 change Value

35
34
33

PC139

PAD
PAD
PAD

10.10.20 no stuff

1
2
3

PC136
*10U/6.3V_8X

*15.8K/F_4
+

PU10
PM6686TR

2
REFIN2

32
31
30
29
28
27
26
25

REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2

3
2
1

1.5UH_7X7

SKIP
DDPWRGD_R
3V_EN
3V_DH
3V_LX

PR177
PR173

*2.2/F_6

4
AON7702

PC147
0.1U/50V_6X

PC156
PC149
10.10.20 no stuff
*1000P/50V_4X

RDSon=14m ohm

PR172
1/F_6
2

*6.8K/F_4

PQ42

PC155
*10U/6.3V_8X

5V_DH
5V_LX

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD

PL9
PR101
300K/F_6

REFIN2

PR176

9
10
11
12
DDPWRGD_R 13
5V_EN
14
15
16
37
36

B2A

3V_DL

RDSon=14m ohm

PR102
*10K/F_4

B2A

AON7410

10.10.20 change value

17
18
19
20
21
22
23
24

1
2
3
PR96

1.5UH_7X7

B2A

+5VPCU
PR35 287K/F_6

PL8

+3VPCU
PQ44

+5VPCU

(Peak 9.073A, AVG 6.351A)

8
7
6
5
4
3
2
1

PQ36
AON7410

B2A

Total capacitor : 330uF

OCP:12.1A

3
2
1

OCP:12.1A

10.10.06 add
10.10.20 change Value

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

PR171
147K/F_4

Total capacitor : 330 uF

(Peak 8.421A , AVG 5.895A)

10.10.06 add
10.10.20 stuff
PR175
0_4

BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2

ESR : 17m

B2A

PC78
*2200P/50V_4X

REF

f : 400k Hz

+5VPCU

B2A

PC146
1U/16V_6X

10.10.20 change Value

0.1U/25V_4X

PR169
150K/F_4

PC72

PC71
*2200P/50V_4X

PC35
0.1U/50V_6X

330U/6.3V_105CS_E17f

10.10.20 no stuff
PR100
0_6

VL

330U/6.3V_105CS_E17f
PC152
0.1U/50V_6X

2
PD8
BAV99W-7-F

PC144
1U/16V_6X

+3VPCU

0.1U/25V_4X

PC151

U:C2A

1
PR178

PD9

PC153
0.1U/50V_6X

BAV99W-7-F

22_8

DDPWRGD_R

SYS_HWPG {33}

0.1U/25V_4X

PC157

+15V_ALWP

+15V

PR174
*100K_4

+3VPCU
+5VPCU
+5VPCU

1
2
5
6

+3VPCU

PQ40
AO6402A

MAIND 3

PQ38
AO6402A

PQ34
AO6402A

S5D

PQ37
AO6402A

1
2
5
6

1
2
5
6

S5D

1
2
5
6

MAIND

+3V_S5

+3V

(Peak 0.35A, AVG 0.25A)

(Peak 6A, AVG 4.2A)

+5V_S5

(Peak 1A, AVG 0.7A)

+5V

(Peak 3.5A, AVG 2.4A)

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Rev

System 5V/3V (PM6686TR)


Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

37

1A
of

46

PC29

P3

10U/10V_8X

(Peak 0.5A, AVG 0.35A)

PC30
0.1U/50V_6X

PR33

+SMDDR_VTERM

1.5SUS_PHASE
PC92
*0.1U/25V_4X

PC103
10U/25V_8X

1.5SUS_HG

1.5SUS_LG

19

20

21

22

23

24

25

PQ26

VTTSNS

LL

CS_GND

17

CS

16

V5IN

15

V5FILT

14

PR116

PU1

MODE

VTTREF

(Peak 0.1A, AVG 0.07A)

9.76K/F_4

PQ28
*RMW200N03FUBTB

PQ35
RMW200N03FUBTB

10.10.20 change Value and FP

PC104

PC127
1U/10V_4X

PC135

10U/10V_8X
390U/2.5V_105CS_E10f

PC124
1U/10V_4X

13

PC44
*0.1U/25V_4X

*1000P/50V_4X

NC

RDSon=2.3m ohm
PR46

*100K_4

12

S5
11

S3

VDDQSET

VDDQSNS

PGOOD

10

FOR DDR III

PC126
0.033U/50V_6X

COMP
NC

+5VPCU

+
PC133

+5VPCU
PR148 5.1/F_6

+SMDDR_VREF

B2A

B2A

*2.2/F_6

4
1
2
3

GND

B2A
C3A

1
2
3

RT8207LGQW

+1.5VSUS
+1.5VSUS_SRC

PR42

PL3
1.5UH_10X10

1
2
3

DRVH

VBST

DRVL

18

PC93
*2200P/50V_4X

PGND

VTTGND

VLDOIN

VTT

GND
1

B2A

RMW130N03FUBTB

VIN
2.2/F_6
PC34
10U/10V_8X

PC102
10U/25V_8X

+3VPCU
HWPG_1.5V {33}

PR45
620K/F_4
S5_1.5V PR47
PR48

*0_4/S
*0_4/S

VIN

OCP:18.47A

For RT8207A 400KHZ

(Peak 9.061A, AVG 6.342A)


ESR : 9m

SUSON

{33}

S3_1.5V

{8}

f : 400k Hz

Be careful to this two net name.


+1.5VSUS

PR151
10K/F_4

Vout = (R1/R2) X 0.75 + 0.75


R1

PR150
10K/F_4

MAIND 3

PQ33
AO6402A

{8,37,42} MAIND

PR38
*0_6/S

1
2
5
6

PC132
*33P/50V_4N

R2

+1.5V

(Peak 0.16A, AVG 0.11A)

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Rev
1A

DDR 1.5V(RT8207L)/1.05VSUS
Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

38

of

46

P4

Total capacitor : 390uF


D

F: 320k Hz

(Peak 24.390A , AVG 17.073A)

PR99
2.2_6

PU9
G5602R41U

16

0.1U/25V_4X
PR95
10K_4

BOOT
UGATE

12

VOUT

PHASE

11

OC

10

VDD

FB

LGATE

GND

PGND

NC

TPAD

17

14

NC

PHASE-VTT
PR170
PR98

5.1K/F_4
2.2/F_6
LGATE-VTT

C3A
U:C2A

PC75
10U/25V_8X

PC76
10U/25V_8X

PC73

*0.1U/25V_4X

1.0UH_7X7

+5VPCU

PR103
*2.2/F_6
+

PC79

PC80

UP6111

PC67
1U/10V_4X

1
2
3

PQ43
RMW200N03FUBTB

PC81
PC148
*1000P/50V_4X

PR97
100K/F_6

PC65
0.01U/50V_4X
2
1

PC141
*1000P/50V_4X
2
1

PC138
1U/10V_4X
2
1

PGOOD

+VTT

UGATE-VTT
PL10

VDDP

U:C2A

10.10.20 change Value

PC69
0.1U/25V_6X

13

TON

2
UP6111

{33} HWPG_VTT

EN/DEM

PC66

15

{8,13,33,42} MAINON

PQ41
RMW130N03FUBTB

10/10/01 change Value and FP

PR168
*0_4
+3VPCU

+1.05V

1
2
3

10.10.20 change Value

OCP:20.104A

4
1

{33} GFX_MAINON

PC143
4.7U/10V_6X

U:C2A

0.1U/25V_4X

PC74

PD7
SDM10K45-7-F_100MA
PC142

PR91
1M/F_6

10/F_6
PR93
*0_4/S

*2200P/50V_4X

VIN
+5VPCU
PR92

390U/2.5V_105CS_E10f
UP6111

B2A

0.01U/50V_6X

10U/6.3V_8X

UP6111

UP6111

UP6111
PC137
*33P/50V_4N
PR160
PR166

4.02K/F_6
PR163
10K/F_6

*0_6/S
UP6111

R1
R2
VOUT=(1+R1/R2)*0.75

Quanta Computer Inc.


PROJECT : TE4

UP6111
Size

Document Number

Date:

Monday, January 24, 2011

Rev
1A

+VTT/+1.05V (G5602R41U)
5

HTTP://FAQP.RU/

Sheet
1

39

of

46

VIN
+5VPCU

PR7118

8152VCCGFX
PR7183

26

{6} GFXVR_VID_6

VID5

GFXVR_VID_6_R

25

VID6

PHASE

22

LGATE

20

8152LGATEGFX

PR7125
*IV@2.2/F_6

PQ7044
4

1
2
3

IV@RMW200N03FUBTB

{6}

PR7113

*IV@short_4

PR7177

*IV@short_4

8152DPRSLPVRGFX

{6} GFXVR_DPRSLPVR

GFXVR_EN_R

GFXVR_EN
+3VPCU

PR7180
PR7182

{33}

+1.05V

PR7173

CLKEN

8152PGOODGFX

PGOOD

8152VRTTGFX

32

IV@10K/F_4

PR7175

IV@10K/F_4

VRON

8152NTCGFX
8152VCCGFX

DPRSLPVR

ISEN
ISEN_N

16
15

*IV@short_4

HWPG_VAXG
PR7109

3
4

IV@10K/F_4

IV@2.21K/F_4

8152ISENGFX
8152ISEN_NGFX

RDSon=5m ohm

CMSET

11

8152CMSETGFX

VSEN

12

FB

13

PR7187
8152VSENGFX
PC7162
8152FBGFX

NTC
OCSET

PR7178
IV@6.34K/F_4

PC7140
*IV@10U/25V_8X

PR7124
*IV@6.65K/F_4

PC7135

IV@56P/50V_4N

PC7161

COMP

14

RGND

SOFT

PR7179
IV@470/F_4

PR7195 IV@10K/F_4

IV@14K/F_4

+VAXG

IV@10_4
PR7193
IV@NTC_10K_6

VCC_AXG_SENSE {6}
VSS_AXG_SENSE {6}

8152COMPGFX
PR7128
IV@47.5K/F_4

PR7188
IV@10_4

PC7158
1
2

8152SOFTGFX

PR7196

IV@5600P/25V_4X

CM

10

8152CMGFX

PR7115

GFXVR_IMON {6}

PR7189
IV@43K/F_4

PC7159
IV@0.022U/25V_4X

GND
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PGND

IV@10K/F_4

8152DPRSLPVRGFX

IV@0.1U/25V_4X

PC7148

PC7085

*IV@0.1U/25V_4X
PR7194

GFXVR_EN_R

PC7084

+
PC7154

IV@12K/F_4

IV@82P/50V_4N

PC7137
+

PC7164 *IV@56P/50V_4N

VRTT

PR7192
IV@NTC_10K_6

+
PR7186
IV@3.74K/F_4

PC7082

PC7163
IV@0.1U/25V_4X

PR7176

8152OCSETGFX 2
IV@5.76K/F_4

PC7068
IV@10U/25V_8X

PVDD

PU7009
IV@RT8152EGQW

f : 300k Hz

IV@0.1U/25V_4X

VID4

GFXVR_VID_5_R

*IV@short_4

1
PC7153
IV@0.1U/25V_4X
8152PHASEGFX

*IV@short_4

PR7111

VID3

ESR : 4.5m

-smt
B2A
800 mils

IV@0.56UH_10X10-O
PL7009

*IV@330U/2V_7343P_E9c

PR7103

8152BOOTGFX
1
2
PR7174
IV@2.2_6

27

24

GFXVR_VID_4_R

*IV@short_4

BOOT

VID2

Total capacitor : 330 uF

+VAXG

IV@330U/2V_7343P_E9c

{6} GFXVR_VID_5

28

8152UGATEGFX

IV@330U/2V_7343P_E9c

{6} GFXVR_VID_4

29

GFXVR_VID_3_R

23

PR7104

GFXVR_VID_2_R

PQ7041
IV@RMW130N03FUBTB

UGATE

*IV@short_4

VID1

PC7083
IV@0.1U/25V_4X

OCP 20A
(Peak 19A, AVG 15.4A)

PR7105

VID0

30

*IV@short_4

31

GFXVR_VID_1_R

8152TONGFX
PR7123IV@120K/F_4

1
2
3

PR7106

GFXVR_VID_0_R

17

*IV@1500P/50V_4X

{6} GFXVR_VID_3

*IV@short_4

TON

{6} GFXVR_VID_2

*IV@short_4

PR7107

PR7126
IV@10/F_6

19

7
{6} GFXVR_VID_1

PR7108

PC7074
IV@2200P/50V_4X

PC7155
IV@1U/10V_4X

VCC
{6} GFXVR_VID_0

VIN

IV@10/F_6

PC7156
IV@1U/10V_4X

PC7136
IV@0.1U/25V_4X

*IV@short_4

18
33
35
34
36
37
38
39
40
41
42
21

+VTT

PR7120
*IV@0_6

PR7099
*IV@0_6

PR7112
*IV@0_6

PR7114
*IV@0_6

PR7117
*IV@0_6

PR7119 PC7145
*IV@0_6

GFXVR_VID_0_R
PC7147

GFXVR_VID_1_R
PC7146

PR7127
*IV@22_8

PR7121

GFXVR_VID_2_R
*IV@1M/F_6

PR7116
*IV@0_6

+VTT

+VAXG

IV@270P/50V_4X

VIN

IV@270P/50V_4X

PR7122
*IV@1M/F_6

PQ7020
*IV@2N7002K_300MA

IV@270P/50V_4X

2
IV@270P/50V_4X

GFXVR_VID_3_R

12/5 add

PC7144

IV@270P/50V_4X

GFXVR_VID_4_R
PC7143

12/5 add

12/5 add

IV@270P/50V_4X

Quanta Computer Inc.

1
PR7110
*IV@100K/F_4

PQ7019
*IV@DTC144EUBTL_30MA

GFXVR_VID_5_R
PC7142

PC7141

1
2
2

GFXVR_EN

GFXVR_VID_6_R

IV@270P/50V_4X

PROJECT : TE4
12/5 add
12/5 add

12/5 add

Size

12/5 add
Date:

HTTP://FAQP.RU/

Document Number

Rev
1A

UMA GPU CORE (RT8152C)


4

Monday, January 24, 2011

Sheet
5

40

of

46

C3A
{3}

RMW130N03FUBTB

+
PC125
100U/25V_105CE_f

PQ32

PC38
10U/25V_8X

{4,11}
PC37
*10U/25V_8X

DELAY_VR_PWRGOOD

VIN

PC42
0.1U/50V_6X
2
1

VR_PWRGD_CK505#

4
B2A:change footprint(no smt)

1
2
3
VIN

+VCC_CORE

+3VPCU

0.36UH_10X10-O
PL6
CORE-PHASE1

PR133

RMW200N03FUBTB

1
2
3

1.91K/F_4
PC118

PC53

PR152
2.2/F_4

PQ29
4

OCP 58.5~60A

PC52
+

Total capactor : 1450uF

ESR:2.25m
f:400k Hz

PR137
1.91K/F_4

PR143
2.2/F_6
+5VPCU

PR142
10/F_6

PC130
2200P/50V_4X

0.22U/25V_6X

(Peak 58A,AVG 48A)

VDD

40

17

PAD

PR155
*Short_4

Load Line=1.9mV/A
330U/2V_7343P_E9c

UGATE1
BOOT1

PR125

PHASE1
VR_TT#
LGATE1a

{6}

H_VID4

{6}

H_VID5

{6}

32

H_VID2

33

H_VID3

34

H_VID4

35

H_VID5

36

H_VID6

H_VID6

37
VR_ON

38

DPRSLPVR

39

VRON

{33}

31

H_VID1

ISEN1

{6} ICH_DPRSTP#

11

VID0
VID1
VID2

PR36

VID4

VCCP

25
1

VID6
VR_ON
DPRSLPVR

UGATE2

FB

PC19
22P/50V_4N

LGATE2
FB2

VSSP2
ISEN2

PC106
1

0.36UH_10X10-O

21U/16V_6X

1
UGATE2

30

+VCC_CORE

B2A:change footprint(no smt)

PQ30
4

2
PC121
0.22U/25V_6X

RMW200N03FUBTB

28

CORE-PHASE2

26

LGATE2
PC134

12/5 change

27

PC47

PR154
2.2/F_4

48A
OCP 60A

PC46
+

PR158
*Short_4

PR157
*Short_4
330U/2V_7343P_E9c

330U/2V_7343P_E9c

2200P/50V_4X

10
B

RMW130N03FUBTB

PL7

29

PR122
412K/F_4

PQ31

2
1U/10V_4X

PC123
1

PHASE2

PC128
100U/25V_105CE_f

4
+5VPCU

ISL62882HRTZ-TR5390

PR7035
2.2_6

PR121
*10K/F_4

*Short_6

PC122

VID5

BOOT2

PC114
0.22U/10V_4X

VSUM-

VID3

PR140
499/F_4

PR144
100K/F_4

PC36
0.1U/50V_6X

H_VID3

H_VID0

22

H_VID2

{6}

24

{6}

32.29m/(1.1m/2)=58.7
VIN

C3A

H_VID1

10K/F_4

LGATE1b

H_VID0

{6}

1/F_4

PR127

NTC

VSSP1
{6}

PR132

LGATE1a

5
PC109
*0.01U/25V_4X
1
2

VSUM-

21
23

Close to Phase 1 Inductor


C

RBIAS

40u/2*1.24k=24.8m , 24.8m/0.768=32.29m

3
4

PR123
*4.02K/F_4

3.65K/F_6

PC41
10U/25V_8X

147K/F_6

PR7135
*NTC_470K_4

VSUM+
PC120
0.22U/25V_6X

1
2
3

PR119
{4} H_PROCHOT#

PR145

338p*2*2.8k=1.895m

PR146
2.2_6

PSI#

PC39
*10U/25V_8X

419.65u/1.24k=338p

10K/F_4

10K/F_4

PSI# PR128

19

PR138

PSI#

1.1m/2*0.763=419.65u

UGATE1

20

1
2
3

{6}
68_4

330U/2V_7343P_E9c

PR156
*Short_4

PGOOD

1U/16V_6X
41

+VTT

PU8

CLK_EN#

PC119

VIN

16

PR25
*Short_8

150P/50V_4N

COMP
2

PC113
0.22U/6.3V_4X
VSUM-

VW
IMON

18
PR31
10.2K/F_4

ISUM+

ISUM14

1
PC24
330P/50V_4X

Parallel
*Short_4

PC116

PC117
330P/50V_4X

PR44

1
PR64

2
10_4

1000P/50V_4X

PC23
0.01U/25V_4X

2700P/50V_4X

VSSSENSE

PC25

PR30
82.5/F_4

2
10_4

PR43

VCCSENSE

PR136

1/F_4

PR139

10K/F_4

VSUM+

{6}

3.65K/F_6

VSUM-

Close to Pin 14,15

PC115

{6}

10K/F_4

PR141

VSSSENSE

PC112
390P/50V_4X

1
PR65
*Short_4

PR134
VSUM+

15

RTN

VSEN
12

2.8K/F_4

13

PR129

+VCC_CORE

{6}

PC28
0.033U/10V_4X

PC111
1000P/50V_4X

PR126
562/F_4

ISENSE

PR124
8.06K/F_4

0.33U/6.3V_4X

PC108
10P/50V_4N

PC26
*0.1U/25V_4X

PR29
2.61K/F_4
PR28
11K/F_4
PR26
NTC_10K_6

PR27
*Short_4

Panasonic
ERT-J1VR103J

VSUM-

10/10/01 change AGND to GND


PR24
1.24K/F_4

PC22
*1000P/50V_4X

PR23
*100/F_4

E3A
PC20
0.1U/25V_4X

Close to Phase 1 Inductor

Quanta Computer Inc.

Load Line setting to 2mV/A

PROJECT : TE4
Size

Document Number

Date:

Monday, January 24, 2011

Rev
1A

+VCC_CORE(ISL62882HRTZ-T)
5

HTTP://FAQP.RU/

Sheet
1

41

of

46

+3VPCU

{8,13,33,39}

PC43

MAINON

0.1U/25V_4X

P7

PR39
*100K_4

+5VPCU

PU2
G9661-25ADJF12U
VPP PGOOD 1

HWPG_1.8V

3
8
9

VIN
GND
GND

VO

NC

+1.8V

(Peak 1.45A, AVG 1A)

PC40
PC33
0.1U/25V_4X *0.1U/25V_4X

PC45
10U/6.3V_8X

VEN
ADJ

PC32
10U/6.3V_8X

+3VPCU

2
1
PR40 *0_4/S

PR51

R1

12.7K/F_4

PR50
10K/F_4

Vout =0.8(1+R1/R2)

R2

VIN

+3V_S5

PR79
1M/F_6

PR71
*22_8

+15V

+5V_S5

PR72
*22_8

PR76
1M/F_6

{33}

S5D

{37}

S5D

S5_ON

2
PC63

PR77
100K_4

PQ11

DTC144EUBTL_30MA

*2N7002K_300MA

PQ12

PQ10

PR80
1M/F_6

PQ13

*2N7002K_300MA

2200P/50V_4X

2N7002K_300MA

VIN

+3V

PR88
1M/F_6

+5V

PR82
22_8

+1.5V

PR83
22_8

+15V

PR81
22_8

PR84
499K/F_6

C3A

MAIND

PQ15
PR87
1M/F_6

{8,13,33,39} MAINON

{8,37,38}

MAINON_ON_G

2
PC64
*2200P/50V_4X

PQ14

PR85
100K_4

PQ17

PQ16

PQ18

DTC144EUBTL_30MA

2N7002K_300MA
2N7002K_300MA

C3A

2N7002K_300MA

2N7002K_300MA

D3B
{8,14} MAINON_ON_G

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Rev
1A

+1.8V (G966A)/Discharge
Date:
5

HTTP://FAQP.RU/

Monday, January 24, 2011

Sheet
1

42

of

46

OCP:12.1A

AO6402A
P.37

S5D enable
+5V_S5 (peak 1A, Avg 0.7A)

AO6402A
P.37

+5V

(peak 3.5A,

AO6402A
P.37

+3V

(peak 6A,

+5VPCU
AC/DC Insert enable
(Peak 8.421A , AVG 5.895A)

PM6686TR
P.37

AC

DC

System
Charger
ISL88731C
P.36

OCP:12.1A

+3VPCU
AC/DC Insert enable

MAIND enable
Avg 2.4A)

MAIND enable
Avg 4.2A)

(Peak 9.073A, AVG 6.351A)

AO6402A
P.37
+SMDDR_VTERM
SUSON enable

G9661-25ADJ
P.42

RT8207LGQW
P.38

+3V_S5

+1.8V

S5D enable
(peak 0.35A,

Avg 0.25A)

MAINON enable
(peak 1.45A,

Avg 1A)

+SMDDR_VREF
SUSON enable
OCP:18.47A

AO6402A
P.38

+1.5VSUS
SUSON enable

MAIND enable
+1.5V

(peak 0.16A,

Avg 0.11A)

(Peak 9.061A, AVG 6.342A)

OCP:20.104A

RT8202AGQW

+1.05V,+VTT
GFX_MAINON enable

P.39

(Peak 24.390A , AVG 17.073A)

OCP 20A

+VAXG
VRON enable

RT8152CGQW
P.40

(Peak 33A , AVG 23A)

OCP 58.5~60A

ISL62882HRTZ
P.41

VCC_CORE
VRON enable
(Peak 58A,AVG 48A)

Discharge
P.42

Quanta Computer Inc.


PROJECT : TE4
Size

Document Number

Date:

Thursday, January 20, 2011

Rev
1A

POWER TREE TABLE


5

HTTP://FAQP.RU/

Sheet
1

44

of

46

TE4

MODEL

Model

REV
2A

TE4 MB
D

CHANGE LIST
PAGE
PAGE
PAGE
PAGE
PAGE

14: R22 no stuff


15: R23 no stuff
27: add R470
28: add Q1100/R1015 and no stuff
32: add Q40

PAGE

FROM

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A

To

DOC NO. 204

PROJECT MODEL :

TE4

PART NUMBER:

APPROVED BY:

Kent Su

DATE:

DRAWING BY:

Kent Su

REVISON:

Quanta Computer Inc.

2010/11/12
1A

PROJECT : TE4
Size

HTTP://FAQP.RU/

Rev
1A

Block Diagram
Date:

Document Number
Thursday, December 02, 2010
1

Sheet

45

of

46

TE2

MODEL

Model

TE4 MB

REV
1A

CHANGE LIST
PAGE 38: PC212 change value and FP to 0.1U/25V_6X ; add PD9 (10.10.06)
PAGE 35: add PC71 and PC76 for EMI Sol. (10.10.06)
PAGE 36: add PD12 , PR142 and PR139 (10.10.06)
Rename
PAGE 36: PR169 , PR171, PR165 , PU10 , PR101 change Value ; PR173 , PR102 , PR96 no stuff ; PR175 stuff (10.10.20)
PAGE 37: PC133 change Value and FP (10.10.20)
PAGE 38: PU9 , PQ41 , PQ43 change Value (10.10.20)
PAGE 35: add PC158 and PC99 for EMI sol. (10.11.5)
PAGE 35: add PU11 (10.11.5)
PAGE 36: delete PJP5 , PJP6 (10.11.5)
PAGE 36: change PL8 , PL9 , PR35 Value (10.11.5)
PAGE 37: delete PJP4 , PC135 stuff , PR42 change Value (10.11.5)
PAGE 38: PU9 change Value (10.11.5)

PAGE

FROM

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A

To

PROJECT MODEL :

DOC NO. 204

TE2

PART NUMBER:

APPROVED BY:

Mosy Li
Mosy Li

DRAWING BY:

DATE:

Quanta Computer Inc.

2009/11/13
1A

REVISON:

PROJECT : TE4
Size

Document Number

Rev

GPU
Date:

Thursday, December 02, 2010

1A
Sheet

46

of

46

HTTP://FAQP.RU/

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