SRM20256Li0; CMOS 256K-BIT STATIC RAM DESCRIPTION ‘The SRM20256Lions is a 32,768 words x 8 bits asynchronous, static, random access memory fabricated using an advanced CMOS technology. Its very low standby power requirement makes itideal for applications requiring ‘non-volatile storage with back-up batteries. The asynchronous and static nature of the memory requires no ‘external clock or refresh circuit. Input and output ports are TTL compatible and the throe-state output allows easy ‘expansion of memory capacity. TFEATURES (Fast acc086 tens RMAO2SEL:® 10008 (Mas) ‘SRM20256Li2 120ns (Max) Low supply CUTENt sn nsnnn aNGBY | BHA (THB) Operation: 13mA/1MHz (Typ) © completly static No clock required @ Single power supply . BV £ 10% @ Trecompatble mips and outputs stato ouput Baton bac peraton @ Package .......ceve se sss SRM20256LCron2 28-pin DIP(plastic) SAMZO256LMns 26-in SOP (plate) SAMBO2EELStere 26-pn Shik DIP (pas) SAMZO256Li0n0 28-pin TSOP (plastic) ELOCK DIAGRAM lmPIn CONFIGURATION ro : [ a a a a |B sz] tn cat ae 4 ge i ee g Roe woe Q | oR tLe ne | & Hf . | alien — | a ce | Sra ve a & out se J TTT 01 108 Va Power Sup (OV) AQ‘SRM20256L 10/12 Solcingferperatre and tire Pa range Suny vot =0.51070 input voltage =0.8" 107.0 Input/Output won =US" toVoo= 0.3 Power dissipation 10 = Operating temperature | TI o%0 70 Storage temperature : 68 0 150 260°C, 10s (Lead only) *V, ViiMin)= =10V when pulse width fs loss or equal fo Sone ELECTRICAL CHARACTERISTICS @DC Electrical Characteristics IDC RECOMMENDED OPERATING CONDITIONS (Wss=0v, Te Parameter ]_ Symbol Conditions, Min Typ. Max | oo aaa as Supply voltage [veo : ae Input voltage _==vamenlen oa 3s oot : =o | 0 08 Vatia)= = 10 when pulbe wih is Toso eal 0 Sore (Woo = $V 10%, Vss=0V, Ta=0 to 70°0) ‘SRMZO256..Cws | SRMZO256LC Paranater symbol Cones | SRMEDEEE Ee | SRMIREOEE| yay Topat leakage. Loo T= [=| 1 [a Ios Ts}se, = [1s'ae] ma Stunde supply eurent_ | 8 2 fio! = 2 oo | an na —Bievenan = 2 fe a of ak . CL Tet en wim) — [a m| ma wrag peng cet | | Worometoe=Min | | Weave | = ee Z a Wox0mA tyemtas | ~ | '3 | fod eee es Operating spn caren | tooo Weve | | as as | 65) ma ere | Highleveoutputvetage | Von | (aah Vv Law weit valogs | Va iaetima 1 v ‘= Typical values are measured at T @ Terminal Capacitance 25 and Veo=50V Par ‘Symbol_| Conditions, ‘Min Typ. TAdaress Capacitance Coo a0 input Capacitance 1 1/0 Capacitance EG = ‘®AC Electrical Characteristics Read Cycle (Voo = 5V+ 10%, Vss=0V, Ta=0 to 70°C) SRMA25ELC | SAMAOSEL Ca Paraeter Symbol Conditions RMDOPSEL Cie [SRMADISEL Cn, ig Read ovale tne Tee 100] — ed 7 ‘Address access time | tace =| 10 | =| i20 real GS access time thes =i aia ‘BE access time [er 0 es TS output set time | it 10 [=p ns GS output floating = ss | - 7 @ ns ‘GE output set time oe = ne ‘CE output floating a As Output hold time 0 10 1 A22‘SRM20256L 10/12 Write Cycle (o0"5V1056, Vas=0¥, Ta=0t0 790) Parameter | Symbol Conditions SPIEL Cio SROADZSHE Cia] Wie ele Te ro Tod a [ Chip select time | tow oo | — | # [| — | ns cess vad ood ofwte | Law ‘o> | ns Address setup time cme “1 o fo | = ns Wate pulse wath tw B= [| =e ‘Address hoid time we ot ot = ns | Input date set time tow ~ | 0 | — | ms Input data hold time | tow o = [0 “ns Wire to Output Hosting tw | a = [=o fs Chit Acie tomentwis_| tow ee “1 Test Conditions 4 Canute C008 v0 a Zoe = 1000 ease +2. Test Conditions wot=t0e ute ing vtererce lovee 1 200rW ine ev! stlaces rm state ouUtvaage lee) 5 Caption C=ter CxS nls Capacitance) ene caa ee = on . sia OWrite Cycle (2\ (WE Control) 1. During read cycle time, WE is to be “H” level See eee Butter is in high impedance state, whether OE level is HT or 3. During write cycle time that is contolled by WE, Output BButfer is in high impedance state it OF is "H” level. A23‘SRM20256L 10/12 Ly MIDATA RETENTION CHARACTERISTIC WITH LOW VOLTAGE POWER SUPPLY (Vss=0V, Ta=0 to 700) Parameter ‘Symbol Conditions Min Typ. ‘Max Unit Data retention supply voltage Voor [20 5.5 v Data retention current | looe | Voo=8V.CS=Vooe-0.V/ — [| 1 ae Cho select cata old time | toe To = i Operation recovery time | te [tao = = [ts ‘ttrc= Read cycle time. ~ Data retention timing (FUNCTIONS etruth Table cs [oe we ite A] BATAVO Wade ie H = = | Standby Ibas. !bost t x pe Stable Write L t | uc H | Stable | ~ Read L eceemted H Stable Output disable @Read Mode ‘The Data appear when the address is setted while holding CS="L", OE ="L" and WE ="H Data 1/0 terminals are in high impedance state, that makes circuit design and bus control easy, @Write Mode ‘There are the following 3 ways of writing data into memory. (1) Hold CS="L" and WE="L", set address. (2) Hold CS="L" then set address and give "L” pulse to WE. (9) After setting addresses, give "L” pulse to both CS and WE. In above any case data on the DATA 1/0 terminals are latched up into the SRM20256Li0 12 when CS or WE is in positive-going. Since DATA 1/O terminals are high impedance when CS or OE ="H", bus contention between data driver and memory outputs can be avoided. @Standby Mode When GS is “H" the SRM20256L.01% become in the stand-by mode, In this mode, data I/O terminals are Hi-Z, and all inputs of addresses, WE and data can be any “H” or “L". When GS is over than Voo-0.2V, the ‘SRM20256L0 12 is in the data retention battery back-up mode, in this case, there is a small current in the ‘SRM20256L:0"2 which flow through the high resistances of the memory cells, AdIEPACKAGE DIMENSIONS (e238) arp “ 528 +1 Represents SAWZ0256L More that has the same el +2 Represents SRMZ02561 Sue that has the same el ‘SRM20256L10/12 2801 OP, 28pin SOP 28-pin Shrink OIF A25SRM20256L10/12 an IIPACKAGE DIMENSIONS { 28-pin TSOP. nae finonanajonnnnd TOOUCONONOCOTT + A26SRM20256L10/12 monanacrenssTis CURVES 7 Normale toate nated to voo | i i | | os — ' | : ea | : | | 1 | ott rh | | Amana apap gf i t = | | ! | og 1 | | een ope A27