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Iu Iu
RNS RNS
Iur
RNC RNC
Duplication avoidance
GC Nt DC
RRC controle
L3
controle
controle
Radio
controle
controle
Bearers
PDCP L2/PDCP
PDCP
BMC L2/BMC
MAC L2/MAC
Canais de Transporte
PHY L1
Chips after
Data bit spreading
OVSF Scrambling
code code
SF = 1 SF = 2 SF = 4
chips.
Conjunto 0 Secondary
scrambling code 1
Códigos de
Conjunto 1 ……
scrambling
……
para canais
Secondary
físicos de scrambling code 15
…
downlink
Primary
scrambling code
Conjunto 511 511×16
……
Primary
scrambling code 0
Grupo 0 Primary
scrambling code 1
Códigos de
scrambling Grupo 1 ……
……
primários
para canais Primary scrambling
físicos de … code 7
downlink
Primary
scrambling code
Grupo 63 8*63
……
Primary
scrambling code
63*8+7
512 códigos de 64 grupos de códigos Cada grupo consiste de 8
scrambling primários de scrambling códigos de scrambling
primários
Canal Físico
38400 chips
P-CCPCH-Primary
P-CCPCH-Primary common
common control
control physical
physical channel
channel
SCH- Synchronisation Channel
SCH- Synchronisation Channel
Paging channels
S-CCPCH-Secondary
S-CCPCH-Secondary common
common control
control physical
physical channel
channel
PICH-paging
PICH-paging Indicator
Indicator Channel
Channel
DPCCH-dedicated
DPCCH-dedicated physical
physical control
control channel
channel
High speed downlink share channels
HS-SCCH-High
HS-SCCH-High speed
speed share
share control
control channel
channel
HS-PDSCH-High
HS-PDSCH-High speed
speed physical
physical downlink
downlink share
share channel
channel
HS-DPCCH-High
HS-DPCCH-High speed
speed dedicated
dedicated physical
physical control
control channel
channel
Primary ac p ac p ac p
SCH
Secondary acsi,14
SCH ac si,0 ac si,1
256 chips
2560 chips
Quadro de rádio (10 ms radio frame)
S-SCH 16 6 11
Grupo 2
256 chips
Slot 7, 8, 9
2560 chips
1 radio frame: Tr = 10 ms
256 chips
PCCPCH Data
SCH
18 bits
1 radio frame: Tf = 10 ms
1 radio frame: T f = 10 ms
4096 chips
10 ms (one radio frame)
5120 chips
Access slot #1
Random Access Transmission
Access slot #8
Random Access Transmission
Data
Dados N data bits
Pilot TFCI
Controle
N Pilot bits NTFCI bits
k bits (k=0..3)
Tslot = 2560 chips, 10*2
AS #14 AS #0 AS #1 AS #i AS #14 AS #0
20 ms
Data
DPDCH
N databits
D a ta
N d ata 1 b its
k
T slot = 2 56 0 ch ip s, M *1 0 *2 b its (k= 4 )
S lot # 0 S lo t# 1 S lo t # 2
1 s u b fra m e : T f = 2 m s
D a ta
N d a t a 1 b it s
T s l o t = 2 5 6 0 c h ip s , 4 0 b it s
S lo t # 0 S lo t # 1 S lo t # 2
1 s u b f r a m e : Tf = 2 m s
T s lo t = 2 5 6 0 c h ip s 2×T s lo t = 5 1 2 0 c h ip s
H A R Q -A C K CQI
O n e H S -D P C C H s u b fra m e (2 m s )
O n e ra d io fra m e T f = 10 ms
[ 0、8、12、16、24 (opcional)
l Utilização da codificação
data
data
data
0、8、16 or 24bits
data CRC data CRC data CRC
512-Ktail , Conventional code
data
CBL CRCdata
d CRC
CBL a t a data
CBLCRC Size Z=
5120-Ktail ,Turbo code
CedBL Rate
Coded
matched
CedBL data
data CedBL Channel Coding
or
Rate matched data DTX
or
Data after 11stst interleaved
Databefore interleaving
Number of Rado frame:1、2、4 or 8
Radio frame Radio frame Radio frame
TrCH-1 CCTrCHTrCH-ITrCH-I
TrCH-1TrCH-2
TrCH-2 DTX
10ms
data1 TPC TFCI data2 pilot data1 TPC TFCI data2 pilot data1 TPC TFCI data2 pilot
CRC
Ta il b it a tta c h m e n t 81 12 103 60
Ta il Ta il Ta il
C o n v o lu tio n a l 93 8 103 8 60 8
c o d in g R = 1 /3 , 1 /2
1 st in te rle a v in g 3 0 3 + N RM 1 3 3 3 + N RM 2 1 3 6 + N RM 3
R a d io fra m e 3 0 3 + N RM 1 3 3 3 + N RM 2 1 3 6 + N RM 3
se g m e n ta tio n
#1a #1b #2a #2b #3a #3b N R F1 = (3 0 3 + N R M 1 )/2
N R F1 N R F1 N RF2 N RF2 N R F3 N R F3
N R F2 = (3 3 3 + N R M 2 )/2
N R F3 = (1 3 6 + N R M 3 )/2
To T rC h M u ltip le x in g
C R C
148 1 6 b its
T rB k c o n c a tin a tio n B T r B k s (B = 0 ,1 )
164*B
T a il b it a tta c h m e n t
T a il
C o n v o lu tio n a l 164*B 8*B
c o d in g R = 1 /3
R a te m a tc h in g 516*B
I n s e r tio n o f D T X (5 1 6 + N RM )* B
in d ic a tio n *
st (5 1 6 + N R M )* B + N D I
1 in te rle a v in g
R a d io fra m e (5 1 6 + N RM )* B + N D I
s e g m e n ta tio n
#1 #2 #3 #4
[ (1 2 9 + N R M )* B + N D I] / [ (1 2 9 + N R M )* B + N D I] / [ (1 2 9 + N R M )* B + N D I] / [ (1 2 9 + N R M )* B + N D I] /
4 4 4 4
T o T r C h M u ltip le x in g
#1a #2a #1b #2b #1c #2c #1a #2a #1b #2b #1c #2c #1 #2 #3 #4
TrCH
multiplexing
#1a #1b #1c #1 #2a #2b #2c #2 #1a #1b #1c #3 #2a #2b #2c #4
2nd interleaving
c d,1 β d
DPDCH 1
c d,3 β d
Σ
DPDCH 3 I
c d,5 β d
DPDCH 5
S long,n or S short,n
I+jQ
c d,2 β d
DPDCH 2
c d,4 β d
DPDCH 4
β
Σ
c Q
d,6 d
90o
DPDCH 6
c c β
Até 6 DPDCH
c
DPCCH
para um usuário
Parte de dados da cd βd
mensagem PRACH
Sr-msg,n
I
I+jQ
Parte de controle da
mensagem PRACH cc βc j
I
Sdl,n
Dados dos
S
canais
físicos → C ch,SF,m
I+jQ
Exceto
s
SCH P Q
G1
Diferentes canais físicos
Σ
vindos do ponto s
P-SCH
Σ
GP
Gn
S-SCH
GS
cos(ωt)
Split
Re{S} Pulse
Seqüência de shaping
valor complexo real &
após imag
espalhamento parts Im{S} Pulse
shaping
-sin(ωt)
cos(ωt)
Re{S} Pulse
Seqüência Split
shaping
de valor real &
complexo imag
após parts Im{S} Pulse
espalhamento shaping
-sin(ωt)
Primary
SCH
Secondary
SCH
Any CPICH
τ CCPCH,k
S- k:th S -CCPCH
τ PICH
τ DPCH,n
n:th DPCH
10 ms
Send a preamble
No AI
N
Report the physical status to MAC
Set physical status to be Nack
on AICH received
END
b0 b1 b2 b3 Antena 1
b0 b1 b2 b3
-b 2 b 3 b 0 -b 1 Antena 2
Bits do canal
ac p (Tx OFF)
acp ac p
Antena 1
i,0 i,2 i,14
ac s (Tx OFF)
acs acs
Antena 2
(Tx OFF) acsi,1 (Tx OFF) (Tx OFF)