DVD BACK PANEL BOARD

DVD-FRONT PANEL

DVD SMPS 002

STANDBY voltages still carry power durin

g Standby Mode

VCC-STANDBY

VCC3-STANDBY
J11

SPDIF
SPDIF_IN

BPPIO0
BPPIO1
BPPIO2
BPPIO3
SCL
SDA

BPPIO0
BPPIO1
BPPIO2
BPPIO3
SCL
SDA

-12V

VIDFILTR
RED

RED

RED

GREEN

GREEN

GREEN

BLUE

BLUE

BLUE

CHROMA

CHROMA

LUMA

LUMA

CVBS

CVBS

RED_OUT

RED_OUT
GREEN_OUT
BLUE_OUT

GREEN_OUT
BLUE_OUT

CHROMA CHROMA_OUT CHROMA_OUT

LUMA_OUT
LUMA
LUMA_OUT
CVBS_OUT
CVBS
CVBS_OUT

J12

+5V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

{Value}
FFC20

FFC20
VCC-PCM
C90
U13

4
R145
75R

C145
47pF

2
3
1

MCLK
SCLK
LRCLK
SDATA
CS4334

R59

SCLK
LRCLK
SDATA0
SDATA1
SDATA2

SCLK
LRCLK
SDATA0
SDATA1
SDATA2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

VA

PCMCLK

PCMCLK

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

AGND

SPDIF

#BPRESET

+12V

AOUTL

AOUTR

10uF
16V

562R
R60 1%
100K
1%

C91
JP11
1500pF

C92
R61

#BPRESET

Reserv ed for SPDIF input

10uF
16V

562R
R62 1%
100K
1%

C93
1500pF

STI5505 - Back Panel Connectors

CVBS
1
2
LEFT
3
4
RIGHT
5
6
HEADER 6

MA[0..11]

MA[0..11]

ADR[1..20]

MD[0..15]

DATA[0..15]

MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15

106
107
108
109
112
113
114
115

#RESET 29
26
27
28

JP3
JUMPER
TDO

PARA_REQ
PARA_SYNC
PARA_STR
TP15
PARA_DATA0
PARA_DATA1
PARA_DATA2
PARA_DATA3
PARA_DATA4
PARA_DATA5
PARA_DATA6
PARA_DATA7

TCK
TDI
R27
56R
TMS
#TRST

188
186
189
187
190

PARA_REQ
PARA_SYNC
PARA_STR
PARA_DVALID

16
15
17
33

R28
R29
R30
R31
R32
R33
R34
R35

220R
220R
220R
220R
220R
220R
220R
220R

20
22
36
37
38
39
30
31

PARA_DATA[0..7]
PARA_DATA[0..7]

32
TP16

40
42
41

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

141
142
143
144
145
146
147
148

151
152
153
154
155
156
157
158

DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
RESET
PWM0/OSLINK_SEL
PWM1/BOOTFROMROM
PWM2

CVBS_OUT

TCK
TDI
TDO
TMS
TRST

YUV0/PIO4_0
YUV1/PIO4_1
YUV2/PIO4_2
YUV3/PIO4_3
YUV4/PIO4_4
YUV5/PIO4_5
YUV6/PIO4_6
YUV7/PIO1_3

PARA_REQ/PIO0_3
PARA_SYNC/PIO0_0
PARA_STR/PIO0_4
PARA_DVALID
PARA_DATA0/PIO0_5
PARA_DATA1/PIO0_7
PARA_DATA2/B_DATA
PARA_DATA3/B_BCLK
PARA_DATA4/B_FLAG
PARA_DATA5/B_SYNC
PARA_DATA6/SDAV_CLK
PARA_DATA7/SDAV_DATA
SDAV_VALID
NRSS_CLK/B_WCLK
NRSS_IN/B_V4
NRSS_OUT

R7
10K

R8
10K

TP1

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14
ADR15
ADR16
ADR17
ADR18
ADR19
ADR20
ADR21

48

53
60
VDDA3
VDDA3

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VCC3

137
PPCCLK
R10
33R
134
DMAXFER 138
R11
10K
PPC_MODE 135
CS 136 #READY
READY
124
33R
CE1 125 R127
CE2 126
33R
CE3 133 R128
R129
33R
R/W 123
33R
OE 121 R130
R131
33R
BE0 122
BE1
127 R132
33R
RAS0 128
33R
RAS1 129 R133
33R
CAS0 132 R134
R135
33R
CAS1
23
IR
IRQ0 25
INT
IRQ1
47 R202
33R SPDIF
SPDIF
45 R19
33R AUDCLK
PCM_CLK
43 R203
33R SCLK
SCLK 46 R204
33R LRCLK
LRCLK 44 R205
33R SDATA0
PCM_OUT0 24 R206
33R SDATA1
PCM_OUT1 21 R207
33R SDATA2
PIO0_6/PCM_OUT2
118 PIXCLK
PIXCLK _27Mhz
51
HSYNC 52
TP13
ODD/EVEN 117
TP14
OSD_ACTIVE
57
RED
R_OUT 56
GREEN
G_OUT 55
BLUE
B_OUT
62
LUMA
Y_OUT 63
CHROMA
C_OUT

PIO2_3
PIO2_4
PIO1_5/TXD1
PIO1_6/RXD1
PIO2_5
PIO2_7
PIO1_7/TXD3
PIO4_7/RXD3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

10K

10K
10K

92
93
94
97
98
99
100
101

VSSA_PCM

10K

R22
R23

R21

HEADER20
Shrouded

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7

VSSA
VSSA

1
3
5
7
9
11
13
15
17
19

R20

2
4
6
8
10
12
14
16
18
20

I_REF DAC YC

J3

V_REF DAC YC

TRIGIN
TRIGOUT

I_REF DAC RGB

10K
10K
10K
10K
10K
10K
10K

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11

V_REF DAC RG
B

R12
R13
R14
R15
R16
R17
R18

78
79
80
81
69
70
71
72
73
74
82
83

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11

MEMCLKOUT
MEMCLKIN

VREF_PCM

VCC3

76
104

PIO3_0
PIO3_1
PIO3_2
PIO3_3
PIO3_4
PIO3_5
PIO3_6
PIO3_7

SDCLK

SDCLK

SDCS0
SDCS1
SDRAS
SDCAS
SDWE
DQML
DQMU

PIO1_4

#SDCS0 84
#SDCS1 85
#SDRAS 88
#SDCAS 89
#SDWE 90
91
DQML
DQMU 105

#SDCS0
#SDCS1
#SDRAS
#SDCAS
#SDWE
DQML
DQMU

VDDA3_PC
M

U1

PIO2_0

LMOS TC4S81F
R9
NS

1
18
34
67
75
86
95
102
110
119
130
139
149
159
171
184
208

VCC3-PCM

ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14
ADR15
ADR16
ADR17
ADR18
ADR19
ADR20

VCC3

161
162
163
164
165
166
167
168
169
170
173
174
175
176
177
178
179
180
181
182
183

#JTAG_RESET
U3
1
4
2

#POWERON_RESET

ADR[1..20]

DATA[0..15]
VCC3-DENC

VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3

MD[0..15]

PIO1_2/SCL
PIO1_0/SDA
AUXCLK

64

#READY
#CE1

#CE1

#CE3
R/W
#OE
#BE0

#CE3
R/W
#OE
#WE

#RAS0
#RAS1
#CAS0
#CAS1

#RAS0
#RAS1
#CAS0
#CAS1
IR
INT
SPDIF
AUDCLK
SCLK
LRCLK
SDATA0
SDATA1
SDATA2
PIXCLK

RED
GREEN
BLUE
LUMA
CHROMA

CVBS

191
192
193
194
195
196
197
198

CVBS
FP_DATA
FP_CLK
FP_STB

R24
10K

R25
10K

R26
75R

TP17
TP7
TP8
TP9
TP10

5
6
11
12

OPEN
#SENSE
CLOSE
#PUSH

7
8
13
14

RTS
CTS
TXD
RXD

10
9

SCL
SDA
R168

116

PPCCLK

C86
47pF

OPEN
#SENSE
CLOSE
#PUSH
RTS
CTS
TXD
RXD
SCL
SDA

NS

TP11
BPPIO0
BPPIO1
BPPIO2
BPPIO3
SR0
FS0
FS1
#FERESET

#BPRESET

R40

4
19
35
68
77
87
96
103
111
120
131
140
150
160
172
185
200

50

54
61

66

65

59

58

49

201
202
203
204
205
206
207
2

#RESET

199

VCC
STi5505
#RESET

1
2
3

R41

R42
10K
C87
330pF

#SOFT_RESET
SR0
FS0
FS1

C88
.0033uF

R38
R39

4K7
4K7

18K7 1% 11K5 1%

BPPIO0
BPPIO1
BPPIO2
BPPIO3

U2
6
A0 SCL 5
A1 SDA
A2

Defa ult configuration

PARA_DVALID R147

WC
I2C-EEPROM
256x8
I2C Address: 0xA0

(Write), 0xA1(Read)

10K

#FERESET

R43
R44

0R0
NS

#BPRESET

R49
R50

0R0
NS

R45
10K

PARA_DATA6

R148
10K

PARA_DATA7

R149
10K

STI5505 - Core Logic

MD[0..15]
MA[0..11]

MD[0..15]
MA[0..11]
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11

#SDCS1

17
16
15
18
14
36

#SDCS1

VCC3

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
#SDRAS
#SDCAS
#SDWE
#SDCS0
DQML
DQMU
SDCLK

21
22
23
24
27
28
29
30
31
32
20
19

35
34

21
22
23
24
27
28
29
30
31
32
20
19
17
16
15
18
14
36

#SDRAS
#SDCAS
#SDWE
#SDCS0
DQML
DQMU
SDCLK
VCC3
R63
75R

R64
75R

R65
75R

R66
75R

R67
75R

R68
75R

R69
75R

R70
75R

C96
47pF

C97
47pF

C98
47pF

C99
47pF

C100
47pF

C101
47pF

C102
47pF

C103
47pF

35
34

U8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
RAS
CAS
WE
CS
LDQM
UDQM

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

2
3
5
6
8
9
11
12

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7

39
40
42
43
45
46
48
49

MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15

2
3
5
6
8
9
11
12

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7

39
40
42
43
45
46
48
49

MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15

CLK
CKE
SDRAM 1MX16
-7
3.3V
U9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
RAS
CAS
WE
CS
LDQM
UDQM

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

CLK
CKE
SDRAM 1MX16
-7
3.3V

Note:
- place RC terminati
on close to U8 & U9
- route SDCLK as
short as possible
- 125MHz SD RAMs are required

STI5505 - Decoder / OSD Memory

Onl y used, if external

PLL is not used
VCC
SEE HARDWARE MANUAL FOR UDIO
A
DAC SUPPORT
SHOWN: 96kHz W/ C rystal CS4334 DAC

OSC1
1
4

NC

VCC

GND
CLK
NS-27MHz

8
5

VCC
VCC3

U12
18

SR0
FS0
FS1

1
19
20
5

Y1
27MHz

MCK0

XT2
SCKO1

C105

33pF

2
9

XT1
MODE
NC

R77
0R0

SCKO2
GND

33pF

MCK0

SCKO3

SCKO4
PLL1700

10

R72

11

33R

PIXCLK

PIXCLK

VCC3
12

R73

14

256fs

17

384fs

13

768fs

R197
R198

R199
R200

0R0

U29

NS
0R0

8
1
6
3
4

NS
NS

15

C104

ML/SR0
MD/FS0
MC/FS1

GND
GNDP
LL

SR0
FS0
FS1

RESET

4
7

#BPRESET

#BRESET

3
VDD 8
VDD
PLL
16
VDD3

R71
NS

VCC
7
IN1 OUT1 2
IN2 OUT2 5
IN3 OUT3
GND

R74 NS

AUDCLK (5505)

PCMCLK

PCMCLK (DAC)

R75 NS

TC7W34FU
R201

AUDCLK

NS

Optional for 96kHz A

udio DAC support

7
6

D
CLK
PR
CL

2
1

GNDVCC

VCC3
U30
Q
Q

R76

0R0

TC7W74FU

STI5505 - External PLL

Firmware Flash ROM (2n

d part is optional)

DATA[0..15]
ADR[1..20]

ADR[1..20]

37

VCC-FLASH

h part without U10

R151

#CE3
0R0
#ROMCEL

#CEL

26
28
11

U6
A0
DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
A9
DQ8
A10
DQ9
A11
DQ10
A12
DQ11
A13
DQ12
A14
DQ13
A15
DQ14
A16
DQ15/A-1
A17
A18/NC
BYTE
A19/NC
VPP
CE
#WP
OE
RP
WE
RB
VCC

25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
16
9

VSS
VSS

Option for one Flas

ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14
ADR15
ADR16
ADR17
ADR18
ADR19
ADR20

29
31
33
35
38
40
42
44

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

30
32
34
36
39
41
43
45

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
R175

47
13
14
12
15

0R0
R176
#RESET

0R0

37

27
46

29F800 Micron

#CEH
#OE
#WE

26
28
11

U7
A0
DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
A9
DQ8
A10
DQ9
A11
DQ10
A12
DQ11
A13
DQ12
A14
DQ13
A15
DQ14
A16
DQ15/A-1
A17
A18/NC
BYTE
A19/NC
VPP
CE
#WP
OE
RP
WE
RB
VCC

25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
16
9

VSS
VSS

#ROMCEH
#OE
#WE

ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14
ADR15
ADR16
ADR17
ADR18
ADR19
ADR20

29
31
33
35
38
40
42
44

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

30
32
34
36
39
41
43
45

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
R177

47
13
14
12
15

NS
R178
#RESET

NS

27
46

NS

#RESET

STI5505 - FLASH ROM Memory

INSTALL W HEN EPLD NOT USED

R208
0R0

VCC
DATA[0..15]

J4
NS

#CE1
#CE3
R/W
#OE

4
6
1
3

#READY

#READY

23

INT

INT

25

2
7
65
PARA_REQ
PARA_SYNC 63
64
PARA_STR

PARA_REQ
PARA_SYNC
PARA_STR
R54
75R

C89
47pF

PARA_DATA0
PARA_DATA1
PARA_DATA2
PARA_DATA3
PARA_DATA4
PARA_DATA5
PARA_DATA6
PARA_DATA7

61
60
59
58
56
55
54
53

#RESET

1
2
3
4
5
6

48
TCK 83
TDO 45
TDI 47
TMS
76
DA0 74
DA1 72
DA2

#CS0ATAPI
#CS1ATAPI

READY

ATAPI Interface Controlle

for STI5505 REV

INT

r
1

NC/SCL
NC/SDA
PARA_REQ
PARA_SYNC
PARA_STR
PARA_DATA0
PARA_DATA1
PARA_DATA2
PARA_DATA3
PARA_DATA4
PARA_DATA5
PARA_DATA6
PARA_DATA7

R52
NS-10K

TCK
TDO
TDI
TMS

R153
NS-1K

70
71

68
#IOW 67
#IOR
77
DMARQ 66
#DMACK
14
IORDY 13
#IOCS16
20
FPINT 18
FEINT
16
#ROMCEL 17
#ROMCEH
15
ROMSIZE

DA0
DA1
DA2
#FERESET

#CS0ATAPI
#CS1ATAPI

37
38

#IOW
#IOR

23
25

DMAREQ
#DMAACK

21
29

IORDY
#IOCS16

27
32
34

#FPINT

31

#ROMCEL
#ROMCEH
R155
NS-5K6

R157
NS-100R
R158
C149 NS-10K
NS-100pF

39
28
2
19
22
24

J5
35
RESET HA0 33
HA1 36
CS0
HA2
CS1
17
HD0 15
IOW
HD1 13
IOR
HD2 11
HD3 9
DMARQ HD4 7
DMACK HD5 5
HD6 3
IOCHRDY
HD7
HIO16
4
PDIAG HD8 6
HD9 8
INTRQ HD10 10
HD11 12
DASP HD12 14
HD13 16
CSEL HD14 18
HD15
GND
GND
GND
GND

20

90
91
92
93
94
95
96
97
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

21
31
44
62
69
75
84
100

78
79
81
82
85
86
87
89

R165
NS-10K

R154
NS-1K

NS - XC9572XL-10

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7

R53
NS

VCC

CLK
#CE1
#CE3
R/W
#OE

VCC

R51
NS

VCC

5
26
38
51
57
88
98

36
35
33
32
30
29
28
27

VCC

#FPINT
FEINT

VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3

22

#CE1
#CE3
R/W
#OE

VCC3

GND
GND
GND
GND
GND
GND
GND
GND

PPCCLK

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

99

ADR1
ADR2
ADR3
ADR19
ADR20

DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

#FERESET

52
50
49
42
41
40
39
37

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

PPCCLK

8
9
10
11
12

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7

#FERESET

ADR1
ADR2
ADR3
ADR19
ADR20

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

U10

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

ADR[1..20]

ADR[1..20]

DA0
DA1
DA2
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

40
GND 30
GND 26
GND
NS
Shrouded

KEY

DATA[0..15]

#ROMCEL
#ROMCEH
PARA_DATA[0..7]

DD[0..15]

PARA_DATA[0..7]

VCC3
#CE1
R/W
#OE
#READY

TP3
R55

R56

NS

NS-0R0

TP4
TP5
TP6

STI5505 - Front End Interface for ATAPI

ATAPI & GLUE

ADR[1..20]

ADR[1..20]

ADR[1..20]

DATA[0..15]

DATA[0..15]

DATA[0..15]

#FERESET

#FERESET

#CE1
#CE3
R/W
#OE

#READY

#READY

#ROMCEL
#ROMCEH

#READY

INT

INT

PARA_DATA[0..7]

PARA_DATA[0..7]

PARA_REQ
PARA_SYNC
PARA_STR

PARA_REQ
PARA_SYNC
PARA_STR

PPCCLK

#CE1
#CE3
R/W
#OE

#CE1
#CE3
R/W
#OE

PARA_REQ
PARA_SYNC
PARA_STR

#FERESET

PPCCLK

PPCCLK

PARA_DATA[0..7]

#FPINT
FEINT

#ROMCEL
#ROMCEH

#ROMCEL
#ROMCEH

FEINT

INT
{Value}
TVM501

#FERESET

#FERESET

SCL
SDA

SCL
SDA

SCL
SDA

OPEN
CLOSE
#SENSE
#PUSH

OPEN
CLOSE
#SENSE
#PUSH

DATA
BCLK
FLAG
SYNC

B_DATA
B_BCLK
B_FLAG
B_SYNC

PARA_DATA2
PARA_DATA3
PARA_DATA4
PARA_DATA5

OPEN
CLOSE
#SENSE
#PUSH
FEINT

FEINT

{Value}
VCC
U19
1

C1+

VCC

C150

C151

C152

.1uF

.1uF

.1uF

3
4

C1C2+

15
GND 2
V+

C153
.1uF
TXD
RTS
RXD
CTS

DB9 PINOUT
(FEMALE)

16

TXD : 2
RXD : 3
CTS : 7
RTS : 8
GND : 5

C154
5

11
10
12
9

C2-

V-

14
TIN1 TOUT1 7
TIN2 TOUT2
13
ROUT1 RIN1 8
ROUT2 RIN2
MAX232

.1uF
J9
TXD_B
RTS_B
RXD_B
CTS_B

1
2
3
4
5
6
7
8
9
10
HEADER 5X2

STI5505 - Front End Options

VCC

#FRESET
BCLK
FLAG

#FERESET
BCLK
FLAG

FEINT

FEINT

VCC

L4
22uH
C107
47uF
16V

SCL
SDA

SCL
SDA

+12V VCC3

J7
1
2
3
4
5
6
7
8
9
10
PICOFLEX10

J6
1
2
3
4
5
6
7
8
9
10
11
12
PICOFLEX12

SYNC
DATA

SYNC
DATA

+8V

C108
.1uF

C109
10pF
L5
22uH

J8
in1 , in2, out1, out2
pin5,
pin6, pin2, pin10
0, 0, 0, 0 (brake)
0, 1, 0, 1 (open)
1, 0, 1, 0 (close)
1, 1, 0, 0 (idle)
* Tray motor must be in
idl e state for push
sense to operate

1
2
LOCKHEADER2
.1"
C111
.1uF

U11
10
9
8
7

close

R79
15R
1/4W

open

C110
.01uF

OPEN
CLOSE

OPEN

CLOSE

5
4

+8V

3
2
1
CLOSE
R89
1K

Q4
2N2222

D2
6V8

D1
B120DI

OUT2
P2
VCC1
VCC2
IN2
IN1
V2
P1
OUT1
GND
LB1641

C112
100uF
16V

+12V

VCC

R82
1K

R84
1K

C114
.1uF
8

R83
12K
1%

3
2

R90
10K
R80
10K
1%

R88
1K
5

OPEN COLLECTOR

R86

0R0

U15A
LM393

#SENSE
R87

0R0
#PUSH

U15B
LM393
7

OPEN COLLECTOR

R159
10K

7V

C113
.1uF

D3
1N4148

STI5505 - Front End TVM501/502 Interface

CONNECT TSOP18XX
VCC-STANDBY
JP14
JUMPER3

VCC-STANDBY
J13
IR
FP_DATA
FP_CLK
FP_STB

IR
FP_DATA
FP_CLK
FP_STB

1
2
3
4
5
6
HEADER6

STI5505 - Front Panel Connector

+12V

VCC3-STANDBY

+12V

-12V

VCC3
Q1-2

NDS8934
2

IN STALL R160, R161

TO BYPASS FET
POWER SWITCH

VI

R160

R161

NS

NS

ANALOG 5V

U17/1
DPAK
TOP
2

VI

TO-220
TOP

+5V

VO

NS-7805
TO-220

NDS8934
3
4

ANALOG +5V

U17/2

INSTALL TO-220
PACKAGE IF +5VA
CURRENT DRAW IS
OVER 150mA

VO

GND

VCC-STANDBY

J1

GND

VCC
Q1-1
2

C147
.1uF

SMT78M05
DPAK

VCC-STANDBY

C80

C81

10uF
16V

.1uF

C70

C71

C72

C73

C76

C77

C84

.1"
Keyed

.1uF

220uF
6V

.1uF

100uF
16V

.1uF

NS

123

VI

1 - VIN
2 - GND
3 - VOUT

8
220uF
6V

U18 TMM DRIVE SUPPLY +8V

+12V
13

C85
NS

C148
.1uF

R152
10K

U8
SDRAM

U4
DRAM

U9
SDRAM

U10
EPLD

C74

C75

10uF
16V

.1uF

SMT78M08

R164

DGND
U1
STi5505

VO

GND

JP1
JUMPER

U12
PLL

AGND

0R0
DIGITAL

VCC3

VCC3
C1

VCC3
C10

.1uF
C2
18
.1uF
C3

13

U5
DRAM

.1uF
C5

.1uF
C14

.1uF
C49
26

.1uF
C57

MOUNTING HOLES
MT1
MT2
MT3
MT4
MT5
MT6

8
.1uF
C50

.1uF
C58

.1uF
C51

10uF
ELCO
16V

38

13
.1uF
C44
25

51

VCC3
38

.1uF
C45

.1uF
C52

C28
.1uF
C6

.1uF
C15

.1uF
C16

171

86
.1uF
C7

.1uF
C29

184

95
.1uF
C8

.1uF
C17

.1uF
C9

44

44

110
10uF
ELCO
16V

10uF
ELCO
16V

10uF
ELCO
16V

VCC

R5

C64

NS

10uF
ELCO
16V

RESET

VCC RESET
GND
PFI

NC
PFO

#POWERON_RESET

7
6
5

R4
100K

ADM707
U2
I2C
EEPROM

.1uF
C34

MR

C24

.1uF

R6

JUMPER

14

37
VCC3

U14/1
1

.1uF

U13
PCM-DAC

VCC

+5V

VDD

VCC3

VDD3

VCC-PCM
L3

VCC

C21
.1uF

.1uF

R3
10K

VCC

VCC3

37

22uH

CONNECT TO
EXTERNAL
JP10
SWITCH

14

C32
0R0

C33

22uH

10uF
ELCO
16V
U3
TC4S81F

.1uF

C22
22uF
ELCO
16V

C63

OSC1
Oscillator

VCC-FLASH

C20
22uF
ELCO
16V

L2

10uF
ELCO
16V

GNDRST

NS-TC1270

.1uF
C55

U6, U7 & U16

Flash ROM

L1

VCC3-DENC

.1uF
C54
98

VCC3-PCM

C19
.1uF

.1uF
C60

MR VCC

88
.1uF
C47

25
.1uF
C31

.1uF
C53

VCC
.1uF

.1uF
C18

.1uF

.1uF
C46

.1uF
C30

208

102

.1uF
C40

VCC

PROBE GND
CONNECTIONS
TP18
TP19
TP20
TP21

C59
16

57

38

OPTIONAL POR CHIP

U14/2

VCC3
.1uF
C39

159

75

C56
3

.1uF
C43

.1uF
C38
25

C48

.1uF
C42

.1uF
C37

ANALOG

VCC

.1uF

149

67

C41

.1uF
C36

.1uF
C27

.1uF
C13

VCC3

25

139

C35

.1uF
C26
6

.1uF
C12

.1uF
C4

VCC3

.1uF
C11
130

34

C25
1

119

VCC3

C23
22uH

8
.1uF

C61
.1uF

C62
10uF
ELCO
16V

GND

VSS

GNDA

VSSA

STI5505 - Power Supply & Decoupling

DRAM 64/128MBit (2nd

DATA[0..15]
ADR[1..13]

part is optional)

DRAM 16MBit

DATA[0..15]
ADR[1..13]
U4/1

U4/2

#RAS0
#CAS0
#CAS1
R/W
#OE

#RAS0
#CAS0
#CAS1
R/W
#OE

ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10
ADR11
ADR12
ADR13

19
20
21
22
23
24
27
28
29
30
31
32
33

#RAS0
#CAS0
#CAS1
R/W
#OE

14
38
37
13
36

ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10
ADR11
ADR12
ADR13

19
20
21
22
23
24
27
28
29
30
31
32
33

#RAS1
#CAS0
#CAS1
R/W
#OE

14
38
37
13
36

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12/NC
RAS
CASL
CASH
WE
OE
DRAM
4Mx16 60ns
3.3V

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10

21
22
23
24
27
28
29
30
31
32

2
3
4
5
7
8
9
10

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

41
42
43
44
46
47
48
49

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

#RAS0
#CAS0
#CAS1
R/W
#OE

18
35
34
17
33

2
3
4
5
7
8
9
10

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

21
22
23
24
27
28
29
30
31
32

41
42
43
44
46
47
48
49

ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

#RAS1
#CAS0
#CAS1
R/W
#OE

18
35
34
17
33

U5/2

#RAS1

Overlap footprints
of /1 and /2 parts

#RAS1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12/NC
RAS
CASL
CASH
WE
OE
DRAM
4Mx16 60ns
3.3V

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
RAS
CASL
CASH
WE
OE
DRAM
1Mx16 60ns
3.3V

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

2
3
4
5
7
8
9
10

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

41
42
43
44
46
47
48
49

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

2
3
4
5
7
8
9
10

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

41
42
43
44
46
47
48
49

DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

U5/1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
RAS
CASL
CASH
WE
OE
DRAM
1Mx16 60ns
3.3V

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

DRAM SUPPORT FOR 2x16M,

2x64M, OR 2x128M

STI5505 - System Memory (ST20)

INSTALL 'NS' RESISTOR S WITH 0R0 JUMPERS

TO BYPASS VIDEO BUFFER CIRCUITRY

NS

R169

NS

R170

NS

+5V

C115
.0033uF
R94
825R
1%

R91
8R2
1%

C116
.1uF

C117
.0033uF
R95
825R
1%

R97
12R
1%

C121
RED

100uF
ELCO
16V
R100
200R
1%

R92
8R2
1%

C119
.0033uF
R96
825R
1%

L6
100uF
ELCO
16V
R103
200R
1%

2.7uH
R101
2K2
1%

R102
75R
1%

C124

C125

390pF

390pF

100uF
ELCO
16V
R106
200R
1%

2.7uH
R104
2K2
1%

R105
75R
1%

NS

R109
8R2
1%

C126

C127

390pF

390pF

C131
.1uF

R110
8R2
1%

C129

390pF

390pF

R174

C133
.1uF

C134
.0033uF
R114
825R
1%

CHROMA_OUT
C139

C140

390pF

390pF

R111
8R2
1%

C135
.1uF

R117
12R
1%

C138

L9
100uF
ELCO
16V
R121
200R
1%

BLUE_OUT

C128

+5V

R116
12R
1%
Q10
2N2907

LUMA

2.7uH
R120
75R
1%

R108
75R
1%

NS

C137

R119
2K2
1%

2.7uH
R107
2K2
1%

R173

C132
.0033uF
R113
825R
1%

C136
Q9
2N2907

L8

+5V

R115
12R
1%

C120
.1uF

R99
12R
1%
Q8
2N2907

L7
GREEN_OUT

R172

C130
.0033uF
R112
825R
1%

R93
8R2
1%

C123
BLUE

+5V

100uF
ELCO
16V
R118
200R
1%

C118
.1uF

R98
12R
1%
Q7
2N2907

GREEN
RED_OUT

NS

CHROMA

+5V

C122
Q6
2N2907

R171

+5V

L10
LUMA_OUT
2.7uH

R122
2K2
1%

R123
75R
1%

Q11
2N2907

CVBS

C141

C142

390pF

390pF

100uF
ELCO
16V
R124
200R
1%

L11

CVBS_OUT

2.7uH
R125
2K2
1%

R126
75R
1%

C143

C144

390pF

390pF

STI5505 - Video Filters

DECMEM

STi5505
MA[0..11]
MD[0..15]
SDCLK

MA[0..11]
MD[0..15]

ADR[1..20]

MD[0..15]

DATA[0..15]

SDCLK

#SDCS0
#SDCS1

#SDCS0
#SDCS1

#SDRAS
#SDCAS

#SDRAS
#SDCAS

#SDWE
DQML
DQMU

SYSMEM

MA[0..11]

ADR[1..20]
DATA[0..15]

#RAS0
#RAS1
#CAS0
#CAS1

ADR[1..13]
DATA[0..15]
#RAS0
#RAS1
#CAS0
#CAS1

R/W
#OE
#WE

R/W
#OE

#SDWE
DQML
DQMU

FLASHROM
ADR[1..20]
DATA[0..15]

FRONTPANEL
#CE3

IR
FP_DATA
FP_CLK
FP_STB

IR

#CE3
#OE
#WE

#RESET

#ROMCEL
#ROMCEH

#RESET

FP_DATA
FP_CLK
FP_STB

BACKPANEL
#BPRESET
SPDIF

#BPRESET
SPDIF

PCMCLK
SCLK
LRCLK
SDATA0
SDATA1
SDATA2

SCLK
LRCLK
SDATA0
SDATA1
SDATA2

FRONTEND & GLUE

ADR[1..20]
DATA[0..15]
PPCCLK

PPCCLK

#CE1

RED
GREEN
BLUE
CHROMA
LUMA
CVBS
BPPIO0
BPPIO1
BPPIO2
BPPIO3
SCL
SDA

RED
GREEN
BLUE
CHROMA
LUMA

#READY
PARA_DATA[0..7]
PARA_REQ
PARA_SYNC
PARA_STR

BPPIO0
BPPIO1
BPPIO2
BPPIO3
SCL
SDA

EXTPLL

#FERESET
INT
OPEN
CLOSE
#SENSE
#PUSH

#BPRESET
I2C Add.:
I2C EEPROM 0xA0
TVM501 0x30
...

#ROMCEL
#ROMCEH

#READY
PARA_DATA[0..7]

PARA_DATA[0..7]
PARA_REQ
PARA_SYNC
PARA_STR

CVBS

RTS
CTS
TXD
RXD

SR0
FS0
FS1

#CE1
#CE3
R/W
#OE

#FERESET
INT
OPEN
CLOSE
#SENSE
#PUSH
RTS
CTS
TXD
RXD
SCL
SDA

SR0
FS0
FS1
POWER

PCMCLK
PIXCLK
AUDCLK

PIXCLK
AUDCLK

#POWERON_RESET

#POWERON_RESET

STI5505 - Overview of Decoder Board