5

D[0..7]
A[0..7]

0x0000-0x7FFF
Monitor Program

D0
D1
D2
D3
D4
D5
D6
D7
ALE

2
3
4
5
6
7
8
9

1D
2D
3D
4D
5D
6D
7D
8D

11
1

LE
OE

20

1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q

A0
A1
A2
A3
A4
A5
A6
A7

19
18
17
16
15
14
13
12

U2

A0
A1
A2
A3
A4
A5
A6
A7

U4
D

A8
A9
A10
A11
A12
A13
A14

VCC
ROM_CE
/RD

74HC573

J1

D[0..7]

A[0..7]

+5V
+5V

10
9
8
7
6
5
4
3
25
24
21
23
2
26
27

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14

20
22
1

CE
OE
VPP

O0
O1
O2
O3
O4
O5
O6
O7

11
12
13
15
16
17
18
19

0x8000-0xFFFF 32kB
SRAM, NVRAM
D0
D1
D2
D3
D4
D5
D6
D7

U3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
RAM_CE
/RD
/WR

10
9
8
7
6
5
4
3
25
24
21
23
2
26
1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14

20
22
27

CE
OE
WE

27C256

D0
D1
D2
D3
D4
D5
D6
D7

11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

JP1

D0
D1
D2
D3
D4
D5
D6
D7
/RD
/WR
IO/M
SID
ALE
SOD
S0
S1
CLKOUT
READY
RESET_OUT

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

A0
A1
A2
A3
A4
A5
A6
A7

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

U7

C2

D1
R1
100k

1N4148

47pF
TRAP
RST5.5
RST6.5
RST7.5

KIA7045

RESET

INTR
R2
1k

C3
1uF

3
2
1

OUT
GND
VCC
U25

X2
SID
TRAP

9
8
7

RST 5.5
RST 6.5
RST 7.5

10

INTR

INTA

11

INTA

29

S0

S1

33

+5V
READY
R3
+5V

5
6

S0

HOLD

+5V

X1

4MHz
Q1
SID

S1

RST-IN

S1

39

HOLD

35

READY

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A8
A9
A10
A11
A12
A13
A14
A15

12
13
14
15
16
17
18
19
21
22
23
24
25
26
27
28

ALE
WR
RD
IO/M
RST-OT
CLKO
SOD
HLDA

30
31
32
34
3
37
4
38

A8
A9
A10
A11
A12
A13
A14

1
11

I
I
I
I
I
I
I
I

I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q

D4
D5
D6
D7

+5V

CLK

CLR

3
4
5
6
10
11
12
13

1
3
2

LED
D3

R9 330

LED
D5

TRAP

74LS164

R21
4.7k

R11

U9E
10

11

12
13
14
15
16
17
18
19

LED
D6

330

4
6

SYSTEM_PPI
GPIO
CTC
USER_PPI
UART
LCD_E

+5V
VCC
VCC
VSS

SW1

RESET_OUT
CLKOUT

reset
CLKOUT

SOD
HLDA

+5V

*RST5.5

8
7
6
5

*RST6.5

RST6.5

RST7.5

INTR

74LS04
U9C
5
R7
330

4001

74LS04
U9D

1
*INTR

D4
LED

U6D
+5V

+5V

9
NO
2

RST5.5

2
74LS04
U9B

SW DIP-4/SM

74LS04

12

R10

11
4.7k

*RST7.5

4001
U9F
13

Title

12

8085 Microprocesssor Training Kit

74LS04
Size
B

74LS04

Date:
5

1
4
10
13

4001

1
2
3
4

LED

TRACE

1OE
2OE
3OE
4OE
74LS126

13
GPIO_LED4

2
5
9
12

U6B

RAM_CE
ROM_CE

PS2273
GPIO_LED3

U9A

GPIO_LED1

GPIO_LED2

2
4
6
8
10
12
14
16

10

R8 330

1A
2A
3A
4A

I/CLK
I/OE

WR
RD

NC
+5V

1Y
2Y
3Y
4Y

ALE

SW2
QA
QB
QC
QD
QE
QF
QG
QH

3
6
8
11

R4
4.7k

D2

+
+
+
+
+
+
+
+

CLK
CLR

U6C
R6 330

+
+
+
+
+
+
+
+

GAL16V8D

U10

ALE

/RD
/WR

+5V

SID
A
B

D4

1
GPIO_LED1 3
5
GPIO_LED2 7
9
GPIO_LED3 11
13
GPIO_LED4 15

U5

/RD

1
2

13

2
3
7
6
10
11
15
14

A15

4.7k
R15
4.7k

A15

2
3
4
5
6
7
8
9

IO/M

MSM80C85A

R5
4.7k

D3

D3

U6A

GPIO

S0
S1
A4
A5
A6
A7

D0
D1
D2
D3
D4
D5
D6
D7

12

Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4

74LS175

HOLD
HLDA

U8
36

D2

D2

RESET_IN

memory & i/o decoder

47pF C1

D1

9
1

4001

RESET_IN

D1

*RST5.5
*RST6.5
*RST7.5
*INTR
INTA

/WR

+5V

D0

HEADER 20X2

HM62256B
A[8..14]

+5V

U1

Document Number
<Doc>
Saturday, July 30, 2005

Rev
2
Sheet
1

of

U11
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1
19

1G
2G

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

18
16
14
12
9
7
5
3

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9

+5V
VCC

R-PACK

7
6
4
2
1
9
10
5

U17

VSS

a
b
c
d
e
f
g
dp

7
6
4
2
1
9
10
5

U16

a
b
c
d
e
f
g
dp

7
6
4
2
1
9
10
5

U15

a
b
c
d
e
f
g
dp

U14

7
6
4
2
1
9
10
5

U13

a
b
c
d
e
f
g
dp

a
b
c
d
e
f
g
dp

U12
A[0..7]

7
6
4
2
1
9
10
5

VCC

74LS244

a
b
c
d
e
f
g
dp

2
4
6
8
11
13
15
17

7
6
4
2
1
9
10
5

PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7

R12

com1
com2
TOS-5161AE
3
8

TOS-5161AE
3
8

TOS-5161AE
3
8

TOS-5161AE

com1
com2

com1
com2

com1
com2
TOS-5161AE

3
8

3
8

TOS-5161AE

3
8

com1
com2

com1
com2

COMMON CATHODE 6-DIGIT

7-SEGMENT LED

A0
A1
A2
A3
A4
A5
A6
A7
U18

15
14
13
12

A
B
C
D

1
SPEAKER

Q2
BC327

2
3

PC0
PC1
PC2
PC3

1
2
3
4
5
6
7
9
10
11

0
1
2
3
4
5
6
7
8
9

R13
100

74LS145

SU1

SYSTEM_PPI
SW29

0x10-0x13
8255

A1
A0

6
35
8
9
36
5

CS
RESET
A1
A0
WR
RD

D7
D6
D5
D4
D3
D2
D1
D0

27
28
29
30
31
32
33
34

D7
D6
D5
D4
D3
D2
D1
D0
U19

reset
WR
RD

SPEAKER
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0

25
24
23
22
21
20
19
18

PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0

10
11
12
13
17
16
15
14

PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0

37
38
39
40
1
2
3
4

PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0

SW PUSHBUTTON
SPEAKER

TRACE

SW3
SW4

SW5

SW6

SW7

SW9

SW10

SW11

SW12

SW13

SW14

SW15

SW8
PC5
PC4
PC3
PC2
PC1
PC0

user_key1

PA6

PA7

user_key2

SW16

PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0

+5V

+5V
R14

SW17

SW18

PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7

SW19
SW20

SW21

SW22

SW23

2
3
4
5
6
7
8
9

C
4.7k

SW24

D[0..7]
SW25

SW26

SW27

SW28

Title

8085 Microprocessor Training Kit

Size
B
Date:
5

Document Number
<Doc>
Saturday, July 30, 2005

Rev
2
Sheet
1

of

0x40-0x47

D[0..7]
+5V

CLKOUT

UART

0x20-0x23
D

8
7
6
5
4
3
2
1

D0
D1
D2
D3
D4
D5
D6
D7

22
23
19
20

A0
A1

A[0..7]

D0
D1
D2
D3
D4
D5
D6
D7

U21

D0
D1
D2
D3
D4
D5
D6
D7
RD
WR

RD
WR
A0
A1

21

CTC

A0
A1
A2
A3
A4
A5
A6
A7

CLK0
G0
OUT0

9
11
10

CLK1
G1
OUT1

15
14
13

CLK2
G2
OUT2

18
16
17

*RST7.5

1
2
3
4
5
6
7
8
TxD

+5V

CS
8254

R17
4.7k

counter/timer

RTS

R18
4.7k

D0
D1
D2
D3
D4
D5
D6
D7

11

SDO

34
31

OUT1
OUT2

23
24
29
30
32
33

DDIS
TXRDY
RXRDY
INTRPT
RTS
DTR

9
15

RCLK
BAUDOUT

User PPI

U20
SDI

10

WR1
WR2
RD1
RD2
ADS
MR
CTS
DSR
DCD
RI

18
19
21
22
25
35
36
37
38
39

XIN
XOUT

16
17

A0
A1
A2

28
27
26

CS0
CS1
CS2

12
13
14

RxD
D

WR
RD
reset
DCD

2MHz
A0
A1
A2
+5V

+5V

TL16C550A

0x30-0x33

A0
A1

reset
USER_PPI

34
33
32
31
30
29
28
27

D0
D1
D2
D3
D4
D5
D6
D7

PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7

4
3
2
1
40
39
38
37

USER_PA0
USER_PA1
USER_PA2
USER_PA3
USER_PA4
USER_PA5
USER_PA6
USER_PA7

5
36
9
8
35
6

RD
WR
A0
A1
RESET
CS

PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7

18
19
20
21
22
23
24
25

PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7

14
15
16
17
13
12
11
10

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

8255
+5V

VCC

UART
VSS
+5V
JP2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

JR1

text LCD

USER_PA0
USER_PA1
USER_PA2
USER_PA3
USER_PA4
USER_PA5
USER_PA6
USER_PA7

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

SW30
1
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

CONN RECT 16

2
3

D7
D6
D5
D4
D3
D2
D1
D0

0x50-0x53
backlight

+5V

HEADER 20X2
1

LCD_E

C7
+

R19
10K

U23

VB1

C8

V+

V-

C+
C1C2+
C2-

1
3
4
5

10uF
+

5
9
4
8
3
7
2
6
1

10uF

10uF 10V
C6

LCD_E
A1
A0

R/W
RS

U22

D0
D1
D2
D3
D4
D5
D6
D7
RD
WR

VCC

C9

10uF
14
7
13
8

T1IN
T2IN
R1OUT
R2OUT

T1OUT
T2OUT
R1IN
R2IN

11
10
12
9

TxD
RTS

RxD
DCD

SUB-D 9, (male) use straight cable

Title

MAX232A

8085 Microprocessor Training Kit

RS232 level converter

Size
B
Date:

Document Number
<Doc>
Saturday, July 30, 2005

Rev
2
Sheet
1

of

J5
1
2
3
D7

R20

CON3
2k

POWER LED (red)

+5V
TP1

U24
LM2490-5.0
3

1
C13
C14
0.1uF

C15
0.1uF

C16
0.1uF

C17
0.1uF

+
C10

VIN

C18
0.1uF

J6

D8
1

1
2

1N4007

+
C19
0.1uF

DC Input

C11
1000uF25V

TP2

VOUT

10uF 16V

C12
0.1uF

GND

+5V

GND

0.1uF

+5V
C

+5V
VCC
C20
0.1uF

C21
0.1uF

C22
0.1uF

C23
0.1uF
VCC
VSS

+5V

C24
10uF

C25
10uF

C26
10uF

C27
10uF

Title

8085 Microprocessor Training Kit

Size
B
Date:
5

Document Number
<Doc>
Saturday, July 30, 2005

Rev
Sheet
1

of