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5 4 3 2 1

MIPI_ RFFES
1*32bit,933MHz
eMCP
Dsc
SDC1*8bite,eMMC 5.1 Lpddr3+eMMC

Main ANT

RX

WTR2965
LCD IF
Display+CTP( INCELL)
FEM TX 4L-MIPI
RF IQ 1920*1080 TFT/NT35596
SAW I2C-2/CTP
25*16/FT5436

l
RXD ANT
4L-MIPI CSI0
Rear CAM
CLK0/I2C0
RXD RF IQ Deph CAM
RxD FEM IMX258

WTR2965 MIPI_ RFFES


4L-MIPI_ CSI1 Deph CAM

ia
CLK1/I2C1 Deph CAM
IMX258
Connectivity ANT
4L-MIPI_ CSI2 Front CAM
SAW LNA

G N SS
CLK2/I2C1 L219F70

2.4G
IMX219
SAW
TRIPLEXER CONN IQ GPIO
5.8G Front Flash/Sink

WCN3680
C

MSM8953
48MHZ CONN ctrl
Crystal
C
I2C-4 ALS/PS

nt
FM TMD27253

DTV A+G
SW SAW SAW LNA
DTV EN/RST
14nm/8*A53 /2.3GHZ 6DS3

FC8300 SPI
19.2M Crystal E-Compass

Adreno 506 GPU


AK09915C
ANT

SPI-7 Finger Print


FPC2050
PS SAR SENSOR
EPL8802
I2C-8
14*14mm FCBGA

e
SPI_ 1

857P/0.4mm NFC CLK2

NQ210
Headset I2C_ 5
5V/0.5A
HPH_ R LDOS VPH_ PWR
23*LDO s
DC/DC
SPK PA
SPK

id
I2C_ 8
87319 Audio

SW P
VPH_ PWR Speech Bucks
Receiver
Bucks*7

MIC1

Three choose two


SPMI SIM1 SIM1 B
MIC3 hot-plug

B SIM2
SIM2
CLK Ctrl hot-plug
RTC
nf 19.2MHZ PM8953 CLK
MSDC2 4-bit micro SD
Crystal hot-plug

VPH_ PWR

JTAG
PMI8952 Debug
UART2
WLED SINK*4
port
Backlight Wled Driver PWR ON
1A*2
Flash Flash Driver
Co
ERM/LRA INT
VIB VIB Driver

SPMI

Battery Fuel guage

USB 2.0
Charger Charger
SMB1350
BC1.2+QC2.0

VBUS
micro USB USB 2.0

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 01_BLOCK_DIAGRAM SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 1 OF 30


5 4 3 2 1
5 4 3 2 1

Note: Asterisks (*) indicate modem power management (MPM) wake-up pins
U232-C
VREG_L5_1P8 VREG_L5_1P8

U232-D

R138
R137

NF
MSM8953

NF
APPS_BOOT_FROM_ROM FOR DEVELOPMENT
CONTROL
BB10 H46 FORCE_USB_BOOT [16] NF
[26,27] NFC_SPI_ESE_MOSI GPIO_0 * GPIO_37 MSM8953 APPS_BOOT_ROM [2]
BE9 M6
[26,27] NFC_SPI_ESE_MISO GPIO_1 * * GPIO_38 DTV_EINT [26] CONTROL R139
CDC_PDM_RX2 [11]
BF12 N7 AG47 BE25

l
[26] DTV_SPI1_CS_N GPIO_2 GPIO_39 MCAM0_PWD_N [14] GPIO_74 GPIO_108 GRFC8_ SEL [23]
*
BF8 R1 BT_SSBI[24] BG9 BG25
[26,27] NFC_SPI_ESE_CLK GPIO_3 GPIO_40 GPIO40_FLASH_1W [14] GPIO_75 GPIO_109 GRFC9_SEL [22]
R140 1K BA43 T6 WL_CMD_DATA_2 [24] BA13 BB24
[16] UART_MSM_TX GPIO_4 GPIO_41 MCAM1_PWD_N [14] GPIO_76 GPIO_110 GRFC10_SEL [22]
R141 1K BB44 AH42 WL_CMD_DATA_1 [24] BE11 BF24 GRFC11_SEL [22]
[16] UART_MSM_RX GPIO_5 * * GPIO_42 ACCEL_INT [15] GPIO_77 GPIO_111
BD46 AH44 WL_CMD_DATA_0 [24] BB12 BC23
GPIO_6 * GPIO_43 ALSP_INT_N [15] GPIO_78 GPIO_112 GRFC12_SEL [20]
BE45 AJ47 WL_CMD_SET [24] BB14 BG45
GPIO_7 * GPIO_44 MAG_INT_N [15] GPIO_79 GPIO_113 GRFC13_SEL [17]

ia
AU45 AJ45 WL_CMD_CLK [24] BC11 BE23
[26] GPIO8_DTV_EN GPIO_8 * GPIO_45 GYRO_ INT_ N [15] GPIO_80 GPIO_114 GRFC14_SEL
AT42 AK46 FM_SSBI [24] BG13 BB22 [19]
GPIO_9 * * GPIO_46 LCD_ID [14] GPIO_81
* GPIO_115
AV46 AJ43 SEN_SPI_CS2_N [15] FM_DATA [24] BE13 BA21 EXT_GPS_LNA_EN [24]
[2,15] TP_I2C_SDA GPIO_10 GPIO_47 GPIO_82 GPIO_116
AU43 AN47 BT_CTL [24] BD14 BD22 CH0_GSM_TX_PHASE_D0 [17]
[2,15] TP_I2C_SCL GPIO_11 * GPIO_48 FP_INT_N [15] GPIO_83 GPIO_117
AW45 AM46 BT_DATA [24] BF10 BF22 RFFE1_CLK [19,21,25]
[15] GPIO25_V3V3_EN GPIO_12 * GPIO_49 UIM_BATT_ALARM [9,11] GPIO_84 GPIO_118
AY46 AP46 KEY_VOL_UP_N [16] J45 BE21 RFFE1_DATA [19,21,25]
[14] FRONT_FLASH_EN GPIO_13 * GPIO_50 DCAM_AVDD_EN [14] GPIO_85
* GPIO_119
SAR_PS_INT [15]
BA47 GPIO_14 GPIO_51 AN43 K44 GPIO_86 GPIO_120 BG21
[2,15] SENSOR_I2C_SDA UIM1_DATA [16] RFFE2_CLK [23]
* C
AU41 GPIO_15 GPIO_52 AR45 J47 GPIO_87 GPIO_121 BF20
[2,15] SENSOR_I2C_SCL UIM1_CLK [16] RFFE2_DATA [23]
*
[27] NFC_DISABLE BB8 GPIO_16 GPIO_53 AN41 UIM1_RESET [16] I2S_1_MISO [13] E45 GPIO_88 GPIO_122 BB20 RFFE4_CLK [17]
BF6 AU47 [2,16] B46 BC19
[27] NFC_IRQ GPIO_17 * * GPIO_54 SIM1&TF_DET_N [14] CAM_ DOVDD_ EN GPIO_89 GPIO_123 RFFE4_DATA [17]
C
BE7 AP42 C45 BA19

nt
[2,27] NFC_I2C_SDA GPIO_18 GPIO_55 UIM2_DATA [16] GPIO_90 GPIO_124 RFFE5_CLK [18]
*
BA9 GPIO_19 GPIO_56 AT46 I2S_1_BCK [13] J41 GPIO_91 GPIO_125 AY18
[2,27] NFC_I2C_SCL UIM2_CLK [16] RFFE5_DATA [18]
ONLY reserved
*
M44 GPIO_20 GPIO_57 AR41 I2S_1_LRCK [13] H42 GPIO_92 GPIO_126 BE19
[15] SEN_SPI_MOSI UIM2_RESET [16] RFFE3_CLK [21]
L45 AT44 [2,16] I2S_1_MOSI [13] D46 BF18 VREG_L5_1P8
[15] SEN_SPI_MISO GPIO_21 * * GPIO_58 SIM1&TF_DET_N GPIO_93
* GPIO_127 RFFE3_DATA [21]
R542
[15] SEN_SPI_CS_N M46 GPIO_22 * GPIO_59 BD44 0
USB_ID [9,10,16] E47 GPIO_94 GPIO_128 BG5 RCAM_AVDD_EN [14]

R601
K46 * AY40 G43 BE5

27K
[15] SEN_SPI_CLK GPIO_23 GPIO_60 GP_PDM_A0 [10] GPIO_95 GPIO_129
BD2 * BF46 FP_SPI_MOSI [15] C47 * BC7 SCAM_PWD_N [14]
[14] LCD_TE0 GPIO_24 GPIO_61 LCD_RST_N [14] GPIO_96 GPIO_130
L140 10 AG41 BD6 FP_SPI_MISO [15]
G45 * T2
0 R602 NF R608
[13] SMART_PA_MCLK GPIO_25 * * GPIO_62 NFC_DWL_REQ [27] GPIO_97
* * GPIO_131
L137 CAM_MCLK0_0 R142 FP_SPI_CS [15] C620
[14] CAM_MCLK0
10 BD4 GPIO_26 * GPIO_63 BC25 NF APPS_BOOT_ROM [2] K42 GPIO_98 * GPIO_132 R3
AMP_INT [13]
0.1uF
L138 CAM_MCLK1_0 FP_SPI_CLK [15] VREG_L5_1P8
[14] CAM_MCLK1
10 BE1 GPIO_27 GPIO_64 AN45 TP_RST_N [15] Internal evaluation usage F46 GPIO_99 * GPIO_133 P6
SIM1&TF_DET_N[2,16]
L139 10 BC5 AL45 BE17 T4
[14] CAM_MCLK2 GPIO_28 * * GPIO_65 TP_INT_N [15] [21] MAIN_ANTENNA_DET
0
GPIO_100 GPIO_134

R612
e
BG3 G47 FP_HW_ID [15] BG17 BA45

10K
[2,14] CAM_I2C_SDA0 GPIO_29 GPIO_66 GPIO_101 GPIO_135 SPK_ I2C_ SCL [2,13,15]

BF2 AH46 R690 BF16 BC47


[2,14] CAM_I2C_SCL0 GPIO_30 * GPIO_67 CDC_PDM_RX0_COMP [11] [20] GRFC2_SEL GPIO_102 GPIO_136 SPK_ I2C_ SDA [2,13,15]
0 NF
[2,14] CAM_I2C_SDA1
BF4 GPIO_31 * GPIO_68 AF42
CDC_PDM_RX1_COMP [11] [20] GRFC3_SEL
BA17 GPIO_103 * GPIO_137 BB46
AUDIO_PA_RST [13]
R615 R613
C568
[2,14] CAM_I2C_SCL1 BE3 GPIO_32 GPIO_69 AG45 CDC_PDM_CLK [11] [23] GRFC4_ SEL
BC15 GPIO_104 * GPIO_138 AW41 FP_LDOEN_2V8 [15] 0.1uF

P2 GPIO_33 * GPIO_70 AE45 CDC_PDM_SYNC [11] BE15 GPIO_105 * GPIO_139 AV40


[20] GRFC5_SEL0
[10] FLASH_STROBE_NOW R7 GPIO_34 * * GPIO_71 AE43 CDC_PDM_TX [11] [16,28] WDOG_DISABLE
BF14 GPIO_106 * GPIO_140 BE47 FP_RST_N [15]

id
[14] FCAM-LDO-EN
N1 GPIO_35 * * GPIO_72 AE47 CDC_PDM_RX0 [11] [20] GRFC7_SEL
BA15 GPIO_107 * GPIO_141 BC45
NFC_ESE_PWR_REQ [27]
N3 AF46 CDC_PDM_RX1 [11]
[26] GPIO36_DTV_RST GPIO_36 * * GPIO_73
C630

C137

C138

C916

C914
C139

C915
18PF

18PF

18PF

18PF

18PF

18PF

18PF

B
nf
GPIO_37 FORCED_USB_BOOT BOOT_CONFIG[3:1] BOOT_CONFIG

GPIO_106 WDOG_DISABLE 0b000 SDC1 -> SDC2 -> USB2.0


Note: Ensure SW sets these GPIOs (Sensor, CTP and
I2C PULL-UP RESISTORS Camera I2C bus) to inout pull down when the peripherals GPIO_108 APPS_BOOT_FROM_ROM 0b001 SDC2 -> SDC1-> USB2.0

are powered off to eliminate leakage.


Co
0b010 SDC1-> USB2.0
SENSORS
Audio PA
CAMERAS
VREG_L6_1P8
CAMERAS VREG_L5_1P8
0b011 USB2.0
[2,14] CAM_DOVDD_1V8 [2,14] CAM_DOVDD_1V8
R146

R147

Default Boot Config (0b000) is SDC1(eMMC)

R145

2.2K
R144
R143

2.2K
2.2K

R148

R150
R149
2.2K

2.2K
2.2K
2.2K

SPK_ I2C_ SDA [2,13,15]


2.2K

SENSOR_I2C_SDA [2,15] CAM_I2C_SDA0 [2,14] CAM_I2C_SDA1 [2,14]


SENSOR_I2C_SCL [2,15] CAM_I2C_SCL0 [2,14] CAM_I2C_SCL1 [2,14]
SPK_ I2C_ SCL [2,13,15]

TOUCHSCREEN NFC SMB

VREG_L5_1P8
R153

R154

A VREG_L5_1P8
R151

R152

A
2.2K

2.2K
2.2K

NFC_I2C_SDA [2,27]
2.2K

TP_I2C_SDA [2,15]

TP_I2C_SCL [2,15] NFC_I2C_SCL [2,27]

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 02_MSM8953_GPIO SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 2 OF 30


5 4 3 2 1
5 4 3 2 1

U232-E

U232-N

Note: MSM8953
WCSS_XO MUST connect to GND if not use 5GHz WIFI
R100 MSM8953 CONTROL
TP100
CONTROL
CLK_OUT [24] 1M 5% BD10 C3 MIPI_CSI0_CLK_P [14] AH6 AY2 MIPI_DSI0_CLK_N [14]
WCSS_XO SDC1_RCLK SDC1_RCLK [6] MIPI_CSI0_CLK_P MIPI_DSI0_CLK_N
BBCLK1 [11] 33 MIPI_CSI0_CLK_N [14]
R43 C1 SDC1_CLK_1 R101 AJ5 AW1 MIPI_DSI0_CLK_P [14]

l
CXO SDC1_CLK SDC1_CLK [6] MIPI_CSI0_CLK_M MIPI_DSI0_CLK_P
T44 B2 MIPI_CSI0_LANE0_P [14] AK6 AV4 MIPI_DSI0_LANE0_N [14]
[11] MSM_BBCLK1_EN CXO_EN SDC1_CMD SDC1_CMD [6] MIPI_CSI0_LANE0_P MIPI_DSI0_LANE0_N
SLEEP_CLK [11] P46 E1 MIPI_CSI0_LANE0_N [14] AL5 AW3 MIPI_DSI0_LANE0_P [14]
SLEEP_CLK SDC1_DATA_0 SDC1_DATA_0 [6] MIPI_CSI0_LANE0_M MIPI_DSI0_LANE0_P
F2 MIPI_CSI0_LANE1_P [14] AG3 AW5 MIPI_DSI0_LANE1_N [14]
SDC1_DATA_1 SDC1_DATA_1 [6] REAR CAMERA MIPI_CSI0_LANE1_P MIPI_DSI0_LANE1_N
PM_PON_RESET_N [10,11] MIPI_CSI0_LANE1_N [14] DISPLAY
T46 RESIN_N SDC1_DATA_2 A3 AG1 MIPI_CSI0_LANE1_M MIPI_DSI0_LANE1_P AV6 MIPI_DSI0_LANE1_P [14]
SDC1_DATA_2 [6]
MSM_RESOUT_N [6,16,28] MIPI_CSI0_LANE2_P [14]
BA41 RESOUT_N SDC1_DATA_3 G5 SDC1_DATA_3 [6] AH2 MIPI_CSI0_LANE2_P MIPI_DSI0_LANE2_N BB2 MIPI_DSI0_LANE2_N [14]

ia
MIPI_CSI0_LANE2_N [14]
D2 AJ3 BA3 MIPI_DSI0_LANE2_P [14]
0.01uF

SDC1_DATA_4 SDC1_DATA_4 [6] MIPI_CSI0_LANE2_M MIPI_DSI0_LANE2_P


1
C100

L9 G1 MIPI_CSI0_LANE3_P [14] AK4 AY6 MIPI_DSI0_LANE3_N [14]


MODE_0 SDC1_DATA_5 SDC1_DATA_5 [6] MIPI_CSI0_LANE3_P MIPI_DSI0_LANE3_N
2

MIPI_CSI0_LANE3_N [14]
J9 MODE_1 SDC1_DATA_6 G3 SDC1_DATA_6 [6] AL3 MIPI_CSI0_LANE3_M MIPI_DSI0_LANE3_P BA5 MIPI_DSI0_LANE3_P [14]
MIPI_ CSI1_ CLK_ P [14]
SDC1_DATA_7 E3 AC5 MIPI_CSI1_CLK_P MIPI_DSI0_REXT AU1 MIPI_DSI0_REXT R157 Place R0801 close to MSM pin
SDC1_DATA_7 [6]
MSM_PS_HOLD [11,16,28] R45 MIPI_ CSI1_ CLK_ N [14] AD6 1.4K +/-1%
PS_HOLD MIPI_CSI1_CLK_M
SDC2_CLK_1 R102 33 MIPI_ CSI1_ LANE0_ P
SDC2_CLK J7 [14] AE5 MIPI_CSI1_LANE0_P MIPI_DSI1_CLK_N AR3
SDC2_SDCARD_CLK[16]
JTAG_RESOUT_N [16] MIPI_ CSI1_ LANE0_ N [14]
M4 SRST_N SDC2_CMD H6 AF6 MIPI_CSI1_LANE0_M MIPI_DSI1_CLK_P AP4
SDC2_SDCARD_CMD[16]
JTAG_TCK [16] MIPI_ CSI1_ LANE1_ P [14] C
L1 TCK SDC2_DATA_0 K4 AB4 MIPI_CSI1_LANE1_P MIPI_DSI1_LANE0_N AM2
SDC2_SDCARD_D0 [16] Depth CAMERA
JTAG_TDI[16] L3 J3 MIPI_ CSI1_ LANE1_ N [14] AC3 AN3
TDI SDC2_DATA_1 SDC2_SDCARD_D1 [16] MIPI_CSI1_LANE1_M MIPI_DSI1_LANE0_P DSI1 IO pin shoulde be float if don't use
JTAG_TDO [16] MIPI_ CSI1_ LANE2_ P [14]
L5 TDO SDC2_DATA_2 K6 AC1 MIPI_CSI1_LANE2_P MIPI_DSI1_LANE1_N AP6
SDC2_SDCARD_D2 [16]
C JTAG_TMS [16] MIPI_ CSI1_ LANE2_ N [14]
M2 H2 AD2 AN5

nt
TMS SDC2_DATA_3 SDC2_SDCARD_D3 [16] MIPI_CSI1_LANE2_M MIPI_DSI1_LANE1_P
JTAG_TRST_N [16] MIPI_ CSI1_ LANE3_ P [14]
K2 TRST_N AE3 MIPI_CSI1_LANE3_P MIPI_DSI1_LANE2_N AR1
MIPI_CSI1_LANE3_N [14]
USB2_HS_DM AB44 AF4 MIPI_CSI1_LANE3_M MIPI_DSI1_LANE2_P AT2
USB_DM [16]
90ohm Diff Imp routing for USB MIPI_CSI2_CLK_P [14]
USB2_HS_DP AC45 V6 MIPI_CSI2_CLK_P MIPI_DSI1_LANE3_N AR5
USB_DP [16]
VREF_LPDDR3 [6,11] MIPI_CSI2_CLK_N [14]
G27 VREF_EBI_CA W5 MIPI_CSI2_CLK_M MIPI_DSI1_LANE3_P AT6
R103 4.02K +/-1% MIPI_CSI2_LANE0_P [14]
AC47 USB_HS_REXT Place R0504 close to MSM pin Y6 AL1
0.1uF

USB2_HS_REXT MIPI_CSI2_LANE0_P MIPI_DSI1_REXT


C101

Internal evaluation usage: change to 200ohm 1% MIPI_CSI2_LANE0_N [14] AA5 MIPI_CSI2_LANE0_M


MIPI_CSI2_LANE1_P [14]
USB1_SS_RX_M AA47 FRONT CAMERA U3 MIPI_CSI2_LANE1_P
Y46 MIPI_CSI2_LANE1_N [14] V4
USB1_SS_RX_P MIPI_CSI2_LANE1_M
R41 DNC_70 USB1_SS_TX_M V46 MIPI_CSI2_LANE2_P [14] W3 MIPI_CSI2_LANE2_P
N41 DNC_71 USB1_SS_TX_P U47 MIPI_CSI2_LANE2_N [14] W1 MIPI_CSI2_LANE2_M

e
MIPI_CSI2_LANE3_P [14] Y2 MIPI_CSI2_LANE3_P
R104
L43 Y44 Place R0505 close to MSM pin MIPI_CSI2_LANE3_N [14] AA3
DNC_72 USB1_SS_REXT MIPI_CSI2_LANE3_M
M42 W43 100 1%
DNC_73 DNC_74

PMIC_SPMI_CLK N47
SPMI_CLK [10,11]
PMIC_SPMI_DATA N45 SPMI_DATA [10,11]
5.0pF/NC

id
5.0pF/NC
2
2
C102

CSI Pin Name CSI DPHY 4-lane CSI DPHY 2+1 Mode CSI CPHY 3Phase Mode
C103
1

CSI0_3PHASE_PIN0 CSI0_CLKP CSI0_2LANE_CLKP NC


CSI0_3PHASE_PIN1 CSI0_CLKN CSI0_2LANE_CLKN CSI0_TRI0_A B
CSI0_3PHASE_PIN2 CSI0_DP0 CSI0_2LANE_DP0 CSI0_TRI0_B
CSI0_3PHASE_PIN3 CSI0_DN0 CSI0_2LANE_DN0 CSI0_TRI0_C
B
CSI0_3PHASE_PIN4 CSI0_DP1 CSI0_2LANE_DP1 CSI0_TRI1_A
CSI0_3PHASE_PIN5 CSI0_DN1 CSI0_2LANE_DN1 CSI0_TRI1_B
CSI0_3PHASE_PIN6 CSI0_DP2 CSI0_1LANE_DP0 CSI0_TRI1_C
nf CSI0_3PHASE_PIN7 CSI0_DN2 CSI0_1LANE_DN0 CSI0_TRI2_A
CSI0_3PHASE_PIN8 CSI0_DP3 CSI0_1LANE_CLKP CSI0_TRI2_B
CSI0_DN3 NC
CSI0_3PHASE_PIN9 CSI0_1LANE_CLKN CSI0_TRI2_C
CSI1_CLKP CSI1_2LANE_CLKP
CSI1_3PHASE_PIN0 CSI1_CLKN CSI1_TRI0_A
CSI1_3PHASE_PIN1 CSI1_2LANE_CLKN
CSI1_DP0 CSI1_TRI0_B
CSI1_3PHASE_PIN2 CSI1_2LANE_DP0
CSI1_DN0 CSI1_2LANE_DN0 CSI1_TRI0_C
CSI1_3PHASE_PIN3
CSI1_DP1 CSI1_2LANE_DP1 CSI1_TRI1_A
CSI1_3PHASE_PIN4
CSI1_DN1 CSI1_2LANE_DN1 CSI1_TRI1_B
CSI1_3PHASE_PIN5
CSI1_DP2 CSI1_1LANE_DP0 CSI1_TRI1_C
CSI1_3PHASE_PIN6
Co
CSI1_DN2 CSI1_1LANE_DN0 CSI1_TRI2_A
CSI1_3PHASE_PIN7
CSI1_DP3 CSI1_1LANE_CLKP CSI1_TRI2_B
CSI1_3PHASE_PIN8 NC CSI1_TRI2_C
CSI1_DN3 CSI1_1LANE_CLKN
CSI1_3PHASE_PIN9 CSI2_2LANE_CLKP
CSI2_3PHASE_PIN0 CSI2_CLKP CSI2_TRI0_A
CSI2_CLKN CSI2_2LANE_CLKN
CSI2_3PHASE_PIN1 CSI2_2LANE_DP0 CSI2_TRI0_B
CSI2_3PHASE_PIN2 CSI2_DP0
CSI2_2LANE_DN0 CSI2_TRI0_C
CSI2_3PHASE_PIN3 CSI2_DN0
CSI2_2LANE_DP1 CSI2_TRI1_A
CSI2_3PHASE_PIN4 CSI2_DP1
CSI2_2LANE_DN1 CSI2_TRI1_B
CSI2_3PHASE_PIN5 CSI2_DN1
CSI2_1LANE_DP0 CSI2_TRI1_C
CSI2_3PHASE_PIN6 CSI2_DP2
CSI2_1LANE_DN0 CSI2_TRI2_A
CSI2_3PHASE_PIN7
4
CSI2_DN2 3
A CSI2_1LANE_CLKP CSI2_TRI2_B
CSI2_3PHASE_PIN8 CSI2_DP3
CSI2_1LANE_CLKN CSI2_TRI2_C
CSI2_3PHASE_PIN9 CSI2_DN3 A

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 03_MSM8953_CONTROL SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 3 OF 30


5 4 3 2 1
5 4 3 2 1

U232-F

U232-G

SG171 MSM8953
VREG_L6_1P8 [2,12,14,15]
[4,5,12]
VREG_S7_0P915
CONTROL

C171

l
(VDD_MX)
MSM8953
VREG_S7_0P915 [4,5,12]
AR27 L37

0.1uF
VDD_MEM_31 VDD_QFPROM_PRG [4,5,12]
VREG_S2_0P8625 CONTROL
C175

SG172 AA13 J17


C172

C173

C174

VDD_CORE_1 VDDPX_1_1
AA15 VDD_CORE_2 VDDPX_1_2 J19
1uF
22uF

1.0uF

AR29 N9 AA21 J21


22uF

VDD_MEM_32 VREF_PADS_1 VDD_PX_BIAS_MPP_1 [11] VDD_CORE_3 VDDPX_1_3

C176

C177

ia
VREF_PADS_2 AM40 AA23 VDD_CORE_4 VDDPX_1_4 J23
Cap depend on PDN simulation
VREG_S2_0P8625 [4,5,12] AB28 J27
VDD_CORE_5 VDDPX_1_5 VREG_S3_1P225 [4,5,6,12]

0.1uF

0.1uF
Cap depend on PDN simulation
AC27 VDD_CORE_6 VDDPX_1_6 J29 (VDD_PX1)
(LPDDR3)

C178

C179

C180

C181

C182

C183

C184
AA17 VDD_MEM_1 VDD_APC_1 AD28 AE13 VDD_CORE_7 VDDPX_1_7 J31 VREG_S3_1P225[4,5,6,12]
AA19 AD30 AE15 J33

C188
VDD_MEM_2 VDD_APC_2 VDD_CORE_8 VDDPX_1_8

C185

C186

C187

C189

C190

C191

C192
1uF
22uF

0.1uF

0.1uF

0.1uF
22uF

22uF
AA27 VDD_MEM_3 VDD_APC_3 AD32 AE21 VDD_CORE_9 VDDPX_1_9 L17
C193

C194

C198
C195

C196

C197

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
AC33 AD34 AE23 L19

0.1uF
VDD_MEM_4 VDD_APC_4 VDD_CORE_10 VDDPX_1_10
AE17 VDD_MEM_5 VDD_APC_5 AD36 AH36 VDD_CORE_11 VDDPX_1_11 L21 C
1.0uF

0.1uF

0.1uF
1.0uF

0.1uF

0.1uF
AE19 VDD_MEM_6 VDD_APC_6 AD38 Dedicated VIA to Main GND AJ13 VDD_CORE_12 VDDPX_1_12 L23
(VDD_CX)
AE25 VDD_MEM_7 VDD_APC_7 AE29 AJ15 VDD_CORE_13 VDDPX_1_13 L27

C AE27 VDD_MEM_8 VDD_APC_8 AE31 (VDD_APC) AJ37 VDD_CORE_14 VDDPX_1_14 L29


VDD_PLL1 pins and VDD_EBI_CDC pins are clost to VDD_MEM pins,

nt
the caps on VDD_MEM/VDD_PLL1/VDD_EBI_CDC are shared. AG27 AE33 SG173 VREG_S5_S6_0P8625
[4,12] AL13 L31
VDD_MEM_9 VDD_APC_9 VDD_CORE_15 VDDPX_1_15
AH32 VDD_MEM_10 VDD_APC_10 AE35 AR33 VDD_CORE_16 VDDPX_1_16 L33
Cap depend on PDN simulation
C448 0.1uF AH34 AE37 VREG_S5_S6_0P8625[4,12] AR35
VDD_MEM_11 VDD_APC_11 VDD_CORE_17

C204
C200

C201

C202

C203
C444 0.1uF AJ33 VDD_MEM_12 VDD_APC_12 AE39 R37 VDD_CORE_18

C199

C205

C207
C206

C208

C212
C209

C210

C211
AJ35 VDD_MEM_13 VDD_APC_13 W29 U13 VDD_CORE_19 VREG_L12_VDDPX2_SDC [12,16]

22uF

22uF

22uF
SG174 GND [2,3,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]

22uF
AN11 W31 U15

0.1uF

0.1uF

0.1uF

1.0uF

0.1uF

0.1uF

1.0uF

0.1uF

1.0uF
VDD_MEM_14 VDD_APC_14 VDD_CORE_20

1uF

C213
C214

AN13 W33 U17 L11


C215

C216

C217

C218

VDD_MEM_15 VDD_APC_15 VDD_CORE_21 VDDPX_2

1uF
AN29 VDD_MEM_16 VDD_APC_16 W35 Dedicated VIA to Main GND U19 VDD_CORE_22
1.0uF

1.0uF

1.0uF

0.1uF

AN31 W37 U25


1.0uF

VDD_MEM_17 VDD_APC_17 VDD_CORE_23


AP22 VDD_MEM_18 VDD_APC_18 W39 U27 VDD_CORE_24
AP32 VDD_MEM_19 VDD_APC_19 Y28 (VDD_PX3)

e
AR23 Y30 AJ41 (IO)
C219

C221
VREG_L5_1P8
C220

VDD_MEM_20 VDD_APC_20 VDDPX_3_1

C223
C222

C224
AR25 VDD_MEM_21 VDD_APC_21 Y32 VDDPX_3_2 AR9
1.0uF

1.0uF
0.1uF

R15 Y34 AU9

0.1uF
VDD_MEM_22 VDD_APC_22 VDDPX_3_3

0.1uF

1uF
R17 VDD_MEM_23 VDD_APC_23 Y36 VDDPX_3_4 AU39

R35 VDD_MEM_24 VDD_APC_24 Y38 VDDPX_3_5 AW19

id
T32 VDD_MEM_25 VDDPX_3_6 AW21

T34 VDD_MEM_26 VDDPX_3_7 L39

C226

C227
C225
T36 VDD_MEM_27 VDDPX_3_8 R9

U21 U9

0.1uF

0.1uF
VDD_MEM_28 VDDPX_3_9

0.1uF
U23 VDD_MEM_29 VDDPX_3_10 U41

W27 B
VDD_MEM_30

VDDPX_5 AL41 (UIM1) VREG_L14_UIM1 [12,16,27]

C228
nf

0.1uF
VDDPX_6 AK40 (UIM2)
VREG_L15_UIM2 [12,16]

C229

0.1uF
VDDPX_7 L13 (eMMC) VREG_L5_1P8

C230

0.1uF
Co

VDDPX_CK J25
VREG_S3_1P225 [4,5,6,12]

C231

0.1uF
A

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 04_MSM8953_POWER1 SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 4 OF 30


5 4 3 2 1
5 4 3 2 1

VREG_L3_0P925 [5,12]

C232

C234
C233
U232-H D

1.0uF

1.0uF

1.0uF
VREG_S3_1P225 [4,5,6,12]
D MSM8953 VREG_L7_1P8 [5,12,21,24]

C237
C235 C236 CONTROL C238
C239
C240
1.0uF 1.0uF 1.0uF

0.1uF
AG9 VDD_DSI_LV_PLL_1 VDD_USB_SS_1P8_1 AD40 1.0uF
1.0uF
AF10 VDD_DSI_LV_PLL_2 VDD_USB_HS1_3P1 AD42
VREG_L13_3P075 [12]
VREG_L3_0P925 [5,12]

AJ11 VDD_DSI_CSI_1 VDD_USB_CORE_1 AC35 C241 C242

VREG_MIPI_DSI_PLL [5] Star route from PMIC output Cap AF8 AC37
VDD_DSI_HV_PLL_1 VDD_USB_CORE_2 0.1uF 1.0uF

C243
AE11 VDD_DSI_CSI_2 VDD_USB_SS_1P8_2 AC39

R233
R232
1.0uF

R234
AE9 VDD_DSI_HV_PLL_2

l
About star route from PMIC output Cap: AC11 VDD_DSI_CSI_3 VDD_USB_CORE_3 AA41

0
R235 place

0
The power pin for DSI1 shoulde be GND if don't use 0 AA11 AB38 VREG_L3_0P925[5,12]

0
VDD_DSI_CSI_4 VDD_USB_CORE_4
The power pin for CSI1 shoulde be float if don't use
R1152 should be SMT if use for internal evaluation Internal evaluation usage
W11 VDD_DSI_CSI_5 VDD_USB_CORE_5 AB40
C244
VREG_L7_1P8 [5,12,21,24]
1.0uF

ia
AU31 VDD_A2_1 VDD_PLL2_1 AR31
C245
AU29 VDD_A2_2
1.0uF
VDD_PLL2_2 AN17
VDDA_TXDAC_1 shoulde be GND if don't use TXDAC1
AU11 VREG_L7_1P8 [5,12,21,24]
VREG_L19_1P3 [12,24] VDDA_WLAN

VDD_PLL2_3 W25 C246


C247
AU23 VDD_A2_3 1.0uF
VDD_CDC_SDC pins are clost to VDD_CORE pins,
AU25 VDD_A2_4 VDD_PLL2_4 AA25 the caps on VDD_CDC_SDC/VDD_CORE are shared.
0.1uF
AU27 VREG_S2_0P8625 [4,12] C
VDD_A2_5
VREG_L7_1P8 [5,12,21,24]
VDD_PLL1 AC31
C248
C249 BA23 VDD_A1_1
0.1uF
C 1.0uF BA25 R13
VDD_A1_2 VDD_CDC_SDC1

nt
VDDA_GPS_BBRX [5] Star route from PMIC output Cap BA27 VDD_A1_3
BA35 Star route from PMIC output Cap VDDA_GPS_BBRX [5]
C250
VDD_GNSS
C251
[5,12]VREG_S1_0P8625
0.1uF 0.1uF C252
AJ17 VDD_MODEM_1 VDD_EBI_1 R23
0.1uF
SG232
AJ19 VDD_MODEM_2 VDD_EBI_2 R27

[5,12]VREG_S1_0P8625 AJ21 VDD_MODEM_3 VDD_EBI_3 R29

AJ23 VDD_MODEM_4
Star route from PMIC output Cap VREG_S7_0P915
C253 C254 AJ25 VDD_MODEM_5 VDD_EBI_4 R31
C255 C257
C256 [4,5,12]
22uF AJ27 VDD_MODEM_6 VDD_EBI_5 R33
22uF 1.0uF 0.1uF C258 C259 C260 C261
1uF
AJ29 VDD_MODEM_7 VDD_EBI_6 R19
1.0uF 1.0uF 1.0uF 1uF VREG_S7_0P915
AJ31 R21

e
VDD_MODEM_8 VDD_EBI_7 [4,5,12]
Dedicated VIA to Main GND
AK18 C262 C263
VDD_MODEM_9
AM18 VDD_MODEM_10 VDD_EBI_8 R25 1.0uF 1.0uF
AM32

C269
C267 C268 VDD_MODEM_11
C264 C265 C266
C270 Star route from PMIC output Cap VREG_EBI0_HV_PLL [5]
0.1uF AN25 VDD_MODEM_12 VDD_EBI_HV_PLL L25
1.0uF 0.1uF 0.1uF

1.0uF
1.0uF
0.1uF
AN27 N25 VREG_L3_0P925 [5,12]
VDD_MODEM_13 VDD_EBI_LV_PLL

id
AN33 VDD_MODEM_14 C271 C272

AN35 VDD_MODEM_15 VDD_PLL1 pins and VDD_EBI_CDC pins are clost to VDD_MEM pins,
1.0uF 0.1uF
the caps on VDD_MEM/VDD_PLL1/VDD_EBI_CDC are shared.
AN37 VDD_MODEM_16

B
nf
R236 0
[4,5,6,12] VREG_S3_1P225 VREG_EBI0_HV_PLL [5]

R237 0
[4,5,6,12] VREG_S3_1P225 VDDA_GPS_BBRX [5]

R238
Co
[5,12,14] VREG_L23_1P175 NF

PLACE

Internal evaluation usage

R239 PLACE
0
[4,5,6,12] VREG_S3_1P225 VREG_MIPI_DSI_PLL [5]

R240 NF
[5,12,14] VREG_L23_1P175

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 05_MSM8953_POWER2 SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 5 OF 30


5 4 3 2 1
5 4 3 2 1

VREG_L5_1P8

EBI0_CA[0:9]
U106
D EBI0_CA0
EBI0_CA1 Y2 CA0 VDD1 F3 VDD1 decaps must be < 5mm from package edge
EBI0_CA2 Y3 CA1 VDD1 F4
EBI0_CA3 W2 CA2 VDD1 F9
EBI0_CA4 W3 G5

0.1uF

0.1uF

0.1uF

1.0uF
CA3 VDD1

C105

C106

C107

C108

C109
EBI0_CA5 V3 CA4 VDD1 AA3

NF
EBI0_CA6 L3 CA5 VDD1 AA5
EBI0_CA7 K3 CA6 VDD1 AB3
EBI0_CA8 J3 CA7 VDD1 AB4
EBI0_CA9 J2 CA8 VDD1 AB9
H2 CA9
EBI0_DQ[0:31] F5
EBI0_DQ0 VDD2 VREG_S3_1P225
EBI0_DQ1 W12 DQ0 VDD2 F8
EBI0_DQ2 V11 DQ1 VDD2 J5
EBI0_DQ3 V13 DQ2 VDD2 K5
EBI0_DQ4 U11 DQ3 VDD2 L2 VDD2 decaps must be < 1. 5mm from package edge
EBI0_DQ5 U13 DQ4 VDD2 L5
EBI0_DQ6 T11 DQ5 VDD2 M5
EBI0_DQ7 T13 DQ6 VDD2 N5
EBI0_DQ8 R12 DQ7 VDD2 P5

0.1uF

0.1uF

0.1uF
1.0uF

1.0uF
N12 P8

C112

C113

C114

C115
C110

C111
EBI0_DQ9 DQ8 VDD2
M13 P11

NF
EBI0_DQ10 DQ9 VDD2
EBI0_DQ11 M11 DQ10 VDD2 R5
EBI0_DQ12 L13 DQ11 VDD2 T5
EBI0_DQ13 L11 DQ12 VDD2 U5
EBI0_DQ14 K11 DQ13 VDD2 V5
EBI0_DQ15 K13 DQ14 VDD2 W5
EBI0_DQ16 J12 DQ15 VDD2 AB5
EBI0_DQ17 AB12 DQ16 VDD2 AB8
EBI0_DQ18 AB11 DQ17
EBI0_DQ19 AB10 DQ18 VDDQ G9

ia
EBI0_DQ20 AA13 DQ19 VDDQ H8 VREG_S3_1P225
EBI0_DQ21 AA12 DQ20 VDDQ H12
EBI0_DQ22 AA10 DQ21 VDDQ J11
U232-B EBI0_DQ23 Y13 DQ22 VDDQ K10 Use solid Plane for L2
EBI0_DQ24 Y11
H11
DQ23 Power VDDQ K12
L8 VDD2 decaps must be < 1. 5mm from package edge
EBI0_DQ25 DQ24 VDDQ
Note EBI0_DQ26 H13 DQ25 VDDQ L9
MSM8953 G10 M10
EBI0_DQ27 DQ26 VDDQ
Place R105 close to MSM Pin
EBI0_DQ28 G12 DQ27 VDDQ M12

4.7uF

4.7uF

0.1uF

0.1uF

0.1uF
CONTROL G13 N11

C116

C117

C118

C119

C120

C121

C122
EBI0_DQ29 DQ28 VDDQ

NF

NF
EBI0_DQ30 F10 DQ29 VDDQ R11

[6] EBI0_CS0_N A25 E25


R105 240 +/-1% MICRO/HYNIX SAMSUNG KEEP CLOSE TO THE PIN EBI0_DQ31 F11
F12
DQ30 VDDQ T10
T12
EBI0_CS_N_0 EBI0_CAL VREG_S3_1P225 [4,5,6,12] DQ31 VDDQ
VDDQ U8
B22 R106 240 G2 U9
[6] EBI0_CS1_N EBI0_CS_N_1 Internal evalutaion usage ZQ0 VDDQ C
R107 240 G3 ZQ1/NC VDDQ V10
U1501.G3 ZQ1 NC F13
VDDQ V12
W11
VSSQ VDDQ
[6] EBI0_CLK_C B26 EBI0_CKB G11 VSSQ VDDQ Y8 VREG_S3_1P225
H10 VSSQ VDDQ Y12
A27 E37 EBI0_DQ0 J8 AA9
C [6] EBI0_CLK_T EBI0_CK EBI0_DQ_0 VSSQ VDDQ
U1501.A7 RFU RCLK J13 VDDCA decaps must be < 1. 5mm from package edge

nt
EBI0_DQ1 VSSQ
EBI0_DQ_1 E35 K8 VSSQ VDDCA K2
K9 VSSQ VDDCA N2
EBI0_DQ2 VREG_L5_1P8
A23 EBI0_CKE_0 EBI0_DQ_2 C37 L10 VSSQ VDDCA U2 VREG_L8_2P9
[6] EBI0_CKE0

0.1uF

0.1uF
1.0uF

1.0uF
L12 V2

C125

C126
C123

C124
VSSQ VDDCA
A21 EBI0_CKE_1 EBI0_DQ_3 E33 EBI0_DQ3 M8 VSSQ
[6] EBI0_CKE1 N13 B3
VSSQ VCC

C132

C127
C35 EBI0_DQ4 P9 B12

C129

C131

C128
C130
EBI0_DQ_4 VSSQ VCC
EBI0_DM[0:3] R13 VSSQ VCC B13
[6] EBI0_DM0 E27 E31 EBI0_DQ5 T8 C4
EBI0_DM_0 EBI0_DQ_5 VSSQ VCC
U10 D8

0.1uF

0.1uF
VSSQ VCC

2.2uF

0.1uF
NF
EBI0_DM1 C23 C33 EBI0_DQ6 U12 A4

NF
EBI0_DM_1 EBI0_DQ_6 VSSQ VCCQ
V8 VSSQ VCCQ B6
EBI0_DM2 A37 C31 EBI0_DQ7 V9 B9
EBI0_DM_2 EBI0_DQ_7 VSSQ VCCQ C133 1.0uF
W8 VSSQ VCCQ C7
EBI0_DM3 B12 E19 EBI0_DQ8 W13 C11
EBI0_DM_3 EBI0_DQ_8 VSSQ VCCQ C134
Y10 VSSQ VCCI A11 0.1uF
EBI0_DQ_9 E17 EBI0_DQ9 AA11 VSSQ VDDI
CLKM B8 SDC1_CLK [3]
EBI0_DQS0_C[6] C29 C19 EBI0_DQ10 F2 C2 [3,16,28]
EBI0_DQSB_0 EBI0_DQ_10 VSS RST MSM_RESOUT_N
G4 VSS CMD A6 SDC1_CMD [3]
EBI0_DQS0_T[6] E29 EBI0_DQS_0 EBI0_DQ_11 E15 EBI0_DQ11 G8 VSS eMMC

e
H3 B4 SDC1_DATA_7 SDC1_DATA_[0:7] R108
VSS DAT7 SDC1_DATA_6
C17 EBI0_DQ12 H5 A5 VREG_L5_1P8
EBI0_DQ_12 VSS DAT6 SDC1_DATA_5
L4 VSS DAT5 A10
EBI0_DQS1_C [6] E21 C15 EBI0_DQ13 M3 C9 SDC1_DATA_4 10K
EBI0_DQSB_1 EBI0_DQ_13 VSS DAT4
M4 B5 SDC1_DATA_3
EBI0_DQS1_T[6] VSS DAT3 SDC1_DATA_2
C21 E13 EBI0_DQ14 N4 C6
EBI0_DQS_1 EBI0_DQ_14 VSS DAT2 SDC1_DATA_1
N8 VSS DAT1 B10
C13 EBI0_DQ15 P4 A9 SDC1_DATA_0
EBI0_DQ_15 VSS DAT0
P12 VSS
EBI0_DQS2_C [6] B38 A43 EBI0_DQ16 R3
EBI0_DQSB_2 EBI0_DQ_16 VSS
R4 VSS

id
EBI0_DQS2_T[6] A39 C41 EBI0_DQ17 R8
EBI0_DQS_2 EBI0_DQ_17 VSS
T4 VSS
A41 EBI0_DQ18 Y4 U3 EBI0_CS0_N [6]
EBI0_DQ_18 VSS CS0#
Y5 VSS CS1# T3
EBI0_DQS3_C [6] EBI0_CS1_N [6]
A11 EBI0_DQSB_3 EBI0_DQ_19 C43 EBI0_DQ19 AA2
AA4
VSS LP-DDR3 T2 EBI0_CKE0 [6]
EBI0_DQS3_T[6] VSS CKE0
C11 E41 EBI0_DQ20 AA8 R2
EBI0_DQS_3 EBI0_DQ_20 VSS CKE1 EBI0_CKE1 [6]
EBI0_DQ_21 B40 EBI0_DQ21 H4 VSSCA CLK P3 EBI0_CLK_T [6]
J4 VSSCA CLK# N3 EBI0_CLK_C [6]
EBI0_CA0 B34 E43 EBI0_DQ22 K4 B
EBI0_CA_0 EBI0_DQ_22 VSSCA
P2 VSSCA DQS0 T9 EBI0_DQS0_T [6]
EBI0_CA1 A33 E39 EBI0_DQ23 U4 R9
EBI0_CA_1 EBI0_DQ_23 VSSCA DQS0# EBI0_DQS0_C [6]
V4 VSSCA DQS1 M9
EBI0_DQ24 EBI0_DQS1_T [6]
EBI0_CA2 A31 EBI0_CA_2 EBI0_DQ_24 C7 W4 VSSCA DQS1# N9
Y9 EBI0_DQS1_C [6]
B DQS2 EBI0_DQS2_T [6]
EBI0_CA3 B30 A7 EBI0_DQ25 A3 W9
EBI0_CA_3 EBI0_DQ_25 VSSM DQS2# EBI0_DQS2_C [6]
A8 VSSM DQS3 H9
EBI0_DQ26 EBI0_DQS3_T [6]
EBI0_CA4 A29 EBI0_CA_4 EBI0_DQ_26 C9 A12 VSSM DQS3# J9 EBI0_DQS3_C [6]
B2 VSSM
EBI0_CA5 A19 C5 EBI0_DQ27 B7 R10 EBI0_DM0 EBI0_DM[0:3]
EBI0_CA_5 EBI0_DQ_27 VSSM DM0 EBI0_DM1 [6]
B11 N10
EBI0_CA6 B18 EBI0_CA_6
nf EBI0_DQ_28 A9 EBI0_DQ28 C3
C5
VSSM
VSSM
DM1
DM2 W10
J10
EBI0_DM2
EBI0_DM3
EBI0_DQ29 VSSM DM3
EBI0_CA7 A17 EBI0_CA_7 EBI0_DQ_29 E9 C8 VSSM
C10 M2 R109 0
VSSM VREFCA VREF_LPDDR3
EBI0_CA8 A15 E7 EBI0_DQ30 C12 P13 R110 0
EBI0_CA_8 EBI0_DQ_30 VSSM VREFDQ
C13 VSSM R37 R38 is debug for DDR test

C135
EBI0_CA9 B14 E5 EBI0_DQ31 D7
EBI0_CA_9 EBI0_DQ_31 VSSM
AB14

C136
DNU
A2 AB13

NF
VSF DNU
A13 AB2

0.1uF
VSF DNU
B1 VSF DNU AB1
B14 VSF DNU AA14
D2 VSF DNU AA1
D3 VSF DNU A14
D4 VSF DNU A1
D5 VSF
D6 VSF
R111 R112
A7 P10 ODT
[3] SDC1_RCLK RFU/RCLKM ODT
0 NF
Co

Note: Pull-up resistors on SDC1_DATA are PCB and eMMC vender dependent

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 06_MSM8953_EBI/MEM SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 6 OF 30


5 4 3 2 1
5 4 3 2 1

l
U232-I

MSM8953
C158 C159 C160 C161
CONTROL

ia
R158 33nH
WTR0_PRXBB_I_P [17] BE33 BBRX_I_I_CH0 22PF 22PF 22PF 22PF
WTR0 PRX IQ
R159 33nH R160 33nH WTR0_TXBB_I_M [17,18]
WTR0_PRXBB_Q_P [17] BE31 BE41
BBRX_I_Q_CH0 TXDAC0_IM
R161 33nH WTR0_TXBB_I_P [17,18]
TXDAC0_IP BF40
R162 WTR0 TXIQ
BF42 33nH WTR0_TXBB_Q_M [17,18]
R163 33nH TXDAC0_QM
WTR0_DRXBB_I_P [17] R164 33nH WTR0_TXBB_Q_P [17,18]
BG33 BBRX_I_I_CH1 TXDAC0_QP BG43
WTR0 DRX IQ
C
R165 33nH
WTR0_DRXBB_Q_P [17] BG31 BBRX_I_Q_CH1
VREF_DAC_MPP_3 [11]
TXDAC0_VREF AW33
C162 C163 C164 C165
C

C166

2
nt

0.1uF
BE29 BBRX_I_I_CH2

1
22PF 22PF
22PF 22PF BF36
TXDAC1_IM
BG29 BBRX_I_Q_CH2 TXDAC1_IP BG35

TXDAC1_QM BE37

R166 TXDAC1_QP BF38


WTR1_PRXBB_I_P [18] 33nH
WTR1 PRX IQ BE27 BBRX_I_I_CH3
R167 33nH
WTR1_PRXBB_Q_P [18]
BG27 BBRX_I_Q_CH3 TXDAC1_VREF BA33
WTR1_DRXBB_I_P [18] R168 33nH
WTR1 DRX IQ

WTR1_DRXBB_Q_P [18] R169 33nH

e
Internal evaluation usage:change to 3.92K 1%
R170 WTR0_GPSBB_I_P [17]
AW15 WLAN_RSET GNSS_BB_IP BC39
GPS IQ
C167 C170 +/-1%
C168 C169 6.04k BC41 WTR0_GPSBB_Q_P [17]
GNSS_BB_QP
Place R0913 close to MSM pin

22PF WLAN_BB_IN [24] [47] AU15


22PF 22PF 22PF WLAN_BB_I_M
WLAN_BB_IP [24] [47] AT16 WLAN_BB_I_P

id
WLAN IQ WLAN_BB_QN [24] [47] AT14 WLAN_BB_Q_M
WLAN_BB_QP [24] [47] AU13 WLAN_BB_Q_P

Note1 B

1) Unused BBRX_IQ lines can be NC


2) Unused TX_DAC0_IQ, TX_DAC_IREF and TX_DAC_VREF need to be GND
B
nf
Co

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 07_MSM8953_RF SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 7 OF 30


5 4 3 2 1
5 4 3 2 1

U232-L

U232-K

l
MSM8953

CONTROL
MSM8953

CONTROL B20 F14


GND_148 GND_198
B24 GND_149 GND_199 F16
A1 GND_48 GND_98 AG29
B28 GND_150 GND_200 F18

ia
A13 GND_49 GND_99 AG31
B32 GND_151 GND_201 F20
A35 GND_50 GND_100 AG33
B36 GND_152 GND_202 F22
A45 GND_51 GND_101 AG35
U232-M B4 F24
GND_153 GND_203
A47 GND_52 GND_102 AG37
B42 GND_154 GND_204 F26
A5 GND_53 GND_103 AG39
B44 GND_155 GND_205 F28
AA1 GND_54 GND_104 AG5
MSM8953 B6 F30 U232-J
GND_156 GND_206
AA29 GND_55 GND_105 AG7
CONTROL B8 F32
GND_157 GND_207
AA31 GND_56 GND_106 AJ1 C
BA1 F34 U232-A
GND_158 GND_208
AA33 GND_57 GND_107 AJ9 N37 GND_248
BA7 F36 MSM8953
GND_159 GND_209
AA35 GND_58 GND_108 AK2 N43 GND_249
BB42 F38 CONTROL
GND_160 GND_210
C AA37 GND_59 GND_109 AL11 P42 GND_250
BB6 F4 MSM8953

nt
GND_161 GND_211
AA39 GND_60 GND_110 AL15 P44 GND_251 AR13 GND_1 GND_21 AM30
BC1 F40 CONTROL
GND_162 GND_212
AA45 GND_61 GND_111 AL17 R11 GND_252 AW13 GND_2 GND_22 AL29 AA43 DNC_1 DNC_36 BB4
BC43 GND_163 GND_213 F42
AA9 GND_62 GND_112 AL25 R47 GND_253 AR15 GND_3 AD44 DNC_2 DNC_37 BB16
BG1 GND_164 GND_214 F44
AB2 GND_63 GND_113 AL27 T42 GND_254 GND_23 AP16 AF44 DNC_3 DNC_38 BB18
BG11 GND_165 GND_215 F6
AB42 GND_64 GND_114 AL31 U1 GND_255 GND_24 AM16 AG43 DNC_4 DNC_39 BC3
BG15 GND_166 GND_216 F8
AB46 GND_65 GND_115 AL33 U11 GND_256 AJ7 DNC_5 DNC_40 BC9
BG19 GND_167 GND_217 G11
AB6 GND_66 GND_116 AL35 U29 GND_257 AW23 GND_4 GND_25 V26 AJ39 DNC_6 DNC_41 BC13
BG23 GND_168 GND_218 G13
AC13 GND_67 GND_117 AL37 U31 GND_258 AW27 GND_5 GND_26 V24 AK42 DNC_7 DNC_42 BC17
BG47 GND_169 GND_219 G15
AC15 GND_68 GND_118 AL39 U33 GND_259 BC27 GND_6 AK44 DNC_8 DNC_43 BC21
BG7 GND_170 GND_220 G17
AC17 GND_69 GND_119 AL47 U35 GND_260 BC29 GND_7 GND_27 AB24 AL9 DNC_9 DNC_44 BD8
C25 GND_171 GND_221 G19
AC19 GND_70 GND_120 AL7 U37 GND_261 BC31 GND_8 GND_28 AC25 AL43 DNC_10 DNC_45 BD12

e
C39 GND_172 GND_222 G21
AC21 GND_71 GND_121 AM6 U39 GND_262 BD26 GND_9 AM42 DNC_11 DNC_46 BD16
D10 GND_173 GND_223 G23
AC23 GND_72 GND_122 AN1 U43 GND_263 BD28 GND_10 GND_29 AB32 AM44 DNC_12 DNC_47 BD18
D12 GND_174 GND_224 G25
AC29 GND_73 GND_123 AN15 U45 GND_264 BD30 GND_11 GND_30 AB30 AN7 DNC_13 DNC_48 BD20
D14 GND_175 GND_225 G29
AC41 GND_74 GND_124 AP18 U5 GND_265 BD32 GND_12 AN9 DNC_14 DNC_49 C27
D16 GND_178 GND_226 G31
AC43 GND_75 GND_125 AP2 U7 GND_266 BF26 GND_13 AN39 DNC_15 DNC_50 H4
D18 GND_179 GND_227 G33

id
AC9 GND_76 GND_126 AP20 V2 GND_267 BF28 GND_14 GND_31 AW31 AP44 DNC_16 DNC_51 H44
D20 GND_180 GND_228 G35
AD10 GND_77 GND_127 AR11 V28 GND_268 BF30 GND_15 GND_32 BD40 AR37 DNC_17 DNC_52 J5
D22 GND_181 GND_229 G37
AD46 GND_78 GND_128 AR17 V30 GND_269 BF32 GND_16 GND_33 BD42 AR39 DNC_18 DNC_53 J11
D24 GND_182 GND_230 G39
AD8 GND_79 GND_129 AR19 V32 GND_270 AW25 GND_17 GND_34 BE39 AR43 DNC_19 DNC_54 J13
D26 GND_183 GND_231 G41
AE1 GND_80 GND_130 AR21 V36 GND_271 GND_35 BE43 AT18 DNC_20 DNC_55 J15
D28 GND_184 GND_232 G7
AE41 AR47 V38 BF44 AT20 J35 B
GND_81 GND_131 GND_272 GND_36 DNC_21 DNC_56
D30 GND_185 GND_233 G9
AE7 GND_82 GND_132 AR7 V40 GND_273 AV42 DNC_22 DNC_57 J37
D32 GND_186 GND_234 J1
AF2 GND_83 GND_133 AU17 V42 GND_274 AV44 DNC_23 DNC_58 J39
B D34 GND_187 GND_235 L47
AF28 GND_84 GND_134 AU19 V44 GND_275 AW9 DNC_24 DNC_59 J43
D36 GND_188 GND_236 N11
AF30 GND_85 GND_135 AU21 W13 GND_276 AW35 GND_18 GND_37 AW29 AW11 DNC_25 DNC_60 L7
D38 GND_189 GND_237 N13
AF32 GND_86 GND_136 AU3 W15 GND_277 BB38 GND_19 GND_38 BC33 AW37 DNC_26 DNC_61 L15
D4 N15
AF36 GND_87 GND_137 AU33 W17
nf
GND_278
D40
GND_190 GND_238
N17
BB40 GND_20 GND_39 BC35 AW39 DNC_27 DNC_62 L35
GND_191 GND_239
AF38 GND_88 GND_138 AU35 W19 GND_279 GND_40 BC37 AW43 DNC_28 DNC_63 L41
D42 GND_192 GND_240 N19
AF40 GND_89 GND_139 AU37 W21 GND_280 GND_41 BD34 AY42 DNC_29 DNC_64 N5
D44 GND_193 GND_241 N21
AG11 GND_90 GND_140 AU5 W23 GND_281 GND_42 BD36 AY44 DNC_30 DNC_65 N39
D6 GND_194 GND_242 N23
AG13 GND_91 GND_141 AU7 W41 GND_282 GND_43 BD38 BA11 DNC_31 DNC_66 P4
D8 GND_195 GND_243 N27
AG15 GND_92 GND_142 AV2 W45 GND_283 GND_44 BE35 BA29 DNC_32 DNC_67 R5
E11 GND_196 GND_244 N29
AG17 GND_93 GND_143 AW17 W47 GND_284 GND_45 BF34 BA31 DNC_33 DNC_68 R39
E23 GND_197 GND_245 N31
AG19 GND_94 GND_144 AW47 W9 GND_285 GND_46 AY30 BA37 DNC_34 DNC_69 Y26
F10 GND_197 GND_246 N33
AG21 GND_95 GND_145 AW7 Y24 GND_286 GND_47 BG39 BA39 DNC_35
F12 GND_197 GND_247 N35
AG23 GND_96 GND_146 B10 Y40 GND_287
AG25 GND_97 GND_147 B16
Co

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 08_MSM8953_GND SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 8 OF 30


5 4 3 2 1
5 4 3 2 1

SMB1350 Charger
PMI8952

VBUS_USB_IN
D
U296-A
C273 35V

PMI8952
4.7uF

47K

C285
D CHARGE

SG273
142 USB_IN_1 USB_MID_1 130

143 USB_IN_2 USB_MID_2 131


C274

35V
144 132 C275

2
USB_IN_3 USB_MID_3
[9] VREF_BAT_THERM
4.7uF

1
USB_PMI_DM [16] 47PF
123 USB_DM GND_CHG_1 128

NC
USB_PMI_DP [16]

R273
111 USB_DP GND_CHG_2 129

5.1K

SG274
GND_CHG_3 141
R514 NF
[2,10,16] USB_ID Internal PU 80 USB_ID

FLASH_OUT_1 94

l
R274 100K/NC 101 95
USB_CS FLASH_OUT_2 VFLASH [10]

4.7uF 10V
96

C276
Not support Wipower in this SCH FLASH_OUT_3
R275 Place C1304 close to
81 WIPWR_DIV2_EN FLASH_VDD
0 Place C1301 close to
BOOT_CAP 105
BOOT_CAP and VSW_CHG
R276 51K 140 C278
[9] SYSON WIPWR_CHG_OK

SG275
0.027UF

ia
VSW_CHG_1 106

Internal PD 104 DC_SNS VSW_CHG_2 107

108 Isat depends on the different applications: charging current/flash current


VSW_CHG_3
L274 1.0uH
88 DC_EN VSW_CHG_4 116 VPH_PWR

VSW_CHG_5 117
package C280
C279

2
100 USB_EN VSW_CHG_6 118
D274
VSW_CHG_7 119 22uF 47PF

1
SG276
92 USB_SNS VSW_CHG_8 120 C
[9,16] VBUS_USB_IN

SG277
VREG_L5_1P8 55 SHDN VPH_PWR_1 114
1M/NC This diode saves
C Default is CHG_EN pin low enables power on charging R281 VPH_PWR_2 127
around 200mW at

nt
R282 10K 102 138 higher charging
CHG_EN VPH_PWR_3 current
TP-0.8MM 1
TP5 VPH_PWR_4 139
VBAT [9] 124 CHG_VBAT_SNS
Remote sense of battery CHG_OUT_1 113
CHG_OUT [9]

C283
BAT_CON_ID [9] 86 125
BATT_ID CHG_OUT_2

CHG_OUT_3 126
Pull up value the same as battery NTC,normally 10K 10uF/NC
CHG_OUT [9] BAT_THERM [9] 97 137
BATT_THERM CHG_OUT_4

CHG_OUT [9] 73 CS_MINUS

+/-1%
R284
VBAT [9]
Route PIN73,61 from the sense resistor using 61 91

0R
CS_PLUS CHG_LED CHG_ LED [9]
differential signal techniques, thin traces are sufficient

e
GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
VBAT 74 BATT_MINUS WIPWR_RST 89

[9] VBAT [9] 62 103 TO PM_PON_1


BATT_PLUS PGOOD_SYSOK SYSOK_PMI8952 [11]
Route PIN74,62 from the battery terminals using
differential signal techniques, thin traces are sufficient BUA 43 [2,11]
UIM_BATT_ALARM
USB_ID_RVAL1 90

42 VDD_MSM_IO USB_ID_RVAL2 112


VREG_L5_1P8

id
R_BIAS 85 VREF_BAT_THERM [9]

GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
122 GND_REF_CHG 135
V_ARB

C288
98 B
VAA_CAP

C287
BAT CONN
Dedicated VIA to Main GND

1uF
109 GNDC19

1uF
B
99 GNDC18 GND_FG 110 GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]

78

SG279
GNDC14
79 GNDC15
nf 115 GNDC20

SYSON 93
SYSON [9]

C289

PMI_VDD_CAP net is 5VDC,cap is 0603. Do not use 0402 as may derate to -80%.
4.7uF
TP-1.2MM 10V
TP273

VBAT [9]
SG280
1

VBAT [9]
TP-1.2MM
Co
TP4 TP-1.2MM TP-1.0MM TP-1.0MM
C291

TP276 TP275
C290

C292

TP3
Charger indicator
33PF
1uF
1

10uF
10V
1

[2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
GND
VREF_BAT_THERM [9]
R285
R287 VPH_PWR

DIODE-LED-WHITE-0603
SG281

0 C293

D275
1
10K 1% R288
J501 BAT_THERM [9]
33PF

2
RT1

1 0
+
BAT_CON_ID [9]
C295

4 2
-
1

A 3 R999 0
[10] GREEN_LED
240K

33PF

33PF

BTB-DF57H-2P
10K
TVS275

A
2

R998 NF
[9] CHG_ LED

TVS276
C294
R289

Near the battery area

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 09_PMI8952_CHARGER SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 9 OF 30


5 4 3 2 1
5 4 3 2 1

U296-B
U296-C

PMI8952
PMI8952

l
CHARGE
C296 0.47UF CHARGE
68 RESIN VREG_ADC_LDO 46
[11,16] PM_RESIN_N1
Depends on if having boost bypass
60 71 F_LED1 [14]
VPH_PWR VDD_TORCH FLASH_LED1
38 SPMI_CLK PMi8950 WLED has the function of output isolation/short circuit protection,
[3,11] SPMI_CLK F_LED2 [14]
FLASH_LED2 83 need add external FET and diode if this function is needed.
39 SPMI_DATA
[3,11] SPMI_DATA VFLASH [9]
C297
72 VDD_FLASH_1
54 0.1uF
DVDD_BYP Place C1407 close to PIN6,dedicated trace from PIN8

ia
10V 84 VDD_FLASH_2 VREG_WLED 6
134 to C1407 PGND and then a dedicated via to main GND at C1407 C298 C299
[11,16] KYPD_PWR_N1 KYPD_PWR

D296 18PF
R296 NF
69 package 50V
[3,11] PM_PON_RESET_N PS_HOLD LCD_BL_LED_A [14]
C300 VPH_PWR VDD_WLED 7
AVDD_BYP 53 0
0.47UF GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
8 GND_WLED
CLK_IN is not used
50 CLK_IN L296 R297

SG296
9 10UH 0
VSW_WLED VPH_PWR

C301
C304

C302
C303
40 NC1 C305 28
0.1uF VPH_PWR VDD_DIS_P 18PF C
41 58 SG297
NC2 REF_BYP 4.7uF 35V GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]

18PF

10uF
50V

50V
10V GND_WLED_I 31
44 NC3
47nF for LCD, 1.5nF for AMOLED

SG299
18

SG298
NC4 C306
C 15 DIS_N_CAP_REF
19

nt
NC5 0.047UF LCD_BL_LED_K1 [14]
WLED_SINK1 21
59

SG300
GND_REF LCD_BL_LED_K2 [14]
WLED_SINK2 20
75 GPIO_1
26 GND_DIS_N_REF WLED_SINK3 32 C330 C331
63 Isat depends on the different applications, like 4s4p, 8s2p and so on.
GPIO_2
To external SMB charger 33

SG301
WLED_SINK4 18PF 18PF
GNDC6 56
50V 50V
R515 0
22 MPP_1
[2,9,16] USB_ID
25 VDD_1P8_DIS_N VDIS_P_FB 29
34 VREG_L5_1P8
[9] GREEN_LED MPP_2 LCD_VSP [14]
VDIS_P_OUT 5
10 MPP_3 GNDC9 66 C307
C398
22uF
47 MPP_4 GNDC10 67 3 VDD_DIS_N 10V
[2] FLASH_STROBE_NOW VPH_PWR 4
GND_DIS_P 18PF
GNDC12 76 Place C1411 close to PIN3 C308 C309 50V

GNDC13 77 SG302 Place C1410 close to PIN5,dedicated trace from PIN4


10uF
to C1410 GND and then a dedicated via to main GND at C1410

e
57 0.1uF
VPH_PWR VDD_ADC_LDO
L297

SG303
VSW_DISP_1 16
VPH_PWR
GNDC8 65
30 17 4.7UH C310
WLED_CABC VSW_DISP_2 C390
49 GNDC4 GNDC16 82
internal PD 51
For AMOLED,Not needed in LCD mode. DIS_SCTRL 10uF
GNDC21 121 18PF
LCD_CABC [14]
leave float if not used SG304
50V
45 GNDC3 GNDC22 133

id
GNDC23 136 [2] R298
GP_PDM_A0 From MSM IO or codec 11 HAP_PWM_IN1 VDIS_N_FB 27
87 GNDC17 0 12 1 LCD_VSN [14]
HAP_PWM_IN2 VDIS_N_OUT_1
13 C332 C311
VDIS_N_OUT_2
48 VDD_HAP 22uF Place C0613 close to PIN1,13
VPH_PWR L298 18PF 10V
R299 2 50V B
C313 VSW_DIS_N_1
C312
4.7UH
VSW_DIS_N_2 14

SG306
10uF

SG305
22nF/NC 1M 36 GND_HAP
B

SG307
23 GNDC1
37 GNDC2
nf 52 GNDC5 HAP_OUT_P 35
B296 600ohm
PMI_HAP_OUT_P [10]
The current for LCD/AMOLED is different,
64 GNDC7 possible to choose the inductor with smaller Isat
B297 600ohm
70 GNDC11 HAP_OUT_N 24 based on the different application.
PMI_HAP_OUT_N [10]

MOTOR
Co
[10] PMI_HAP_OUT_N R300 0 1
J296
R301 0 1
[10] PMI_HAP_OUT_P J297

C314

C315
33PF

33PF
TVS570 TVS571

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 10_PMI8952_BL/VIB/INTERFACE SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 10 OF 30


5 4 3 2 1
5 4 3 2 1

PM8953 Codec
XTAL_19M_OUT 1 2 [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
GND GND
U362-B D

4 3 U362-F
[11] PM_XO_THERM NC XTAL_19M_IN

D XTAL-19.2M-OZ19270001 PM8953
VREG_L5_1P8
X316 SG316
HK C316 1.0uF PM8953
88 NC_WLP_TST1 DVDD_BYP 61

C317 1.0uF SG317 HK VREG_S4_2P05


60 [11,12,26]
AVDD_BYP 120 163
CDC_SPKDRV_P CDC_VDDIO

C362

C363
TP316

C361
2 XTAL19M2_IN VPP 71 121 CDC_SPKDRV_M

100PF
C364
81

2.2uF
3 59 CDC_VDD_PA

1.0uF
XTAL19M2_OUT VPH_PWR VPH_PWR

0.1uF
GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
VCOIN 14
96 CDC_IN1_P CDC_VDD_CP 161
CDC_MIC1_P

33PF
KYPD_PWR_N1 [10,16] [13] (Bottom MIC)

C319
63 KYPDPWR 97 CDC_IN1_M
[13] CDC_MIC1_M

l
D316 VREG_L16_1P8 [11,12]
SYSOK_PMI8952 [9] 77 111 [13] 108 Place C1807 close to pin 107
PON_1 OPTION1 22uF CDC_HDS_MIC2_P (Headset MIC)
CDC_IN2_P

C318
10V

1%
PM_PON_RESET_N [3,10] (Top MIC) 122 107

R320
27 123 [13] CDC_MIC3_P CDC_IN3_P CDC_VDD_SPKDRV VPH_PWR
PON_RESET OPTION2
C369 0.1uF_NF

100K
MSM_PS_HOLD [3,16,28] 52 PS_HOLD

C365
[13] CDC_MIC_BIAS1 69

2.2uF
CDC_MIC_BIAS1
PM_RESIN_N1 [10,16] 76 74 PA_THERM0 [19]
RESIN PA_THERM 83 177
[13] CDC_MIC_BIAS2 CDC_MIC_BIAS2 CDC_BOOST_VREG_5V
D317 C368 NF GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
TP317

C320 124 CBLPWR

ia
[13] CDC_EAR_P 93 CDC_EAR_P 2.2uF is appropriate if a pilot tone based speaker protection system is used.
0.01uF/NC TEST_EN 102
If such a speaker protection system is not used,choose a
CAD NOTE: Place C1811 and C1808 close to pin 177
94 CDC_EAR_M capacitor that wll create an appropriate HPF for the system
SPMI_CLK [3,10] R324 0 [13] CDC_EAR_M
51 SPMI_CLK
CDC_BOOST_SW 176
SPMI_DATA [3,10] R325 0 37 SPMI_DATA VREF_DDR2 8
VREF_LPDDR3 [3,6] [2]CDC_PDM_CLK 150 CDC_PDM_CLK CDC_BOOST_SNS 162

[2] CDC_PDM_SYNC 136 HT361


CDC_PDM_SYNC HT362
C371 470PF
R327 C372 470PF
SLEEP_CLK1 89 SLEEP_CLK [3]
R365
0 [2] CDC_PDM_TX 149 CDC_PDM_TX CDC_HPH_REF 82
WTR_XO_CLK [17] CDC_HPH_REF [13]
41 RFCLK1 0 C375 680PF
NF R328
CLK2_DTV [26] R925
43 RFCLK2 VIN_GR7 31 R367 0 [13]
VPH_PWR [2] CDC_PDM_RX0 135 CDC_PDM_RX0 CDC_HPH_L 68 CDC_HPH_L C
R329
0 R369 0 [13]
WTR1_XO_IN [18] 46 RFCLK3 [2] CDC_PDM_RX1 178 CDC_PDM_RX1 CDC_HPH_R 95 CDC_HPH_R
VREG_S4_2P05 [11,12,26]
0 C379 680PF
[2] CDC_PDM_RX2 164 CDC_PDM_RX2

nt
C C321 CDC_HS_DET 109 CDC_HS_DET [13]
4 1.0uF
VREG_L20
134 CDC_PDM_RX0_COMP
[2] CDC_PDM_RX0_COMP
16 GND HT363
GND_XO 148
[2] CDC_PDM_RX1_COMP CDC_PDM_RX1_COMP
MSM_BBCLK1_EN [3] 0
R330 55 BBCLK1_EN CDC_GND_CP 147 [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
GND

SG318
BBCLK1 [3] R331 0 67 CDC_LO_P (complementary term for the psedo differential.)
32 BBCLK1 R375
C322 66 CDC_LO_M CDC_GND_CFILT 84 [13]
1.0uF CDC_MIC3_M
19 BBCLK2 VREG_L21 5 R376 (TOP MIC)
C323

0
Note
GND_RF 17 GND HT364
160 CDC_NCP_FLY_P CDC_GND_SPKDRV 132 0 GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
R332 GND_REF MUST connect directly to C1501 and then to
100K 1% C382 2.2uF
33PF

VREG_L16_1P8 main GND with a dedicated via. 146 CDC_NCP_FLY_N

SG319
[11,12]
GND_XO and GND_RF MUST connect directly to C1507 174

HT365
PM_XO_THERM [11] 73 CDC_GND_BOOST_1
XO_THERM and C1508 respectively and then connect to main GND
with dedicated via. 133 CDC_NCP_VNEG CDC_GND_BOOST_2 175
C324 72 57 REF_BYP
XOADC_GND REF_BYP

e
C325
1000PF 25V REF_GND 70 B361 120ohm 80

HT366
CDC_PA_VNEG
GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]

C383

C384
1 XOISOLATION_GND_1 0.1uF
10V
15 XOISOLATION_GND_2

1.0uF
SG321

2.2uF
SG320

[2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
SG322

GND

id
B

U362-A

PM8953

HK
nf 85 CMN_GND_1

86 CMN_GND_2

87 CMN_GND_3

98 CMN_GND_4

99 CMN_GND_5
VREG_L16_1P8 [11,12]
100 CMN_GND_6

U362-C
Co R317

100K 1%
1%
R316

100K

PM8953

HK
152 GPIO1 MPP1 112
VDD_PX_BIAS_MPP_1 [4]
NFC_CLK_REQ [27]
141 GPIO2 MPP2 125
RT321
UIM_BATT_ALARM [2,9] 142 110
GPIO3 MPP3 VREF_DAC_MPP_3 [7]

117 GPIO4 MPP4 151


QUIET_THERM [11]

104 GPIO5

A 90 100K
GPIO6
Backup, may change to other MPP as needed
143 GPIO7 CC1 114 A

129 GPIO8 CC2 101 QUIET_THERM [11]

VCONN 113 RT316


R326

100K

100K

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 11_PM8953_CONTROL/CODEC SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 11 OF 30


5 4 3 2 1
5 4 3 2 1

D
U362-D

PM8953

64 HK 62 VREG_S1_0P8625 [5,12]
VPH_PWR VIN_S1_1 VFB_S1

65 VIN_S1_2 Remote sense from MSM side for S1


C333

C334

L333 U362-E
[5,12]
22uF

22uF

C335 4.7uF VSW_S1 1.0uH VREG_S1_0P8625


39 GND_S1_1 VSW_S1_1 53

40 GND_S1_2 VSW_S1_2 54

l
SG333

PM8953

HK
126 9 VREG_L1_1P0 [17,18]
VREG_S3_1P225 VIN_GR1 VREG_L1
105 75 VREG_S2_0P8625 [4,5,12]
VIN_S2_1 VFB_S2 VREG_L2_1P1 [14]
VREG_L2 140
106 Remote sense from MSM side for S2
VIN_S2_2 VREG_L3_0P925 [5]
VREG_L3 153

ia
36 50 VREG_L4_1P8 [17,18,24]
VREG_S3_1P225 VIN_GR2 VREG_L4
C336 4.7uF
78 91 L334 1.0uH VREG_S2_0P8625 [4,5,12]
GND_S2_1 VSW_S2_1
VREG_L5 49
VREG_L5_1P8
79 GND_S2_2 VSW_S2_2 92
22 VREG_L6_1P8 [2,4,14,15]
SG334

VREG_L6

139 7 VREG_L7_1P8 [5,21,24]


Sense node from output caps VIN_GR3 VREG_L7

30 VREG_L8_2P9 [6]
VREG_L8
165 VIN_S3_1 VFB_S3 137
6 VREG_L9_3P3 [24]
VREG_L9 C
179 VIN_S3_2
VREG_S4_2P05 21 47 VREG_L10_2P8 [15]
VIN_GR4 VREG_L10

35 42 VREG_L11_2P95
VIN_GR4_EXTRA VREG_L11 [16]
C C337 4.7uF L335 2.2uH VREG_S3_1P225
167 GND_S3_1 VSW_S3_1 166
Local sense from MSM side for S3 VREG_L12_VDDPX2_SDC

nt
[4,5,6,12] 28 [4,16]
VREG_L12

C338

C339
181 GND_S3_2 VSW_S3_2 180
56 VREG_L13_3P075[5]
SG335

VREG_L13

22uF

22uF
VREG_L8, L11, L12, L17, L22 VREG_L14_UIM1 [4,16,27]
SG336 VPH_PWR 29 VIN_GR5 VREG_L14 45

44 58 VREG_L15_UIM2 [4,16]
VIN_GR5_EXTRA VREG_L15
12 38 Note
VIN_S4_1 VFB_S4 VREG_L16_1P8 [11]
Local sense from MSM side for S4 Star routing to each VIN group VREG_L16 48
13 VIN_S4_2
34 VREG_L17_2P85
VREG_L17 [14]
26 VIN_S4_3
33 18 VREG_L18_2P7 [17,19,20,21,22,23]
VIN_GR6 VREG_L18

23 VREG_L19_1P3 [5,24]
2.2uH VREG_L19
C340 4.7uF L336 VREG_S4_2P05 [11,12,26]
10 GND_S4_1 VSW_S4_1 11 [14]
20 VREG_L22_2P8
VREG_L22
C341

C342

e
24 GND_S4_2 VSW_S4_2 25
138 VREG_L23_1P175 [5,14]
SG337

VREG_L23
22uF

22uF

C388
C343

C344

C640

C345

C346

C347
C348

C349

C350

C351

C353

C355
C352

C354

C356

C357
SG338

1.0uF

4.7uF

1.0uF

1.0uF

1.0uF
VREG_S5_S6_0P8625
[4,12]

1.0uF

1.0uF
157 115

1.0uF

4.7uF

1.0uF

4.7uF

0.1uF

1.0uF

4.7uF

4.7uF

4.7uF
10V
VIN_S5_1 VFB_S5

1.0uF
171 VIN_S5_2

id
185 VIN_S5_3

C358
L337
159 158 VREG_S5_S6_0P8625 [4,12]
GND_S5_1 VSW_S5_1
0.47uH
173 GND_S5_2 VSW_S5_2 172
4.7uF B
SG339

187 GND_S5_3 VSW_S5_3 186 Remote sense from MSM side for S5/6

154 VIN_S6_1 VFB_S6 127

168 VIN_S6_2
nf
182 VIN_S6_3

C359 4.7uF
156 GND_S6_1 VSW_S6_1 155

170 GND_S6_2 VSW_S6_2 169


SG340

L338 0.47uH
184 GND_S6_3 VSW_S6_3 183

144 VIN_S7_1 VFB_S7 103 VREG_S7_0P915 [4,5,12]


Co
145 VIN_S7_2

L339
C360 4.7uF VREG_S7_0P915 [4,5,12]
118 GND_S7_1 VSW_S7_1 130
2.2uH
119 GND_S7_2 VSW_S7_2 131
SG341

Remote sense from MSM side for S7

116 GND [2,3,4,5,6,7,8,9,10,11,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]


VREG_NEG_S5

VREG_NEG_S6 128

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 12_PM8953_SMPS/LDO SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 12 OF 30


5 4 3 2 1
5 4 3 2 1

HEADSET FM&DTV SWITCH

R443 2.2K/NC
CDC_MIC_BIAS2 [11]
L510 82NH
CDC_HDS_MIC2_P [11]

C443

C470
C917 L901 L902 39nH
[13] FM_ANT 1 2 1000PF 39nH C911 1 2 1000PF
FM_LANT_P [24]

33PF

C910
1nF

2
AUDIO-EAR-PH16-7B05F3MB

33PF
D
[11]

1
3 B444 1800ohm CDC_HPH_R
4 B445 1800ohm CDC_HPH_L [11]
5 B450 1800ohm 20K
R447 CDC_HS_DET [11]
2
D 6
B443 2 1000PF

C587
1 1800ohm C912 2 1 10PF C913 2 1 10PF C918 1 DTV_ANT [26]

C586
C446
C445
0

C447
J901 FM_ANT [13]
R403

R449

15NH
NF

10K

L903
33PF

33PF
TVS443

TVS444

1nF
C451
NF

C453
NF
C666

1nF
Note: For Cable detection
1
VR443
?PF

TVS445 TVS446
L443 1000ohm
CDC_HPH_REF[11]
B600 1000ohm

C449
TP1306
Dedicated VIA to Main GND TP-1.0MM

l
33PF

HT2

MAIN MIC
AUDIO PA

ia 0.1uF

10uF
CDC_MIC_BIAS1

TP2
C367
C366
L361 1.0uH
VPH_PWR C
Analog MIC
R1002

A2
B2
A3
A4
B3
B4
C3
C4
C5
D3
D4
MIC1 Close to MIC

0.1uF
1nF
R456

SW
SW
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
C 1 4 0
VDD OUTPUT
16v

nt
C1002

2 3
C461
C1001

GND GND

C617

C602
CDC_MIC1_P [11]
A5 D5 J907
IC-AUDIO_MIC_AM4311T42A0_PARTRON CDC_MIC1_M [11] R362 100 A6 VP GPI A1
[2] AUDIO_PA_RST
NF

A7 RESET U508 VBST B1


TVS1002

R614
0 INT VBST

1
R457 [2] AMP_INT
220PF

0 B5 C1
100nF

10uF 10uF 10uF 10uF


E6 GNDA VSPK D1
C464

[2,15] SPK_I2C_SCL
SCL VSPK
C463

[2,15] SPK_I2C_SDA D6 CS35L35-CWZR/A0 D2 C615 C604 C603 C614


NF R370 E5 SDA OUT+ C2
VREG_L5_1P8 AD0 OUT-
R1003

F6 E2
NF

SYNC VSNS+

0
F7 E3
NF
0

PDM_CLK_IN VSNS- 1

LRCK/FSYNC
E7 F1
TVS1001

VSPK_MODE
PDM_DATA_IN ISNS+ J905
E1 0 R6622
ISNS-
0R_220ohm B391

SDOUT

FILT+
B1301

0.01uF
0R_220ohm

MCLK
SCLK
SDIN

GNDA

VREG
1 SPKR_OUT_P

VA
R364
0 R6623
J906
B1300 0R_220ohm B392 0R_220ohm
Close to BB

C625
B7
C7
D7
C6
B6
E4
F5
F3
F2
F4
SPKR_OUT_M

C636

C635

C920

C919

C380

C381
1uF C626

33PF C628 1uF C627

e
together then single via to main GND

33PF

33PF
NF

NF

NF

NF
VREG_L5_1P8

C601
[2] SMART_PA_MCLK
R605 0
[2] I2S_1_BCK
R603
[2] I2S_1_MOSI 0 TVS616 TVS617

Aux MIC

0.1uF
[2] I2S_1_LRCK R604 0
0

id
R606
[2] I2S_1_MISO

CDC_MIC_BIAS1

B Analog MIC I2C ADDRESS:0X68/69


R453

Close to BB
MIC443 Close to MIC
0
1 4 B447
VDD OUTPUT CDC_MIC3_P [11]
2 3
nf
C454

GND GND
C455

100PF_NF

C456

C457
10PF

IC-AUDIO_MIC_AM4311T42A0_PARTRON
0
TVS447

B448
220PF

100nF

CDC_MIC3_M [11]
C458
C459
R455

TVS448

33PF
NF

33PF

Co
together then single via to main GND

REC

AUDIO-REC-KFR15062.8-32-HV(98998)

[11] CDC_EAR_M R458 0


33PF

2
C462

A
R459 0
1 RECEIVER
[11] CDC_EAR_P
TVS449

TVS450

A
REC443
33PF

33PF
C465

C466

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 13__AUDIO SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 13 OF 30


5 4 3 2 1
5 4 3 2 1

Front Camera
Rear Camera
VREG_L22_2P8
FCAM_2V8

C1403

1.0uF
U1400
1 4

C402

C403
J402 MIPI_CSI0_LANE1_N [3] 4 1
R1400 NF

HT1
33 34 VPH_PWR IN OUT
2 3 MIPI_CSI0_LANE1_P [3]
1 30
EM402 3 2

2.2uF
1uF
2 29 [2] FCAM-LDO-EN EN GND

C1401

10uF
EM404

NF
[2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
GND D

1.0uF
C404
3 28 1 4 [3] LDO-SGM2031 3 2
[2] CAM_I2C_SDA0 MIPI_CSI0_CLK_N MIPI_CSI2_LANE1_N [3]
[12] VREG_L17_2P85 4 27 J403
VCM 2.8V 2 3 4 1
5 26 MIPI_CSI0_CLK_P [3] 33 34 MIPI_CSI2_LANE1_P [3]

R1402
CAM_DOVDD_1V8 DOVDD(IO1.8V)
EM403
6 25
D [2] CAM_I2C_SCL0 1 30
7 24 EM406
AGND 1 4 MIPI_CSI0_LANE0_N [3] 2 29 3 2
8 23 MIPI_CSI2_CLK_N [3]
[2] MCAM0_PWD_N [2,14] CAM_I2C_SDA1 3 28
9 AVDD 2.7V 22 2 3 MIPI_CSI0_LANE0_P
RCAM_AVDD [3] 4 27 4 1 MIPI_CSI2_CLK_P [3]
[12] 10 21 EM405
[14] VREG_L2_1P1 5 26
DVDD 1.2V CAM_DOVDD_1V8
C406 DOVDD
2.2uF

11 20
C405

NC [2,14] 6 25
1 4 [3] CAM_I2C_SCL1 EM408
12 19 MIPI_CSI0_LANE2_N
[14] XVS XVS-A 7 24 3 2 MIPI_CSI2_LANE0_N [3]
13 18 [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28] GND
2 3 [3] 8 23
2.2uF

MIPI_CSI0_LANE2_P [2] SCAM_PWD_N


14 17 0 4 1 MIPI_CSI2_LANE0_P [3]
[2] CAM_MCLK0 EM407 R672 9 22
15 16 [14] FCAM_2V8 AVDD
10 21

C408
C407 [5,12,14] VREG_L23_1P175
DVDD
31 32 1 4 MIPI_CSI0_LANE3_N [3] 11 20
33PF 3 2 EM410
12 19 MIPI_CSI2_LANE2_N [3]
2 3 [3]

2.2uF
MIPI_CSI0_LANE3_P 13 18
BTBS-AXE530127 4 1
EM409 [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28] MIPI_CSI2_LANE2_P [3]
14 17
GND [2] CAM_ MCLK2

l
Rear Camera: 13Mp

Front Flash
15 16

C410
Flash Light

C409
HT403
31 32 EM411
Module: 3 2 MIPI_ CSI2_ LANE3_ N [3]

1uF
Sensor: IMX258( 2.7V/1.2V/1.8V) 4 1

33PF
BTBS-AXE530127 MIPI_CSI2_LANE3_P [3]
I2C Address:0x34/0x35

10uF
AK7371:0x18/0x19

ia
I2C Address:0x10

10uF

C561
U905 TVS402 Front Camera: 8Mp

C560
1
J303 VPH_PWR
1
VIN VOUT
10
J539
Module:
1
2
C1 PGND
9 Sensor: IMX219 ( 2.8V/1.2V/1.8V)
F_ LED1 [10] 1
J301 R1412 NF C413 1uF 3 8
C2 SGND
R1410 0R 4 7
RCAM_AVDD FLASH FB
F_LED2 [10] [2] GPIO40_FLASH_1W J538

1.0uF
1

C411

0.62
U2 U3 U4 U402 1 C
J302 5 6
EN RSET

240K
240K
4 1

R543
1

VPH_PWR IN OUT
LED-DRIVER-OCP8110
C1410 56PF

C1411 56PF
2

R574
2.2uF
C412
3 2
C [2] RCAM_AVDD_EN EN GND

nt R541
R575
1

68K
[2] FRONT_FLASH_EN
Main Camera / Sub Camera share power domain design

10K
LDO-SGM2031

TVS1 TVS2
TVS440
should double check the voltage level is compatible

R518

Depth Camera Display

e
id
J404 1 4 [3]
MIPI_CSI1_LANE1_N
C414

C415

33 34
2 3 MIPI_CSI1_LANE1_P [3]
1 30
[2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28] EM412
2.2uF

2 29
1uF

GND
3 28 1 4 [3]
[2,14] CAM_I2C_SDA1 MIPI_CSI1_CLK_N
VREG_L22_2P8 4 27
[12,14] VCM 2.8V 2 3
5 26 MIPI_CSI1_CLK_P [3] B
CAM_DOVDD_1V8 DOVDD(IO1.8V)
EM413
6 25
[2,14] CAM_I2C_SCL1
7 24
AGND 1 4 MIPI_CSI1_LANE0_N [3]
8 23
B [2] MCAM1_PWD_N
AVDD 2.8V 9 22 2 3
[14] DCAM_2V7 MIPI_CSI1_LANE0_P [3]
AVDD 2.7V
10 21
C416

EM414
VREG_L23_1P175 DVDD 1.2V
11 20
C417

[5,12,14]
NC 1 4
R560 0 12 19 MIPI_CSI1_LANE2_N [3]
XVS
2.2uF

50mA
Backlight LED
200mA
[14] 13
XVS-A
nf 18 2 3
2.2uF

MIPI_CSI1_LANE2_P [3]
14 17
CAM_MCLK1 EM415
[2] 15 16
1 4
31 32
33PF

MIPI_CSI1_LANE3_N [3]
C418

2 3 MIPI_CSI1_LANE3_P [3]

33PF

33PF

33PF

33PF

33PF
BTBS-AXE530127 EM416
3 2
J388 MIPI_DSI0_LANE3_N [3]
33 34
4 1

C393

C584

C585
[3]

C391

C392
MIPI_DSI0_LANE3_P
1 30 EM386
Rear Camera: 13Mp [10] LCD_BL_LED_A
2 29
0R 3 2
R333 3 28
Module: [10] LCD_BL_LED_K1 0R
MIPI_DSI0_LANE0_N [3]
R334 4 27
4 1
Sensor: IMX258( 2.7V/1.2V/1.8V) [10] LCD_BL_LED_K2
5 26 MIPI_DSI0_LANE0_P [3]
6 25 EM387
I2C Address:0x34/0x35
Co
R391 30 7 24 3 2
AK7371:0x18/0x19 [10] LCD_VSP
R392 8 23
MIPI_DSI0_CLK_N [3]
30
[10] LCD_VSN 4 1
9 22 MIPI_DSI0_CLK_P [3]
VREG_L6_1P8 C1440 1.0uF
Main Camera / Sub Camera share power domain design R393 1K
10
11
21
20
EM388

[2] LCD_RST_N 3 2
MIPI_DSI0_LANE1_N [3]
should double check the voltage level is compatible [2] LCD_TE0
R610
R395
1K
1K
12
13
19
18 4 1 [3]
[2] LCD_ID id MIPI_DSI0_LANE1_P
R394 1K 14 17
[10] LCD_CABC EM389
15 16
3 2

C394
MIPI_DSI0_LANE2_N [3]
31 32

NC
4 1
MIPI_DSI0_LANE2_P [3]

33PF
BTBS-AXE530127 EM390

VREG_L6_1P8 TVS12 TVS13 TVS14


CAM_DOVDD_1V8

A U1406
R1420 0
4 1
VPH_PWR IN OUT A
C1400
3 2 C1420 DCAM_2V7
EN GND
1.0uF
C420

1.0uF U405
LDO-SGM2031 1.0uF
4 1
VPH_PWR IN OUT
2.2uF
C421

3 2
[2] DCAM_AVDD_EN EN GND
68K

[2] CAM_DOVDD_EN LDO-SGM2031

PROJECT: ZACH REV: V1.2


R519

Vendor:
DOCUMENT NO.: 14_LCD/CAMERA SIZED: D
Module:
Driver: NT35596
DEPARTMENT:
Hardware DEPT.
COMPANY:
BackLight: 6*2 12 LEDs
ID:
DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 14 OF 30
5 4 3 2 1
5 4 3 2 1

M-Sensor TP-0.5MM TP-0.5MM


TP1500 TP1501
TP-0.5MM
TP1502
TP-0.5MM
TP1503 VREG_L10_2P8

Gyroscope+Accelerometer ALS+PS+IR

C428
VREG_L6_1P8
[2,4,12,14,15]

Leackage Copper

2.2uF
C426

0.1uF
VREG_L10_2P8 [12,15]
VREG_L6_1P8
SAR DETECT

A2
B1
C4
D1

C425

C424
VREG_L6_1P8

CSB
VDD
VID
CAD0
[2] SEN_SPI_CS2_N D

TVS520
C3

47K_NF R2501
NC2

4.7K
2.2uF

100nF
[2,15] SEN_SPI_CLK A3 C2

C430
SCL NC1
A4 SDA U504 RSTN D4 VREG_L6_1P8 VREG_L6_1P8 U2501 VREG_L10_2P8
[2,15] SEN_SPI_MOSI
A1 DRDY NC B3 [2,4,12,14,15]

R424
[2] MAG_INT_N B4 VREG_L6_1P8
for ACVREG_L6_1P8
noise filter

CAD1
SO SEN_SPI_MISO [2,15] 1 8 U510

100nF

4.7uF
VSS
R570 47K_NF [2,15] SEN_SPI_MISO SDO VDD
D

1k_NF
R569
VREG_L6_1P8 R425 24 1 8 SAR_ I2C_ SCL [15]

C1
D2
R567 NF 2 9 R931 NF VDD VSS VREG_L10_2P8
ASDX INT2

1
GYRO_ INT_ N [2] VPH_PWR [2,15] SENSOR_I2C_SDA 2 7

R1005
SDA INT ALSP_INT_N [2]

47K_NF
TP-0.5MM U6 for AC noise filter
R568 NF 3 10 R509 NF 3 6 U901
ASCX OCSB TP1505 [2,15] SENSOR_ I2C_ SCL SCL PGND
4 1 4 5 [15] SAR_I2C_SDA 1 8 R1006 24
TP1504 4 11 C427 470nF IN OUT LEDA LEDK/LDR SDA VDD
AKM: AK09915

C922
TP-0.5MM [2] ACCEL_INT INT1 OSDO 2 7

TVS517

TVS518

TVS519
C1560
C1910 INT SCL

C431
[2] SAR_PS_INT

2
3 2 SENSOR-LIGHT-TMD27253
[2] GPIO25_V3V3_EN EN GND

TVS516
1
5 12 3 6
I2C Address@CAD&1=0; 0001100R/W( 0CH) VREG_L6_1P8 VDDIO CSB SEN_SPI_CS_N [2] LDR GND
LDO-SGM2031 8.2pF

1
1.0uF
i2c slave add:0x39

C429
4 5

100nF
1.0uF

C1004
6 13 LEDK LEDA
Write 0x18 GNDIO SCX SEN_SPI_CLK [2,15]

C1003
SENSOR-LIGHT-LTR-559ALS-028WA
Read 0x19 7 14

100nF

4.7uF
GND SDX SEN_SPI_MOSI [2,15]
7bit i2c slave add:0x39

100nF
l
Power on sequence: L6/L17 can be applied in any order GYROSCOPIC-BMI120

BMI160 SD0=0 7b1101000 0x68 ALS+PS+IR=TMD2725


0R R1500
LSM6DS3 SD0=0 7b1101010 0x6A [2,13] SPK_ I2C_ SDA SAR_I2C_SDA [15]

ia
NF R1501
Power on sequence: L6/L17 can be applied in any order [2,15] SENSOR_I2C_SDA

0R R1502

[2,13] SPK_I2C_SCL SAR_I2C_SCL [15]


NF R1503

[2,15] SENSOR_I2C_SCL

e nt
Finger Print CTP TP-0.8MM
TP386

id
1
B
TP-0.8MM
TP388
TP-0.8MM

FPC2050
TP387
B TP-0.8MM TP-0.8MM
TP390
TP391

1
pin ??? R386 10K/NC TP-0.8MM J221

1
TP-0.5MM TP-0.5MM TP-0.5MM TP-0.5MM TP-0.5MM VREG_L5_1P8 TP389
TP-0.5MM
nf
TP1521 TP1522 TP1523 TP1524 TP1525 R387 10K/NC

1
TP1520 14 12

1
18 17 13 11
R1904

1
0R
VREG_L5_1P8
1

1 2 1
2
1

3 4 [2,15] TP_RST_N TP_RST_N [2,15] 3


FP_SPI_MISO [2] VREG_L10_2P8 4
[2] FP_HW_ID 5 6 [2,15] TP_INT_N TP_INT_N [2,15] 6 5
FP_SPI_MOSI [2] [2,15] TP_I2C_SDA TP_INT_N [2,15]
R587 NF 7 8 7
FP_SPI_CS [2] [12,15] VREG_L10_2P8 VREG_L10_2P8 [12,15] 8 TP_RST_N [2,15]
R586 NF 9 J1902 10 [2,15] TP_I2C_SCL 9
[15] FP_2V8 FP_SPI_CLK [2] [2,15] TP_I2C_SDA 10
11 12 TP_I2C_SDA [2,15]
[2] FP_INT_N FP_RST_N [2] [2,15]
13 14 TP_I2C_SCL TP_I2C_SCL [2,15]
BTBS-BF040-I10B-C08-A

TVS389

TVS390
C1906

1.0uFTVS6 C1903

15 16
47PF-NF

TVS388

TVS386
C1501

BTBS-AXE514127D-A
Co

C389
TVS10

TVS11
TVS4

TVS8

TVS3

TVS5

TVS9

TVS7
1.0uF

TVS387
2.2uF
Power on sequence: Single Supply

FocalTech: FT5436

I2C Address
VPH_PWR
FP_2V8
A
U404
Write 0x70 It can be changed by FACTORY.
Read 0x71 A
4 1
IN OUT
C422

1.0uF
C423

3 2
EN GND
LDO-SGM2031
1.0uF

[2] FP_LDOEN_2V8 PROJECT: ZACH REV: V1.2


47K

DOCUMENT NO.: 15_FP/CTP/SENSOR SIZED: D

DEPARTMENT:
Hardware DEPT.
R402

COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 15 OF 30


5 4 3 2 1
5 4 3 2 1

SIM/TF
R520
VREG_L5_1P8 [2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27]
TP520

TP-1.0MM

TP-1.0MM
10K TP-0.8MM D

TP-1.0MM

TP-1.0MM

TP1603

TP1604
TP1602

TP1601

TP-1.0MM
TP1605
FORCE_USB_BOOT [2,16] TP521
TP-0.8MM

TP-1.0MM
TP1600
TVS424

TVS425

TVS427

TVS426
33PF
NF

NF

C435

C436
R431 15K VREG_L5_1P8

C434
C1006

C433
R432 TP-0.8MM
NF R591

NF

NF
J540 10K TP-0.8MM TP392
VREG_L14_UIM1
Keys
TP393
U702 C610 100nF
R433 0 SIM1-C1 SIM1-C7 TP-0.8MM
VDD_NFC_OUT 1 A
VCC Nano--SIM1 I/O UIM1_DATA [2] [3,6,28] MSM_RESOUT_N VCC 5 TP394
2 B

l
SIM1-C6 SIM1-C3 [2,16] KEY_VOL_UP_N 3 GND Y 4 R618 10K FORCE_USB_BOOT [2,16]

1
[27] NFC_SWP_UIM VPP CLK UIM1_CLK [2]

1
LOGIC-NC7SZ02P5X J387
[2] UIM1_RESET SIM1-C2 SIM1-C5
RST GND
15K

1
R434
1.0uF C437 VREG_L15_UIM2 1 7
SIM2-C7 2 8 1K R390
VREG_L5_1P8
VREG_L15_UIM2
SIM2-C1
VCC Nano--SIM2 I/O UIM2_DATA KYPD_PWR_N1 [10,11,16] Power On
[2]
SIM2-C6 SIM2-C3 3 9
R904

C438 NF VPP CLK UIM2_CLK R388 1K 4 10


Volume Up [2,16] KEY_VOL_UP_N

ia
[2] UIM2_RESET SIM2-C2 [2]
SIM2-C5

C440
RST

C439
GND
R389 1K 5 11
Volume Down [10,11,16]PM_RESIN_N1 6 12

TVS432
D/T

TVS431
10K

SIM-DETE 1

NF

NF
R901 0R S/W GROUND VE115-020-X1
[2] SIM1&TF_DET_N TRAY-DETE

T387
VREG_L12_VDDPX2_SDC
G5 T388
G1 GND VREG_L12_VDDPX2_SDC
R437

R439
R438

GND

R440
G6
TVS428

TVS429

TVS430
R436

G2 GND
GND G7
G3 GND C
GND G8

del B410
G4 GND
GND G9
GND T386

47K/NC

47K/NC
47K/NC

47K/NC

47K/NC

C B413 30ohm T1 T5 SDC2_SDCARD_CLK [3]


[3] SDC2_SDCARD_D2 DAT2 CLK
B414

nt
30ohm T2 TF T6
[3] SDC2_SDCARD_D3 CD/DAT3 VSS
[3] SDC2_SDCARD_CMD
B415 30ohm T3
CMD DAT0
T7 B411 30ohm SDC2_SDCARD_D0 [3] Description Signal
R540 0 T4 T8 B412 30ohm SDC2_SDCARD_D1 [3]
VREG_L11_2P95 VDD DAT1 Volume Up KPSNS0
Volume Down PM_RST_N

C540
C442

SIM+TF-SIM-SD-2010250214
C543

C544

C545

C541
C441

C542
TVS437

TVS438

TVS439

PWER_ON KYPD_PWR_N

TVS434

TVS435

TVS436
TVS433
3.9PF

3.9PF
3.9PF

0.1uF

3.9PF
3.9PF

3.9PF
2.2uF

Hardware Reset PM_RST_N +


KYPD_PWR_N

e
NON TRAY OPEN

TRAY IN CLOSE

id
B

B
nf
Test Point
TP-1.2MM TP-0.8MM
TP-0.8MM TP-1.2MM TP397 TP-1.2MM
TP395 TP396 TP399 TP398

C397
C1008

C1007

2
1
1

1
300

1
R396 R397 0
[9] USB_PMI_DM 300
R398 R399 0 VBUS_USB_IN

4.7uF
[9] USB_PMI_DP

1nF

NF
J389

D387

3
D386
R909 0
Co
C396 NF R400 0 1
1 4
[3] USB_DM 2
TP-0.8MM
TP-0.8MM

[3] USB_DP 3 9
TP522

2 3
8
TP523

TP-0.8MM

4
EMI386 6
VREG_L5_1P8 5 7
TP1

U910

TVS392

TVS393

0

D610 A2 OUT MICRO-USBS-3.2.01.0320
R401 A3 OUT IN B3
C2
2M

R913

L107

L105
VREG_L5_1P8

L106
33PF

TVS391
[2,9,10] USB_ID B2 OUT IN C3

1M
J613

L108
IN

C921
1M
R910
B1 ACOK OVLO C1
C618

18

R914
17
1M

R915
EN A1

A4 GND
B4 GND
GND
NF
1 2

R933

C4
JTAG_TDO [3]
KEY_VOL_UP_N [2,16] R620 NF 3 4
JTAG_TCK [3]
R621

470K

JTAG_TMS [3] 5 6

1M

1M
PM_RESIN_N1 [10,11,16] JTAG_TDI [3]
7 8
KYPD_PWR_N1 [10,11,16] Q520
JTAG_TRST_N [3] 9 10
A
2

UART_ MSM_ TX [2]


R1601 1K 11 12 FORCE_USB_BOOT [2,16]
S

R1600 1K 13 14 1
UART_ MSM_ RX [2]
G A
MSM_ PS_ HOLD [3,11,28] 15 16
C624

JTAG_RESOUT_N [3]
D
C623
C622

3
C619

BTBS-DF37NB-16DS-0.4V(51)
TVS626

TVS627

R622 10K
WDOG_DISABLE [2,28]
33PF

100nF
33PF

100nF

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 16__SIM/TF/KEY/IO SIZED: D

DEPARTMENT:
Hardware DEPT.

JTAG CONNECTOR
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 16 OF 30


5 4 3 3 2 1
5 4 3 2 1

D
U2901-A

CONTROL
D WTR0_XO_IN [17] 51 57
XO_IN DRX_HB1 WTR0_DRX_HB1 [22]
[2] RFFE4_CLK
DRX_HB2 53 WTR0_DRX_HB2 [22]
[2] RFFE4_DATA 47 RFFE_CLK
55 RFFE_DATA DRX_MB1 59 WTR0_DRX_MB1 [22]

NF

NF
DRX_MB2 54 WTR0_DRX_MB2 [22]
U2901-B
CH0_GSM_TX_PHASE_D0 [2] 44 58 WTR0_DRX_MB3 [22]

C2938
WTR2955 GP_DATA DRX_MB3

C2939
WTR0_GPS [24] 52 50
PWR_GND GNSS_IN DRX_LB1 WTR0_DRX_LB1 [22]
40 35 WTR0_VDD_RF1_DIG [17] 43
GND_13 VDD_RF1_DIG DRX_LB2
48 GNSS_BBQ DRX_LB3 34
WTR0_GPSBB_Q_P [7]
11 25 WTR0_VDD_RF1_TX [17]
GND_1 VDD_RF1_TX WTR0_GPSBB_I_P [7]

l
56 46 WTR0_DRXBB_I_P [7]
GNSS_BBI DRX_BBI
30 WTR0_VDD_RF1_RX [17]
VDD_RF1_RX
42 GND_14 41 WTR0_DRXBB_Q_P [7]
DRX_BBQ
17 WTR0_VDD_RF2 [17] WTR0_PDET_INP [17] 39
VDD_RF2 FBRX_RFIP
R2901 100PF
20 C2901 close to WTR2955 C2961
31
GND_3 FBRX_RFIM

ia
26 51
VDD_RF2_LDO C2902
32 WTR0_TXBB_I_P [7,18] 22 16 WTR0_PRXBB_I_P [7]
GND_8 TX_BB_IP PRX_BBI
1.0uF 1 2
[21] WTR0_TX_GSMHB WTR0_TXBB_I_M [7,18]
GND_2 19 18 TX_BB_IM
CAP-22PF-0201-COG
WTR0_TXBB_Q_P [7,18] 7 12 WTR0_PRXBB_Q_P [7]
22PF TX_BB_QP PRX_BBQ
29 27 WTR0_TXBB_Q_M [7,18] 15
GND_7 GND_6 TX_BB_QM
37 GND_11 GND_10 36 3 WTR0_PRX_HB1 [20]
PRX_HB1
C2903 10 8
TX_DA1 PRX_HB2 WTR0_PRX_HB2 [20]
C
[21] WTR0_ TX_ GSMLB 1 TX_DA2
38 GND_12 GND_4 23 6 TX_DA3 PRX_MB1 5
WTR0_PRX_MB1 [20]
22PF
2 TX_DA4 PRX_MB2 9
WTR0_PRX_MB2 [20]
C
33 GND_9 4
PRX_MB3 WTR0_PRX_MB3 [20]

nt
GND_5 24
45 GND_15 [18] DRX_CA 49 DRX_CA
C2905 PRX_LB1 14
C2990 1.2pF C2904 1.2pF
WTR0_PRX_LB1 [20]
[19]WTR0_TX_B7_B38_B40_B41 13 21
[18] PRX_CA PRX_CA PRX_LB2

1.2pF

1.2pF
22PF 28
PRX_LB3

WTR2955

C2991

C2906

C2907

22PF
C2963 1.2pF
[19] WTR0_TX_B1_B2_B3_B4_B66

1.2pF
e
C2964
Note:RX ports have DC at the pin, so it need DC block,please make sure there is no DC short to other voltages and GND

id
B
close to WTR2955

B R2902
VREG_L4_1P8 [12,18,24] WTR0_VDD_RF2 [17]

0.01uF
470nF
10uF

1.0uF

C2911
C2910
C2908

C2909

nf
R2904
[21] MAIN_CPL_OUT 1
U2903

IN/OUT OUT/IN 3
3dB attenuator
R2903
SPDT
WTR0_VDD_RF1_DIG [17] 15 C2945 22PF
VREG_L1_1P0 [12,18] WTR1_PDET_INP [18]
2 U2902

R2905
0 GND

200

R2906
6 1

200
1.0uF
10uF

0.1uF

CTRL RF2
C2913
C2912

C2914

5 2
RFC GND
4 3
VDD RF1

R2908 RF-SWITCH-QM12002(SPDT) C2915 22PF WTR0_PDET_INP [17]


Co
WTR0_VDD_RF1_TX [17]

0
0.01uF
0.1uF

[12,19,20,21,22,23]
VREG_L18_2P7
C2917
C2916

[2] GRFC13_SEL

1000PF
R2909
WTR0_VDD_RF1_RX [17]

0
0.1uF

C2918
0.01uF
C2919

C2920

C2921
A
R2910 WTR0_XO_IN [17]
WTR_XO_CLK [11]

FB
220
22PF

100PF
C2922

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 29_WTR2965_0 SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 17 OF 30


5 4 3 2 1
5 4 3 2 1
5 4 3 2 1

D
U3001-A

D
R3001 CONTROL
WTR1_XO_IN [11] 51 XO_IN DRX_HB1 57
C3001
100PF
220

[2] RFFE5_CLK 47 RFFE_CLK


DRX_HB2 53
Note:RX ports have DC at the pin,
55 59
so it need DC block,please make sure

C3002
22PF
[2] RFFE5_DATA RFFE_DATA DRX_MB1

DRX_MB2 54

NF

NF
44 GP_DATA DRX_MB3 58
there is no DC short to other voltages and GND

C3030

C3031
52 GNSS_IN DRX_LB1 50 WTR1_DRX_LB1 [22]

DRX_LB2 43 [22]
WTR1_ DRX_ LB2

l
48 GNSS_BBQ DRX_LB3 34 WTR1_DRX_LB3 [22]

56 GNSS_BBI DRX_BBI 46
WTR1_ DRXBB_ I_ P[7]

DRX_BBQ 41 WTR1_ DRXBB_ Q_ P[7]

39 FBRX_RFIP
[17]WTR1_PDET_INP

ia
C3051 100PF
31 FBRX_RFIM
51 R3003

[7,17] WTR0_ TXBB_ I_ P 22 TX_BB_IP PRX_BBI 16


WTR1_ PRXBB_ I_ P[7]

[7,17] WTR0_ TXBB_ I_ M 18 TX_BB_IM


[7,17] WTR0_ TXBB_ Q_ P 7 TX_BB_QP PRX_BBQ 12 WTR1_ PRXBB_ Q_ P[7]

[7,17] WTR0_ TXBB_ Q_ M 15 TX_BB_QM


C3000 3
PRX_HB1
C3028
C
[19] WTR1_TX_B12_B13_B17_B20_28 10 TX_DA1 PRX_HB2 8
[19] WTR1_ TX_ B5_ B8_ B26 1 TX_DA2
22PF
6 TX_DA3 PRX_MB1 5
C 22PF
2 9

nt
TX_DA4 PRX_MB2

PRX_MB3 4
C3005 C3006
1 2 1 2 49
[17] DRX_CA DRX_CA
0 0 14 WTR1_PRX_LB1 [20]
PRX_LB1
C3007 C3008
1 2 1 2 13 21 [20]
[17] PRX_CA PRX_CA PRX_LB2 WTR1_ PRX_ LB2
0 0 28 WTR1_PRX_LB3 [20]
PRX_LB3
2

2
C3009

C3023
NF

NF
1

e
R3004

id
VREG_L1_1P0 [12,17]
0

1.0uF
0.1uF
C3011

10uF
C3013
U3001-B

C3012
B
PWR_GND R3005
40 GND_13 VDD_RF1_DIG 35
0

0.01uF
C3014
B

0.1uF
C3015
11 GND_1 VDD_RF1_TX 25

R3006
VDD_RF1_RX 30
nf 42 GND_14
0

VDD_RF2 17

0.01uF

0.1uF
C3017
C3016
20 C3018
GND_3

VDD_RF2_LDO 26

32 GND_8
1.0uF
GND_2 19
R3007 VREG_L4_1P8 [12,17,24]

29 GND_7 GND_6 27 0
37 36

C3021
GND_11 GND_10

0.01uF

C3022
470nF
C3020
C3019

1.0uF

10uF
Co
38 GND_12 GND_4 23

33 GND_9
GND_5 24
45 GND_15

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 30_WTR2965_1 SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 18 OF 30


5 4 3 2 1
5 4 3 2 1

Band41
U3108

Band7
12pF
C3142 C3126
1 2
2 1 [21] TRX_B41
C3160 1 4

2
PA ANT

2
C3129

C3119
2
12pF

2
C3143

NF

NF
4.7nH
[20]PA_B7_TX

C3140
NF
2

1
12pF GND

1
C3159
C3162

1
NF

NF
3 GND GND 5

885049

5
D 3 C3139

GND GND
GND

Band40
12pF 12pF 1 1 2
2 1 2 1 4 IN
TRX_B40[21] OUT
12pF C3174 [20]

2
C3137

2
2 1

C3141
U3101 PRX_B40

2
C3111 C3120

Band40

NF

NF
L3107

L3113
NF

NF
L3101
12pF

1
NF

2
C3173
Band1

NF
1
C3125
C3153 [20]
PA_B1_TX[20] 2 1 PRX_ B41

Band41
4.7PF 12pF

Note:HB3 to HBRX1. HB1, HB2&HB4 to HBRX2

1
7.5NH
L3110

C3130

l
2
C3152
NF
Band4/66

NF
1
2
0
L3112 WTR0_TX_B7_B38_B40_B41 [17]
PA_ B4/66_ TX [20] U3103
R3104

C3167
2.7nH

ia

NF
C3115

24

25

26

27

28
23
L3115
NF
NF

NF
C3198

HB2

GND

HB3

GND

HB4
GND
HBRX1 1 2 1
22 HB1

Band3

2
21 HBRX2 2
GND
3 U3109
R3100 20 MBRX
MB5(B34/39)
4 C3166 C3172
PA_B3_TX [20] 19 RFIN-H [17]
MB4 L3119
4 6 WTR0_ TX_ B1_ B2_ B3_ B4_ B66
0 18 5 RF_MB1_TX_1 OUT IN

1
MB3 SKY77652 RFIN-M

C3131
1

C3118
17 6 3.6nH 2 NC

NF

C3157

C3163
1.0PF

1.0PF
MB2 GND GND

NF
5 3 C

Band2
33PF 33PF
16 7 GND NC
MB1 GND

VBATT
VCC1

SCLK
APT 15 8 RF-BAND-LF1005_N1R9NBAT/LF

GND

GND

VIO
VCC2 SDATA

L3111

14

13

12

11

10

9
C

nt
PA_ B2_ TX [20]
0

1
2.7nH

L3114
C3114 0 RFFE1_DATA [2,19,21,25]

NF
NF

C3110
RFFE1_CLK [2,19,21,25] R3110

2
R3102

NF
2
VREG_L5_1P8
VREG_L5_1P8

C3164

100PF
VPH_PWR [2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27]

C3178

1
2
VPH_PWR

NF
[9,10,11,12,13,14,15,19,21,25,26,27]

C3146
C3144

0.1uF
10PF

1
C3148

1
4.7uF
APT [19]
APT

100PF
C3116

100PF
0.1uF

C3121
10uF

C3180

C3132

C3135
C3127
[9,10,11,12,13,14,15,19,21,25,26,27]

33PF

33PF
VPH_PWR

e
PA_THERM0 [11]

C3147
C3145

0.1uF
10PF

C3149

4.7uF
RT3100

2 C3168
APT [19]

CAP-0201-NF
APT

100PF
C3117

APT
100PF
0.1uF

C3122
10uF

C3181
VREG_L5_1P8

C3133

C3134
C3128

NF 1
100K

id
VREG_L5_1P8 [2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27]

33PF

33PF
VPH_PWR 0

C3161

100PF
RFFE1_CLK [2,19,21,25]

2
C3177
R3101

2
NF

1
Band8

1
0
RFFE1_DATA [2,19,21,25]
U3107

24
19

20

21

22

23

C3105
R3111

2
NF
B

SCLK
GND

VCC1

GND

VBATT

VIO
L3121 L3120 L3108

1
18 SDATA 1 VPA_APT R3105 APT
PA_B8_TX [20] VCC2
3.3NH 3.3NH 3.3NH GND 2
B 17 L3118 0
C3175

C3112

C3123

LB7
3 2 1 NF
RFIN-L2
NF

NF

NF

16 WTR1_ TX_ B12_ B13_ B17_ B20_ 28[18]

1 NF
LB6 VREG_L18_2P7 [12,17,20,21,22,23]
RFIN-L1 4 C3191 6.2NH
15 LB5 RF-SWITCH-QM12002(SPDT)

C3156
5 C3186
nf 14 RFIN-L3

C3190
1 2

3.9PF
LB4 SKY77651

2
C3196
6 NF 4 3
13 GND VDD RF1
LB3

2
5 2

LB2

LB1

GND

GND

GND

GND
RFC GND

1
6 1
CTRL RF2

NF
12

11

10

1 NF
GRFC14_SEL U3106
[2] U3105

C3192
2
RF-FILTER-LF1005-KR87DABT
L3117
LPF

Band12/17/20
2 1 NF 2 4 C3165 22PF
WTR1_ TX_ B5_ B8_ B26 [18]
OUT IN
C3193 3.6nH

3 GND
GND
2.2PF
C3155
2.2PF
C3150

1
Co
L3150 L3104
[20] PA_ B12/17_ TX
3.3NH 3.3NH
C3104

C3109
C3101

NF

NF
NF

Band5/B26 LPF 抑制3次谐波 L3106 L3109

PA_B5_B26_TX
[20] 3.3NH 3.3NH
C3113

C3124
C3106

NF

NF
NF

Band28B
A
L3103
[20] PA_ B28_ TX
3.3NH
C3103

C3108

this path is B28B


NF

NF

Band20 [20] PA_ B20_ TX


L3190 L3100 L3116
PROJECT:

DOCUMENT NO.: 31_SKY77651+SKY77652


ZACH REV:

SIZED:
V1.2

3.3NH 3.3NH 3.3NH


DEPARTMENT:
Hardware DEPT.
C3136
C3100

C3138

this path is B28A


NF
NF

NF

COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 19 OF 30


5 4 3 2 1
5 4 3 2 1

Close to WTR4905
Band41
[19] PA_B5_B26_TX
U3200 GRFC12_SEL[2]
GRFC5_SEL0[2]
R3223 VREG_L18_2P7 [12,17,19,20,21,22,23] C3271 VREG_L18_2P7 [12,17,19,20,21,22,23]
[21] 6 ANT TX 3 0
TRX_B5/B26
1 [19] PRX_B41 U3224

C3288
0 RX

100PF
C3251 R3230

1
C3243
100PF 1 6 C3272

L3208

C3290
G
G
G
G
G

1
12pF RF2 CTRL

B5/B26

100PF
NF

NF

8
7
5
4
2
2 5

C3246
GND RFC

C3215

L3251

1
2.4nH
U3209

NF
2

NF
3 4
RF1 VDD
1 6 12pF
RF2 CTRL
2 5 RF-SWITCH-QM12002(SPDT)
GND RFC
3 4
RF1 VDD
R3217

WTR0_ PRX_ HB2


[19] PA_B8_TX

Band8
RF-SWITCH-QM12002(SPDT) [19] PA_B7_TX
Close to WTR4905 D

IND-0201-NF
RF-DUPLEXER-SAYEY897MGA0F0A U3201

L3227
0

Band7

1
L3237

2.7nH
L3225
R3200 3

3
1
TX

RF-DPX-SAYEY2G53BA0F0A
6 WTR0_ PRX_ HB2[17]

U3222
SAYEY2G53BC0B0AR05
ANT 1

TX
RX
[21] TRX_B8 RX 1.5nH
2

NF
GND
8 GND
7 GND
5 GND
4 GND
0 G

2
WTR0_ PRX_ LB1
C3252 4
D

L3235
G

2.4nH
100PF 5
R3208
1 L3243 2

C3247
2
7
7.5NH

C3256
L3250 [21] TRX_B7
C3200

NF

ANT
C3264 22PF [17] G 8

NF
NF

WTR0_PRX_LB1 0
C3231

C3240
C3259 22PF R3209

6
6.2NH

22PF
[20] TRX_B7_DIPX

6.2NH
0 12pF

L3249

C3230

C3232
NF

NF
[2] GRFC2_SEL

C3265
[12,17,19,20,21,22,23]
VREG_L18_2P7

33PF
U3220

C3286
Band3_7
6 1

100PF
CTRL RF2 U3213
Close to WTR4905
5 2

l
RFC GND

WTR1_ PRX_ LB1


IC-RF-LFD181G79MP8E105
4 3
VDD RF1 R3219
L3216 [20] TRX_B7_DIPX 4 2 TRX_B3_7 [21]
[18] HB COMMON
C3263 22PF
RF-SWITCH-QM12002(SPDT) WTR1_PRX_LB1

IND-0201-NF

L3231
0

1
6.2NH 6

2.7nH
L3229
LB

GND

GND

GND
[20]

6.2NH
TRX_B3_DIPX

L3214

NF
2
5

1
ia
Band3

C3225

33PF
WTR0_ PRX_ MB2
[19] PA_B3_TX
Close to WTR4905 U3214
SAYEY1G74BC0B0A
R3231 R3229

BAND28A
6 3 L3238
TRX_B3_DIPX ANT TX C3236 22PF
[20]
RX 1
0 0 WTR0_ PRX_ MB2[17]
R3232 C
1.5nH
[21] TRX_B3

G
G
G
G
G
3.3NH
L3223

L3226
0

NF

8
7
5
4
2

9.1nH
L3228

L3234
2.4nH
C [19]PA_B20_TX U3202
C3287

nt
SAYEY806MBA0F0A

C3239
this path is B28A 2 1
R3222

22PF
6 ANT TX 3
TRX_B20 100PF
[21]
RX 1
0
C3253
1 L3206 2

100PF
G
G
G
G
G
C3242

7.5NH

VREG_L18_2P7 [12,17,19,20,21,22,23]
NF

8
7
5
4
2

C3248

GRFC3_SEL [2]
NF

1
100PF
C3298
WTR1_PRX_LB3

2
RF-SWITCH-QM12002(SPDT)
PA_B28_TX[19]
3 4
RF1 VDD C3223

BAND28B
R3241 [18]
2 5 Close to WTR4905 WTR1_PRX_LB3
GND RFC
U3203 1 6 0 C3261 6.2NH

e
RF2 CTRL 100PF

Band1
SAYEY733MBC0F0A C3255
C3249

100PF
NF

R3225
6 3 U3225

6.2NH
[21] TRX_B28 ANT TX

L3248
RX 1

L3247
0

NF
2.0NH

L3207
L3241

NF

this path is B28B


G
G
G
G
G

R3239 R3238 [19] PA_B1_TX

C3262
WTR0_ PRX_ MB3
8
7
5
4
2

NF
0 0 U3221
R3228 SAYEY1G95GA0F0A

id
R3212 L3240
[21] TRX_B1 6 ANT TX 3 C3237 22PF
RX 1
0
1.5nH WTR0_PRX_MB3 [17]

3.3NH
3.3NH U3215

L3217

L3219

NF

G
G
G
G
G

L3222

R3214
4.7nH

L3239
2.4nH
B4B66_PRX [20] 1 6

8
7
5
4
2
RF2 CTRL

0
2 5
GND RFC
3 4
RF1 VDD B

C3241

22PF
RF-SWITCH-QM12002(SPDT)
GRFC7_SEL [2]
B
VREG_L18_2P7 [12,17,19,20,21,22,23]

QPX Band2/Band4

C3289
100PF
nf

1
WTR0_ PRX_ MB1
NF
C3244

33PF L3236
C3234 22PF
RF_B2_B4_TRX_TXM WTR0_PRX_MB1 [17]
[21]
U3216 1.5nH

1
1

L3233
B2 PRX

2.4nH
IC-RF-LFL18829MTCRD627TEMP

1.8nH
L3220
C3229

L3218
NF
R3220 U3205

NF
C3284
[21] TRX_B12/17 3 R3227
OUT 1 U3228 [20] B2_PRX

2
SAYEY707MBA0F0A

2
IN
6

0
5

C3238
NC 0
ANT

G 8
2.0NH

ANT

GND
L3246
L3245

22PF
NF

7 1 5
GND

GND

GND

G 5 B66-TX B2-RX
G 4
4
6

G 2 R3235
2 4
TX
RX

Co
[19] PA_B4/66_TX
B2-TX B66-RX
R3236

WTR1_PRX_LB2
0
3
1

1 2 [19] PA_B2_TX

RF-BAND-MQ02(B2+B66)
C3217 NF 0 R3215
C3257

100PF C3276 C3285 22PF

BAND12/17/20
B4B66_PRX [20]
NF

C3227 [20] B2_PA_OUT

B4/B66 PRX
Close to WTR4905 WTR1_ PRX_ LB2 [18]
3.3NH

Band2

L3224

R3218
4.7nH
C3224 6.2NH B2_PA_OUT[20]

0
100PF
U3226
PA_ B12/17_ TX[19]
SAYEY1G88BA0B0A
6.2NH
L3215

R3233
6 3
For LatAm SKU this path is B12(B17) and for EMEA+APAC SKU this path is B20 TRX_B2
[21] ANT TX
1 1 2 B2_PRX [20]
RX
A 0
C3226

C3279

2.0NH

L3254
L3252

C3277

C3281
100PF

NF
NF

G
G
G
G
G
G

NF

NF
8
7
5
4
2
9
A

Band40 C3270 WTR0_ PRX_ HB1


L3232
[19] PRX_B40
WTR0_ PRX_ HB1[17]
3.3NH
12pF
PROJECT: ZACH REV: V1.2
L3230
2.4nH
L3221

2.4nH

DOCUMENT NO.: 32_TRX SIZED: D

DEPARTMENT:
Hardware DEPT.
C3235

2.2PF

COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 20 OF 30


5 4 3 2 1
5 4 3 2 1

U3304

0
C3334 1
RF1
0
10 2 R3318
RFC RF2
0
8 R3319
RF3
22PF 0
11 9 R3320
GND RF4 D
0 R3321
5
[2,21] RFFE3_CLK SCLK

C3333
[2,21] RFFE3_DATA R3324 6 SDATA 7

NF2
VDD

USID

VIO
D

4
J3300 J3303 J3304 J3307 J3301
J3302 J3306 J3305
1

1
RF-SWITCH-QAT3514

1
VREG_L5_1P8
[2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27]

C3335
[12,17,19,20,21,22,23]

100PF
R3317

1
VREG_L18_2P7
R3303

R3327

R3328

R3335

R3329

R3330
0

2
100PF
C3332
0

l
R3399

C3336
RF-SWITCH-818000291
NF 1 2 1 2 1 2 2 1 1 2 1 2
C3300 C3380
OUT IN
100PF 100PF C3315 100PF C3304 100PF C3306 100PF
TVS16

L3321 U3300
33PF

ia
L3302

L3303
NF

NF
TRX_ B41 [19]

68nH
L3330
TRX_ B40

R3325
[19]
L3300

L3380
L3301

L3381
NF

NF

10K
NF

NF
TRX_ B7 [20]

MAIN_ANTENNA_DET [2]
TRX_ B3_ 7 [20]

R3326
TRX_B1 [20]

100K
U3303 C3337
TRX_ B3 [20]
C
0 1 2
C3328 1 RF_B2_B4_TRX_TXM [20]
RF1
0 100PF
10 2 R3300
RFC RF2 VREG_L7_1P8 [5,12,24]
0

24
25

26

27

28

29

30
31
32
33
34
23
C 8 R3301
RF3

nt
0

NC
GND

MH-TRX9

MH-TRX8

MH-TRX7

MH-TRX6

GND
MH-TRX5
MH-TRX4
MH-TRX3
MH-TRX2
22PF

GND
11 9 R3302 22
GND RF4 GND 35 TRX_B2 [20]
MH-TRX1
0 R3304 21 36
5 GND GND
[2,21] RFFE3_CLK SCLK 37
20 L-TRX7
C3327

R3322 6 SDATA 7 ANT 38


NF2

[2,21] RFFE3_DATA VDD L-TRX6 TRX_B5/B26 [20]


USID

19
VIO

0 GND 39
1 2 18
L-TRX5 TRX_B12/17 [20] For LatAm SKU this path is B12(B17) and for EMEA+APAC SKU this path is B20
[17] MAIN_CPL_OUT CPL 40
1

L-TRX4
3

R3380 17 41
NF NC U3301 L-TRX3 TRX_B20 [20] this path is B28A
1 2 42
RF-SWITCH-QAT3514 16 L-TRX2 TRX_B8 [20]
GND 43
R3381 SKY77927 L-TRX1 TRX_B28 [20] this path is B28B
VREG_L5_1P8 15 GND 44
[2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27] GND
14

MB-SWOUT

LB-SWOUT
GND
2

C3329

[12,17,19,20,21,22,23]
100PF

13

VBATT

VRAMP

SDATA

MB-IN

LB-IN
R3306 GND

SCLK
GND

GND

VCC

VIO
[9,10,11,12,13,14,15,19,21,25,26,27]
VPH_PWR
VREG_L18_2P7
1

C3318
e
10PF
C3305

1nF

12

11

10

1
2
100PF

2
C3326

10uF

C3307

100PF
1

C3308
1
100K R3308 6.2NH 0

id
[2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27] WTR0_ TX_ GSMLB[17]
VREG_L5_1P8 0
L3304 L3305
[2,19,25] RFFE1_DATA 0

GSMLB
RFFE1_CLK R3340

C3309

C3311
[2,19,25]

C3303
0.01uF
R3307

C3340

3.9PF

3.9PF
2
NF

C3338
2
NF
1
B

GSMHB

1
B

0 0
WTR0_TX_GSMHB [17]
nf R3309 L3306

C3312

NF
C3310

NF
VPH_PWR
Co

VPH_PWR
1
10uF
1
10uF

C3302
C3301

2
2

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 33_SKY77927_ANT SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 21 OF 30


5 4 3 2 1
5 4 3 2 1

WTR0_ DRX_ MB3 L3417


WTR0_ DRX_ MB3[17]
Band8
Band2_66
R3405 U3410 C3436
C3416 3.3NH

L3416
1 UNBAL_P0 UNBAL_P1 4

2.4nH
Band1/Ban4/Band66
[23] DRX_B8
GRFC10_SEL [2]

C3400
33PF GND0 2 33PF VREG_L18_2P7 [12,17,19,20,21,22,23] D
GND1 3

C3423
U3404

R3407
22PF

L3408
GND2 5

1
1.8pF

NF
L3421
1 6

NF
[23] DRX_B2_B66 IN HB

C3452
NF

100PF
9
LB SFH942AA002

WTR0_ DRX_ MB1


2 U3414
GND

2
D

1
33PF
3 7
GND GND 1 6
4 8 C3419 RF2 CTRL
GND GND
C3405

5 10 L3418 2 5

B5/B26
GND GND GND RFC
NF

WTR0_ DRX_ MB1[17] 3 4


U3411
3.3NH RF1 VDD
RF-SAW-SAWFD1G96AA3F0A
22PF

L3414
2.4nH
L3409
Band2 co-GSM1900
RF-SWITCH-QM12002(SPDT)

NF
C3426

WTR1_ DRX_ LB1

C3421
1 4 1 2 C3442

1.8pF
DRX_B5_B26
[23] UNBAL1 UNBAL2 L3422
C3437
22PF WTR1_ DRX_ LB1 [18]
33PF 2 GND
5.1NH
22PF

R3408

R3412
3 5

C3429
GND GND

l NF

0
NF
C3448

C3443

22PF
1.5PF
R3401 R3498

ia
0 0

Band3_7
[2] GRFC11_SEL
U3406
[12,17,19,20,21,22,23]
VREG_L18_2P7
U3417

WTR0_ DRX_ LB1


IC-RF-LFD181G79MP8E105

C3451
2
R3402 6 1

100PF
4 0 CTRL RF2
[22] DRX_B7_DIPX HB 2 DRX_B3_7 [23]
COMMON 5 2 C3449

1
RFC GND

IND-0201-NF
L3425

L3412
R3400 R3421 0

1
6 4 3

2.7nH
L3410
LB VDD RF1 WTR0_ DRX_ LB1 [17]
GND

GND

GND
[22] 0 5.1NH
DRX_B3_DIPX

NF
RF-SWITCH-QM12002(SPDT) 22PF

R3415
2
C
5

0
C
Band3 C3450

nt
WTR0_ DRX_ MB2
1.5PF
U3405
RF-SAW-SAFFB1G84AB0F0A
C3408 C3415
L3413
[22] DRX_B3_DIPX 1 4
IN OUT WTR0_ DRX_ MB2[17]
3.3NH
GND

GND

GND

33PF 22PF
C3406

L3411
C0-GSM1800
2.4nH
L3406
C3410

5
NF

NF
NF

C3418

1.8pF
R3422

Band28
U3408

e
0

WTR1_ DRX_ LB3


C3427

[23] DRX_B28 1 4 1 2
IN OUT
C3438
22PF
33PF 2 GND

R3406
3 5

id
C3430
GND GND

NF
Band41 B41(AXGP) = 2545-2575 MHz

NF
B
Close to WTR2965 L3423
RF-SAW-SAFFB2G60AA1F0A 1 2
WTR1_DRX_LB3 [18]
SFHG05AA002
C3444 5.1NH
B U3401
2

22PF

R3413
OUT 4
G

[23] DRX_B41_AXGP 1 IN

0
C3404 C3413
22PF G 3 22PF GRFC9_SEL [2]
G
5.1NH
L3402

nf
5

5.1NH

VREG_L18_2P7 [12,17,19,20,21,22,23]
L3405

C3446
U3407
C3417
2

100PF

1 6 1.5PF

WTR0_DRX_HB2
RF2 CTRL
1

2 5

Band7
GND RFC
3 4
RF1 VDD
Close to WTR2965
R3410
RF-SWITCH-QM12002(SPDT)
U3402 Close
C3424 to WTR4905
0
G 2

L3420
OUT 4 [17]
1 IN WTR0_DRX_HB2
[22] DRX_B7_DIPX C3412
C3402 GND 3 22PF NF 4.3nH
5 G

22PF R3420 C3414


5.1NH

33PF
L3415

C3401
5.1NH
L3404
5.1NH
L3400

2.7nH

[23] DRX_B7
R3404

0
Co

WTR1_ DRX_ LB2


33PF
2
C3425
1.5PF
1

For LatAm SKU this path is B12(B17) and for EMEA+APAC SKU this path is B20

Band12/17/20 4

U3413
1
C3445
22PF
2
Close to WTR4905L3424

5.1NH
WTR1_DRX_LB2[18]

RF-SAW-SAFFB737MAA0F0A

6.2NH
C3433

R3414
[23] 1 4
DRX_B12_B17 UNBL1 UNBL2
A

GND

GND

GND
C3434
NF
33PF

C3447
1.5PF
A

5
WTR0_DRX_HB1

R3411

NF
Band40
U3403

Close to WTR4905 L3419


B40
DRX_B40[23] 1 UNBAL1 UNBAL2 4
C3407 C3420 5.1NH WTR0_DRX_HB1 [17]
C3409

22PF 22PF
2.7nH

2
R3403
NF

GND PROJECT: ZACH REV: V1.2


2.7nH
L3407

3 5
GND GND DOCUMENT NO.: 34_DRX SIZED: D
2
C3422
1.8pF

DEPARTMENT:
Hardware DEPT.
1

COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 22 OF 30


5 4 3 2 1
J3503
J3501 J3506 J3500 J3502
J3507 J3505 1 第四代
J9 GND

1
0 0 NF 极性标识

1
1
1
2 GND端

1
I/O
R3501 R3590 C3599 3
GND
4

C3500

C3501

C3591
GND

NF

NF

NF
R3595

R35340
R3500

R3535

R3527
0

0
RF-ANT-SOCKET-C-10020059

C3598
NF
0 0

R3593 R3594

C3597
C3596
C3594

NF
NF
NF
U3503

0
C3511 1
RF1
0
10 2 R3507
RFC RF2 U3507
0
8 R3508
RF3 0
22PF 0 C3519 1
11 9 R3511 RF1
GND RF4 0
10 2 R3529
0 R3510 RFC RF2
RFFE2_CLK 5 0
SCLK 8 R3530
[2,23] RF3
C3510

RFFE2_DATA R3514 6 SDATA 7 22PF 0


NF2

[2,23] VDD 11 9 R3531

USID
GND RF4

VIO
0 R3532
1

RFFE2_CLK 5

4
SCLK
[2,23]

C3518
RFFE2_DATA R3528 6 SDATA 7

NF2
[2,23] VDD

USID

VIO
RF-SWITCH-QAT3514

1
VREG_L5_1P8

4
[2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27]

l
C3506
2
100PF

[12,17,19,20,21,22,23] RF-SWITCH-QAT3514
1

VREG_L18_2P7 VREG_L5_1P8
[2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27]
2
100PF
C3509

C3520
2
100PF
[12,17,19,20,21,22,23]
1

1
VREG_L18_2P7

ia
2
100PF
C3517
1
DRX_B40 [22]

nt
DRX_B41_AXGP [22]

R3523 R3524
DRX_B7 [22]

0 0 DRX_B3_7 [22]

C3515 DRX_B2_B66 [22]

U3505 1 2
RF-LNA-MXD8011

DRX [2] GRFC8_SEL


L3505
6 EN GND 1 0.01uF

[12,17,19,20,21,22,23]
0
RFFE2_CLK
RFFE2_DATA
[2,23]

C3512
5 2 VREG_L18_2P7 R3506
RFIN VDD [2,23]

TRXA2 14

TRXA3 13

TRXA4 12

TRXA5 11

TRXA6 10
R3505

2
NF
3.9nH
4 GND 3 0

1
e
U3501 RFOUT
J3504 15 TRXA1

L3502
5 P3_COM SCLK 9
P1_HF 3 [2,4,6,9,10,11,12,13,15,16,19,21,23,24,25,27]

NF
C3516
1 P2_LF 1 ANT-A
第四代 2 GND0 U3506 SDATA 8 VREG_L5_1P8

U3502
GND RF-SWITCH-818000291 1 2 16
极性标识 R3522 R3503 4 GND1 RF-LNA-MXD8011
GND端 2 2 1 6 GND2 ANT-B
I/O OUT IN [2] GRFC4_SEL 6 EN GND 1 17 VIO 7 VREG_ L18_ 2P7
[12,17,19,20,21,22,23]
3 0 U3500 0 L3506 0.01uF TRXB1
GND [12,17,19,20,21,22,23] 18 VDD 6

2
C3504

C3505
100PF

100PF
RFDIP2012090GM1T58
5 2 VREG_L18_2P7

1 TRXB2

2 TRXB3

3 TRXB4

4 TRXB5

5 TRXB6
4 RFIN VDD

id
GND
L3511

L3512

R3504
NF

NF

3.9nH

1
4 GND RFOUT 3
RF-ANT-SOCKET-C-10020059 0

L3501
R3525 R3526 [22]

NF
DRX_B8

DRX_B5_B26 [22]
0 0

DRX_B12_B17 [22]
For LatAm SKU this path is B12(B17) and for EMEA+APAC SKU this path is B20
DRX_B28 [22]
nf
Co
5 4 3 2 1

J3601
WIFI/BT
48 MHZ Crystal D

Required for any design utilizing 5GHz


FL3601

R3601 0 RF-SWITCH-818000291 L3606

TVS3600
D
2 1 5 P3_COM P1_HF 3 0 WLAN_BT_RF [24]
OUT IN U3604
P2_LF 1 [24] GPS_IN
0 R3602 U3606 0 2 GND0 XTAL-TCXO-48M_CX2016DB48000C0WLLA1

C3609
NF
4 GND1 R3604

C3601
NF

C3611
NF
6 GND2
L3600
3 4
NF

L3605
IN/OUT GND

NF
J3611

C3634

10PF
RFDIP1608060T97Q1C
1

2 1
GND IN/OUT
U3605-A

R3621 0 RF-SWITCH-818000291
2 1 CONTROL
OUT IN 5G_IN [24]
0 R3622 32
?
L3620

U3607 VDD_WL_LO_1P3[24]
VDD_WL_LO_1P3

C3651
NF
NF

C3632

12pF
8
GND 16
WL_PDET_IN

l
31 47
XO_IN WL_RF_DA_OUT_5G
43 72 WL_RFIO_5G[24]
XO_OUT WL_RFIO_5G
[9]
58 WLAN_BB_IP [7]
WL_BB_IP [9]
0

TVS3601
L3612 64 WLAN_BB_IN [7]
82nH 61 WL_BB_IN
R3603 share pad FM_LANT_P FM_HS_RX
[12,17,18]
51 [9] WLAN_BB_QP [7]
VREG_L4_1P8 [13] L3610 WL_BB_QP
68 57

47PF(NF)
GPS
WLAN_BB_QN [7]

L3611
FM_TXRX WL_BB_QN

C3633
0

82nH
[9]

ia
EXT_GPS_LNA_EN [2]

C3607

C3608
28
FM_SSBI[2] 48 N/C
FM_SSBI 5 WL_BT_RFIO_2P4G[24]
U3600 FM_DATA[2] 41
FM_DATA
WL_BT_RFIO ?

NF
R3614 [3]CLK_OUT

27PF
RF-SAW-SAFFB1G58KA0F0A 36 33 Note: If 19.2MHz mode is used ( 2GHz only) then DNI R4907
GPS-LNA-RDALN16 CLK_OUT
34 NF (no need to route CLK_OUT).
WL_EXTPA_CTRL1 C3647 Use 0 ohm if CLK_OUT is a short length, or 33 ohm if CLK_OUT
GPS_IN [24] 1 4 L3601 8.2nH 3 4 U3603 52
UNBL1 UNBL2 RFIN VDD RF-SAW-SAFFB1G58KA0F0A WL_EXTPA_CTRL0 is >3cm. If used, place R4907 very close to U4901.36 ball location.
2 5
GND

GND

GND

GND EN
0 L3616 3.3NH 63 [2]WL_CMD_SET
1 6 1 2 1 4 WL_CMD_SET
L3602

NF

GND RFOUT UNBL1 UNBL2 WTR0_GPS [17]


2

BT_CTL[2] 19 33 [2]WL_CMD_CLK
C3615 BT_CTL WL_CMD_CLK
R3610 C

GND

GND

GND
C3616
1.0PF
15PF L3615

3.3NH
U3601

L3609
2

5
3.3NH 77 [2]WL_CMD_DATA_2
BT_SSBI[2] 24 WL_CMD_DATA2
BT_SSBI 70 [2]WL_CMD_DATA_1
BT_DATA[2] 29 WL_CMD_DATA1
BT_DATA 71 [2]WL_CMD_DATA_0
C 1.2PF
WL_CMD_DATA0

nt
3IN1-WCN3680B

FL3600
RF-SAW-SAFFB2G45MA0F0A
1.8V/1.2V
C3602 C3614 18PF
R3600 R3605
1 2 4 1 1 2 R3611
WLAN_BT_RF OUTPUT INPUT WL_BT_RFIO_2P4G [24] VREG_L7_1P8[5,12,21] VDD_XO_1P8[24]
[24] 0 1.0nH 2 0 CAP-18PF-0201-COG
3 GND 0

C3638
5 GND

0.47UF
C3600
NF

C3643
4.7uF
GND

C3604 NF
L3604

NF

e
C3646
VDD_MODEM_1P2 [24]
30ohm

C3639
参考设计:22OHM磁珠

4.7uF
id
Internal 5GHz PA

BT_FM WLAN 1P3


C3605 C3650 2.7PF
1 2 R3609 HT3601
5G_IN[24] WL_RFIO_5G [24] VREG_L19_1P3[5,12] VDD_WL_LNA_1P3[24]
R3613
1.0PF CAP-2.7PF-0201-COG 0 VDD_WLAN_1P3_STAR (pin 9) HT3612
VDD_IO_1P8[24]

C3622

100PF
C3603

C3606
NF

NF

C3613

22uF
VREG_L5_1P8[2,4,6,9,10,11,12,13,15,16,19,21,23,25,27] B

C3636
0

4.7uF

470nF
C3642
HT3609
VDD_WL_LNA_1P3[24]
B
Note: All connections of VDD_WLAN_1P3_STAR require (pin 78,45)

C3623

100PF
star routing from the source to the load.
nf HT3607
VDD_WL_LNA_1P3[24]

U3605-B (pin 6,40)

0.01uF
C3624
C3621

100PF
PWR_GND WLBT_3.3V
VDD_IO_1P8[24] VREG_L5_1P8 35
VDD_IO_1P8
VDD_XO_1P8[24] VREG_L7_1P8 26 HT3602 HT3610 VREG_L9_3P3[12,24]
VDD_XO_1P8 VDD_WL_LNA_1P3[24]
VDD_MODEM_1P2[24] 30
VDD_DIG_1P2 76 Pin 73

C3617
(pin 59)

2
GND

10uF

C3637
C3625
4.7uF

100PF

0.01uF
42

C3640

C3644
VDD_WL_LNA_1P3[24] 74 GND

NF
VDD_FM_RXFE_1P3 67 Note: For "B" version chips:

1
54 GND pin 56 is WL_EXTPA_CTRL4
VDD_FM_RXBB_1P3 55
69 GND
VDD_FM_PLL_1P3 56
75 GND
VDD_FM_VCO_1P3 62
GND B3600 HT3611
HT3603 VREG_L9_3P3[12,24]
Co
Note: For "B" version chips: 15 1 2 VDD_WL_LO_1P3[24]
VDD_FM_TXDA_3P3[24] pin 49 is WL_EXTPA_CTRL2
49 GND ?
R3606

VDD_FM_TXDA_3P3 13
VDD_BT_TXRF_3P3[24] 4 GND 300ohm
(pin 50) Pin 11
0

VDD_BT_TXRF_3P3 2 240 OHM @ 100MHZ

C3645
0.01uF
C3619

C3626

C3631
3

100PF
VDD_WL_LNA_1P3[24] GND

22uF

NF
VDD_BT_RXRF_1P3 20
14 GND
VDD_BT_BB_1P3 10
17 GND
VDD_BT_PLL_1P3 1
VDD_WL_LNA_1P3[24] 7 GND R3612
VDD_BT_VCO_1P3 18
GND
VREG_L9_3P3
[12,24] VDD_BT_TXRF_3P3[24]
HT3604
39 VDD_WL_LNA_1P3[24]
GND
37
0 Pin 4 Only
VDD_WL_LNA_1P3[24] 25 GND (pin 3)

C3641
VDD_BT_FM_DIG_1P3

10uF
44

0.01uF
C3627

NF
C3618

GND 10uF

C3635
38
GND
79
GND
VDD_WL_LNA_1P3[24] 45 21
VDD_WL_BB_1P3 GND
VDD_WL_LNA_1P3[24] 6
VDD_WL_2GPA_1P3 GND
65 HT3605
VDD_WL_LNA_1P3[24]
Note: If 2.4 GHz WLAN spurs are observed around 2.6 to 2.7 GHz,
VDD_WL_LO_1P3[24] 50
VDD_WL_PLL_1P3 GND
22 replace R4915 with ~20 nH inductor.
40
VDD_WL_UPC_1P3 GND
66 0.01uF (pin 17)
23
C3628

A GND
12
GND
HT3600 53 VDD_FM_TXDA_3P3[24]
VREG_L9_3P3[12,24] VREG_L9_3P3[12,24]
VDD_WL_LNA_1P3[24] 9
VDD_WL_2GLNA_1P3
GND
60
Pin 49 A

78 GND HT3608
VDD_WL_5GLNA_1P3 46 VDD_WL_LNA_1P3[24]
GND
27
GND (pin 54) (pin 69,75)
0.01uF

0.01uF
C3620

C3629

VDD_WL_LNA_1P3[24] 59
VDD_WL_5GPA_1P3

VREG_L9_3P3[12,24] 11
VDD_WL_2GPA_3P3 HT3606
VREG_L9_3P3[12,24] 73 VDD_WL_LNA_1P3[24]
VDD_WL_5GPA_3P3
PROJECT: ZACH REV: V1.2
0.01uF
C3630

3IN1-WCN3680B
DOCUMENT NO.: 36_WCN3660B SIZED: D

DEPARTMENT:
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5 4 3 2 1
5 4 3 2 1

U3700

l
QFE2101

VPH_PWR 13 VDD_BATT TPP2 2


[9,10,11,12,13,14,15,19,21,25,26,27]

ia
TPP1 1

Note: Use a signle low impedance power plane/fill VPA for all ET PA VCC1/VCC2.
14 L3700
VSW
C
Refer to 80-NA681-91 rev.B or later revisions for more layout details.
VAMP 9 VPA_APT [19]

4.7uF
nt
C3703
15 VDD_SW

C3700
10uF
BYP_LOAD 12

11 GND_SW

10 VDD_1P8
VREG_L5_1P8
[2,4,6,9,10,11,12,13,15,16,19,21,23,24,27]

C3701
e 4.7uF
8 VTRIM_VSEL GSM_CAP1 5 VPH_PWR
R3700
[9,10,11,12,13,14,15,19,21,25,26,27]
RFFE1_DATA 3 SDATA GSM_CAP2 6
[2,19,21] R3701
0 4
RFFE1_CLK SCLK

id
[2,19,21] 0

C3702
NF
GND 7

B
nf
Co

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 37_QFE2101 SIZED: D

DEPARTMENT:
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5 4 3 2 1
5 4 3 2 1

l
ia
U470
UHF_IN
DTV_ ANT
C468 L467
DTV_ANT 6 IN/TO-COIL1 OUT/TO-COIL2 3 100PF 33nH UHF_IN [26]
C
[13] L450 L475
2 L474
5 TO-COIL1 TO-COIL2
10NH
8.2nH GND 4 12nH
C GND 1

nt
RF-SAW-SAEEL733MVB0F0A
C450

3.3PF

Notch filter for connectivity(2G/3G/4G)

DTV

e
U469
FC8300_WLP(3.4X3.3)

id
A7 C2 R467 0
UHF_IN BDATA0 NFC_SPI_ESE_MISO [2,27]
[26] UHF_IN
A6 C1 R468 0 NFC_SPI_ESE_MOSI [2,27]
VHF_IN BDATA1
A5 C3 R469 DTV_SPI1_CS_N [2]
VHFL_IN BDATA2 0
L476 B8 E2
[26] RF_AVDD 100NH UHF_LOAD BDATA3

C473
D2 B
BDATA4
C474 100PF C8 B2
ATTEN2_IN BDATA5

100nF
B5 F5
CATV_IN BDATA6
B R470
B1 NFC_SPI_ESE_CLK [2,27]
C5 BDATA7
BB_IQB 0
D5
BB_IQ
R473 D3 R472 0 DTV_EINT [2]
nf
[11] CLK2_DTV
C477
NF NF C479 E6
CP_OUT
HOST_INTB
E3 R474 0
NF IRESETB GPIO36_DTV_RST [2]
DTV_1V8
E4
4

NF BRDB
XTAL-26M-2520-EXS00A

G6
C478

R561 U468 XO_OUT


VPH_PWR
NF

F3
H5 BWEB
0 4 1 XI
Y467

R562 IN OUT
VREG_S4_2P05 H6
XO
GND

3 2 G8 B4
1.0uF
C480

EN GND LDO_EN GPIO0


2.2uF
C481

B3
3

LDO-SGM2031 GPIO1
A3 C4
NF C482 CATV_LDO_IN GPIO2
A4 E5
1uF C483 CATV_AVDD GPIO3
NF C909 D1 F2
[2,26] GPIO8_DTV_EN VDDM GPIO4
[2,26] GPIO8_DTV_EN H3 G3
DTV_1V8 VDDM GPIO5
Co
E1 G2
DVDD GPIO6
300ohm FB467 H4 G4
DVDD GPIO7
100nF C484
D8 F4
[26] RF_AVDD RF_AVDD SEL_MODE
E8 F6
DTV_1V8 RF_DIG_LDO_IN TMODE
F8 G1
DIG_LDO_OUT TMODE2
F7 G5
DIG_AVDD ID1
G7 D4
ADC_VDD BCEB
C486

C487

C488
C485

C489

C490

C491

AVSS

AVSS

AVSS

AVSS

AVSS

AVSS

AVSS

AVSS

DVSS

DVSS

DVSS

DVSS

DVSS
470nF
100nF

100nF

470nF
100nF

100nF

100nF

B7

C6

D6

B6

E7

H7

H8

A8

F1

H1

H2

A1

A2
A

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 27_DTV SIZED: D

DEPARTMENT:
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5 4 3 2 1
5 4 3 2 1

l
U492

ia
R492
Y501 VREG_L14_UIM1 [4,12,16]
1.0UH B2 SW2
VDD_NFC_OUT [16] L492 B1 VOUT1 A1 VDD_TX_NFC [27]
0 SW1

C492

C493

C595
U493
VOUT2 A2 C495
4 3 A3
GND IN/OUT R494 VPH_PWR VIN

1.0uF
B5 VDD_NFC [27] C1

470nF

100nF
VDD_SIM_PMU B3 PGND1 22uF
TX_POWER_REQ_NFC EN

C594
C500 A5 C496 0 0.1uF
1 2 VDD_SIM [27] C494 C2
IN/OUT GND NF PGND2
C6 C497 0.01uF
C520 VDD C
C3

100nF
22uF AGND
NF VDD_SE B7 SVDD [27]

VDD_PAD D3 VREG_L5_1P8

E7 R495 NF
C VDD_TX VDD_TX_NFC [27]

nt
A3 NFC_CLK_XTAL1 VBAT C7
VPH_PWR
C3 XTAL2 VBAT2 G1

R493 4.7K VDD_MID F7


[27] SVDD
A7 ESE_IO3 VDDD D7 VDD_NFC [27]
R497 0
TP493 NF VDD_TX_NFC [27]
A6 ESE_IO4 VDD_UP G2 R498
VPH_PWR

C502

C503

C504

C499

C498

C501

C599
C505
NC F1

[2] NFC_DISABLE E1 VEN TX_PWR_REQ F2 config 2 config 3


1M R495 None 0

1.0uF

100nF

100nF

4.7uF

1.0uF

1.0uF

100nF
1.0uF
R497 None 0
R501 R498 0 None
[2,26]NFC_SPI_ESE_MISO F4 ESE_IO1

IC1 G7
Protected by gnd length less zan20cm TX_POWER_REQ_NFC [27]
B4 SIM_EXT_SW_CTRL IC2 G6 R916

e
A4 SIM_SWIO
NFC_SWP_UIM TP496 1M
[16] D5 ESE_DWPM_DBG
TP497

TP495

TP494 C507 1000PF R503 1K


IRQ D1 NFC_IRQ [2]
A1 DWL_REQ
[2] NFC_DWL_REQ
C508 1000PF 1K
A2 F6 R506

R504
[11] NFC_CLK_REQ CLK_REQ RXP

NF
id
[2] NFC_ESE_PWR_REQ B3 PWR_REQ RXN F5
J492
TX1 G3

1
C509
R507
100PF
B1 HIF4 TX2 G5
[2] NFC_I2C_SCL L493

C510

C513
C512 12pF_NF 0

2
B2 HIF1
I2C Address:0X28 160nH 料号注意更新

12pF
C1 C4

220PF

TVS492
[2] NFC_I2C_SDA HIF3 VSS1

560pF 料号注意更新
D2 B6 B
HIF2 VSS2

2
VSS3 D4

1.0nH
C598
J493

1
E5 D6

C511
ESE_DWPS_DBG VSS4

1
B R571

1
[27] NF C5 F3
SVDD VDD_ESE VSS5

R508
R511

NF
4.7K E3 G4
[27] SVDD SMX_RST_N VSS_TX 16v

2
1.0nH
[2,26] E4 C2

C597
NFC_ SPI_ ESE_ CLK SMX_CLK VSS_PAD
nf
560pF 料号注意更新
E6 E2

TVS493
[2,26] NFC_ SPI_ ESE_ MOSI ESE_IO2 VSS6

1
C514

C516
C515
I2C ADDRESS:0X50/0X51

1
C517 100PF

12pF
220PF
L494 R510
C518 12pF_NF

160nH 料号注意更新 0
Co

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 28_NFC SIZED: D

DEPARTMENT:
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5 4 3 2 1
5 4 3 2 1

Mark Point
FIDUCIAL-MARK-1MM FIDUCIAL-MARK-1MM FIDUCIAL-MARK-1MM FIDUCIAL-MARK-1MM D
M520 M521 M522 M523

1
P524
ICO-WATERPROOF-D3
D

1
RF Cable CLIP, FOOTPRINT???

J530 J532 J533


1

l
J520 J14 J125 J124 J123 J121 J120
1

ia
R2806

Shielding Frame
0 P14

屏蔽框

HOLE-VIA2.1MM HOLE-VIA2.1MM ICO-BOX


HOLE5 HOLE6 HOLE-VIA2.1MM HOLE-VIA2.1MM HOLE-VIA2.1MM HOLE-VIA1.6MM HOLE-VIA1.6MM 主板料号 C
HOLE520 HOLE3 HOLE4 HOLE-VIA1.6MM HOLE-1.2MM HOLE526
HOLE524 HOLE2 HOLE527 HOLE-1.2MM
HOLE1
1

1
1

1
J515 J516 J517 P2 P3 P521 P1 P6 P7 P4 P5

nt
1
J514

1
U1

1
J518 J513 J512
1

屏蔽框 屏蔽框 屏蔽框 屏蔽框 屏蔽框 屏蔽框 屏蔽框 屏蔽框


1

1
1

1 1 1 1 1 1 1 1
R2803 R2804 R2802 ICO-BOX ICO-BOX ICO-BOX ICO-BOX ICO-BOX ICO-BOX ICO-BOX ICO-BOX
R2807
BB屏蔽框 BB屏蔽罩 PMU屏蔽框 PMU屏蔽罩 RF2屏蔽框 RF2屏蔽罩 RF1屏蔽框 RF1屏蔽罩
100PF
100PF 100PF 100PF

P11 P10 P8 P13 P9 P20 P12

屏蔽框 屏蔽框 屏蔽框 屏蔽框 屏蔽框 屏蔽框 屏蔽框

e
1 1 1 1 1 1 1
J12 J11 J10 J8 J7 J6 J5 J4 J3 J2 J1 J13
ICO-BOX ICO-BOX ICO-BOX ICO-BOX ICO-BOX ICO-BOX ICO-BOX
1

BB3屏蔽罩 BB2屏蔽罩 WCN屏蔽罩 USB屏蔽罩 NFC屏蔽罩 晶体屏蔽罩 RF3屏蔽罩

R2809 R2808
100PF

100PF

id
P520

屏蔽框

1
ICO-BOX
B
DTV屏蔽罩

B
nf
P15

HF-1.2X1.2
Co
Boot_ config [0], WDOG_ DISABLE

[3,11,16] MSM_PS_HOLD TP528

TP530
[2,16] WDOG_DISABLE

[3,6,16] MSM_RESOUT_N TP532

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 28_TP/GND/SHIELDING SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 28 OF 30


5 4 3 2 1
5 4 3 2 1

GPIO_123 RFFE4_DATA GPIO_134

MSM8953 GPIO Configuration For QRD8953 GPIO_124 GPIO_135 FP_SPI_CLK


GPIO_0 NFC_SPI_ESE_MOSI GPIO_41 GPIO_82 FM_DATA
D
GPIO_125 GPIO_136 FP_SPI_CS
GPIO_1 NFC_SPI_ESE_MISO GPIO_42 ACCL_INT1_N GPIO_83 BT_CTL
D
GPIO_126 RFFE3_CLK FP_SPI_MOSI
GPIO_2 NFC_SPI_ESE_CS_N GPIO_43 ALSP_INT_N GPIO_84 BT_DATA GPIO_137

GPIO_3 NFC_SPI_ESE_CLK GPIO_44 MAG_DRDY_INT GPIO_85 KEY_VOL_UP_N GPIO_127 RFFE3_DATA FP_SPI_MISO


GPIO_138

GPIO_4 UART_MSM_TX GPIO_45 GYRO_INT_N GPIO_86


GPIO_128 GPIO_139 USB_SS_SEL
GPIO_5 UART_MSM_RX GPIO_46 SCAM_D_ELDO_EN GPIO_87
GPIO_129 SCAM_RST_N GPIO_140 FP_RST_N
GPIO_6 GPIO_47 SENSOR_SPI_CS2_N GPIO_88

l
GPIO_130 SCAM_PWD_N GPIO_141
GPIO_7 GPIO_48 FP_INT_N GPIO_89 NFC_ESE_PWR_REQ

GPIO_8 GPIO_49 UIM_BATT_ALARM GPIO_90 GPIO_131

ia
GPIO_9 GPIO_50 WCD_ELDO_EN GPIO_91 LCD_ID
GPIO_132
GPIO_10 TP_I2C_SDA GPIO_51 UIM1_DATA GPIO_92 MCAM_ID
GPIO_133 SDCARD_DET_N
GPIO_11 TP_I2C_SCL GPIO_52 UIM1_CLK GPIO_93 SCAM_ID
C
GPIO_12 GPIO_53 UIM1_RESET GPIO_94

C GPIO_13 GPIO_54 GPIO_95

nt
GPIO_14 SENSOR_I2C_SDA GPIO_55 UIM2_DATA GPIO_96 WSA_EN

GPIO_15 SENSOR_I2C_SCL GPIO_56 GPIO_97


UIM2_CLK

GPIO_16 NFC_DISABLE GPIO_57 UIM2_RESET GPIO_98


PMI8952 GPIO/MPP Configuration For QRD8952
GPIO_1 MPP_1
GPIO_17 NFC_IRQ GPIO_58 GPIO_99
GPIO_2 MPP_2 GREEN_LED
GPIO_18 NFC_I2C_SDA GPIO_59 GPIO_100 GRFC0_SEL

e
MPP_3
GPIO_19 NFC_I2C_SCL GPIO_60 GP_PDM_A0 GPIO_101 GRFC1_SEL
MPP_4 FLASH_STROBE_NOW
GPIO_20 SENSOR_SPI_MOSI GPIO_61 LCD_RST_N GPIO_102 GRFC2_SEL

id
GPIO_21 SENSOR_SPI_MISO GPIO_62 GPIO_103 GRFC3_SEL
NFC_DWL_REQ

GPIO_22 SENSOR_SPI_CS0_N GPIO_63 GPIO_104 GRFC4_SEL

B
GPIO_23 SENSOR_SPI_CLK GPIO_64 TP_RST_N GPIO_105 GRFC5_SEL

WDOG_DISABLE
B GPIO_24 LCD_TE0 GPIO_65 TP_INT_N GPIO_106
PM8952 GPIO/MPP Configuration For QRD8952
GPIO_25 GPIO_66 GPIO_107 GRFC7_SEL
GPIO_1 CODEC_DIV_CLK MPP_1 VDD_PX_BIAS_MPP_1
nf
GPIO_26 CAM_MCLK0 GPIO_67 WCD_RST_N GPIO_108 GRFC8_SEL
GPIO_2 NFC_CLK_REQ(SDCARD_DET_N) MPP_2 PA_THERM1
GPIO_27 CAM_MCLK1 GPIO_68 GPIO_109 GRFC9_SEL
GPIO_3 UIM_BATT_ALARM MPP_3 VREF_DAC_MPP_3
GPIO_28 GPIO_69 WCD_MSM_MCLK GPIO_110
GPIO_4 MPP_4 QUIET_THERM
GPIO_29 CAM_I2C_SDA0 GPIO_70 SLIMBUS_CLK GPIO_111
GPIO_5
GPIO_30 CAM_I2C_SCL0 GPIO_71 SLIMBUS_DATA0 GPIO_112
Co
GPIO_6
GPIO_31 CAM_I2C_SDA1 GPIO_72 GPIO_113
GPIO_7 VBUS_USB_IN
GPIO_32 CAM_I2C_SDA1 GPIO_73 WCD_INTR1 GPIO_114
GPIO_8 USB_ID
GPIO_33 GPIO_74 WCD_INTR2 GPIO_115

GPIO_34 FLASH_STROBE_NOW GPIO_75 BT_SSBI GPIO_116 EXT_GPS_LNA_EN

GPIO_35 GPIO_76 WL_CMD_DATA_2 GPIO_117 CH0_GSM_TX_PHASE_D0


A

GPIO_36 GPIO_77 WL_CMD_DATA_1 GPIO_118 RFFE1_CLK A

GPIO_37 FORCE_USB_BOOT GPIO_78 WL_CMD_DATA_0 GPIO_119 RFFE1_DATA

GPIO_38 GPIO_79 WL_CMD_SET GPIO_120 RFFE2_CLK

GPIO_39 MCAM_PWD_N GPIO_80 WL_CMD_CLK GPIO_121 RFFE2_DATA


PROJECT: ZACH REV: V1.2

GPIO_40 MCAM_RST_N GPIO_81 FM_SSBI GPIO_122 RFFE4_CLK DOCUMENT NO.: 04_GPIO_MAP SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 29 OF 30


5 4 3 2 1
5 4 3 2 1

Change list
Item Description Reason

l
ia
C

ent
id
B

B
nf
Co

A
A

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 52_CHANGE_LIST SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 30 OF 30


5 4 3 2 1

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