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5 4 3 2 1

MIPI_ RFFES
1*32bit,933MHz
eMCP
Dsc
SDC1*8bite,eMMC 5.1 Lpddr3+eMMC

Main ANT

RX

WTR2965
LCD IF
Display+CTP( INCELL)
FEM TX 4L-MIPI
RF IQ 1920*1080 TFT/NT35596
SAW I2C-2/CTP
25*16/FT5436

l
RXD ANT
4L-MIPI CSI0
Rear CAM
CLK0/I2C0
RXD RF IQ Deph CAM
RxD FEM IMX258

WTR2965 MIPI_ RFFES


4L-MIPI_ CSI1 Deph CAM

ia
CLK1/I2C1 Deph CAM
IMX258
Connectivity ANT
4L-MIPI_ CSI2 Front CAM
SAW LNA

G N SS
CLK2/I2C1 L219F70

2.4G
IMX219
SAW
TRIPLEXER CONN IQ GPIO
5.8G Front Flash/Sink

WCN3680
C

MSM8953
48MHZ CONN ctrl
Crystal
C
I2C-4 ALS/PS

nt
FM TMD27253

DTV A+G
SW SAW SAW LNA
DTV EN/RST
14nm/8*A53 /2.3GHZ 6DS3

FC8300 SPI
19.2M Crystal E-Compass

Adreno 506 GPU


AK09915C
ANT

SPI-7 Finger Print


FPC2050
PS SAR SENSOR
EPL8802
I2C-8
14*14mm FCBGA

e
SPI_ 1

857P/0.4mm NFC CLK2

NQ210
Headset I2C_ 5
5V/0.5A
HPH_ R LDOS VPH_ PWR
23*LDO s
DC/DC
SPK PA
SPK

id
I2C_ 8
87319 Audio

SW P
VPH_ PWR Speech Bucks
Receiver
Bucks*7

MIC1

Three choose two


SPMI SIM1 SIM1 B
MIC3 hot-plug

B SIM2
SIM2
CLK Ctrl hot-plug
RTC
nf 19.2MHZ PM8953 CLK
MSDC2 4-bit micro SD
Crystal hot-plug

VPH_ PWR

JTAG
PMI8952 Debug
UART2
WLED SINK*4
port
Backlight Wled Driver PWR ON
1A*2
Flash Flash Driver
Co
ERM/LRA INT
VIB VIB Driver

SPMI

Battery Fuel guage

USB 2.0
Charger Charger
SMB1350
BC1.2+QC2.0

VBUS
micro USB USB 2.0

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 01_BLOCK_DIAGRAM SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 1 OF 30


5 4 3 2 1
5 4 3 2 1

Note: Asterisks (*) indicate modem power management (MPM) wake-up pins
U232-C
VREG_L5_1P8 VREG_L5_1P8

U232-D

R138
R137

NF
MSM8953

NF
APPS_BOOT_FROM_ROM FOR DEVELOPMENT
CONTROL
BB10 H46 FORCE_USB_BOOT [16] NF
[26,27] NFC_SPI_ESE_MOSI GPIO_0 * GPIO_37 MSM8953 APPS_BOOT_ROM [2]
BE9 M6
[26,27] NFC_SPI_ESE_MISO GPIO_1 * * GPIO_38 DTV_EINT [26] CONTROL R139
CDC_PDM_RX2 [11]
BF12 N7 AG47 BE25

l
[26] DTV_SPI1_CS_N GPIO_2 GPIO_39 MCAM0_PWD_N [14] GPIO_74 GPIO_108 GRFC8_ SEL [23]
*
BF8 R1 BT_SSBI[24] BG9 BG25
[26,27] NFC_SPI_ESE_CLK GPIO_3 GPIO_40 GPIO40_FLASH_1W [14] GPIO_75 GPIO_109 GRFC9_SEL [22]
R140 1K BA43 T6 WL_CMD_DATA_2 [24] BA13 BB24
[16] UART_MSM_TX GPIO_4 GPIO_41 MCAM1_PWD_N [14] GPIO_76 GPIO_110 GRFC10_SEL [22]
R141 1K BB44 AH42 WL_CMD_DATA_1 [24] BE11 BF24 GRFC11_SEL [22]
[16] UART_MSM_RX GPIO_5 * * GPIO_42 ACCEL_INT [15] GPIO_77 GPIO_111
BD46 AH44 WL_CMD_DATA_0 [24] BB12 BC23
GPIO_6 * GPIO_43 ALSP_INT_N [15] GPIO_78 GPIO_112 GRFC12_SEL [20]
BE45 AJ47 WL_CMD_SET [24] BB14 BG45
GPIO_7 * GPIO_44 MAG_INT_N [15] GPIO_79 GPIO_113 GRFC13_SEL [17]

ia
AU45 AJ45 WL_CMD_CLK [24] BC11 BE23
[26] GPIO8_DTV_EN GPIO_8 * GPIO_45 GYRO_ INT_ N [15] GPIO_80 GPIO_114 GRFC14_SEL
AT42 AK46 FM_SSBI [24] BG13 BB22 [19]
GPIO_9 * * GPIO_46 LCD_ID [14] GPIO_81
* GPIO_115
AV46 AJ43 SEN_SPI_CS2_N [15] FM_DATA [24] BE13 BA21 EXT_GPS_LNA_EN [24]
[2,15] TP_I2C_SDA GPIO_10 GPIO_47 GPIO_82 GPIO_116
AU43 AN47 BT_CTL [24] BD14 BD22 CH0_GSM_TX_PHASE_D0 [17]
[2,15] TP_I2C_SCL GPIO_11 * GPIO_48 FP_INT_N [15] GPIO_83 GPIO_117
AW45 AM46 BT_DATA [24] BF10 BF22 RFFE1_CLK [19,21,25]
[15] GPIO25_V3V3_EN GPIO_12 * GPIO_49 UIM_BATT_ALARM [9,11] GPIO_84 GPIO_118
AY46 AP46 KEY_VOL_UP_N [16] J45 BE21 RFFE1_DATA [19,21,25]
[14] FRONT_FLASH_EN GPIO_13 * GPIO_50 DCAM_AVDD_EN [14] GPIO_85
* GPIO_119
SAR_PS_INT [15]
BA47 GPIO_14 GPIO_51 AN43 K44 GPIO_86 GPIO_120 BG21
[2,15] SENSOR_I2C_SDA UIM1_DATA [16] RFFE2_CLK [23]
* C
AU41 GPIO_15 GPIO_52 AR45 J47 GPIO_87 GPIO_121 BF20
[2,15] SENSOR_I2C_SCL UIM1_CLK [16] RFFE2_DATA [23]
*
[27] NFC_DISABLE BB8 GPIO_16 GPIO_53 AN41 UIM1_RESET [16] I2S_1_MISO [13] E45 GPIO_88 GPIO_122 BB20 RFFE4_CLK [17]
BF6 AU47 [2,16] B46 BC19
[27] NFC_IRQ GPIO_17 * * GPIO_54 SIM1&TF_DET_N [14] CAM_ DOVDD_ EN GPIO_89 GPIO_123 RFFE4_DATA [17]
C
BE7 AP42 C45 BA19

nt
[2,27] NFC_I2C_SDA GPIO_18 GPIO_55 UIM2_DATA [16] GPIO_90 GPIO_124 RFFE5_CLK [18]
*
BA9 GPIO_19 GPIO_56 AT46 I2S_1_BCK [13] J41 GPIO_91 GPIO_125 AY18
[2,27] NFC_I2C_SCL UIM2_CLK [16] RFFE5_DATA [18]
ONLY reserved
*
M44 GPIO_20 GPIO_57 AR41 I2S_1_LRCK [13] H42 GPIO_92 GPIO_126 BE19
[15] SEN_SPI_MOSI UIM2_RESET [16] RFFE3_CLK [21]
L45 AT44 [2,16] I2S_1_MOSI [13] D46 BF18 VREG_L5_1P8
[15] SEN_SPI_MISO GPIO_21 * * GPIO_58 SIM1&TF_DET_N GPIO_93
* GPIO_127 RFFE3_DATA [21]
R542
[15] SEN_SPI_CS_N M46 GPIO_22 * GPIO_59 BD44 0
USB_ID [9,10,16] E47 GPIO_94 GPIO_128 BG5 RCAM_AVDD_EN [14]

R601
K46 * AY40 G43 BE5

27K
[15] SEN_SPI_CLK GPIO_23 GPIO_60 GP_PDM_A0 [10] GPIO_95 GPIO_129
BD2 * BF46 FP_SPI_MOSI [15] C47 * BC7 SCAM_PWD_N [14]
[14] LCD_TE0 GPIO_24 GPIO_61 LCD_RST_N [14] GPIO_96 GPIO_130
L140 10 AG41 BD6 FP_SPI_MISO [15]
G45 * T2
0 R602 NF R608
[13] SMART_PA_MCLK GPIO_25 * * GPIO_62 NFC_DWL_REQ [27] GPIO_97
* * GPIO_131
L137 CAM_MCLK0_0 R142 FP_SPI_CS [15] C620
[14] CAM_MCLK0
10 BD4 GPIO_26 * GPIO_63 BC25 NF APPS_BOOT_ROM [2] K42 GPIO_98 * GPIO_132 R3
AMP_INT [13]
0.1uF
L138 CAM_MCLK1_0 FP_SPI_CLK [15] VREG_L5_1P8
[14] CAM_MCLK1
10 BE1 GPIO_27 GPIO_64 AN45 TP_RST_N [15] Internal evaluation usage F46 GPIO_99 * GPIO_133 P6
SIM1&TF_DET_N[2,16]
L139 10 BC5 AL45 BE17 T4
[14] CAM_MCLK2 GPIO_28 * * GPIO_65 TP_INT_N [15] [21] MAIN_ANTENNA_DET
0
GPIO_100 GPIO_134

R612
e
BG3 G47 FP_HW_ID [15] BG17 BA45

10K
[2,14] CAM_I2C_SDA0 GPIO_29 GPIO_66 GPIO_101 GPIO_135 SPK_ I2C_ SCL [2,13,15]

BF2 AH46 R690 BF16 BC47


[2,14] CAM_I2C_SCL0 GPIO_30 * GPIO_67 CDC_PDM_RX0_COMP [11] [20] GRFC2_SEL GPIO_102 GPIO_136 SPK_ I2C_ SDA [2,13,15]
0 NF
[2,14] CAM_I2C_SDA1
BF4 GPIO_31 * GPIO_68 AF42
CDC_PDM_RX1_COMP [11] [20] GRFC3_SEL
BA17 GPIO_103 * GPIO_137 BB46
AUDIO_PA_RST [13]
R615 R613
C568
[2,14] CAM_I2C_SCL1 BE3 GPIO_32 GPIO_69 AG45 CDC_PDM_CLK [11] [23] GRFC4_ SEL
BC15 GPIO_104 * GPIO_138 AW41 FP_LDOEN_2V8 [15] 0.1uF

P2 GPIO_33 * GPIO_70 AE45 CDC_PDM_SYNC [11] BE15 GPIO_105 * GPIO_139 AV40


[20] GRFC5_SEL0
[10] FLASH_STROBE_NOW R7 GPIO_34 * * GPIO_71 AE43 CDC_PDM_TX [11] [16,28] WDOG_DISABLE
BF14 GPIO_106 * GPIO_140 BE47 FP_RST_N [15]

id
[14] FCAM-LDO-EN
N1 GPIO_35 * * GPIO_72 AE47 CDC_PDM_RX0 [11] [20] GRFC7_SEL
BA15 GPIO_107 * GPIO_141 BC45
NFC_ESE_PWR_REQ [27]
N3 AF46 CDC_PDM_RX1 [11]
[26] GPIO36_DTV_RST GPIO_36 * * GPIO_73
C630

C137

C138

C916

C914
C139

C915
18PF

18PF

18PF

18PF

18PF

18PF

18PF

B
nf
GPIO_37 FORCED_USB_BOOT BOOT_CONFIG[3:1] BOOT_CONFIG

GPIO_106 WDOG_DISABLE 0b000 SDC1 -> SDC2 -> USB2.0


Note: Ensure SW sets these GPIOs (Sensor, CTP and
I2C PULL-UP RESISTORS Camera I2C bus) to inout pull down when the peripherals GPIO_108 APPS_BOOT_FROM_ROM 0b001 SDC2 -> SDC1-> USB2.0

are powered off to eliminate leakage.


Co
0b010 SDC1-> USB2.0
SENSORS
Audio PA
CAMERAS
VREG_L6_1P8
CAMERAS VREG_L5_1P8
0b011 USB2.0
[2,14] CAM_DOVDD_1V8 [2,14] CAM_DOVDD_1V8
R146

R147

Default Boot Config (0b000) is SDC1(eMMC)

R145

2.2K
R144
R143

2.2K
2.2K

R148

R150
R149
2.2K

2.2K
2.2K
2.2K

SPK_ I2C_ SDA [2,13,15]


2.2K

SENSOR_I2C_SDA [2,15] CAM_I2C_SDA0 [2,14] CAM_I2C_SDA1 [2,14]


SENSOR_I2C_SCL [2,15] CAM_I2C_SCL0 [2,14] CAM_I2C_SCL1 [2,14]
SPK_ I2C_ SCL [2,13,15]

TOUCHSCREEN NFC SMB

VREG_L5_1P8
R153

R154

A VREG_L5_1P8
R151

R152

A
2.2K

2.2K
2.2K

NFC_I2C_SDA [2,27]
2.2K

TP_I2C_SDA [2,15]

TP_I2C_SCL [2,15] NFC_I2C_SCL [2,27]

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 02_MSM8953_GPIO SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 2 OF 30


5 4 3 2 1
5 4 3 2 1

U232-E

U232-N

Note: MSM8953
WCSS_XO MUST connect to GND if not use 5GHz WIFI
R100 MSM8953 CONTROL
TP100
CONTROL
CLK_OUT [24] 1M 5% BD10 C3 MIPI_CSI0_CLK_P [14] AH6 AY2 MIPI_DSI0_CLK_N [14]
WCSS_XO SDC1_RCLK SDC1_RCLK [6] MIPI_CSI0_CLK_P MIPI_DSI0_CLK_N
BBCLK1 [11] 33 MIPI_CSI0_CLK_N [14]
R43 C1 SDC1_CLK_1 R101 AJ5 AW1 MIPI_DSI0_CLK_P [14]

l
CXO SDC1_CLK SDC1_CLK [6] MIPI_CSI0_CLK_M MIPI_DSI0_CLK_P
T44 B2 MIPI_CSI0_LANE0_P [14] AK6 AV4 MIPI_DSI0_LANE0_N [14]
[11] MSM_BBCLK1_EN CXO_EN SDC1_CMD SDC1_CMD [6] MIPI_CSI0_LANE0_P MIPI_DSI0_LANE0_N
SLEEP_CLK [11] P46 E1 MIPI_CSI0_LANE0_N [14] AL5 AW3 MIPI_DSI0_LANE0_P [14]
SLEEP_CLK SDC1_DATA_0 SDC1_DATA_0 [6] MIPI_CSI0_LANE0_M MIPI_DSI0_LANE0_P
F2 MIPI_CSI0_LANE1_P [14] AG3 AW5 MIPI_DSI0_LANE1_N [14]
SDC1_DATA_1 SDC1_DATA_1 [6] REAR CAMERA MIPI_CSI0_LANE1_P MIPI_DSI0_LANE1_N
PM_PON_RESET_N [10,11] MIPI_CSI0_LANE1_N [14] DISPLAY
T46 RESIN_N SDC1_DATA_2 A3 AG1 MIPI_CSI0_LANE1_M MIPI_DSI0_LANE1_P AV6 MIPI_DSI0_LANE1_P [14]
SDC1_DATA_2 [6]
MSM_RESOUT_N [6,16,28] MIPI_CSI0_LANE2_P [14]
BA41 RESOUT_N SDC1_DATA_3 G5 SDC1_DATA_3 [6] AH2 MIPI_CSI0_LANE2_P MIPI_DSI0_LANE2_N BB2 MIPI_DSI0_LANE2_N [14]

ia
MIPI_CSI0_LANE2_N [14]
D2 AJ3 BA3 MIPI_DSI0_LANE2_P [14]
0.01uF

SDC1_DATA_4 SDC1_DATA_4 [6] MIPI_CSI0_LANE2_M MIPI_DSI0_LANE2_P


1
C100

L9 G1 MIPI_CSI0_LANE3_P [14] AK4 AY6 MIPI_DSI0_LANE3_N [14]


MODE_0 SDC1_DATA_5 SDC1_DATA_5 [6] MIPI_CSI0_LANE3_P MIPI_DSI0_LANE3_N
2

MIPI_CSI0_LANE3_N [14]
J9 MODE_1 SDC1_DATA_6 G3 SDC1_DATA_6 [6] AL3 MIPI_CSI0_LANE3_M MIPI_DSI0_LANE3_P BA5 MIPI_DSI0_LANE3_P [14]
MIPI_ CSI1_ CLK_ P [14]
SDC1_DATA_7 E3 AC5 MIPI_CSI1_CLK_P MIPI_DSI0_REXT AU1 MIPI_DSI0_REXT R157 Place R0801 close to MSM pin
SDC1_DATA_7 [6]
MSM_PS_HOLD [11,16,28] R45 MIPI_ CSI1_ CLK_ N [14] AD6 1.4K +/-1%
PS_HOLD MIPI_CSI1_CLK_M
SDC2_CLK_1 R102 33 MIPI_ CSI1_ LANE0_ P
SDC2_CLK J7 [14] AE5 MIPI_CSI1_LANE0_P MIPI_DSI1_CLK_N AR3
SDC2_SDCARD_CLK[16]
JTAG_RESOUT_N [16] MIPI_ CSI1_ LANE0_ N [14]
M4 SRST_N SDC2_CMD H6 AF6 MIPI_CSI1_LANE0_M MIPI_DSI1_CLK_P AP4
SDC2_SDCARD_CMD[16]
JTAG_TCK [16] MIPI_ CSI1_ LANE1_ P [14] C
L1 TCK SDC2_DATA_0 K4 AB4 MIPI_CSI1_LANE1_P MIPI_DSI1_LANE0_N AM2
SDC2_SDCARD_D0 [16] Depth CAMERA
JTAG_TDI[16] L3 J3 MIPI_ CSI1_ LANE1_ N [14] AC3 AN3
TDI SDC2_DATA_1 SDC2_SDCARD_D1 [16] MIPI_CSI1_LANE1_M MIPI_DSI1_LANE0_P DSI1 IO pin shoulde be float if don't use
JTAG_TDO [16] MIPI_ CSI1_ LANE2_ P [14]
L5 TDO SDC2_DATA_2 K6 AC1 MIPI_CSI1_LANE2_P MIPI_DSI1_LANE1_N AP6
SDC2_SDCARD_D2 [16]
C JTAG_TMS [16] MIPI_ CSI1_ LANE2_ N [14]
M2 H2 AD2 AN5

nt
TMS SDC2_DATA_3 SDC2_SDCARD_D3 [16] MIPI_CSI1_LANE2_M MIPI_DSI1_LANE1_P
JTAG_TRST_N [16] MIPI_ CSI1_ LANE3_ P [14]
K2 TRST_N AE3 MIPI_CSI1_LANE3_P MIPI_DSI1_LANE2_N AR1
MIPI_CSI1_LANE3_N [14]
USB2_HS_DM AB44 AF4 MIPI_CSI1_LANE3_M MIPI_DSI1_LANE2_P AT2
USB_DM [16]
90ohm Diff Imp routing for USB MIPI_CSI2_CLK_P [14]
USB2_HS_DP AC45 V6 MIPI_CSI2_CLK_P MIPI_DSI1_LANE3_N AR5
USB_DP [16]
VREF_LPDDR3 [6,11] MIPI_CSI2_CLK_N [14]
G27 VREF_EBI_CA W5 MIPI_CSI2_CLK_M MIPI_DSI1_LANE3_P AT6
R103 4.02K +/-1% MIPI_CSI2_LANE0_P [14]
AC47 USB_HS_REXT Place R0504 close to MSM pin Y6 AL1
0.1uF

USB2_HS_REXT MIPI_CSI2_LANE0_P MIPI_DSI1_REXT


C101

Internal evaluation usage: change to 200ohm 1% MIPI_CSI2_LANE0_N [14] AA5 MIPI_CSI2_LANE0_M


MIPI_CSI2_LANE1_P [14]
USB1_SS_RX_M AA47 FRONT CAMERA U3 MIPI_CSI2_LANE1_P
Y46 MIPI_CSI2_LANE1_N [14] V4
USB1_SS_RX_P MIPI_CSI2_LANE1_M
R41 DNC_70 USB1_SS_TX_M V46 MIPI_CSI2_LANE2_P [14] W3 MIPI_CSI2_LANE2_P
N41 DNC_71 USB1_SS_TX_P U47 MIPI_CSI2_LANE2_N [14] W1 MIPI_CSI2_LANE2_M

e
MIPI_CSI2_LANE3_P [14] Y2 MIPI_CSI2_LANE3_P
R104
L43 Y44 Place R0505 close to MSM pin MIPI_CSI2_LANE3_N [14] AA3
DNC_72 USB1_SS_REXT MIPI_CSI2_LANE3_M
M42 W43 100 1%
DNC_73 DNC_74

PMIC_SPMI_CLK N47
SPMI_CLK [10,11]
PMIC_SPMI_DATA N45 SPMI_DATA [10,11]
5.0pF/NC

id
5.0pF/NC
2
2
C102

CSI Pin Name CSI DPHY 4-lane CSI DPHY 2+1 Mode CSI CPHY 3Phase Mode
C103
1

CSI0_3PHASE_PIN0 CSI0_CLKP CSI0_2LANE_CLKP NC


CSI0_3PHASE_PIN1 CSI0_CLKN CSI0_2LANE_CLKN CSI0_TRI0_A B
CSI0_3PHASE_PIN2 CSI0_DP0 CSI0_2LANE_DP0 CSI0_TRI0_B
CSI0_3PHASE_PIN3 CSI0_DN0 CSI0_2LANE_DN0 CSI0_TRI0_C
B
CSI0_3PHASE_PIN4 CSI0_DP1 CSI0_2LANE_DP1 CSI0_TRI1_A
CSI0_3PHASE_PIN5 CSI0_DN1 CSI0_2LANE_DN1 CSI0_TRI1_B
CSI0_3PHASE_PIN6 CSI0_DP2 CSI0_1LANE_DP0 CSI0_TRI1_C
nf CSI0_3PHASE_PIN7 CSI0_DN2 CSI0_1LANE_DN0 CSI0_TRI2_A
CSI0_3PHASE_PIN8 CSI0_DP3 CSI0_1LANE_CLKP CSI0_TRI2_B
CSI0_DN3 NC
CSI0_3PHASE_PIN9 CSI0_1LANE_CLKN CSI0_TRI2_C
CSI1_CLKP CSI1_2LANE_CLKP
CSI1_3PHASE_PIN0 CSI1_CLKN CSI1_TRI0_A
CSI1_3PHASE_PIN1 CSI1_2LANE_CLKN
CSI1_DP0 CSI1_TRI0_B
CSI1_3PHASE_PIN2 CSI1_2LANE_DP0
CSI1_DN0 CSI1_2LANE_DN0 CSI1_TRI0_C
CSI1_3PHASE_PIN3
CSI1_DP1 CSI1_2LANE_DP1 CSI1_TRI1_A
CSI1_3PHASE_PIN4
CSI1_DN1 CSI1_2LANE_DN1 CSI1_TRI1_B
CSI1_3PHASE_PIN5
CSI1_DP2 CSI1_1LANE_DP0 CSI1_TRI1_C
CSI1_3PHASE_PIN6
Co
CSI1_DN2 CSI1_1LANE_DN0 CSI1_TRI2_A
CSI1_3PHASE_PIN7
CSI1_DP3 CSI1_1LANE_CLKP CSI1_TRI2_B
CSI1_3PHASE_PIN8 NC CSI1_TRI2_C
CSI1_DN3 CSI1_1LANE_CLKN
CSI1_3PHASE_PIN9 CSI2_2LANE_CLKP
CSI2_3PHASE_PIN0 CSI2_CLKP CSI2_TRI0_A
CSI2_CLKN CSI2_2LANE_CLKN
CSI2_3PHASE_PIN1 CSI2_2LANE_DP0 CSI2_TRI0_B
CSI2_3PHASE_PIN2 CSI2_DP0
CSI2_2LANE_DN0 CSI2_TRI0_C
CSI2_3PHASE_PIN3 CSI2_DN0
CSI2_2LANE_DP1 CSI2_TRI1_A
CSI2_3PHASE_PIN4 CSI2_DP1
CSI2_2LANE_DN1 CSI2_TRI1_B
CSI2_3PHASE_PIN5 CSI2_DN1
CSI2_1LANE_DP0 CSI2_TRI1_C
CSI2_3PHASE_PIN6 CSI2_DP2
CSI2_1LANE_DN0 CSI2_TRI2_A
CSI2_3PHASE_PIN7
4
CSI2_DN2 3
A CSI2_1LANE_CLKP CSI2_TRI2_B
CSI2_3PHASE_PIN8 CSI2_DP3
CSI2_1LANE_CLKN CSI2_TRI2_C
CSI2_3PHASE_PIN9 CSI2_DN3 A

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 03_MSM8953_CONTROL SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 3 OF 30


5 4 3 2 1
5 4 3 2 1

U232-F

U232-G

SG171 MSM8953
VREG_L6_1P8 [2,12,14,15]
[4,5,12]
VREG_S7_0P915
CONTROL

C171

l
(VDD_MX)
MSM8953
VREG_S7_0P915 [4,5,12]
AR27 L37

0.1uF
VDD_MEM_31 VDD_QFPROM_PRG [4,5,12]
VREG_S2_0P8625 CONTROL
C175

SG172 AA13 J17


C172

C173

C174

VDD_CORE_1 VDDPX_1_1
AA15 VDD_CORE_2 VDDPX_1_2 J19
1uF
22uF

1.0uF

AR29 N9 AA21 J21


22uF

VDD_MEM_32 VREF_PADS_1 VDD_PX_BIAS_MPP_1 [11] VDD_CORE_3 VDDPX_1_3

C176

C177

ia
VREF_PADS_2 AM40 AA23 VDD_CORE_4 VDDPX_1_4 J23
Cap depend on PDN simulation
VREG_S2_0P8625 [4,5,12] AB28 J27
VDD_CORE_5 VDDPX_1_5 VREG_S3_1P225 [4,5,6,12]

0.1uF

0.1uF
Cap depend on PDN simulation
AC27 VDD_CORE_6 VDDPX_1_6 J29 (VDD_PX1)
(LPDDR3)

C178

C179

C180

C181

C182

C183

C184
AA17 VDD_MEM_1 VDD_APC_1 AD28 AE13 VDD_CORE_7 VDDPX_1_7 J31 VREG_S3_1P225[4,5,6,12]
AA19 AD30 AE15 J33

C188
VDD_MEM_2 VDD_APC_2 VDD_CORE_8 VDDPX_1_8

C185

C186

C187

C189

C190

C191

C192
1uF
22uF

0.1uF

0.1uF

0.1uF
22uF

22uF
AA27 VDD_MEM_3 VDD_APC_3 AD32 AE21 VDD_CORE_9 VDDPX_1_9 L17
C193

C194

C198
C195

C196

C197

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
AC33 AD34 AE23 L19

0.1uF
VDD_MEM_4 VDD_APC_4 VDD_CORE_10 VDDPX_1_10
AE17 VDD_MEM_5 VDD_APC_5 AD36 AH36 VDD_CORE_11 VDDPX_1_11 L21 C
1.0uF

0.1uF

0.1uF
1.0uF

0.1uF

0.1uF
AE19 VDD_MEM_6 VDD_APC_6 AD38 Dedicated VIA to Main GND AJ13 VDD_CORE_12 VDDPX_1_12 L23
(VDD_CX)
AE25 VDD_MEM_7 VDD_APC_7 AE29 AJ15 VDD_CORE_13 VDDPX_1_13 L27

C AE27 VDD_MEM_8 VDD_APC_8 AE31 (VDD_APC) AJ37 VDD_CORE_14 VDDPX_1_14 L29


VDD_PLL1 pins and VDD_EBI_CDC pins are clost to VDD_MEM pins,

nt
the caps on VDD_MEM/VDD_PLL1/VDD_EBI_CDC are shared. AG27 AE33 SG173 VREG_S5_S6_0P8625
[4,12] AL13 L31
VDD_MEM_9 VDD_APC_9 VDD_CORE_15 VDDPX_1_15
AH32 VDD_MEM_10 VDD_APC_10 AE35 AR33 VDD_CORE_16 VDDPX_1_16 L33
Cap depend on PDN simulation
C448 0.1uF AH34 AE37 VREG_S5_S6_0P8625[4,12] AR35
VDD_MEM_11 VDD_APC_11 VDD_CORE_17

C204
C200

C201

C202

C203
C444 0.1uF AJ33 VDD_MEM_12 VDD_APC_12 AE39 R37 VDD_CORE_18

C199

C205

C207
C206

C208

C212
C209

C210

C211
AJ35 VDD_MEM_13 VDD_APC_13 W29 U13 VDD_CORE_19 VREG_L12_VDDPX2_SDC [12,16]

22uF

22uF

22uF
SG174 GND [2,3,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]

22uF
AN11 W31 U15

0.1uF

0.1uF

0.1uF

1.0uF

0.1uF

0.1uF

1.0uF

0.1uF

1.0uF
VDD_MEM_14 VDD_APC_14 VDD_CORE_20

1uF

C213
C214

AN13 W33 U17 L11


C215

C216

C217

C218

VDD_MEM_15 VDD_APC_15 VDD_CORE_21 VDDPX_2

1uF
AN29 VDD_MEM_16 VDD_APC_16 W35 Dedicated VIA to Main GND U19 VDD_CORE_22
1.0uF

1.0uF

1.0uF

0.1uF

AN31 W37 U25


1.0uF

VDD_MEM_17 VDD_APC_17 VDD_CORE_23


AP22 VDD_MEM_18 VDD_APC_18 W39 U27 VDD_CORE_24
AP32 VDD_MEM_19 VDD_APC_19 Y28 (VDD_PX3)

e
AR23 Y30 AJ41 (IO)
C219

C221
VREG_L5_1P8
C220

VDD_MEM_20 VDD_APC_20 VDDPX_3_1

C223
C222

C224
AR25 VDD_MEM_21 VDD_APC_21 Y32 VDDPX_3_2 AR9
1.0uF

1.0uF
0.1uF

R15 Y34 AU9

0.1uF
VDD_MEM_22 VDD_APC_22 VDDPX_3_3

0.1uF

1uF
R17 VDD_MEM_23 VDD_APC_23 Y36 VDDPX_3_4 AU39

R35 VDD_MEM_24 VDD_APC_24 Y38 VDDPX_3_5 AW19

id
T32 VDD_MEM_25 VDDPX_3_6 AW21

T34 VDD_MEM_26 VDDPX_3_7 L39

C226

C227
C225
T36 VDD_MEM_27 VDDPX_3_8 R9

U21 U9

0.1uF

0.1uF
VDD_MEM_28 VDDPX_3_9

0.1uF
U23 VDD_MEM_29 VDDPX_3_10 U41

W27 B
VDD_MEM_30

VDDPX_5 AL41 (UIM1) VREG_L14_UIM1 [12,16,27]

C228
nf

0.1uF
VDDPX_6 AK40 (UIM2)
VREG_L15_UIM2 [12,16]

C229

0.1uF
VDDPX_7 L13 (eMMC) VREG_L5_1P8

C230

0.1uF
Co

VDDPX_CK J25
VREG_S3_1P225 [4,5,6,12]

C231

0.1uF
A

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 04_MSM8953_POWER1 SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 4 OF 30


5 4 3 2 1
5 4 3 2 1

VREG_L3_0P925 [5,12]

C232

C234
C233
U232-H D

1.0uF

1.0uF

1.0uF
VREG_S3_1P225 [4,5,6,12]
D MSM8953 VREG_L7_1P8 [5,12,21,24]

C237
C235 C236 CONTROL C238
C239
C240
1.0uF 1.0uF 1.0uF

0.1uF
AG9 VDD_DSI_LV_PLL_1 VDD_USB_SS_1P8_1 AD40 1.0uF
1.0uF
AF10 VDD_DSI_LV_PLL_2 VDD_USB_HS1_3P1 AD42
VREG_L13_3P075 [12]
VREG_L3_0P925 [5,12]

AJ11 VDD_DSI_CSI_1 VDD_USB_CORE_1 AC35 C241 C242

VREG_MIPI_DSI_PLL [5] Star route from PMIC output Cap AF8 AC37
VDD_DSI_HV_PLL_1 VDD_USB_CORE_2 0.1uF 1.0uF

C243
AE11 VDD_DSI_CSI_2 VDD_USB_SS_1P8_2 AC39

R233
R232
1.0uF

R234
AE9 VDD_DSI_HV_PLL_2

l
About star route from PMIC output Cap: AC11 VDD_DSI_CSI_3 VDD_USB_CORE_3 AA41

0
R235 place

0
The power pin for DSI1 shoulde be GND if don't use 0 AA11 AB38 VREG_L3_0P925[5,12]

0
VDD_DSI_CSI_4 VDD_USB_CORE_4
The power pin for CSI1 shoulde be float if don't use
R1152 should be SMT if use for internal evaluation Internal evaluation usage
W11 VDD_DSI_CSI_5 VDD_USB_CORE_5 AB40
C244
VREG_L7_1P8 [5,12,21,24]
1.0uF

ia
AU31 VDD_A2_1 VDD_PLL2_1 AR31
C245
AU29 VDD_A2_2
1.0uF
VDD_PLL2_2 AN17
VDDA_TXDAC_1 shoulde be GND if don't use TXDAC1
AU11 VREG_L7_1P8 [5,12,21,24]
VREG_L19_1P3 [12,24] VDDA_WLAN

VDD_PLL2_3 W25 C246


C247
AU23 VDD_A2_3 1.0uF
VDD_CDC_SDC pins are clost to VDD_CORE pins,
AU25 VDD_A2_4 VDD_PLL2_4 AA25 the caps on VDD_CDC_SDC/VDD_CORE are shared.
0.1uF
AU27 VREG_S2_0P8625 [4,12] C
VDD_A2_5
VREG_L7_1P8 [5,12,21,24]
VDD_PLL1 AC31
C248
C249 BA23 VDD_A1_1
0.1uF
C 1.0uF BA25 R13
VDD_A1_2 VDD_CDC_SDC1

nt
VDDA_GPS_BBRX [5] Star route from PMIC output Cap BA27 VDD_A1_3
BA35 Star route from PMIC output Cap VDDA_GPS_BBRX [5]
C250
VDD_GNSS
C251
[5,12]VREG_S1_0P8625
0.1uF 0.1uF C252
AJ17 VDD_MODEM_1 VDD_EBI_1 R23
0.1uF
SG232
AJ19 VDD_MODEM_2 VDD_EBI_2 R27

[5,12]VREG_S1_0P8625 AJ21 VDD_MODEM_3 VDD_EBI_3 R29

AJ23 VDD_MODEM_4
Star route from PMIC output Cap VREG_S7_0P915
C253 C254 AJ25 VDD_MODEM_5 VDD_EBI_4 R31
C255 C257
C256 [4,5,12]
22uF AJ27 VDD_MODEM_6 VDD_EBI_5 R33
22uF 1.0uF 0.1uF C258 C259 C260 C261
1uF
AJ29 VDD_MODEM_7 VDD_EBI_6 R19
1.0uF 1.0uF 1.0uF 1uF VREG_S7_0P915
AJ31 R21

e
VDD_MODEM_8 VDD_EBI_7 [4,5,12]
Dedicated VIA to Main GND
AK18 C262 C263
VDD_MODEM_9
AM18 VDD_MODEM_10 VDD_EBI_8 R25 1.0uF 1.0uF
AM32

C269
C267 C268 VDD_MODEM_11
C264 C265 C266
C270 Star route from PMIC output Cap VREG_EBI0_HV_PLL [5]
0.1uF AN25 VDD_MODEM_12 VDD_EBI_HV_PLL L25
1.0uF 0.1uF 0.1uF

1.0uF
1.0uF
0.1uF
AN27 N25 VREG_L3_0P925 [5,12]
VDD_MODEM_13 VDD_EBI_LV_PLL

id
AN33 VDD_MODEM_14 C271 C272

AN35 VDD_MODEM_15 VDD_PLL1 pins and VDD_EBI_CDC pins are clost to VDD_MEM pins,
1.0uF 0.1uF
the caps on VDD_MEM/VDD_PLL1/VDD_EBI_CDC are shared.
AN37 VDD_MODEM_16

B
nf
R236 0
[4,5,6,12] VREG_S3_1P225 VREG_EBI0_HV_PLL [5]

R237 0
[4,5,6,12] VREG_S3_1P225 VDDA_GPS_BBRX [5]

R238
Co
[5,12,14] VREG_L23_1P175 NF

PLACE

Internal evaluation usage

R239 PLACE
0
[4,5,6,12] VREG_S3_1P225 VREG_MIPI_DSI_PLL [5]

R240 NF
[5,12,14] VREG_L23_1P175

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 05_MSM8953_POWER2 SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 5 OF 30


5 4 3 2 1
5 4 3 2 1

VREG_L5_1P8

EBI0_CA[0:9]
U106
D EBI0_CA0
EBI0_CA1 Y2 CA0 VDD1 F3 VDD1 decaps must be < 5mm from package edge
EBI0_CA2 Y3 CA1 VDD1 F4
EBI0_CA3 W2 CA2 VDD1 F9
EBI0_CA4 W3 G5

0.1uF

0.1uF

0.1uF

1.0uF
CA3 VDD1

C105

C106

C107

C108

C109
EBI0_CA5 V3 CA4 VDD1 AA3

NF
EBI0_CA6 L3 CA5 VDD1 AA5
EBI0_CA7 K3 CA6 VDD1 AB3
EBI0_CA8 J3 CA7 VDD1 AB4
EBI0_CA9 J2 CA8 VDD1 AB9
H2 CA9
EBI0_DQ[0:31] F5
EBI0_DQ0 VDD2 VREG_S3_1P225
EBI0_DQ1 W12 DQ0 VDD2 F8
EBI0_DQ2 V11 DQ1 VDD2 J5
EBI0_DQ3 V13 DQ2 VDD2 K5
EBI0_DQ4 U11 DQ3 VDD2 L2 VDD2 decaps must be < 1. 5mm from package edge
EBI0_DQ5 U13 DQ4 VDD2 L5
EBI0_DQ6 T11 DQ5 VDD2 M5
EBI0_DQ7 T13 DQ6 VDD2 N5
EBI0_DQ8 R12 DQ7 VDD2 P5

0.1uF

0.1uF

0.1uF
1.0uF

1.0uF
N12 P8

C112

C113

C114

C115
C110

C111
EBI0_DQ9 DQ8 VDD2
M13 P11

NF
EBI0_DQ10 DQ9 VDD2
EBI0_DQ11 M11 DQ10 VDD2 R5
EBI0_DQ12 L13 DQ11 VDD2 T5
EBI0_DQ13 L11 DQ12 VDD2 U5
EBI0_DQ14 K11 DQ13 VDD2 V5
EBI0_DQ15 K13 DQ14 VDD2 W5
EBI0_DQ16 J12 DQ15 VDD2 AB5
EBI0_DQ17 AB12 DQ16 VDD2 AB8
EBI0_DQ18 AB11 DQ17
EBI0_DQ19 AB10 DQ18 VDDQ G9

ia
EBI0_DQ20 AA13 DQ19 VDDQ H8 VREG_S3_1P225
EBI0_DQ21 AA12 DQ20 VDDQ H12
EBI0_DQ22 AA10 DQ21 VDDQ J11
U232-B EBI0_DQ23 Y13 DQ22 VDDQ K10 Use solid Plane for L2
EBI0_DQ24 Y11
H11
DQ23 Power VDDQ K12
L8 VDD2 decaps must be < 1. 5mm from package edge
EBI0_DQ25 DQ24 VDDQ
Note EBI0_DQ26 H13 DQ25 VDDQ L9
MSM8953 G10 M10
EBI0_DQ27 DQ26 VDDQ
Place R105 close to MSM Pin
EBI0_DQ28 G12 DQ27 VDDQ M12

4.7uF

4.7uF

0.1uF

0.1uF

0.1uF
CONTROL G13 N11

C116

C117

C118

C119

C120

C121

C122
EBI0_DQ29 DQ28 VDDQ

NF

NF
EBI0_DQ30 F10 DQ29 VDDQ R11

[6] EBI0_CS0_N A25 E25


R105 240 +/-1% MICRO/HYNIX SAMSUNG KEEP CLOSE TO THE PIN EBI0_DQ31 F11
F12
DQ30 VDDQ T10
T12
EBI0_CS_N_0 EBI0_CAL VREG_S3_1P225 [4,5,6,12] DQ31 VDDQ
VDDQ U8
B22 R106 240 G2 U9
[6] EBI0_CS1_N EBI0_CS_N_1 Internal evalutaion usage ZQ0 VDDQ C
R107 240 G3 ZQ1/NC VDDQ V10
U1501.G3 ZQ1 NC F13
VDDQ V12
W11
VSSQ VDDQ
[6] EBI0_CLK_C B26 EBI0_CKB G11 VSSQ VDDQ Y8 VREG_S3_1P225
H10 VSSQ VDDQ Y12
A27 E37 EBI0_DQ0 J8 AA9
C [6] EBI0_CLK_T EBI0_CK EBI0_DQ_0 VSSQ VDDQ
U1501.A7 RFU RCLK J13 VDDCA decaps must be < 1. 5mm from package edge

nt
EBI0_DQ1 VSSQ
EBI0_DQ_1 E35 K8 VSSQ VDDCA K2
K9 VSSQ VDDCA N2
EBI0_DQ2 VREG_L5_1P8
A23 EBI0_CKE_0 EBI0_DQ_2 C37 L10 VSSQ VDDCA U2 VREG_L8_2P9
[6] EBI0_CKE0

0.1uF

0.1uF
1.0uF

1.0uF
L12 V2

C125

C126
C123

C124
VSSQ VDDCA
A21 EBI0_CKE_1 EBI0_DQ_3 E33 EBI0_DQ3 M8 VSSQ
[6] EBI0_CKE1 N13 B3
VSSQ VCC

C132

C127
C35 EBI0_DQ4 P9 B12

C129

C131

C128
C130
EBI0_DQ_4 VSSQ VCC
EBI0_DM[0:3] R13 VSSQ VCC B13
[6] EBI0_DM0 E27 E31 EBI0_DQ5 T8 C4
EBI0_DM_0 EBI0_DQ_5 VSSQ VCC
U10 D8

0.1uF

0.1uF
VSSQ VCC

2.2uF

0.1uF
NF
EBI0_DM1 C23 C33 EBI0_DQ6 U12 A4

NF
EBI0_DM_1 EBI0_DQ_6 VSSQ VCCQ
V8 VSSQ VCCQ B6
EBI0_DM2 A37 C31 EBI0_DQ7 V9 B9
EBI0_DM_2 EBI0_DQ_7 VSSQ VCCQ C133 1.0uF
W8 VSSQ VCCQ C7
EBI0_DM3 B12 E19 EBI0_DQ8 W13 C11
EBI0_DM_3 EBI0_DQ_8 VSSQ VCCQ C134
Y10 VSSQ VCCI A11 0.1uF
EBI0_DQ_9 E17 EBI0_DQ9 AA11 VSSQ VDDI
CLKM B8 SDC1_CLK [3]
EBI0_DQS0_C[6] C29 C19 EBI0_DQ10 F2 C2 [3,16,28]
EBI0_DQSB_0 EBI0_DQ_10 VSS RST MSM_RESOUT_N
G4 VSS CMD A6 SDC1_CMD [3]
EBI0_DQS0_T[6] E29 EBI0_DQS_0 EBI0_DQ_11 E15 EBI0_DQ11 G8 VSS eMMC

e
H3 B4 SDC1_DATA_7 SDC1_DATA_[0:7] R108
VSS DAT7 SDC1_DATA_6
C17 EBI0_DQ12 H5 A5 VREG_L5_1P8
EBI0_DQ_12 VSS DAT6 SDC1_DATA_5
L4 VSS DAT5 A10
EBI0_DQS1_C [6] E21 C15 EBI0_DQ13 M3 C9 SDC1_DATA_4 10K
EBI0_DQSB_1 EBI0_DQ_13 VSS DAT4
M4 B5 SDC1_DATA_3
EBI0_DQS1_T[6] VSS DAT3 SDC1_DATA_2
C21 E13 EBI0_DQ14 N4 C6
EBI0_DQS_1 EBI0_DQ_14 VSS DAT2 SDC1_DATA_1
N8 VSS DAT1 B10
C13 EBI0_DQ15 P4 A9 SDC1_DATA_0
EBI0_DQ_15 VSS DAT0
P12 VSS
EBI0_DQS2_C [6] B38 A43 EBI0_DQ16 R3
EBI0_DQSB_2 EBI0_DQ_16 VSS
R4 VSS

id
EBI0_DQS2_T[6] A39 C41 EBI0_DQ17 R8
EBI0_DQS_2 EBI0_DQ_17 VSS
T4 VSS
A41 EBI0_DQ18 Y4 U3 EBI0_CS0_N [6]
EBI0_DQ_18 VSS CS0#
Y5 VSS CS1# T3
EBI0_DQS3_C [6] EBI0_CS1_N [6]
A11 EBI0_DQSB_3 EBI0_DQ_19 C43 EBI0_DQ19 AA2
AA4
VSS LP-DDR3 T2 EBI0_CKE0 [6]
EBI0_DQS3_T[6] VSS CKE0
C11 E41 EBI0_DQ20 AA8 R2
EBI0_DQS_3 EBI0_DQ_20 VSS CKE1 EBI0_CKE1 [6]
EBI0_DQ_21 B40 EBI0_DQ21 H4 VSSCA CLK P3 EBI0_CLK_T [6]
J4 VSSCA CLK# N3 EBI0_CLK_C [6]
EBI0_CA0 B34 E43 EBI0_DQ22 K4 B
EBI0_CA_0 EBI0_DQ_22 VSSCA
P2 VSSCA DQS0 T9 EBI0_DQS0_T [6]
EBI0_CA1 A33 E39 EBI0_DQ23 U4 R9
EBI0_CA_1 EBI0_DQ_23 VSSCA DQS0# EBI0_DQS0_C [6]
V4 VSSCA DQS1 M9
EBI0_DQ24 EBI0_DQS1_T [6]
EBI0_CA2 A31 EBI0_CA_2 EBI0_DQ_24 C7 W4 VSSCA DQS1# N9
Y9 EBI0_DQS1_C [6]
B DQS2 EBI0_DQS2_T [6]
EBI0_CA3 B30 A7 EBI0_DQ25 A3 W9
EBI0_CA_3 EBI0_DQ_25 VSSM DQS2# EBI0_DQS2_C [6]
A8 VSSM DQS3 H9
EBI0_DQ26 EBI0_DQS3_T [6]
EBI0_CA4 A29 EBI0_CA_4 EBI0_DQ_26 C9 A12 VSSM DQS3# J9 EBI0_DQS3_C [6]
B2 VSSM
EBI0_CA5 A19 C5 EBI0_DQ27 B7 R10 EBI0_DM0 EBI0_DM[0:3]
EBI0_CA_5 EBI0_DQ_27 VSSM DM0 EBI0_DM1 [6]
B11 N10
EBI0_CA6 B18 EBI0_CA_6
nf EBI0_DQ_28 A9 EBI0_DQ28 C3
C5
VSSM
VSSM
DM1
DM2 W10
J10
EBI0_DM2
EBI0_DM3
EBI0_DQ29 VSSM DM3
EBI0_CA7 A17 EBI0_CA_7 EBI0_DQ_29 E9 C8 VSSM
C10 M2 R109 0
VSSM VREFCA VREF_LPDDR3
EBI0_CA8 A15 E7 EBI0_DQ30 C12 P13 R110 0
EBI0_CA_8 EBI0_DQ_30 VSSM VREFDQ
C13 VSSM R37 R38 is debug for DDR test

C135
EBI0_CA9 B14 E5 EBI0_DQ31 D7
EBI0_CA_9 EBI0_DQ_31 VSSM
AB14

C136
DNU
A2 AB13

NF
VSF DNU
A13 AB2

0.1uF
VSF DNU
B1 VSF DNU AB1
B14 VSF DNU AA14
D2 VSF DNU AA1
D3 VSF DNU A14
D4 VSF DNU A1
D5 VSF
D6 VSF
R111 R112
A7 P10 ODT
[3] SDC1_RCLK RFU/RCLKM ODT
0 NF
Co

Note: Pull-up resistors on SDC1_DATA are PCB and eMMC vender dependent

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 06_MSM8953_EBI/MEM SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 6 OF 30


5 4 3 2 1
5 4 3 2 1

l
U232-I

MSM8953
C158 C159 C160 C161
CONTROL

ia
R158 33nH
WTR0_PRXBB_I_P [17] BE33 BBRX_I_I_CH0 22PF 22PF 22PF 22PF
WTR0 PRX IQ
R159 33nH R160 33nH WTR0_TXBB_I_M [17,18]
WTR0_PRXBB_Q_P [17] BE31 BE41
BBRX_I_Q_CH0 TXDAC0_IM
R161 33nH WTR0_TXBB_I_P [17,18]
TXDAC0_IP BF40
R162 WTR0 TXIQ
BF42 33nH WTR0_TXBB_Q_M [17,18]
R163 33nH TXDAC0_QM
WTR0_DRXBB_I_P [17] R164 33nH WTR0_TXBB_Q_P [17,18]
BG33 BBRX_I_I_CH1 TXDAC0_QP BG43
WTR0 DRX IQ
C
R165 33nH
WTR0_DRXBB_Q_P [17] BG31 BBRX_I_Q_CH1
VREF_DAC_MPP_3 [11]
TXDAC0_VREF AW33
C162 C163 C164 C165
C

C166

2
nt

0.1uF
BE29 BBRX_I_I_CH2

1
22PF 22PF
22PF 22PF BF36
TXDAC1_IM
BG29 BBRX_I_Q_CH2 TXDAC1_IP BG35

TXDAC1_QM BE37

R166 TXDAC1_QP BF38


WTR1_PRXBB_I_P [18] 33nH
WTR1 PRX IQ BE27 BBRX_I_I_CH3
R167 33nH
WTR1_PRXBB_Q_P [18]
BG27 BBRX_I_Q_CH3 TXDAC1_VREF BA33
WTR1_DRXBB_I_P [18] R168 33nH
WTR1 DRX IQ

WTR1_DRXBB_Q_P [18] R169 33nH

e
Internal evaluation usage:change to 3.92K 1%
R170 WTR0_GPSBB_I_P [17]
AW15 WLAN_RSET GNSS_BB_IP BC39
GPS IQ
C167 C170 +/-1%
C168 C169 6.04k BC41 WTR0_GPSBB_Q_P [17]
GNSS_BB_QP
Place R0913 close to MSM pin

22PF WLAN_BB_IN [24] [47] AU15


22PF 22PF 22PF WLAN_BB_I_M
WLAN_BB_IP [24] [47] AT16 WLAN_BB_I_P

id
WLAN IQ WLAN_BB_QN [24] [47] AT14 WLAN_BB_Q_M
WLAN_BB_QP [24] [47] AU13 WLAN_BB_Q_P

Note1 B

1) Unused BBRX_IQ lines can be NC


2) Unused TX_DAC0_IQ, TX_DAC_IREF and TX_DAC_VREF need to be GND
B
nf
Co

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 07_MSM8953_RF SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 7 OF 30


5 4 3 2 1
5 4 3 2 1

U232-L

U232-K

l
MSM8953

CONTROL
MSM8953

CONTROL B20 F14


GND_148 GND_198
B24 GND_149 GND_199 F16
A1 GND_48 GND_98 AG29
B28 GND_150 GND_200 F18

ia
A13 GND_49 GND_99 AG31
B32 GND_151 GND_201 F20
A35 GND_50 GND_100 AG33
B36 GND_152 GND_202 F22
A45 GND_51 GND_101 AG35
U232-M B4 F24
GND_153 GND_203
A47 GND_52 GND_102 AG37
B42 GND_154 GND_204 F26
A5 GND_53 GND_103 AG39
B44 GND_155 GND_205 F28
AA1 GND_54 GND_104 AG5
MSM8953 B6 F30 U232-J
GND_156 GND_206
AA29 GND_55 GND_105 AG7
CONTROL B8 F32
GND_157 GND_207
AA31 GND_56 GND_106 AJ1 C
BA1 F34 U232-A
GND_158 GND_208
AA33 GND_57 GND_107 AJ9 N37 GND_248
BA7 F36 MSM8953
GND_159 GND_209
AA35 GND_58 GND_108 AK2 N43 GND_249
BB42 F38 CONTROL
GND_160 GND_210
C AA37 GND_59 GND_109 AL11 P42 GND_250
BB6 F4 MSM8953

nt
GND_161 GND_211
AA39 GND_60 GND_110 AL15 P44 GND_251 AR13 GND_1 GND_21 AM30
BC1 F40 CONTROL
GND_162 GND_212
AA45 GND_61 GND_111 AL17 R11 GND_252 AW13 GND_2 GND_22 AL29 AA43 DNC_1 DNC_36 BB4
BC43 GND_163 GND_213 F42
AA9 GND_62 GND_112 AL25 R47 GND_253 AR15 GND_3 AD44 DNC_2 DNC_37 BB16
BG1 GND_164 GND_214 F44
AB2 GND_63 GND_113 AL27 T42 GND_254 GND_23 AP16 AF44 DNC_3 DNC_38 BB18
BG11 GND_165 GND_215 F6
AB42 GND_64 GND_114 AL31 U1 GND_255 GND_24 AM16 AG43 DNC_4 DNC_39 BC3
BG15 GND_166 GND_216 F8
AB46 GND_65 GND_115 AL33 U11 GND_256 AJ7 DNC_5 DNC_40 BC9
BG19 GND_167 GND_217 G11
AB6 GND_66 GND_116 AL35 U29 GND_257 AW23 GND_4 GND_25 V26 AJ39 DNC_6 DNC_41 BC13
BG23 GND_168 GND_218 G13
AC13 GND_67 GND_117 AL37 U31 GND_258 AW27 GND_5 GND_26 V24 AK42 DNC_7 DNC_42 BC17
BG47 GND_169 GND_219 G15
AC15 GND_68 GND_118 AL39 U33 GND_259 BC27 GND_6 AK44 DNC_8 DNC_43 BC21
BG7 GND_170 GND_220 G17
AC17 GND_69 GND_119 AL47 U35 GND_260 BC29 GND_7 GND_27 AB24 AL9 DNC_9 DNC_44 BD8
C25 GND_171 GND_221 G19
AC19 GND_70 GND_120 AL7 U37 GND_261 BC31 GND_8 GND_28 AC25 AL43 DNC_10 DNC_45 BD12

e
C39 GND_172 GND_222 G21
AC21 GND_71 GND_121 AM6 U39 GND_262 BD26 GND_9 AM42 DNC_11 DNC_46 BD16
D10 GND_173 GND_223 G23
AC23 GND_72 GND_122 AN1 U43 GND_263 BD28 GND_10 GND_29 AB32 AM44 DNC_12 DNC_47 BD18
D12 GND_174 GND_224 G25
AC29 GND_73 GND_123 AN15 U45 GND_264 BD30 GND_11 GND_30 AB30 AN7 DNC_13 DNC_48 BD20
D14 GND_175 GND_225 G29
AC41 GND_74 GND_124 AP18 U5 GND_265 BD32 GND_12 AN9 DNC_14 DNC_49 C27
D16 GND_178 GND_226 G31
AC43 GND_75 GND_125 AP2 U7 GND_266 BF26 GND_13 AN39 DNC_15 DNC_50 H4
D18 GND_179 GND_227 G33

id
AC9 GND_76 GND_126 AP20 V2 GND_267 BF28 GND_14 GND_31 AW31 AP44 DNC_16 DNC_51 H44
D20 GND_180 GND_228 G35
AD10 GND_77 GND_127 AR11 V28 GND_268 BF30 GND_15 GND_32 BD40 AR37 DNC_17 DNC_52 J5
D22 GND_181 GND_229 G37
AD46 GND_78 GND_128 AR17 V30 GND_269 BF32 GND_16 GND_33 BD42 AR39 DNC_18 DNC_53 J11
D24 GND_182 GND_230 G39
AD8 GND_79 GND_129 AR19 V32 GND_270 AW25 GND_17 GND_34 BE39 AR43 DNC_19 DNC_54 J13
D26 GND_183 GND_231 G41
AE1 GND_80 GND_130 AR21 V36 GND_271 GND_35 BE43 AT18 DNC_20 DNC_55 J15
D28 GND_184 GND_232 G7
AE41 AR47 V38 BF44 AT20 J35 B
GND_81 GND_131 GND_272 GND_36 DNC_21 DNC_56
D30 GND_185 GND_233 G9
AE7 GND_82 GND_132 AR7 V40 GND_273 AV42 DNC_22 DNC_57 J37
D32 GND_186 GND_234 J1
AF2 GND_83 GND_133 AU17 V42 GND_274 AV44 DNC_23 DNC_58 J39
B D34 GND_187 GND_235 L47
AF28 GND_84 GND_134 AU19 V44 GND_275 AW9 DNC_24 DNC_59 J43
D36 GND_188 GND_236 N11
AF30 GND_85 GND_135 AU21 W13 GND_276 AW35 GND_18 GND_37 AW29 AW11 DNC_25 DNC_60 L7
D38 GND_189 GND_237 N13
AF32 GND_86 GND_136 AU3 W15 GND_277 BB38 GND_19 GND_38 BC33 AW37 DNC_26 DNC_61 L15
D4 N15
AF36 GND_87 GND_137 AU33 W17
nf
GND_278
D40
GND_190 GND_238
N17
BB40 GND_20 GND_39 BC35 AW39 DNC_27 DNC_62 L35
GND_191 GND_239
AF38 GND_88 GND_138 AU35 W19 GND_279 GND_40 BC37 AW43 DNC_28 DNC_63 L41
D42 GND_192 GND_240 N19
AF40 GND_89 GND_139 AU37 W21 GND_280 GND_41 BD34 AY42 DNC_29 DNC_64 N5
D44 GND_193 GND_241 N21
AG11 GND_90 GND_140 AU5 W23 GND_281 GND_42 BD36 AY44 DNC_30 DNC_65 N39
D6 GND_194 GND_242 N23
AG13 GND_91 GND_141 AU7 W41 GND_282 GND_43 BD38 BA11 DNC_31 DNC_66 P4
D8 GND_195 GND_243 N27
AG15 GND_92 GND_142 AV2 W45 GND_283 GND_44 BE35 BA29 DNC_32 DNC_67 R5
E11 GND_196 GND_244 N29
AG17 GND_93 GND_143 AW17 W47 GND_284 GND_45 BF34 BA31 DNC_33 DNC_68 R39
E23 GND_197 GND_245 N31
AG19 GND_94 GND_144 AW47 W9 GND_285 GND_46 AY30 BA37 DNC_34 DNC_69 Y26
F10 GND_197 GND_246 N33
AG21 GND_95 GND_145 AW7 Y24 GND_286 GND_47 BG39 BA39 DNC_35
F12 GND_197 GND_247 N35
AG23 GND_96 GND_146 B10 Y40 GND_287
AG25 GND_97 GND_147 B16
Co

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 08_MSM8953_GND SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 8 OF 30


5 4 3 2 1
5 4 3 2 1

SMB1350 Charger
PMI8952

VBUS_USB_IN
D
U296-A
C273 35V

PMI8952
4.7uF

47K

C285
D CHARGE

SG273
142 USB_IN_1 USB_MID_1 130

143 USB_IN_2 USB_MID_2 131


C274

35V
144 132 C275

2
USB_IN_3 USB_MID_3
[9] VREF_BAT_THERM
4.7uF

1
USB_PMI_DM [16] 47PF
123 USB_DM GND_CHG_1 128

NC
USB_PMI_DP [16]

R273
111 USB_DP GND_CHG_2 129

5.1K

SG274
GND_CHG_3 141
R514 NF
[2,10,16] USB_ID Internal PU 80 USB_ID

FLASH_OUT_1 94

l
R274 100K/NC 101 95
USB_CS FLASH_OUT_2 VFLASH [10]

4.7uF 10V
96

C276
Not support Wipower in this SCH FLASH_OUT_3
R275 Place C1304 close to
81 WIPWR_DIV2_EN FLASH_VDD
0 Place C1301 close to
BOOT_CAP 105
BOOT_CAP and VSW_CHG
R276 51K 140 C278
[9] SYSON WIPWR_CHG_OK

SG275
0.027UF

ia
VSW_CHG_1 106

Internal PD 104 DC_SNS VSW_CHG_2 107

108 Isat depends on the different applications: charging current/flash current


VSW_CHG_3
L274 1.0uH
88 DC_EN VSW_CHG_4 116 VPH_PWR

VSW_CHG_5 117
package C280
C279

2
100 USB_EN VSW_CHG_6 118
D274
VSW_CHG_7 119 22uF 47PF

1
SG276
92 USB_SNS VSW_CHG_8 120 C
[9,16] VBUS_USB_IN

SG277
VREG_L5_1P8 55 SHDN VPH_PWR_1 114
1M/NC This diode saves
C Default is CHG_EN pin low enables power on charging R281 VPH_PWR_2 127
around 200mW at

nt
R282 10K 102 138 higher charging
CHG_EN VPH_PWR_3 current
TP-0.8MM 1
TP5 VPH_PWR_4 139
VBAT [9] 124 CHG_VBAT_SNS
Remote sense of battery CHG_OUT_1 113
CHG_OUT [9]

C283
BAT_CON_ID [9] 86 125
BATT_ID CHG_OUT_2

CHG_OUT_3 126
Pull up value the same as battery NTC,normally 10K 10uF/NC
CHG_OUT [9] BAT_THERM [9] 97 137
BATT_THERM CHG_OUT_4

CHG_OUT [9] 73 CS_MINUS

+/-1%
R284
VBAT [9]
Route PIN73,61 from the sense resistor using 61 91

0R
CS_PLUS CHG_LED CHG_ LED [9]
differential signal techniques, thin traces are sufficient

e
GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
VBAT 74 BATT_MINUS WIPWR_RST 89

[9] VBAT [9] 62 103 TO PM_PON_1


BATT_PLUS PGOOD_SYSOK SYSOK_PMI8952 [11]
Route PIN74,62 from the battery terminals using
differential signal techniques, thin traces are sufficient BUA 43 [2,11]
UIM_BATT_ALARM
USB_ID_RVAL1 90

42 VDD_MSM_IO USB_ID_RVAL2 112


VREG_L5_1P8

id
R_BIAS 85 VREF_BAT_THERM [9]

GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
122 GND_REF_CHG 135
V_ARB

C288
98 B
VAA_CAP

C287
BAT CONN
Dedicated VIA to Main GND

1uF
109 GNDC19

1uF
B
99 GNDC18 GND_FG 110 GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]

78

SG279
GNDC14
79 GNDC15
nf 115 GNDC20

SYSON 93
SYSON [9]

C289

PMI_VDD_CAP net is 5VDC,cap is 0603. Do not use 0402 as may derate to -80%.
4.7uF
TP-1.2MM 10V
TP273

VBAT [9]
SG280
1

VBAT [9]
TP-1.2MM
Co
TP4 TP-1.2MM TP-1.0MM TP-1.0MM
C291

TP276 TP275
C290

C292

TP3
Charger indicator
33PF
1uF
1

10uF
10V
1

[2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
GND
VREF_BAT_THERM [9]
R285
R287 VPH_PWR

DIODE-LED-WHITE-0603
SG281

0 C293

D275
1
10K 1% R288
J501 BAT_THERM [9]
33PF

2
RT1

1 0
+
BAT_CON_ID [9]
C295

4 2
-
1

A 3 R999 0
[10] GREEN_LED
240K

33PF

33PF

BTB-DF57H-2P
10K
TVS275

A
2

R998 NF
[9] CHG_ LED

TVS276
C294
R289

Near the battery area

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 09_PMI8952_CHARGER SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 9 OF 30


5 4 3 2 1
5 4 3 2 1

U296-B
U296-C

PMI8952
PMI8952

l
CHARGE
C296 0.47UF CHARGE
68 RESIN VREG_ADC_LDO 46
[11,16] PM_RESIN_N1
Depends on if having boost bypass
60 71 F_LED1 [14]
VPH_PWR VDD_TORCH FLASH_LED1
38 SPMI_CLK PMi8950 WLED has the function of output isolation/short circuit protection,
[3,11] SPMI_CLK F_LED2 [14]
FLASH_LED2 83 need add external FET and diode if this function is needed.
39 SPMI_DATA
[3,11] SPMI_DATA VFLASH [9]
C297
72 VDD_FLASH_1
54 0.1uF
DVDD_BYP Place C1407 close to PIN6,dedicated trace from PIN8

ia
10V 84 VDD_FLASH_2 VREG_WLED 6
134 to C1407 PGND and then a dedicated via to main GND at C1407 C298 C299
[11,16] KYPD_PWR_N1 KYPD_PWR

D296 18PF
R296 NF
69 package 50V
[3,11] PM_PON_RESET_N PS_HOLD LCD_BL_LED_A [14]
C300 VPH_PWR VDD_WLED 7
AVDD_BYP 53 0
0.47UF GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
8 GND_WLED
CLK_IN is not used
50 CLK_IN L296 R297

SG296
9 10UH 0
VSW_WLED VPH_PWR

C301
C304

C302
C303
40 NC1 C305 28
0.1uF VPH_PWR VDD_DIS_P 18PF C
41 58 SG297
NC2 REF_BYP 4.7uF 35V GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]

18PF

10uF
50V

50V
10V GND_WLED_I 31
44 NC3
47nF for LCD, 1.5nF for AMOLED

SG299
18

SG298
NC4 C306
C 15 DIS_N_CAP_REF
19

nt
NC5 0.047UF LCD_BL_LED_K1 [14]
WLED_SINK1 21
59

SG300
GND_REF LCD_BL_LED_K2 [14]
WLED_SINK2 20
75 GPIO_1
26 GND_DIS_N_REF WLED_SINK3 32 C330 C331
63 Isat depends on the different applications, like 4s4p, 8s2p and so on.
GPIO_2
To external SMB charger 33

SG301
WLED_SINK4 18PF 18PF
GNDC6 56
50V 50V
R515 0
22 MPP_1
[2,9,16] USB_ID
25 VDD_1P8_DIS_N VDIS_P_FB 29
34 VREG_L5_1P8
[9] GREEN_LED MPP_2 LCD_VSP [14]
VDIS_P_OUT 5
10 MPP_3 GNDC9 66 C307
C398
22uF
47 MPP_4 GNDC10 67 3 VDD_DIS_N 10V
[2] FLASH_STROBE_NOW VPH_PWR 4
GND_DIS_P 18PF
GNDC12 76 Place C1411 close to PIN3 C308 C309 50V

GNDC13 77 SG302 Place C1410 close to PIN5,dedicated trace from PIN4


10uF
to C1410 GND and then a dedicated via to main GND at C1410

e
57 0.1uF
VPH_PWR VDD_ADC_LDO
L297

SG303
VSW_DISP_1 16
VPH_PWR
GNDC8 65
30 17 4.7UH C310
WLED_CABC VSW_DISP_2 C390
49 GNDC4 GNDC16 82
internal PD 51
For AMOLED,Not needed in LCD mode. DIS_SCTRL 10uF
GNDC21 121 18PF
LCD_CABC [14]
leave float if not used SG304
50V
45 GNDC3 GNDC22 133

id
GNDC23 136 [2] R298
GP_PDM_A0 From MSM IO or codec 11 HAP_PWM_IN1 VDIS_N_FB 27
87 GNDC17 0 12 1 LCD_VSN [14]
HAP_PWM_IN2 VDIS_N_OUT_1
13 C332 C311
VDIS_N_OUT_2
48 VDD_HAP 22uF Place C0613 close to PIN1,13
VPH_PWR L298 18PF 10V
R299 2 50V B
C313 VSW_DIS_N_1
C312
4.7UH
VSW_DIS_N_2 14

SG306
10uF

SG305
22nF/NC 1M 36 GND_HAP
B

SG307
23 GNDC1
37 GNDC2
nf 52 GNDC5 HAP_OUT_P 35
B296 600ohm
PMI_HAP_OUT_P [10]
The current for LCD/AMOLED is different,
64 GNDC7 possible to choose the inductor with smaller Isat
B297 600ohm
70 GNDC11 HAP_OUT_N 24 based on the different application.
PMI_HAP_OUT_N [10]

MOTOR
Co
[10] PMI_HAP_OUT_N R300 0 1
J296
R301 0 1
[10] PMI_HAP_OUT_P J297

C314

C315
33PF

33PF
TVS570 TVS571

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 10_PMI8952_BL/VIB/INTERFACE SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 10 OF 30


5 4 3 2 1
5 4 3 2 1

PM8953 Codec
XTAL_19M_OUT 1 2 [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
GND GND
U362-B D

4 3 U362-F
[11] PM_XO_THERM NC XTAL_19M_IN

D XTAL-19.2M-OZ19270001 PM8953
VREG_L5_1P8
X316 SG316
HK C316 1.0uF PM8953
88 NC_WLP_TST1 DVDD_BYP 61

C317 1.0uF SG317 HK VREG_S4_2P05


60 [11,12,26]
AVDD_BYP 120 163
CDC_SPKDRV_P CDC_VDDIO

C362

C363
TP316

C361
2 XTAL19M2_IN VPP 71 121 CDC_SPKDRV_M

100PF
C364
81

2.2uF
3 59 CDC_VDD_PA

1.0uF
XTAL19M2_OUT VPH_PWR VPH_PWR

0.1uF
GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
VCOIN 14
96 CDC_IN1_P CDC_VDD_CP 161
CDC_MIC1_P

33PF
KYPD_PWR_N1 [10,16] [13] (Bottom MIC)

C319
63 KYPDPWR 97 CDC_IN1_M
[13] CDC_MIC1_M

l
D316 VREG_L16_1P8 [11,12]
SYSOK_PMI8952 [9] 77 111 [13] 108 Place C1807 close to pin 107
PON_1 OPTION1 22uF CDC_HDS_MIC2_P (Headset MIC)
CDC_IN2_P

C318
10V

1%
PM_PON_RESET_N [3,10] (Top MIC) 122 107

R320
27 123 [13] CDC_MIC3_P CDC_IN3_P CDC_VDD_SPKDRV VPH_PWR
PON_RESET OPTION2
C369 0.1uF_NF

100K
MSM_PS_HOLD [3,16,28] 52 PS_HOLD

C365
[13] CDC_MIC_BIAS1 69

2.2uF
CDC_MIC_BIAS1
PM_RESIN_N1 [10,16] 76 74 PA_THERM0 [19]
RESIN PA_THERM 83 177
[13] CDC_MIC_BIAS2 CDC_MIC_BIAS2 CDC_BOOST_VREG_5V
D317 C368 NF GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
TP317

C320 124 CBLPWR

ia
[13] CDC_EAR_P 93 CDC_EAR_P 2.2uF is appropriate if a pilot tone based speaker protection system is used.
0.01uF/NC TEST_EN 102
If such a speaker protection system is not used,choose a
CAD NOTE: Place C1811 and C1808 close to pin 177
94 CDC_EAR_M capacitor that wll create an appropriate HPF for the system
SPMI_CLK [3,10] R324 0 [13] CDC_EAR_M
51 SPMI_CLK
CDC_BOOST_SW 176
SPMI_DATA [3,10] R325 0 37 SPMI_DATA VREF_DDR2 8
VREF_LPDDR3 [3,6] [2]CDC_PDM_CLK 150 CDC_PDM_CLK CDC_BOOST_SNS 162

[2] CDC_PDM_SYNC 136 HT361


CDC_PDM_SYNC HT362
C371 470PF
R327 C372 470PF
SLEEP_CLK1 89 SLEEP_CLK [3]
R365
0 [2] CDC_PDM_TX 149 CDC_PDM_TX CDC_HPH_REF 82
WTR_XO_CLK [17] CDC_HPH_REF [13]
41 RFCLK1 0 C375 680PF
NF R328
CLK2_DTV [26] R925
43 RFCLK2 VIN_GR7 31 R367 0 [13]
VPH_PWR [2] CDC_PDM_RX0 135 CDC_PDM_RX0 CDC_HPH_L 68 CDC_HPH_L C
R329
0 R369 0 [13]
WTR1_XO_IN [18] 46 RFCLK3 [2] CDC_PDM_RX1 178 CDC_PDM_RX1 CDC_HPH_R 95 CDC_HPH_R
VREG_S4_2P05 [11,12,26]
0 C379 680PF
[2] CDC_PDM_RX2 164 CDC_PDM_RX2

nt
C C321 CDC_HS_DET 109 CDC_HS_DET [13]
4 1.0uF
VREG_L20
134 CDC_PDM_RX0_COMP
[2] CDC_PDM_RX0_COMP
16 GND HT363
GND_XO 148
[2] CDC_PDM_RX1_COMP CDC_PDM_RX1_COMP
MSM_BBCLK1_EN [3] 0
R330 55 BBCLK1_EN CDC_GND_CP 147 [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
GND

SG318
BBCLK1 [3] R331 0 67 CDC_LO_P (complementary term for the psedo differential.)
32 BBCLK1 R375
C322 66 CDC_LO_M CDC_GND_CFILT 84 [13]
1.0uF CDC_MIC3_M
19 BBCLK2 VREG_L21 5 R376 (TOP MIC)
C323

0
Note
GND_RF 17 GND HT364
160 CDC_NCP_FLY_P CDC_GND_SPKDRV 132 0 GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
R332 GND_REF MUST connect directly to C1501 and then to
100K 1% C382 2.2uF
33PF

VREG_L16_1P8 main GND with a dedicated via. 146 CDC_NCP_FLY_N

SG319
[11,12]
GND_XO and GND_RF MUST connect directly to C1507 174

HT365
PM_XO_THERM [11] 73 CDC_GND_BOOST_1
XO_THERM and C1508 respectively and then connect to main GND
with dedicated via. 133 CDC_NCP_VNEG CDC_GND_BOOST_2 175
C324 72 57 REF_BYP
XOADC_GND REF_BYP

e
C325
1000PF 25V REF_GND 70 B361 120ohm 80

HT366
CDC_PA_VNEG
GND [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]

C383

C384
1 XOISOLATION_GND_1 0.1uF
10V
15 XOISOLATION_GND_2

1.0uF
SG321

2.2uF
SG320

[2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]
SG322

GND

id
B

U362-A

PM8953

HK
nf 85 CMN_GND_1

86 CMN_GND_2

87 CMN_GND_3

98 CMN_GND_4

99 CMN_GND_5
VREG_L16_1P8 [11,12]
100 CMN_GND_6

U362-C
Co R317

100K 1%
1%
R316

100K

PM8953

HK
152 GPIO1 MPP1 112
VDD_PX_BIAS_MPP_1 [4]
NFC_CLK_REQ [27]
141 GPIO2 MPP2 125
RT321
UIM_BATT_ALARM [2,9] 142 110
GPIO3 MPP3 VREF_DAC_MPP_3 [7]

117 GPIO4 MPP4 151


QUIET_THERM [11]

104 GPIO5

A 90 100K
GPIO6
Backup, may change to other MPP as needed
143 GPIO7 CC1 114 A

129 GPIO8 CC2 101 QUIET_THERM [11]

VCONN 113 RT316


R326

100K

100K

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 11_PM8953_CONTROL/CODEC SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 11 OF 30


5 4 3 2 1
5 4 3 2 1

D
U362-D

PM8953

64 HK 62 VREG_S1_0P8625 [5,12]
VPH_PWR VIN_S1_1 VFB_S1

65 VIN_S1_2 Remote sense from MSM side for S1


C333

C334

L333 U362-E
[5,12]
22uF

22uF

C335 4.7uF VSW_S1 1.0uH VREG_S1_0P8625


39 GND_S1_1 VSW_S1_1 53

40 GND_S1_2 VSW_S1_2 54

l
SG333

PM8953

HK
126 9 VREG_L1_1P0 [17,18]
VREG_S3_1P225 VIN_GR1 VREG_L1
105 75 VREG_S2_0P8625 [4,5,12]
VIN_S2_1 VFB_S2 VREG_L2_1P1 [14]
VREG_L2 140
106 Remote sense from MSM side for S2
VIN_S2_2 VREG_L3_0P925 [5]
VREG_L3 153

ia
36 50 VREG_L4_1P8 [17,18,24]
VREG_S3_1P225 VIN_GR2 VREG_L4
C336 4.7uF
78 91 L334 1.0uH VREG_S2_0P8625 [4,5,12]
GND_S2_1 VSW_S2_1
VREG_L5 49
VREG_L5_1P8
79 GND_S2_2 VSW_S2_2 92
22 VREG_L6_1P8 [2,4,14,15]
SG334

VREG_L6

139 7 VREG_L7_1P8 [5,21,24]


Sense node from output caps VIN_GR3 VREG_L7

30 VREG_L8_2P9 [6]
VREG_L8
165 VIN_S3_1 VFB_S3 137
6 VREG_L9_3P3 [24]
VREG_L9 C
179 VIN_S3_2
VREG_S4_2P05 21 47 VREG_L10_2P8 [15]
VIN_GR4 VREG_L10

35 42 VREG_L11_2P95
VIN_GR4_EXTRA VREG_L11 [16]
C C337 4.7uF L335 2.2uH VREG_S3_1P225
167 GND_S3_1 VSW_S3_1 166
Local sense from MSM side for S3 VREG_L12_VDDPX2_SDC

nt
[4,5,6,12] 28 [4,16]
VREG_L12

C338

C339
181 GND_S3_2 VSW_S3_2 180
56 VREG_L13_3P075[5]
SG335

VREG_L13

22uF

22uF
VREG_L8, L11, L12, L17, L22 VREG_L14_UIM1 [4,16,27]
SG336 VPH_PWR 29 VIN_GR5 VREG_L14 45

44 58 VREG_L15_UIM2 [4,16]
VIN_GR5_EXTRA VREG_L15
12 38 Note
VIN_S4_1 VFB_S4 VREG_L16_1P8 [11]
Local sense from MSM side for S4 Star routing to each VIN group VREG_L16 48
13 VIN_S4_2
34 VREG_L17_2P85
VREG_L17 [14]
26 VIN_S4_3
33 18 VREG_L18_2P7 [17,19,20,21,22,23]
VIN_GR6 VREG_L18

23 VREG_L19_1P3 [5,24]
2.2uH VREG_L19
C340 4.7uF L336 VREG_S4_2P05 [11,12,26]
10 GND_S4_1 VSW_S4_1 11 [14]
20 VREG_L22_2P8
VREG_L22
C341

C342

e
24 GND_S4_2 VSW_S4_2 25
138 VREG_L23_1P175 [5,14]
SG337

VREG_L23
22uF

22uF

C388
C343

C344

C640

C345

C346

C347
C348

C349

C350

C351

C353

C355
C352

C354

C356

C357
SG338

1.0uF

4.7uF

1.0uF

1.0uF

1.0uF
VREG_S5_S6_0P8625
[4,12]

1.0uF

1.0uF
157 115

1.0uF

4.7uF

1.0uF

4.7uF

0.1uF

1.0uF

4.7uF

4.7uF

4.7uF
10V
VIN_S5_1 VFB_S5

1.0uF
171 VIN_S5_2

id
185 VIN_S5_3

C358
L337
159 158 VREG_S5_S6_0P8625 [4,12]
GND_S5_1 VSW_S5_1
0.47uH
173 GND_S5_2 VSW_S5_2 172
4.7uF B
SG339

187 GND_S5_3 VSW_S5_3 186 Remote sense from MSM side for S5/6

154 VIN_S6_1 VFB_S6 127

168 VIN_S6_2
nf
182 VIN_S6_3

C359 4.7uF
156 GND_S6_1 VSW_S6_1 155

170 GND_S6_2 VSW_S6_2 169


SG340

L338 0.47uH
184 GND_S6_3 VSW_S6_3 183

144 VIN_S7_1 VFB_S7 103 VREG_S7_0P915 [4,5,12]


Co
145 VIN_S7_2

L339
C360 4.7uF VREG_S7_0P915 [4,5,12]
118 GND_S7_1 VSW_S7_1 130
2.2uH
119 GND_S7_2 VSW_S7_2 131
SG341

Remote sense from MSM side for S7

116 GND [2,3,4,5,6,7,8,9,10,11,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28]


VREG_NEG_S5

VREG_NEG_S6 128

PROJECT: ZACH REV: V1.2

DOCUMENT NO.: 12_PM8953_SMPS/LDO SIZED: D

DEPARTMENT:
Hardware DEPT.
COMPANY:

DESIGNER: Huangjianping Last Saved Date: 2017/3/22 SHEET: 12 OF 30


5 4 3 2 1
5 4 3 2 1

HEADSET FM&DTV SWITCH

R443 2.2K/NC
CDC_MIC_BIAS2 [11]
L510 82NH
CDC_HDS_MIC2_P [11]

C443

C470
C917 L901 L902 39nH
[13] FM_ANT 1 2 1000PF 39nH C911 1 2 1000PF
FM_LANT_P [24]

33PF

C910
1nF

2
AUDIO-EAR-PH16-7B05F3MB

33PF
D
[11]

1
3 B444 1800ohm CDC_HPH_R
4 B445 1800ohm CDC_HPH_L [11]
5 B450 1800ohm 20K
R447 CDC_HS_DET [11]
2
D 6
B443 2 1000PF

C587
1 1800ohm C912 2 1 10PF C913 2 1 10PF C918 1 DTV_ANT [26]

C586
C446
C445
0

C447
J901 FM_ANT [13]
R403

R449

15NH
NF

10K

L903
33PF

33PF
TVS443

TVS444

1nF
C451
NF

C453
NF
C666

1nF
Note: For Cable detection
1
VR443
?PF

TVS445 TVS446
L443 1000ohm
CDC_HPH_REF[11]
B600 1000ohm

C449
TP1306
Dedicated VIA to Main GND TP-1.0MM

l
33PF

HT2

MAIN MIC
AUDIO PA

ia 0.1uF

10uF
CDC_MIC_BIAS1

TP2
C367
C366
L361 1.0uH
VPH_PWR C
Analog MIC
R1002

A2
B2
A3
A4
B3
B4
C3
C4
C5
D3
D4
MIC1 Close to MIC

0.1uF
1nF
R456

SW
SW
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
C 1 4 0
VDD OUTPUT
16v

nt
C1002

2 3
C461
C1001

GND GND

C617

C602
CDC_MIC1_P [11]
A5 D5 J907
IC-AUDIO_MIC_AM4311T42A0_PARTRON CDC_MIC1_M [11] R362 100 A6 VP GPI A1
[2] AUDIO_PA_RST
NF

A7 RESET U508 VBST B1


TVS1002

R614
0 INT VBST

1
R457 [2] AMP_INT
220PF

0 B5 C1
100nF

10uF 10uF 10uF 10uF


E6 GNDA VSPK D1
C464

[2,15] SPK_I2C_SCL
SCL VSPK
C463

[2,15] SPK_I2C_SDA D6 CS35L35-CWZR/A0 D2 C615 C604 C603 C614


NF R370 E5 SDA OUT+ C2
VREG_L5_1P8 AD0 OUT-
R1003

F6 E2
NF

SYNC VSNS+

0
F7 E3
NF
0

PDM_CLK_IN VSNS- 1

LRCK/FSYNC
E7 F1
TVS1001

VSPK_MODE
PDM_DATA_IN ISNS+ J905
E1 0 R6622
ISNS-
0R_220ohm B391

SDOUT

FILT+
B1301

0.01uF
0R_220ohm

MCLK
SCLK
SDIN

GNDA

VREG
1 SPKR_OUT_P

VA
R364
0 R6623
J906
B1300 0R_220ohm B392 0R_220ohm
Close to BB

C625
B7
C7
D7
C6
B6
E4
F5
F3
F2
F4
SPKR_OUT_M

C636

C635

C920

C919

C380

C381
1uF C626

33PF C628 1uF C627